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Volatile Storage patents



      
           
This page is updated frequently with new Volatile Storage-related patent applications. Subscribe to the Volatile Storage RSS feed to automatically get the update: related Volatile RSS feeds. RSS updates for this page: Volatile Storage RSS RSS


Method and electronic device of file system prefetching and boot-up method

Readdressing memory for non-volatile storage devices

System on chip with embedded security module

Date/App# patent app List of recent Volatile Storage-related patents
08/21/14
20140237315
 Method and system for improving data integrity in non-volatile storage patent thumbnailMethod and system for improving data integrity in non-volatile storage
A method for improving data integrity in a non-volatile memory system includes: accessing a non-volatile memory cell for retrieving hard data bits; generating soft information by capturing a reliability of the hard data bits; calculating syndrome bits by applying a lossy compression to the soft information; and generating a host data by executing a low density parity check (ldpc) iterative decode on the hard data bits and the syndrome bits.. .
08/14/14
20140229724
 Method and electronic device of file system prefetching and boot-up method patent thumbnailMethod and electronic device of file system prefetching and boot-up method
A method of file system prefetching is provided. The method is applicable to an electronic device including a volatile storage, a non-volatile storage, and multiple processors with multiple operating systems.
08/14/14
20140229657
 Readdressing memory for non-volatile storage devices patent thumbnailReaddressing memory for non-volatile storage devices
Memory for a fragmented file on a non-volatile storage device can be readdressed to contiguous physical memory addresses, while the physical location of the file fragments of the fragmented file stored on the non-volatile storage device remain the same after the memory is readdressed. A logical block addressing (lba) mapping table can be updated based on the readdressed contiguous physical memory addresses..
08/07/14
20140223569
 System on chip with embedded security module patent thumbnailSystem on chip with embedded security module
An embedded security module includes a security processor, volatile and non-volatile memory, and an interface. The security processor includes transistors formed in one or more semiconductor layers of a semiconductor die, and implements one or more security-related functions on data and/or code accessed by the security processor.
08/07/14
20140223121
 Point in time copy operations from source volumes to space efficient target volumes in two stages via a non-volatile storage patent thumbnailPoint in time copy operations from source volumes to space efficient target volumes in two stages via a non-volatile storage
A request is received to perform a point in time copy operation from a source volume to a space efficient target volume. A controller copies data stored in a group of data storage units, from the source volume to a non-volatile storage, to preserve the point in time copy operation.
08/07/14
20140223083
 Zone-based defragmentation methods and user devices using the same patent thumbnailZone-based defragmentation methods and user devices using the same
A defragmentation method of a user device which includes a host and a nonvolatile storage device includes: determining whether fragments of a first file stored at the nonvolatile storage device are in a same logical address zone; and executing defragmentation on the fragments of the first file if the fragments of the first file are in different logical address zones by moving the fragments of the first file to a logical address space corresponding to at least one of the different logical address zones.. .
08/07/14
20140223081
 Point in time copy operations from source volumes to space efficient target volumes in two stages via a non-volatile storage patent thumbnailPoint in time copy operations from source volumes to space efficient target volumes in two stages via a non-volatile storage
A request is received to perform a point in time copy operation from a source volume to a space efficient target volume. A controller copies data stored in a group of data storage units, from the source volume to a non-volatile storage, to preserve the point in time copy operation.
08/07/14
20140222885
 System for real-time data processing patent thumbnailSystem for real-time data processing
A real-time data processing apparatus that is connected to a user over a network, the real-time data processing apparatus comprising a data access unit that accesses user transaction data from the user, a data storage that stores orchestration process data that includes information relating to a processing of the user transaction data, a transaction processing unit that: i) accesses the user transaction data from the data access unit, ii) accesses the orchestration process data from the data storage, and iii) processes the user transaction data using the orchestration process data and a transaction data communication unit that communicates a result of the processed user transaction data in real-time to the user, wherein the real-time data processing apparatus does not store the accessed user transaction data in a non-volatile storage medium.. .
07/31/14
20140215277
 Selective restoration of data from non-volatile storage to volatile memory patent thumbnailSelective restoration of data from non-volatile storage to volatile memory
A method of controlling data transfers between a volatile memory and a non-volatile storage, the volatile memory being on a memory device operatively coupled to a computer system, the data transfers comprising: storing data from the volatile memory to the non-volatile storage when a power source of the computer system fails, the method comprising following re-establishment of the previously failed power source, the step of: selectively restoring data from the non-volatile storage to the volatile memory by a controller software after restart operations.. .
07/31/14
20140215136
 Methods and apparatus for storing data to a solid state storage device based on data classification patent thumbnailMethods and apparatus for storing data to a solid state storage device based on data classification
Systems and methods for storing data to a non-volatile storage device are provided. A request to store data to the storage device at a given address corresponding to one of a plurality of regions of the storage device is received.
07/31/14
20140215128
Adaptive initial program voltage for non-volatile memory
When programming a set of non-volatile storage elements using a multi-stage programming process, a series of programming pulses are used for each stage. The magnitude of the initial program pulse for the current stage being performed is dynamically set as a function of the number of program pulses used for the same stage of the multi-stage programming process when programming non-volatile storage elements connected to on one or more previously programmed word lines..
07/31/14
20140211568
Bit line current trip point modulation for reading nonvolatile storage elements
Upon selecting non-volatile storage elements to be sensed, the system obtains information about the position of these non-volatile storage elements, determines sensing parameters based at least in part on this information, pre-charges a charge storage device and, while maintaining the voltage level of the bit lines of these memory cells at a constant value, applies a reference signal to these non-volatile storage elements for a certain duration of time, afterwards determining whether, for the certain duration of time, the current conducted by these non-volatile storage elements exceeds a predetermined value.. .
07/31/14
20140211561
Programming non-volatile storage system with multiple memory die
A system and methods for programming a set of data onto non-volatile memory elements, maintaining copies of the data pages to be programmed, as well as surrounding data pages, internally or externally to the memory circuit, verifying programming correctness after programming, and upon discovering programming error, recovering the safe copies of the corrupted data to be reprogrammed in alternative non-volatile memory elements. Additionally, a system and methods for programming one or more sets of data across multiple die of a non-volatile memory system, combining data pages across the multiple die by means such as the xor operation prior to programming the one or more sets of data, employing various methods to determine the correctness of programming, and upon identifying data corruption, recovering safe copies of data pages by means such as xor operation to reprogram the pages in an alternate location on the non-volatile memory system..
07/24/14
20140208009
Storage system
A storage system in an embodiment of this invention comprises a non-volatile storage area for storing write data from a host, a cache area capable of temporarily storing the write data before storing the write data in the non-volatile storage area, and a controller that determines whether to store the write data in the cache area or to store the write data in the non-volatile storage area without storing the write data in the cache area, and stores the write data in the determined area.. .
07/17/14
20140198575
Method and apparatus for program and erase of select gate transistors
Techniques are provided for programming and erasing of select gate transistors in connection with the programming or erasing of a set of memory cells. In response to a program command to program memory cells, the select gate transistors are read to determine whether their vth is below an acceptable range, in which case the select gate transistors are programmed before the memory cells.
07/17/14
20140198558
Non-volatile storage system using opposite polarity programming signals for mim memory cell
A reversible resistance-switching metal-insulator-metal (mim) stack is provided which can be set to a low resistance state with a first polarity signal and reset to a higher resistance state with a second polarity signal. The first polarity signal is opposite in polarity than the second polarity signal.
07/10/14
20140195564
Persistent data structures
Apparatuses, systems, methods, and computer program products are disclosed for a persistent data structure. A method includes associating a logical identifier with a data structure.
07/10/14
20140195480
Persistent memory management
Apparatuses, systems, methods, and computer program products are disclosed for persistent memory management. Persistent memory management may include providing a persistent data structure stored at least partially in volatile memory configured to ensure persistence of the data structure in a non-volatile memory medium.
07/03/14
20140189280
Reuse of host hibernation storage space by memory controller
A method for data storage includes, in a host system that operates alternately in a normal state and a hibernation state, reserving a hibernation storage space in a non-volatile storage device for storage of hibernation-related information in preparation for entering the hibernation state. While the host system is operating in the normal state, a storage task other than storage of the hibernation-related information is performed using at least a portion of the reserved hibernation storage space..
07/03/14
20140189216
Apparatus, system, and method for conditional and atomic storage operations
An apparatus, system, and method are disclosed for implementing conditional storage operations. Storage clients access and allocate portions of an address space of a non-volatile storage device.
07/03/14
20140185382
Erase for non-volatile storage
Techniques are disclosed herein for erasing non-volatile storage elements. A sequence of increasing erase voltages may be applied to a substrate.
07/03/14
20140185351
Non-volatile storage system with dual block programming
A non-volatile storage system is disclosed that includes a plurality of blocks of non-volatile storage elements, a plurality of word lines connected to the blocks of non-volatile storage elements such that each word line is connected to adjacent blocks of non-volatile storage elements, a plurality of bit lines connected to the blocks of non-volatile storage elements, multiple sets of word lines drivers such that each set of word line drivers is positioned between two adjacent blocks for driving word lines connected to the two adjacent blocks, global data lines, local data lines in selective communication with the bit lines, one or more selection circuits that selectively connect the global data lines to selected local data lines and connect unselected local data lines to one or more unselected bit line signals and control circuitry in communication with the one or more selection circuits and the global data lines. The control circuitry concurrently programs non-volatile storage elements of two adjacent blocks by applying programming signals on word lines connected to the two adjacent blocks and applying programming signals on appropriate bit lines via the global data lines and the one or more selection circuits..
06/26/14
20140181620
System and method for using solid state storage systems as a cache for the storage of temporary data
A method of storing data includes a storage device controller that receives a storage access operation to store data on at least one non-volatile storage device having a plurality of individually accessible blocks. In response to receiving the storage access operation to store data, the controller initiates a first program cycle to store the data as temporary data within one or more of the blocks.
06/26/14
20140181538
Controlling configurable peak performance limits of a processor
In one embodiment, the present invention includes a processor having a plurality of cores each to execute instructions, a non-volatile storage to store maximum peak operating frequency values each a function of a given number of active cores, a configuration storage to store frequency limits each corresponding to one of the maximum peak operating frequency values or a configurable clip frequency value less than the maximum peak operating frequency value. In turn, a power controller is configured to limit operating frequency of the cores to a corresponding frequency limit obtained from the configuration storage.
06/26/14
20140181379
File reading method, storage device and electronic device
A file reading method, storage device and electronic device are described. The file reading method is applied to an electronic device that includes a nonvolatile storage device as an internal storage device.
06/26/14
20140179236
Headless external sensor discovery and data access using mobile device
A device, system, and machine-readable medium for headless sensor measurements are disclosed. In one embodiment, the device is exclusive of a display.
06/26/14
20140176581
Controlling configurable peak performance limits of a processor
In one embodiment, the present invention includes a processor having a plurality of cores each to execute instructions, a non-volatile storage to store maximum peak operating frequency values each a function of a given number of active cores, a configuration storage to store frequency limits each corresponding to one of the maximum peak operating frequency values or a configurable clip frequency value less than the maximum peak operating frequency value. In turn, a power controller is configured to limit operating frequency of the cores to a corresponding frequency limit obtained from the configuration storage.
06/19/14
20140173340
Incident handling
A first future time occurs sooner than a second future time. The first future time indicates when the first and second future times are to be evaluated.
06/19/14
20140167816
Memory cell with volatile and non-volatile storage
The invention concerns a memory device comprising at least one memory cell comprising: first and second pairs of cross-coupled transistors; and a first resistance switching element (202) coupled between a first supply voltage (vdd, gnd) and a first transistor of said first pair of transistors and programmed to have one of first and second resistances; and control circuitry adapted to store a data value (dnv) at said first and second storage nodes by coupling said first storage node to said second supply voltage (vdd, gnd), the data value being determined by the programmed resistance of the first resistance switching element.. .
06/12/14
20140160848
Select gate bias during program of non-volatile storage
Techniques disclosed herein may prevent program disturb by preventing a select transistor of an unselected nand string from unintentionally turning on. The vgs of a select transistor of a nand string may be lowered from one programming pulse to the next programming pulse multiple times.
06/05/14
20140157404
Virtualizing a hardware monotonic counter
Embodiments of an invention for virtualizing a hardware monotonic counter are disclosed. In one embodiment, an apparatus includes a hardware monotonic counter, virtualization logic, a first non-volatile storage location, and a second non-volatile storage location.
06/05/14
20140153050
Image forming apparatus that generates log image, image forming system, and non-transitory recording medium
An image forming apparatus of the present disclosure includes an image output unit, a nonvolatile storage unit, an original-image generating device, and a log-image generating device. The image output unit outputs an image.
05/29/14
20140144316
Method and device for activating an actuator element in a motor system for a motor vehicle
The disclosure relates to a method for operating a positioning actuator system with an electronically commutated actuator drive for driving an actuator element, having the following steps: non-volatile storage of a position information item of the actuator element or of a rotor of the actuator drive which was detected last as a reference position before the positioning actuator system is switched off; in the case of switching on of the positioning actuator system retrieval of the reference position and actuation of the actuator drive by energizing the actuator drive in accordance with a space phasor which is dependent on the reference position. The object is to make available an improved method for releasing blockage of an actuator element or actuation after activation of a motor system with a maximum actuating torque.
05/22/14
20140140162
Memory cell array with reserved sector for storing configuration information
A memory device is provided including a cell array and a volatile storage device. The cell array may include a plurality of word lines, a plurality of bit lines, wherein a selection of a word line and bit line defines a memory cell address, and a non-volatile reserved word line for storing configuration information for the cell array.
05/08/14
20140126291
3d stacked non-volatile storage programming to conductive state
Programming nand strings in a 3d stacked storage device to a conductive state is disclosed. Storage elements may be erased by raising their vt and programmed by lowering their vt.
05/08/14
20140125592
Apparatus to track a pointing device
An apparatus for use in helping to track a pointing device is disclosed herein. An example of the apparatus includes an orientation member coupled to the pointing device that includes a plurality of points at least some of which define a plane.
05/01/14
20140119126
Dynamic bit line bias for programming non-volatile memory
A program operation for a set of non-volatile storage elements. A count is maintained of a number of program pulses which are applied to an individual storage element in a slow programming mode, and an associated bit line voltage is adjusted based on the count.
04/24/14
20140115252
Block storage-based data processing methods, apparatus, and systems
The present disclosure relates to the field of information technology, and in particular, to a block storage-based data processing method, apparatus, and system. The block storage-based data processing method provided in embodiments of the present disclosure is applied in a system including at least two storage nodes, each storage node including a cpu, a cache medium, and a non-volatile storage medium, and the cache medium in all the storage nodes forming a cache pool.
04/17/14
20140108703
Scalable data structures for control and management of non-volatile storage
Scalable control/management data structures enable optimizing performance and/or attempting to achieve a particular performance target of an ssd in accordance with host interfacing, number of nvm devices, nvm characteristics and size, and nvm aging and performance decline. Pre-scaled data structures are included in ssd controller firmware loadable at system initialization.
04/17/14
20140108699
Storage array, storage system, and data access method
A storage array, a storage system, and a data access method. A data access method of a storage device includes: transferring data input from a user interface chip to a non-volatile storage device through a peripheral component interconnect express (pcie) link, where the user interface chip and the non-volatile storage device are connected to the pcie link, and the non-volatile storage device includes a memory and a non-volatile storage medium; writing the data to the memory of the non-volatile storage device; and writing the data written in the memory of the non-volatile storage device to the non-volatile storage medium.
04/17/14
20140106525
Method of forming pn floating gate non-volatile storage elements and transistor having n+ gate
Non-volatile storage elements having a pn floating gate are disclosed herein. The floating gate may have a p− region near the tunnel oxide, and may have an n+ region near the control gate.
04/10/14
20140101379
Variable over-provisioning for non-volatile storage
Dynamically varying over-provisioning (op) enables improvements in lifetime, reliability, and/or performance of a solid-state disk (ssd) and/or a flash memory therein. A host coupled to the ssd writes newer data to the ssd.
04/10/14
20140101376
Apparatus, system, and method for conditional and atomic storage operations
An apparatus, system, and method are disclosed for implementing conditional storage operations. Storage clients access and allocate portions of an address space of a non-volatile storage device.
04/10/14
20140101375
Apparatus, system, and method for allocating storage
An apparatus, system, and method are disclosed for allocating non-volatile storage. The storage device may present a logical address, which may exceed a physical storage capacity of the device.
04/10/14
20140101368
Binding microprocessor to memory chips to prevent re-use of microprocessor
A processor is provided that binds itself to a circuit such that the processor cannot be subsequently reused in other circuits. On a first startup of the processor, a memory segment of an external volatile memory device is read to obtain information prior to initialization of the memory segment.
04/03/14
20140095811
Fuzzy counters for nvs to reduce lock contention
A system for data management in a computing storage environment includes a processor device, operable in the computing storage environment, that divides a plurality of counters tracking write and discard storage operations through non volatile storage (nvs) space into first, accurate, and second, fuzzy, groups where the first, accurate, group is one of incremented and decremented per each write and discard storage operation, while the second, fuzzy, group is one of incremented and decremented on a more infrequent basis as compared to the first, accurate group.. .
04/03/14
20140095787
Nvs thresholding for efficient data management
For data management by a processor device in a computing storage environment, a threshold for an amount of non volatile storage (nvs) space to be consumed by any particular logically contiguous storage space in the computing storage environment is established based on at least one of a redundant array of independent disks (raid) type, a number of point-in-time copy source data segments in the logically contiguous storage space, and a storage classification.. .
04/03/14
20140095767
Storage device trimming
In an embodiment, a command that specifies a logical block to trim in a storage device is acquired. An entry in a logical-to-physical address (l2p) table that contains a physical address that corresponds to the logical block may be set to point to an invalid address.
04/03/14
20140095763
Nvs thresholding for efficient data management
For data management by a processor device in a computing storage environment, a threshold for an amount of non volatile storage (nvs) space to be consumed by any particular logically contiguous storage space in the computing storage environment is established based on at least one of a redundant array of independent disks (raid) type, a number of point-in-time copy source data segments in the logically contiguous storage space, and a storage classification.. .
04/03/14
20140095762
Fuzzy counters for nvs to reduce lock contention
A system for data management in a computing storage environment includes a processor device, operable in the computing storage environment, that divides a plurality of counters tracking write and discard storage operations through non volatile storage (nvs) space into first, accurate, and second, fuzzy, groups where the first, accurate, group is one of incremented and decremented per each write and discard storage operation, while the second, fuzzy, group is one of incremented and decremented on a more infrequent basis as compared to the first, accurate group.. .
03/27/14
20140089903
Sampling based runtime optimizer for efficient debugging of applications
A method of reproducing runtime environment for debugging an application is disclosed. The method includes accessing an optimizer file from a non-volatile storage medium.
03/27/14
20140089743
Power shutdown prediction for non-volatile storage devices
A method includes, in a host that stores data in a storage device, detecting an event that is indicative, statistically and not deterministically, of an imminent power shutdown in the host. A notification is sent to the storage device responsively to the detected event, so as to cause the storage device to initiate preparatory action for the imminent power shutdown..
03/27/14
20140085967
Memory elements with relay devices
Integrated circuits with memory elements are provided. An integrated circuit may include logic circuitry formed in a first portion having complementary metal-oxide-semiconductor (cmos) devices and may include at least a portion of the memory elements and associated memory circuitry formed in a second portion having nano-electromechanical (nem) relay devices.
03/20/14
20140082261
Self-journaling and hierarchical consistency for non-volatile storage
A non-volatile storage system having non-volatile memory (nvm) provides self-journaling and hierarchical consistency, enabling low-latency recovery and force unit access handshake. Mappings between host addresses and addresses in the nvm are maintained via one or more map entries, enabling locating of host data written to the nvm.
03/20/14
20140082256
Recovery from cache and nvs out of sync
For cache/data management in a computing storage environment, incoming data segments into a non volatile storage (nvs) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity..
03/20/14
20140082254
Recovery from cache and nvs out of sync
For cache/data management in a computing storage environment, incoming data segments into a non volatile storage (nvs) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity..
03/20/14
20140080272
Continuous mesh three dimensional non-volatile storage with vertical select devices
A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate.
03/20/14
20140078851
Continuous mesh three dimensional non-volatile storage with vertical select devices
A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate.
03/13/14
20140075259
On chip data recovery for non-volatile storage
Methods and devices for recovering data stored in a non-volatile storage device are provided. Data may be recovered for memory cells associated with a word line that cannot be read using ecc that was calculated based on the data stored on that word line.
03/13/14
20140075233
Customizable backup and restore from nonvolatile logic array
Design and operation of a processing device is configurable to optimize wake-up time and peak power cost during restoration of a machine state from non-volatile storage. The processing device includes a plurality of non-volatile logic element arrays configured to store a machine state represented by a plurality of volatile storage elements of the processing device.
03/13/14
20140075175
Control of dedicated non-volatile arrays for specific function availability
A device's configuration is controlled through control of its pre-boot process. Protected non-volatile logic element arrays store a machine state configuration of a processing device configured to backup data from volatile storage elements in a plurality of non-volatile logic element arrays.
03/13/14
20140075174
Boot state restore from nonvolatile bitcell array
A processing device using a plurality of volatile storage elements to execute a boot process for and stores in a plurality of non-volatile logic element arrays a boot state representing a state of the processing device after a given amount of the boot process is completed. When it is determined that the processing device needs to restart from a boot state, energy can be saved by restoring the machine state at that boot state instead of re-booting.
03/13/14
20140075107
Interface for storage device access over memory bus
A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices.
03/13/14
20140075089
Nonvolatile logic array with retention flip flops to reduce switching power during wakeup
A processing device is operated using a plurality of volatile storage elements. Data in the plurality of volatile storage elements is stored in a plurality of non-volatile logic element arrays.
03/13/14
20140075088
Processing device with nonvolatile logic array backup
A processing device is operated using a plurality of volatile storage elements. N groups of m volatile storage elements of the plurality of volatile storage elements per group are connected to an n by m size non-volatile logic element array of a plurality of non-volatile logic element arrays using a multiplexer.
03/13/14
20140071761
Non-volatile storage with joint hard bit and soft bit reading
A system is disclosed for reading hard bit information and soft bit information from non-volatile storage. Some of the hard bit information and/or soft bit information is read concurrently by using different bit line voltages, different integration times, different sense levels within the sense amplifiers, or other techniques.
03/13/14
20140071752
Nonvolatile memory systems with embedded fast read and write memories
A nonvolatile memory system is described with novel architecture coupling nonvolatile storage memory with random access volatile memory. New commands are included to enhance the read and write performance of the memory system..
03/06/14
20140068352
Information processing apparatus and fault processing method for information processing apparatus
An information processing apparatus includes a processing apparatus, a bus bridge connected to the processing apparatus through a first bus and connecting to a peripheral apparatus, a nonvolatile storage apparatus that stores information relating to a fault occurring in the peripheral apparatus or the bus bridge, a monitoring apparatus connected to the nonvolatile storage apparatus through a second bus different from the first bus and monitoring a system including the processing apparatus, and a fault notification unit that stores, when the fault occurs in the peripheral apparatus or the bus bridge, the information relating to the occurring fault into the nonvolatile storage apparatus and issues a notification of an error to the monitoring apparatus through the second bus. By the information processing apparatus, fault information of the peripheral apparatus and the bus bridge is acquired with certainty..
03/06/14
20140063961
Write data preservation for non-volatile storage
Methods and non-volatile storage systems are provided for recovering data during a programming of non-volatile storage. Program data that was originally stored in one set of latches may be preserved with a combination of two sets of latches.
03/06/14
20140063940
On chip dynamic read level scan and error detection for nonvolatile storage
Techniques for efficiently programming non-volatile storage are disclosed. A second page of data may efficiently be programmed into memory cells that already store a first page.
03/06/14
20140063346
Cradle system for audiovisual equipment
Methods and apparatuses for building and reconfiguring audiovisual equipment in a video production system. A wiring cradle may be installed in the video production system and one or more electrical or optical connections may be established between the wiring cradle and another element of the video production system.


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Volatile Storage topics: Volatile Storage, Storage Device, Memory Cell, Memory Cells, Select Gate, Semiconductor, Memory Device, Control Unit, Binary Search, Electronic Device, Touch Panel, Semiconductor Substrate, Volatile Memory, High Speed, Enumeration

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