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Transistors patents



      

This page is updated frequently with new Transistors-related patent applications.




Date/App# patent app List of recent Transistors-related patents
07/21/16
20160212367 
 Analog to digital converter for solid-state image pickup device patent thumbnailnew patent Analog to digital converter for solid-state image pickup device
There is provided a solid-state image pickup device including adcs that can be arranged in a limited space. The potential of a pixel signal outputted through a vertical readout line is held at a node.
Renesas Electronics Corporation


07/21/16
20160211860 
 D/a conversion circuit, oscillator, electronic apparatus, and moving object patent thumbnailnew patent D/a conversion circuit, oscillator, electronic apparatus, and moving object
A d/a conversion circuit includes a plurality of resistors that are connected to each other in series, and a plurality of mos transistors that are connected to terminals of the plurality of resistors, respectively. The plurality of resistors and the plurality of mos transistors are formed on a semiconductor substrate.
Seiko Epson Corporation


07/21/16
20160211859 
 D/a conversion circuit, oscillator, electronic apparatus, and moving object patent thumbnailnew patent D/a conversion circuit, oscillator, electronic apparatus, and moving object
A d/a conversion circuit includes a plurality of resistors connected to each other in series, a plurality of mos transistors connected to each other so as to correspond to a plurality of contacts, and a plurality of dummy electrodes respectively disposed on sides opposite to the plurality of mos transistors with a resistive element interposed therebetween when seen in a plan view of a semiconductor substrate. Each of the dummy electrodes is set to be in a second potential state when a gate electrode of the mos transistor disposed on a side opposite thereto with the resistive element interposed therebetween is in a first potential state, and is set to be in a first potential state when the gate electrode of the mos transistor is in a second potential state..
Seiko Epson Corporation


07/21/16
20160211848 
 Driver circuit patent thumbnailnew patent Driver circuit
A circuit comprises a voltage supply node, a reference voltage node, and a plurality of transistors coupled with the voltage supply node and the reference voltage node. The circuit also comprises a circuit input, a first delay element and a second delay element.
Taiwan Semiconductor Manufacturing Company, Ltd.


07/21/16
20160211839 
 Semiconductor integrated circuit and semiconductor integrated circuit device patent thumbnailnew patent Semiconductor integrated circuit and semiconductor integrated circuit device
Disclosed herein is a driver circuit including a first group of transistors provided between first and second nodes and including n of the transistor(s) where n is equal to or greater than one, and a second group of transistors provided in parallel with the first group of transistors and including m of the transistor(s) where m is equal to or greater than one and not equal to n, the m transistors being connected together in series. The n-channel transistor in the first group and at least one of the two n-channel transistors in the second group have their gate connected to an input node..
Socionext Inc.


07/21/16
20160211836 
 Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method patent thumbnailnew patent Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method
A delay circuit contains a first inversion circuit including a pull-up circuit and a pull-down circuit, and a second inversion circuit including a pull-up circuit and a pull-down circuit. The delay circuit further contains a first pass transistor connected in series to the pull-up circuit in the first inversion circuit between a power supply potential and an output node, a second pass transistor connected in series to the pull-down circuit in the first inversion circuit between a ground potential and the output node, a third pass transistor connected in series between the input node and the pull-up circuit in the second inversion circuit, and a fourth pass transistor connected in series between the input node and the pull-down circuit in the second inversion circuit.
Japan Science And Technology Agency


07/21/16
20160211831 
 Low-power retention flip-flops patent thumbnailnew patent Low-power retention flip-flops
A retention flip-flop is provided. The flip-flop includes a clock generation circuit, a master latch circuit, and a salve latch circuit.
Mediatek Inc.


07/21/16
20160211769 
 Self-excited push-pull converter patent thumbnailnew patent Self-excited push-pull converter
A self-excited push-pull converter, where between the bases of the push-pull converter's transistors (tr1, tr2) and the effective power suppler there is provided a constant current source (ii), which provides a constant current to the bases of the transistors. With the working voltage increases, the circuit enters into an operating mode not based on the core-saturation working mode, because the transistors' base current is limited by the constant current source and consequently the transistors' collector current cannot increase..

07/21/16
20160211474 
 Thin film transistor array and manufacturing  the same patent thumbnailnew patent Thin film transistor array and manufacturing the same
A thin film transistor array includes thin film transistors positioned in a matrix, each of the thin film transistors including a substrate, a gate electrode formed on the substrate, a gate insulation layer formed on the gate electrode, a source electrode formed on the gate insulation layer, a drain electrode formed on the gate insulation layer, a pixel electrode formed on the gate insulation layer and connected to the source electrode and the drain electrode, a semiconductor layer formed between the source electrode and the drain electrode, an interlayer insulation film covering the source electrode, the drain electrode, the semiconductor layer and a portion of the pixel electrode, and an upper pixel electrode formed on the interlayer insulation film and connected to the pixel electrode. The interlayer insulation film has one or more concave portions and one or more via hole portions..
Toppan Printing Co., Ltd.


07/21/16
20160211472 
 Flexible display device patent thumbnailnew patent Flexible display device
A flexible display device includes a display panel having a driving circuit unit including at least two capacitors and at least two thin film transistors on a flexible substrate, each of the at least two thin film transistors including a semiconductor layer with a gate region, a drain region, and a source region on the flexible substrate, and a gate electrode on the semiconductor layer, and a display unit on the flexible substrate and connected to the driving circuit unit, wherein the display panel is partitioned into a bending area and a non-bending area, the bending area being bendable by a tensile force and a compression force, and the driving circuit unit being asymmetrically designed in the bending area and the non-bending area.. .
Samsung Display Co., Ltd.


07/21/16
20160211373 
new patent

Methods for preventing oxidation damage during finfet fabrication


Embodiments of the present invention provide improved methods for fabricating field effect transistors such as finfets. Stressor regions are used to increase carrier mobility.
Globalfoundries Inc.


07/21/16
20160211366 
new patent

Lateral double diffused mos transistors


A lateral double diffused mos transistor including a substrate, a source region and a drain region disposed in the substrate, a first contact and a second contact connected to the source region and the drain region, respectively, a gate insulation layer and a gate electrode on the substrate, a first field plate extending from the gate electrode toward the drain region, a coupling gate disposed between the second contact and the first field plate on the substrate, the coupling gate having a coupling voltage by coupling operation with the second contact, and a second field plate disposed between the coupling gate and the first field plate on the substrate, the second field plate being electrically connected to the second field plate.. .
Sk Hynix Inc.


07/21/16
20160211346 
new patent

Epitaxial channel transistors and die with diffusion doped channels


Semiconductor structures can be fabricated by implanting a screen layer into a substrate, with the screen layer formed at least in part from a low diffusion dopant species. An epitaxial channel of silicon or silicon germanium is formed above the screen layer, and the same or different dopant species is diffused from the screen layer into the epitaxial channel layer to form a slightly depleted channel (sdc) transistor.
Mie Fujitsu Semiconductor Limited


07/21/16
20160211322 
new patent

Internal spacers for nanowire transistors and fabrication thereof


A nanowire transistor of the present description may be produced with internal spacers formed by using sacrificial spacers during the fabrication thereof. Once the nanowire transistor is formed, the sacrificial spacers, which are position between the transistor gate and the source and drains (respectively), may be removed.
Intel Corporation


07/21/16
20160211280 
new patent

Thin-film transistor array, fabrication method therefor, image display device and display method


A thin-film transistor array includes thin-film transistors each including an insulating substrate which is formed with a gate electrode, a gate wiring, a capacitor electrode and a capacitor wiring. A source electrode and a drain electrode having a gap therebetween and including a semiconductor pattern are formed, in a region overlapping with the gate electrode on the substrate via a gate insulator, with the semiconductor pattern being covered with a protective layer.
Toppan Printing Co., Ltd.


07/21/16
20160211027 
new patent

Operating a nonvolatile memory device


A method of operating a nonvolatile memory device includes: first programming a target transistor of a cell string of the nonvolatile memory device, wherein the target transistor has a first threshold voltage distribution after the first programming, and wherein the cell string includes a plurality of transistors; and second programming the target transistor of the cell string, wherein the first transistor has a second threshold voltage distribution after the second programming, wherein a width of the second threshold voltage distribution is less than a width of the first threshold voltage distribution.. .

07/21/16
20160211023 
new patent

Operation modes for an inverted nand architecture


Methods for performing memory operations on a memory array that includes inverted nand strings are described. The memory operations may include erase operations, read operations, programming operations, program verify operations, and erase verify operations.
Sandisk Technologies Inc.


07/21/16
20160211021 
new patent

Irreproducible and re-emergent unique structure or pattern identifier manufacturing and detection method, system, and apparatus


An irreproducible and re-emergent unique structure or pattern identifier manufacturing and detection method, system, and apparatus are provided. A non-volatile floating gate charge storage device can include a block of floating gate transistors that can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitrite-oxide region, and a control gate region.
The United States Of America As Represented By The Secretary Of The Navy


07/21/16
20160211011 
new patent

Dual-port sram timing control circuit


A dual-port sram timing control circuit, with three nmos transistors connected in series respectively between ground and nodes of the two bit lines to which the cell structure corresponds. The gates of the nmos transistors are connected to a corresponding wordline, a pulse signal and a timing control signal, respectively.
Shanghai Huahong Grace Semiconductor Manufacturing Corporation


07/21/16
20160211007 
new patent

Semiconductor memory device


According to one embodiment, a semiconductor memory device includes first, second, third and fourth mos transistors, and first and second precharge circuits. A memory cell includes the first, second, third and fourth mos transistors.
Kabushiki Kaisha Toshiba


07/21/16
20160210910 
new patent

Liquid crystal display device and electronic device


To provide a liquid crystal display device which can perform image display in both modes: a reflective mode where external light is used as an illumination light source; and a transmissive mode where a backlight is used. In one pixel, a region where incident light through a liquid crystal layer is reflected to perform display (reflective region) and a region through which light from the backlight passes to perform display (transmissive region) are provided, and image display can be performed in both modes: the reflective mode where external light is used as an illumination light source; and the transmissive mode where the backlight is used as an illumination light source.
Semiconductor Energy Laboratory Co., Ltd.


07/21/16
20160210892 
new patent

Display device and driving same


A picture-frame size of a display device including self light-emitting type display elements which are driven by a current is reduced over conventional devices. transistors for controlling supply of a light-emission enable signal outputted from an emission driver to emission lines are provided between the emission driver and the emission lines.
Sharp Kabushiki Kaisha


07/21/16
20160210387 
new patent

Calculating circuit-level leakage using three dimensional technology computer aided design and a reduced number of transistors


A method for calculating leakage of a circuit including a plurality of transistors includes simulating a three-dimensional model of the circuit, wherein the simulating accounts for a subset of the plurality of the transistors that includes less than all of the plurality of transistors, and calculating the leakage in accordance with the three-dimensional model.. .
International Business Machines Corporation


07/21/16
20160209914 
new patent

Apparatus and managing power in a computing system


A disable module may be coupled to an analog circuit of an electronic circuit. The disable module may detect an input voltage that is supplied to the analog circuit, and may disable (such as by powering off) the analog circuit if the input voltage is below a reference value.
Intel Corporation


07/21/16
20160209700 
new patent

Curved display device


A curved display device includes: a substrate including a display area; a plurality of thin film transistors disposed on the substrate; a plurality of pixel electrodes respectively connected to the plurality of thin film transistors; a liquid crystal layer disposed on the pixel electrodes and filling a plurality of microcavities; a common electrode facing the plurality of pixel electrodes and separated with the plurality of microcavities; and a roof layer formed on the common electrode. The plurality of microcavities are formed in a matrix form including a plurality of columns and rows, and the display area includes an edge portion and a center portion.
Samsung Display Co., Ltd.


07/14/16
20160204779 

Operating point optimization with double-base-contact bidirectional bipolar junction transistor circuits, methods, and systems


The present application teaches, among other innovations, methods and circuits for operating a b-tran (double-base bidirectional bipolar junction transistor). A base drive circuit is described which provides high-impedance drive to the base contact region on whichever side of the device is operating as the collector (at a given moment).
Ideal Power Inc.


07/14/16
20160204740 

System and a voltage controlled oscillator


In accordance with an embodiment, a voltage controlled oscillator (vco) includes a vco core having a plurality of transistors and a varactor circuit that has a first end coupled to emitter terminals of the vco core and a second end coupled to a tuning terminal. The varactor circuit includes a capacitance that increases with increasing voltage applied to the tuning terminal with respect to the emitter terminals of the vco core..
Infineon Technologies Ag


07/14/16
20160204714 

Variable-voltage self-synchronizing rectifier circuits, methods, and systems


The present application teaches, among other innovations, methods and circuits for operating a b-tran (double-base bidirectional bipolar junction transistor). A base drive circuit is described which provides high-impedance drive to the base contact region on whichever side of the device is operating as the collector (at a given moment).
Ideal Power Inc.


07/14/16
20160204251 

Pillar-shaped semiconductor device and production method therefor


A sio2 layer is formed at a middle of a si pillar. An opening is formed in a gate insulating layer and a gate conductor layer in a peripheral portion that includes a side surface of the sio2 layer.
Unisantis Electronics Singapore Pte. Ltd.


07/14/16
20160204239 

Insulated gate power device using a mosfet for turning off


An insulated gate turn-off (igto) device has a pnpn layered structure so that vertical npn and pnp transistors are formed. Trench gates are formed extending into the intermediate p-layer.
Pakal Technologies, Llc


07/14/16
20160204226 

Stress modulation in field effect transistors in reducing contact resistance and increasing charge carrier mobility


Field-effect transistor and method of fabrication are provided for, for instance, providing a gate structure disposed over a substrate. The fabricating method further includes forming a source and drain region within the substrate separated by a channel region, the channel region underlying, at least partially, the gate structure.
Globalfoundries Inc.


07/14/16
20160204223 

High voltage device fabricated using low-voltage processes


A method for fabricating a high-voltage transistor on a semiconductor substrate includes defining and forming shallow trench isolation regions for all of the transistors, defining and forming well regions for all of the transistors, forming a gate oxide layer in the well regions for all of the transistor, forming gates for all of the transistors over the gate oxide layer, implanting a dopant to form lightly-doped drain regions for all of the transistors, the lightly-doped drain regions for at least drains of the high-voltage transistors being spaced apart from an inner edge of the shallow trench isolation regions, forming gate spacers at sides of the gates of all of the transistors, and implanting a dopant to form sources and drains for all of the transistors, the drains of the high-voltage transistors being formed completely surrounded by the lightly-doped drain regions of the high-voltage transistors.. .
Microsemi Soc Corporation


07/14/16
20160204219 

Semiconductor device comprising ferroelectric elements and fast high-k metal gate transistors


A semiconductor device comprises a first and second circuit element. The first circuit element comprises a first electrode structure including a first high-k dielectric layer, the first high-k dielectric layer having a first thickness and comprising hafnium.
Globalfoundries Inc.


07/14/16
20160204202 

Quantum dot channel (qdc) quantum dot gate transistors, memories and other devices


This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy barrier.

07/14/16
20160204198 

High mobility transistors


An integrated circuit containing an n-channel finfet and a p-channel finfet has a dielectric layer over a silicon substrate. The fins of the finfets have semiconductor materials with higher mobilities than silicon.
Texas Instruments Incorporated


07/14/16
20160204181 

Display panel and repairing method thereof


A display panel and a repairing method thereof are disclosed. In one aspect, the display panel includes an active area including a plurality of pixels and a plurality of signal lines.
Samsung Display Co., Ltd.


07/14/16
20160204179 

Light emitting device and electronic apparatus


On a semiconductor substrate, a plurality of transistors that includes a drive transistor which controls a drive current according to a potential of a gate, a light emitting element that emits a light having a brightness corresponding to the drive current, and an element isolation portion that electrically isolates each transistor are formed. The element isolation portion has a structure in which an insulator fills inside of a groove formed on the semiconductor substrate..
Seiko Epson Corporation


07/14/16
20160204176 

Display device


A method of manufacturing an organic electroluminescent display device includes the steps of: forming transistors on an element substrate; and forming organic electroluminescent light emitting elements on the respective transistors, in which the step of forming the organic electroluminescent light emitting elements includes the steps of: forming anodes in correspondence with pixels; forming a polymer organic layer made of a polymer material by attaching the polymer material onto upper surfaces and end surfaces of the anodes; forming an organic layer having at least a light emitting layer on the polymer organic layer; and forming a cathode on the organic layer.. .
Japan Display Inc.


07/14/16
20160204172 

Organic light emitting diode display


An organic light emitting diode display includes a substrate including a display area and a non-display area adjacent the display area, a plurality of organic light emitting diodes at the display area of the substrate, a plurality of thin film transistors at the display area of the substrate, each of the plurality of thin film transistors being connected to a corresponding one of the plurality of organic light emitting diodes, and a first insulating layer covering an active layer of the plurality of thin film transistors, the first insulating layer having a greater number of contact holes at an outer region of the display area than at a central area of the display area.. .
Samsung Display Co., Ltd.


07/14/16
20160204159 

Solid state imaging device and electronic apparatus


Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.. .
Sony Corporation


07/14/16
20160204122 

Three-dimensional memory device containing plural select gate transistors having different characteristics and making thereof


A stack of material layers includes first material layers, second material layers located between a respective pair of an overlying first material layer and an underlying first material layer, and at least one temporary material layer located between a respective pair of an overlying first material layer and an underlying first material layer. After formation of a memory opening and a memory stack structure, at least one first backside recess is formed by removing the at least one temporary material layer and adjoining portions of a memory film.
Sandisk Technologies, Inc.


07/14/16
20160204107 

Semiconductor intergrated circuit and logic circuit


Disclosed herein is a driver circuit including first and second n-channel transistors connected together in series between first and second nodes. The first n-channel transistor is comprised of n fin transistor(s) having an identical gate length and an identical gate width where n is equal to or greater than one, and has its gate connected to a first input node.
Socionext Inc.


07/14/16
20160204098 

Gate dielectric protection for transistors


At least one method, apparatus and system disclosed herein involves forming a device comprising a transistor comprising an active gate and at least one inactive gate in parallel to the active gate. A source region on a substrate is formed.
Globalfoundries Inc.


07/14/16
20160204085 

Semiconductor system, device and structure


An integrated circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection between at least a portion of the plurality of first transistors; a second layer of less than 2 micron thickness, the second layer including a plurality of second transistors, the second layer overlying the at least one metal layer; and at least one conductive structure constructed to provide power to a portion of the second transistors, where the provide power is controlled by at least one of the transistors.. .
Monolithic 3d Inc.


07/14/16
20160204074 

Dicing power transistors


Some embodiments relate to a method of dicing a semiconductor wafer. The semiconductor wafer that includes a device structure that is formed within a device layer.
Taiwan Semiconductor Manufacturing Co., Ltd.


07/14/16
20160203870 

Data storage device including nonvolatile memory device and operating method thereof


A method of a operating a data storage device including a nonvolatile memory device and a memory controller is provided. The method includes reading a first selection transistors connected to a first selection line from among a plurality of selection lines with a reference voltage, determining whether a first number of selection transistors, from among the first selection transistors, which have a threshold voltage less than the reference voltage is larger than a first reference value, and if the first number is larger than the first reference value, programming the first selection transistors to have threshold voltage larger than or equal to a target voltage..

07/14/16
20160203862 

Memory device and access method


A memory device includes a plurality of bit lines extending in a first direction, a plurality of word lines extending in a second direction crossing the first direction, and a plurality of memory cells. Each memory cell includes a memory element and two select transistors disposed along the first direction and the memory element being configured to store information based on changes in resistance.
Sony Corporation


07/14/16
20160203856 

Threshold voltage mismatch compensation sense-amplifiers for static random access memories with multiple differential inputs


Sense amplifier configurations for memories are described. In these configurations, the differential inputs are boosted proportional to the respective bitline voltage enabling a low-voltage, reliable, faster sense amplifier operation.

07/14/16
20160203852 

Memory device and semiconductor device


A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit.. .
Semiconductor Energy Laboratory Co., Ltd.


07/14/16
20160203801 

Low capacitance display address selector architecture


This disclosure provides display-related systems, methods, and apparatus. A display apparatus can include an array of display elements and an address-selector architecture for addressing and loading data into the array of display elements.
Pixtronix, Inc.


07/14/16
20160203786 

Gate driving circuit and display device including the same


Provided is a display device. The display device includes a display panel, a gate driving circuit, a sensor part, and a control voltage generator.
Samsung Display Co., Ltd


07/14/16
20160203783 

Gate driving circuit


A gate driving circuit includes first and second driving stages respectively driving first and second gate lines of a display panel. The first driving stage includes output transistors, a first control transistor controlling an electric potential of a control node in response to a signal provided from the second driving stage through an input terminal before a first gate signal is output, and a second control transistor applying a first carry signal to the input electrode of the first control transistor while the first gate signal is output..
Samsung Display Co., Ltd.


07/14/16
20160203756 

Display panel


An el light-emitting element is driven digitally to reduce power consumption using a pixel having three transistors and two capacitors. A reset transistor for diode connection writes the threshold voltage of the drive transistor onto a coupling capacitor.
Global Oled Technology Llc


07/14/16
20160203750 

Active-matrix display with power supply voltages controlled depending on the temperature


In a liquid crystal or oled active-matrix screen, the power supply voltages vgon and vgoff of the display control circuit driving the control transistors of the pixels are optimized, as a function of a measurement of the operating temperature, to conserve the display qualities of the screen at high and low temperatures and reduce the power consumed on average to produce screens for applications in a severe environment, with transistors of standard size. Circuits are provided for supplying these analog voltages from numeric values supplied by a code associated with the temperature measurement, stored or computed by a programmable circuit.
Thales


07/14/16
20160203258 

Dna sequencing using mosfet transistors


Embodiments of the invention include a method for fabricating a semiconductor device, the resulting structure, and a method for using the resulting structure. A substrate is provided.
International Business Machines Corporation


07/14/16
20160203255 

Integrated circuit topologies for discrete circuits


Various embodiments that pertain to electronic element matching are described. Having electronic elements, such as transistors, match can be relatively easy in an integrated circuit environment.
The Government Of The United States, As Represented By The Secretary Of The Army


07/14/16
20160203243 

Subthreshold standard cell library


A subthreshold standard cell library addresses the energy efficiency of electronic systems, thereby significantly reducing power consumption. Recent energy performance requirements are causing the next-generation system manufacturers to explore approaches to lower power consumption.
United States Of America, As Represented By The Secretary Of The Navy


07/14/16
20160202715 

Low-noise sampled voltage regulator


A method and voltage regulator comprises a generator that generates an error difference between a reference and regulated voltage. A clocked adc samples the voltage as a digital stream.

07/14/16
20160202543 

Liquid crystal display device


A liquid crystal display device includes: a first substrate including a first light blocking region, wherein a plurality of transistors are formed in the first light blocking region; a second substrate facing the first substrate, the second substrate including a common electrode disposed thereon; and a liquid crystal layer interposed between the first substrate and the second substrate, wherein the first substrate includes: a data line disposed extending in a vertical direction; color filters, each of the color filters overlapping adjacent color filters to form a color filter overlapping portion in boundary regions of the color filters in a vertical direction; and a light blocking member disposed extending in a horizontal direction covering the first light blocking region, wherein the data line and the color filter overlapping portion are spaced apart from each other in a horizontal direction in a region where the light blocking member is formed.. .
Samsung Display Co., Ltd.


07/14/16
20160202533 

Liquid crystal display


A liquid crystal display includes a first substrate including first to fourth color pixel areas, first to fourth thin film transistors disposed on the first substrate, and first to fourth pixel electrodes connected to the first to fourth thin film transistors. Each of the first to fourth pixel electrodes includes a cross stem portion including a horizontal stem portion and a vertical stem portion crossing the horizontal stem portion, and minute branch portions extending from the cross stem portion at a predetermined angle with respect to a horizontal direction.
Samsung Display Co., Ltd.


07/14/16
20160202511 

Display device


A display device that allows for stable injection of an aligning material or a liquid crystal material is presented. The display device includes: a substrate; thin film transistors disposed on the substrate; pixel electrodes connected to the thin film transistors; a roof layer disposed on the pixel electrodes to be spaced apart from the pixel electrodes with a plurality of microcavities therebetween; a liquid crystal layer disposed in the microcavities; and an encapsulation layer disposed on the roof layer and sealing the microcavities, wherein the roof layer includes ceiling portions covering top surfaces of the microcavities, column portions covering sides of the microcavities, and protruding portions protruding from the column portions..
Samsung Display Co., Ltd.


07/14/16
20160202300 

Controlling clock measurement with transistors, capacitor, opamp, adc, external enable


A measurement system includes a current source that is arranged to generate a current pulse to charge a capacitor as a function of an input clock signal. The accumulated charge on the capacitor is converted to a sample (e.g., resultant digital value) by an adc (analog-to-digital converter).
Texas Instruments Incorporated


07/07/16
20160197605 

Gate drive circuit


Example circuitry includes: a transformer circuit having first windings and second windings, where the second windings are magnetically orthogonal to the first windings; first transistors to provide a first voltage to a load, where each of the first transistors is responsive to a first control signal that is based on a first signal through a first winding; second transistors to provide a second voltage to the load, where each of the second transistors is responsive to a second control signal that is based on the first through the first winding, and where the first and second control signals cause the first transistors to operate in a different switching state than the second transistors; and control circuitry responsive to signals received through the second windings to control the first transistors and the second transistors to operate in a same switching state.. .
Bose Corporation


07/07/16
20160197517 

Smart transfer switch devices, systems, and methods using double-base bipolar transistors


Methods and systems for smart transfer switch circuits and operation, and for operation of transfer and/or cutoff switches in combination with a power-packet-switching-architecture (ppsa) power converter. The transistors of the transfer and cutoff switches, and the transistors of the phase legs of the ppsa power converter if present, preferably all use double-base bipolar transistors which have low on-state series resistance as the switching elements..
Ideal Power Inc.


07/07/16
20160197225 

Device of monolithically integrated optoelectrics


A method is disclosed for fabricating optoelectronic component structures and traditional circuit elements on a single silicon substrate. Specific examples of optoelectronic components include, but are not limited to: photodiode structures, light emitter structures and waveguide structures.

07/07/16
20160197184 

Tunnel field effect transistors having low turn-on voltage


Tunnel field effect transistors include a semiconductor substrate; a source region in the semiconductor substrate; a drain region in the semiconductor substrate; a channel region in the semiconductor substrate between the source region and the drain region; and a gate electrode on the semiconductor substrate above the channel region. The source region comprises a first region having a first conductivity type, a third region having a second conductivity type that is different from the first conductivity type, and a second region having an intrinsic conductivity type that is between the first region and the third region..
Samsung Electronics Co., Ltd.


07/07/16
20160197183 

Advanced forming method and structure of local mechanical strained transistor


Embodiments of the invention provide a semiconductor fabrication method and a structure for strained transistors. A method comprises forming a stressor layer over a mos transistor.
Taiwan Semiconductor Manufacturing Company, Ltd.


07/07/16
20160197148 

Electrical devices with graphene on boron nitride


Methods of forming and resulting devices are described that include graphene devices on boron nitride. Selected methods of forming and resulting devices include graphene field effect transistors (gfets) including boron nitride..
The Trustees Of Columbia University In The City Of New York


07/07/16
20160197146 

Superlattice materials and applications


A superlattice cell that includes group iv elements is repeated multiple times so as to form the superlattice. Each superlattice cell has multiple ordered atomic planes that are parallel to one another.
Quantum Semiconductor Llc


07/07/16
20160197128 

Array substrate, manufacturing method thereof and display device


An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate includes a substrate (10) and first thin-film transistors (tfts) (21) and first electrodes (40) formed on the substrate (10).
Boe Technology Group Co., Ltd.


07/07/16
20160197120 

Semiconductor storage device


A semiconductor storage device includes a cell array including resistance change elements formed above a semiconductor substrate; first cell transistors formed on the semiconductor substrate and provided in association with the resistance change elements; first gate electrodes included in the first cell transistor and extending in a first direction; a first bit lines electrically connected to the resistance change elements respectively and extending in a second direction perpendicular to the first direction; a second bit lines electrically connected to one end of a current path of the first cell transistors respectively and extending in the second direction; and first active areas in which the first cell transistors are formed, and which extend in a direction crossing the first direction at a first angle.. .

07/07/16
20160197104 

Liquid crystal display having white pixels


A display device includes red, blue, green, and white pixels, a plurality of gate lines, a plurality of data lines, and a plurality of storage electrodes lines. Each of the red, blue, green, and white pixels includes first to third thin film transistors, a first subpixel electrode connected to an output terminal of the first thin film transistor, and a second subpixel electrode connected to the output terminal of the second thin film transistor.
Samsung Display Co., Ltd.


07/07/16
20160197082 

Low leakage non-planar access transistor for embedded dynamic random access memory (edram)


Low leakage non-planar access transistors for embedded dynamic random access memory (edram) and methods of fabricating low leakage non-planar access transistors for edram are described. For example, a semiconductor device includes a semiconductor fin disposed above a substrate and including a narrow fin region disposed between two wide fin regions.
Intel Corporation


07/07/16
20160197075 

Fin field effect transistors and fabrication method thereof


A method for forming finfets includes providing a semiconductor substrate having at least a first fin in a first region and at least a second fin in a second region, and a first gate structure over the first fin and a second gate structure over the second fin; forming a first stress layer on the first fin and a first cover layer on the first stress layer; forming a second stress layer on the second fin and a second cover layer on the second stress layer; performing a first potential barrier reducing ion implantation process on the first cover layer; performing a second potential barrier reducing ion implantation process on the second cover layer; forming a first metal layer and a second metal layer; and forming a first contact layer on the first cover layer and a second contact layer on the second cover layer.. .
Semiconductor Manufacturing International (shanghai) Corporation


07/07/16
20160197069 

Monolithic three-dimensional (3d) ics with local inter-level interconnects


Monolithic 3d ics employing one or more local inter-level interconnect integrated intimately with at least one structure of at least one transistor on at least one transistor level within the 3d ic. In certain embodiments the local inter-level interconnect intersects a gate electrode or a source/drain region of at least one transistor and extends through at least one inter-level dielectric layer disposed between a first and second transistor level in the 3d ic.

07/07/16
20160197018 

Integrated circuit comprising pmos transistors with different voltage thresholds


There is provided a method for the manufacture of an integrated circuit, including a substrate and an insulating layer formed on the substrate; a first pmos transistor formed on the insulating layer and including a channel formed in a first layer of a silicon-germanium alloy, having a first thickness and first average germanium density; a gate oxide layer having a first equivalent oxide thickness; a second pmos transistor formed on the insulating layer and further including a channel formed in a second layer of a silicon-germanium alloy, having a second thickness which is greater than the first and a second average germanium density which is lower than the first; and a gate oxide layer having a second equivalent oxide thickness which is greater than the first.. .
International Business Machines Corporation


07/07/16
20160196877 

Semiconductor memory device including three-dimensional array structure


A semiconductor memory device may include source selection transistors coupled to a common source line, source side dummy memory cells coupled between the source selection transistors and the normal memory cells, and drain selection transistors coupled to a bit line. The semiconductor memory device may include drain side dummy memory cells coupled between the drain selection transistors and the normal memory cells.
Sk Hynix Inc.


07/07/16
20160196869 

Semiconductor storage device and driving the same


According to one embodiment, a semiconductor storage device includes a flip-flop circuit configured with two stages of inverters composed of tfets the flip-flop circuit includes first and second nodes. A first access transistor composed of a tfet is provided between the first node and a first write word-line.
Kabushiki Kaisha Toshiba


07/07/16
20160196867 

Static memory cell with tfet storage elements


In some embodiments, an apparatus for storing data includes a state retention circuit configured to retain a first state when placed into the first state and a second state when placed into the second state, a write port operably connected to the state retention circuit and configured to receive a data input and place the state retention circuit into a written state corresponding to the data input, a read port operably connected to the state retention circuit and configured to drive a data output according to the written state. In one embodiment, the write port and the read port comprise cmos transistors and no tunneling field effect transistors, and the state retention circuit comprises tunneling field effect transistors and no cmos transistors.
International Business Machines Corporation


07/07/16
20160195889 

Semiconductor device and semiconductor system including a voltage detection block


A semiconductor device may include an internal voltage generation circuit including at least one resistor element and a plurality of mos transistors, and configured to change amounts of current flowing through the plurality of mos transistors according to a level of the first node and control driving of an internal voltage. The semiconductor device may include an internal circuit configured to operate by being supplied with the internal voltage.
Sk Hynix Inc.


07/07/16
20160195786 

Liquid crystal display


A liquid crystal display includes: a first insulating substrate; thin film transistors positioned on the first insulating substrate, and connected to gate lines and data lines which cross each other while being insulated; pixel electrodes connected to the thin film transistors; a second insulating substrate spaced so as to face the first insulating substrate; light blocking members positioned on the second insulating substrate; a common electrode positioned on the light blocking member; and a liquid crystal layer injected between the pixel electrode and the common electrode, in which one pixel includes the thin film transistor and the pixel electrode, and the plurality of pixels are disposed to be symmetric to a y-axis.. .
Samsung Display Co., Ltd.


07/07/16
20160195759 

Liquid crystal display


A liquid crystal display according to an exemplary embodiment includes: an insulating substrate; gate lines and data lines positioned on the insulating substrate, and crossing each other while being insulated; thin film transistors connected to the gate lines and the data lines; pixel electrodes connected to the thin film transistors; light blocking members positioned on the thin film transistors; a common electrode spaced apart from the pixel electrodes while facing the pixel electrodes; a liquid crystal layer filling microcavities overlapping the pixel electrodes and including liquid crystal molecules; color filters formed on the common electrode; injection holes positioned in the common electrode and the color filters and extending to the microcavities; and an overcoat positioned on the color filters so as to cover the injection holes, in which the light blocking members include protrusion portions positioned so as to overlap the injection holes.. .
Samsung Display Co., Ltd.


07/07/16
20160193834 

Element substrate, liquid discharge head, and printing apparatus


According to one embodiment, an element substrate includes: heater arrays each having heaters arranged in parallel; corresponding transistors for driving the heaters included in the heater arrays; a first pad for supplying a voltage to be applied to the heaters; and a second pad for grounding the heaters. The element substrate is provided with a first wiring for connecting the first pad to the heaters, and a second wiring for connecting the heaters to the second pad.
Canon Kabushiki Kaisha


06/30/16
20160191058 

Integrated circuit layout wiring for multi-core chips


An integrated circuit system-on-chip (soc) includes a semiconductor substrate, a plurality of components made up of transistors formed in the substrate, and a plurality of interconnection lines providing electrical connectivity among the components. Use of a channel-less design eliminates interconnection channels on the top surface of the chip.

06/30/16
20160191051 

Switch circuit and switching radio frequency signals


An rf switch circuit and method for switching rf signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The rf switch includes switching and shunting transistor groupings to alternatively couple rf input signals to a common rf node, each controlled by a switching control voltage (sw) or its inverse (sw_), which are approximately symmetrical about ground.

06/30/16
20160190998 

Amplifier circuit


A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair.

06/30/16
20160190996 

Cascode switch for power amplifier


Aspects of this disclosure relate to a cascode circuit electrically coupled between an amplifier configured to amplify a radio frequency (rf) signal and different loads. The cascode circuit can function as a switch to selectively provide an output from the amplifier to a number of different loads.

06/30/16
20160190985 

Voltage-controlled oscillator


A voltage-controlled oscillator includes two first inductors having a common node, two varactors receiving a first bias voltage and respectively coupled to the first inductors, first and second transistors each having a first terminal coupled to a respective one of the varactors, and two second inductors. One of the second inductors is coupled between the control terminal of the first transistor and the first terminal of the second transistor.

06/30/16
20160190954 

Method and system for bridgeless ac-dc converter


An ac-dc converter configured to convert an input ac signal to an output dc signal is disclosed. The ac-dc converter includes an inductor and first and second transistors, where the inductor and first and second transistors are connected in series with one another.

06/30/16
20160190939 

Push-pull led driver circuit


Push-pull circuits are described that are suitable for the driving of leds and that reduce the voltage stress on the switching transistors that is caused by the output transformer. The push-pull arrangement caters to reducing the size of the transformer as it eliminates the dc magnetic bias of the transformer core and it also caters to the integration of the semiconductor content of the circuit requiring only low side dmos to be implemented in the monolithic, junction isolated process..

06/30/16
20160190928 

Voltage division circuit, circuit for controlling operation voltage and storage device


A voltage division circuit, a circuit for controlling operation voltage and a storage device are provided. The voltage division circuit includes: a receiving transistor; a transistor group including m transistors connected in series; n type-one switches, each of which includes three terminals, the first is connected with a drain of a former one and a source of a latter one of two adjacent transistors in the transistor group, the second is connected with ground, the third is adapted for receiving a timing control signal; and n+1 type-two switches, each of which includes three terminals, the first is connected with a source of a transistor in the transistor group, the second is adapted for outputting a divided voltage, and the third is adapted for receiving the timing control signal.

06/30/16
20160190926 

Integrated circuit with configurable control and power switches


Disclosed examples include integrated circuits configurable according to sensed circuit conditions to provide configurable power converter topologies with externally connected circuitry to implement buck, boost, buck-boost, low dropout and/or hot-swap power converters. The ics include one or more sets of series connected high and low side transistors connected with corresponding ic pads to allow connection to external circuitry to form a particular power converter configuration.

06/30/16
20160190925 

Current sense controller for a dc-to-dc converter


A dc-to-dc converter comprises a first switch, a second switch coupled to the first switch, an inductor, and a plurality of serially connected power transistors. The first switch is to couple an input voltage to a common node.

06/30/16
20160190798 

Rapid shutdown solid state circuit for photovoltaic energy generation systems


A solid state circuit for performing rapid shutdown of a photovoltaic power generation system includes a pair of high voltage power transistors connected between a photovoltaic array and a pair of high voltage lines that function to supply power generated by the photovoltaic array to a dc to ac inverter. The solid state circuit further includes a control circuit configured so that when the photovoltaic power generation system operates under normal conditions, the control circuit maintains the pair of high voltage power transistors in the on state so that power produced by the photovoltaic array can be transmitted to the dc to ac inverter through the pair of high voltage lines.

06/30/16
20160190345 

Strain compensation in transistors


Transistor structures having channel regions comprising alternating layers of compressively and tensilely strained epitaxial materials are provided. The alternating epitaxial layers can form channel regions in single and multigate transistor structures.

06/30/16
20160190325 

High-reliability, low-resistance contacts for nanoscale transistors


Tapered source and drain contacts for use in an epitaxial finfet prevent short circuits and damage to parts of the finfet during contact processing, thus improving device reliability. The inventive contacts feature tapered sidewalls and a pedestal where electrical contact is made to fins in the source and drain regions.

06/30/16
20160190322 

Large area contacts for small transistors


A large area electrical contact for use in integrated circuits features a non-planar, sloped bottom profile. The sloped bottom profile provides a larger electrical contact area, thus reducing the contact resistance, while maintaining a small contact footprint.

06/30/16
20160190297 

High-electron-mobility transistors


High-electron-mobility transistors that include field plates are described. In a first implementation, a hemt includes a first and a second semiconductor material disposed to form a heterojunction at which a two-dimensional electron gas arises and source, a drain, and gate electrodes.

06/30/16
20160190254 

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same


Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor.

06/30/16
20160190208 

Selector-based non-volatile cell fabrication utilizing ic-foundry compatible process


A circuit operable as a non-volatile memory cell, formed in part from a volatile selection device, is provided. The circuit can be fabricated utilizing integrated circuit (ic)-foundry compatible processes to simplify manufacturing, reduce cost and improve yield.

06/30/16
20160190200 

Solid-state imaging device, manufacturing method thereof, and electronic apparatus


A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.. .

06/30/16
20160190199 

Image sensor device with first and second source followers and related methods


An image sensor device may include an array of image sensing pixels arranged in rows and columns. Each image sensing pixel may include an image sensing photodiode, a first source follower transistor coupled to the image sensing photodiode, and a switch coupled to the image sensing photodiode.

06/30/16
20160190183 

Semiconductor device


A semiconductor device that is less influenced by variations in characteristics between transistors or variations in a load, and is efficient even for normally-on transistors is provided. The semiconductor device includes at least a transistor, two wirings, three switches, and two capacitors.

06/30/16
20160190181 

Semiconductor device and production method therefor


A semiconductor device includes: a plurality of thin film transistors including a gate electrode, a gate dielectric layer, a semiconductor layer formed on the gate dielectric layer, and a source electrode and a drain electrode provided on the semiconductor layer; a source metal layer including a global line which supplies a common signal to the plurality of thin film transistors, the global line being made of the same electrically conductive film as the source electrode and drain electrode; and a dielectric protection layer covering the plurality of thin film transistors and the source metal layer. The source metal layer includes a lower layer and an upper layer stacked on a portion of the lower layer.

06/30/16
20160190171 

Array substrate, display panel and preparing array substrate


The invention provides an array substrate, a display panel and a method for preparing an array substrate. The array substrate includes multiple low temperature poly-silicon (ltps) thin film transistors arranged in an array.

06/30/16
20160190159 

Array substrate and manufacturing the same, display device


An array substrate is disclosed. The array substrate includes gate lines and data lines, and first and second signal lines.

06/30/16
20160190149 

Semiconductor device


At least one of a plurality of transistors which are highly integrated in an element is provided with a back gate without increasing the number of manufacturing steps. In an element including a plurality of transistors which are longitudinally stacked, at least a transistor in an upper portion includes a metal oxide having semiconductor characteristics, a same layer as a gate electrode of a transistor in a lower portion is provided to overlap with a channel formation region of the transistor in an upper portion, and part of the same layer as the gate electrode functions as a back gate of the transistor in an upper portion.

06/30/16
20160190019 

Method of forming integrated circuit having plural transistors with work function metal gate structures


The present invention provides a method of forming an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor. The first transistor has a first metal gate including a first bottom barrier layer, a first work function metal layer and a first metal layer.

06/30/16
20160190015 

Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme


A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer.



Transistors topics: Transistors, Semiconductor, Semiconductor Device, Integrated Circuit, High Speed, Photodiode, Memory Effect, Silicon Nitride, Enhancement, Ion Implant, Ion Channel, Interrupted, Reference Voltage, Semiconductor Devices, Semiconductor Substrate

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