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Transistors patents

      

This page is updated frequently with new Transistors-related patent applications.




Date/App# patent app List of recent Transistors-related patents
08/18/16
20160241294 
 Switched-mode power supply with switch resizing patent thumbnailnew patent Switched-mode power supply with switch resizing
Switched-mode power supply with switch resizing. A power converter can include an inductor coupled between an input node and an intermediate node, a semiconductor device coupled between the intermediate node and an output node, and a plurality of drive transistors.
Skyworks Solutions, Inc.


08/18/16
20160241255 
 Semiconductor device, electronic component, and electronic device patent thumbnailnew patent Semiconductor device, electronic component, and electronic device
A semiconductor device with a novel structure. An upper-bit grayscale voltage and a lower-bit grayscale voltage are separately produced, and then the grayscale voltages are converted into currents and the currents are synthesized.
Semiconductor Energy Laboratory Co., Ltd.


08/18/16
20160241244 
 Method and  improving a load independent buffer patent thumbnailnew patent Method and improving a load independent buffer
Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal..

08/18/16
20160241236 
 Single-pole multi-throw switch patent thumbnailnew patent Single-pole multi-throw switch
A single-pole multi-throw switch includes a set of selection switches. The set of selection switches includes a set of primary switches, a first set and a second set of secondary switches.
Richwave Technology Corp.


08/18/16
20160241233 
 Driver circuit for single wire protocol slave unit patent thumbnailnew patent Driver circuit for single wire protocol slave unit
There is described a driver circuit for a single wire protocol slave unit, the driver circuit comprising (a) at least one current mirror comprising a first transistor (mp1, mn3) and a second transistor (mp2, mn4), wherein the gate of both transistors is connected to a bias node (pbias, s2bias), and wherein the second transistor is adapted to conduct a mirror current (i2, iout) equal to a current (i1, i2) conducted by the first transistor multiplied by a predetermined factor, (b) a bias transistor (mp3, mn5) for selectively connecting and disconnecting the bias node to and from a predetermined potential (vdd, gnd) in response to a control signal (abuf, an), and (c) a current boosting element for providing a boost current (i1p, i2p) to the bias node for a predetermined period of time when the control signal causes the bias transistor to disconnect the bias node from the predetermined potential. There is also described a universal integrated circuit card device comprising a driver circuit..
Nxp B.v.


08/18/16
20160241232 
 Methods of operating a double-base-contact bidirectional bipolar junction transistor patent thumbnailnew patent Methods of operating a double-base-contact bidirectional bipolar junction transistor
Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (b-trans) for switching. Four-terminal three-layer b-trans provide substantially identical operation in either direction with forward voltages of less than a diode drop.
Ideal Power Inc.


08/18/16
20160241210 
 Power amplifier with cascode switching or splitting functionality patent thumbnailnew patent Power amplifier with cascode switching or splitting functionality
Multiband power amplifier with cascode switching. A power amplification system can include a first transistor having a base configured to receive an input radio-frequency (rf) signal and having an emitter coupled to a ground potential.
Skyworks Solutions, Inc.


08/18/16
20160241194 
 Cascode amplifier segmentation for enhanced thermal ruggedness patent thumbnailnew patent Cascode amplifier segmentation for enhanced thermal ruggedness
According to some implementation, a power amplifier includes a plurality of pairs of transistors, each pair of transistors including a common emitter transistor and a common base transistor arranged in a cascode configuration. The power amplifier further includes electrical connections implemented to connect the plurality of pairs in a parallel configuration between an input node and an output node.
Skyworks Solutions, Inc.


08/18/16
20160241022 
 Apparatus and  high voltage i/o electro-static discharge protection patent thumbnailnew patent Apparatus and high voltage i/o electro-static discharge protection
An electronics chip includes a charge pump and at least one high voltage (hv) electro-static discharge (esd) module. The charge pump is configured to provide a predetermined voltage across a microphone.
Knowles Electronics, Llc


08/18/16
20160240801 
 Display device patent thumbnailnew patent Display device
A display device, including a substrate having a first region and second regions; transistors on the substrate in the first region and the second regions; first electrodes each connected to the transistors; an organic emission layer on the first electrodes; and second electrodes on the organic emission layer, molecular weights of organic materials of the organic emission layer in the first region and the organic emission layer in the second regions being different from each other.. .
Samsung Display Co., Ltd.


08/18/16
20160240679 
new patent

Supperlattice buffer structure for gallium nitride transistors


A transistor with a multi-strained layer superlattice (sls) structure is provided. A first strained layer superlattice (sls) layer is arranged over a substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/18/16
20160240675 
new patent

Structure and transistors with line end extension


A method includes forming an isolation feature in a semiconductor substrate; forming a first fin-like active region and a second fin-like active region in the semiconductor substrate and interposed by the isolation feature; forming a dummy gate stack on the isolation feature, wherein the dummy gate extends to the first fin-like active region from one side and to the second fin-like active region from another side.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


08/18/16
20160240664 
new patent

Semiconductor device


There is provided a semiconductor device having ldmos transistors embedded in a semiconductor substrate to boost source-drain breakdown voltage, with arrangements to prevent fluctuations of element characteristics caused by electric field concentration so that the reliability of the semiconductor device is improved. A trench is formed over the upper surface of a separation insulating film of each ldmos transistor, the trench having a gate electrode partially embedded therein.
Renesas Electronics Corporation


08/18/16
20160240647 
new patent

Multi-finger large periphery alinn/aln/gan metal-oxide-semiconductor heterostructure field effect transistors on sapphire substrate


Moshfet devices are provided, along with their methods of fabrication. The moshfet device can include a substrate; a multilayer stack on the substrate; a ultra-thin barrier layer on the multilayer stack, wherein the ultra-thin barrier layer has a thickness of about 0.5 nm to about 10 nm; a dielectric, discontinuous thin film layer on portions of the ultra-thin barrier layer, wherein the dielectric, discontinuous thin film layer comprises sio2; a plurality of source electrodes and drain electrodes formed directly on the ultra-thin barrier layer in an alternating pattern such that the dielectric, discontinuous thin film layer is positioned between adjacent source electrodes and drain electrodes; a plurality of gate electrodes on the dielectric, discontinuous thin film layer; and a gate interconnect electrically connecting the plurality of gate electrodes..
University Of South Carolina


08/18/16
20160240617 
new patent

Group iii-n transistors on nanoscale template structures


A iii-n semiconductor channel is formed on a iii-n transition layer formed on a (111) or (110) surface of a silicon template structure, such as a fin sidewall. In embodiments, the silicon fin has a width comparable to the iii-n epitaxial film thicknesses for a more compliant seeding layer, permitting lower defect density and/or reduced epitaxial film thickness.
Intel Corporation


08/18/16
20160240611 
new patent

Corner transistor suppression


The threshold voltage of parasitic transistors formed at corners of shallow trench isolation regions is increased and mobility decreased by employing a high-k dielectric material. Embodiments include sti regions comprising a liner of a high-k dielectric material extending proximate trench corners.
Globalfoundries Singapore Pte. Ltd.


08/18/16
20160240595 
new patent

Organic light-emitting diode display


An organic light-emitting diode (oled) display is disclosed. In one aspect, the oled display includes a substrate including a pixel region including a plurality of pixels.
Samsung Display Co., Ltd.


08/18/16
20160240577 
new patent

Solid-state image pickup device


A solid-state image pickup device is provided which can inhibit degradation of image quality which may occur when a global electronic shutter operation is performed. A gate drive line for a first transistor of gate drive lines for pixel transistors is positioned in proximity to a converting unit..
Canon Kabushiki Kaisha


08/18/16
20160240533 
new patent

Vertical cmos structure and method


A method for forming stacked, complementary transistors is disclosed. Selective deposition techniques are used to form a column having a lower portion that includes one type of semiconductor (e.g.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/18/16
20160240471 
new patent

Embedded packaging for devices and systems comprising lateral gan power transistors


Embedded packaging for devices and systems comprising lateral gan power transistors is disclosed. The packaging assembly is suitable for large area, high power gan transistors and comprises an assembly of a gan power transistor and package components comprising a three level interconnect structure.
Gan Systems Inc.


08/18/16
20160240461 
new patent

Semiconductor package with multi-section conductive carrier


In one implementation, a power semiconductor package includes a non-contiguous, multi-section conductive carrier. A control transistor with a control transistor terminal is coupled to a first section of the multi-section conductive carrier, while a sync transistor with a sync transistor terminal is coupled to a second section of the multi-section conductive carrier.
Infineon Technologies Americas Corp.


08/18/16
20160240441 
new patent

Method of fabricating integrated circuit devices


An integrated circuit device includes a first transistor having a first channel between a first source/drain, and a second transistor having a second channel between a second source/drain. The first transistor operates based on a first amount of current and the second transistor operates based on a second amount of current different from the first amount of current.
Samsung Electronics Co., Ltd.


08/18/16
20160240265 
new patent

Shift register circuit


A shift register circuit is disclosed. The shift register circuit includes a first gate driving module, a second gate driving module, a first discharging module, and a second discharging module.
Hannstar Display Corporation


08/18/16
20160239037 
new patent

Low power bandgap circuit device with zero temperature coefficient current generation


A low power bandgap circuit device that generates temperature independent reference voltages and/or zero temperature coefficient currents is disclosed. The circuit comprises a first pair of transistors, an amplifier, a star connected resistive network, and a second pair of transistors, wherein zero temperature coefficient currents are generated through mirroring and reuse of current from the star connected resistive network..
Invensense, Inc.


08/18/16
20160238911 
new patent

Static electricity protection circuit, electro-optical apparatus, and electronic equipment


A first static electricity protection circuit is provided with a first n-type transistor and a first p-type transistor, a second static electricity protection circuit is provided with at least one of a second n-type transistor and a second p-type transistor, a source is connected with a gate in these transistors, a gate of the first n-type transistor is electrically connected with a low potential power wiring vss, a drain of the first n-type transistor is electrically connected with a signal wiring sl, a gate of the first p-type transistor is electrically connected with a high potential power wiring vdd, a drain of the first p-type transistor is electrically connected with the signal wiring sl, and a drain of at least one of the second n-type transistor and the second p-type transistor is electrically connected with the low potential power wiring vss or the high potential power wiring vdd.. .
Seiko Epson Corporation


08/18/16
20160238201 
new patent

Printed led driver circuit


On a flexible substrate is printed leds and a driver circuit containing transistors. The leds and transistors are printed microscopic devices contained in an ink.
Nthdegree Technologies Worldwide Inc.


08/11/16
20160234967 

Heat management and removal assemblies for semiconductor devices


This patent disclosure describes heat management and removal assemblies for electronic devices that generate heat during use. The disclosed assemblies are particularly useful for cooling insulated gate bipolar transistors (igbts).
Caterpillar Inc.


08/11/16
20160234898 

Ac-powered led light engine


Ac led light engines powered directly from the ac power line contain circuitry of resistors, capacitors, diodes and transistors which enables a single string leds connected to series to efficiently produce light with a relatively low level of flicker as perceived by the human eye. The leds are driven by a current which is alternately capacitively-limited and resistively-limited.

08/11/16
20160233962 

High electron mobility transistor-based terahertz wave space external modulator


Terahertz external modulator based on high election mobility transistors belongs to the field of electromagnetic functional devices technology. This invention includes the semiconductor substrate (1), the epitaxial layer (2), and the modulation-unit array (4).
University Of Electronic Science And Technology Of China


08/11/16
20160233865 

Semiconductor device, electronic component, and electronic device


To provide a semiconductor device including element layers that are stacked. A first wiring layer and a second wiring layer are stacked between a first element layer and a second element layer.
Semiconductor Energy Laboratory Co., Ltd.


08/11/16
20160233859 

Power switching systems comprising high power e-mode gan transistors and driver circuitry


Driver circuitry for switching systems comprising enhancement mode (e-mode) gan power transistors with low threshold voltage is disclosed. An e-mode high electron mobility transistor (hemt) d3 has a monolithically integrated gan driver, comprising smaller e-mode gan hemts d1 and d2, and a discrete dual-voltage pre-driver.
Gan Systems Inc.


08/11/16
20160233838 

Reconfigurable power amplifier capable of selecting wide band frequency and selecting wide band frequency


Provided is a power amplifier installed in wireless communication terminals and systems. According to one aspect of the present invention, a reconfigurable power amplifier capable of selecting a wide band frequency is provided.
Electronics And Telecommunications Research Institute


08/11/16
20160233836 

System and a low noise amplifier


An embodiment described herein includes a low noise amplifier (lna) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the lna. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals.
Infineon Technologies Ag


08/11/16
20160233802 

Method for making a motor quieter


The method is for making an electric motor more efficient by iteratively changing when a processor sends activation signals to transistors to minimize a current required to rotate a rotor at a constant rotational speed. The method is also for changing a rotational direction of the rotor by switching the order in which activation signals are sent to the transistors..
Ld Design Electronics Ab


08/11/16
20160233781 

Power device


An energy efficient apparatus includes a switching device, a frequency dependent reactive device, and a control element is provided. The switching device is coupled to a source of electrical power and includes a pair of transistors and is adapted to receive a control signal and to produce an alternating current power signal.
Advanced Charging Technologies, Llc


08/11/16
20160233773 

Power supply switching circuit and semiconductor device


To provide a power supply switching circuit which avoids an increase in current consumption. A power supply switching circuit includes mos transistors provided between power supply input terminals and an output terminal, which have gates connected to each other and backgates connected to each other and are connected in series..
Sii Semiconductor Corporation


08/11/16
20160233426 

Continuous, floating evaporative assembly of aligned carbon nanotubes


High density films of semiconducting single-walled carbon nanotubes having a high degree of nanotube alignment are provided. Also provided are methods of making the films and field effect transistors (fets) that incorporate the films as conducting channel materials.
Wisconsin Alumni Research Foundation


08/11/16
20160233340 

Transistor, semiconductor device, and electronic device


A transistor with favorable electrical characteristics is provided. A transistor with stable electrical characteristics is provided.
Semiconductor Energy Laboratory Co., Ltd.


08/11/16
20160233338 

Metal oxide thin film transistor with source and drain regions doped at room temperature


Thin film transistors are provided that include a metal oxide active layer with source and drain regions having a reduced resistivity relative to the metal oxide based on doping of the source and drain regions at room temperature. In an aspect, a transistor structure is provided, that includes a substrate, and source and drain regions within a doped active layer having resulted from doping of an active layer comprising metal-oxide and formed on the substrate, wherein the doped active layer was doped at room temperature and without thermal annealing, thereby resulting in a reduction of a resistivity of the source and drain regions of the doped active layer relative to the active layer prior to the doping.
The Hong Kong University Of Science And Technology


08/11/16
20160233336 

Strained channel region transistors employing source and drain stressors and systems including the same


Embodiments of the present invention provide transistor structures having strained channel regions. Strain is created through lattice mismatches in the source and drain regions relative to the channel region of the transistor.
Intel Corporation


08/11/16
20160233321 

Finfet device and fabricating same


Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (finfets). An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/11/16
20160233294 

Method for creating the high voltage complementary bjt with lateral collector on bulk substrate with resurf effect


Complementary high-voltage bipolar transistors formed in standard bulk silicon integrated circuits are disclosed. In one disclosed embodiment, collector regions are formed in an epitaxial silicon layer.
Texas Instruments Incorporated


08/11/16
20160233281 

Organic light-emitting diode (oled) display


An organic light-emitting diode (oled) display is disclosed. In one aspect, the oled display includes a substrate and an active pattern formed over the substrate.
Samsung Display Co., Ltd.


08/11/16
20160233280 

Display substrate and manufacturing method thereof, and flexible display device


The present invention provides a display substrate and a manufacturing method thereof, and a flexible display device including the display substrate, which belong to the field of display technology, and can solve the problem of poor reliability of an existing display substrate due to damage to thin film transistors when the display substrate is bent. In the display substrate provided by the present invention, by providing the stress absorbing units made of a resin material in the display substrate, the stress generated during bending of the display substrate is released through the transparent resin material and the thin film transistors on the display substrate are unlikely to be damaged, thereby improving the reliability of the whole display substrate..
Boe Technology Group Co., Ltd.


08/11/16
20160233277 

Organic light emitting diode display and manufacturing method thereof


An organic light emitting diode (oled) display device including: a substrate; first, second and third thin film transistors sequentially laminated over the substrate; a pixel definition layer formed over the substrate and defining a pixel area; and first, second and third organic light emitting diode elements formed over the substrate, sequentially laminated in the pixel area, and respectively connected to the first, second and third thin film transistors.. .
Samsung Display Co., Ltd.


08/11/16
20160233255 

Array substrate, producing the same and display apparatus


A method for producing an array substrate is provided. The method includes: forming metal film layers and patterning the metal film layers to form a plurality rows of gate lines and a plurality columns of data lines crossed to each other in the non-display area and forming thin film transistors; forming a pad part at one end of the gate lines or data lines.
Hefei Xinsheng Optoelectronics Technology Co., Ltd.


08/11/16
20160233254 

Reducing parasitic leakages in transistor arrays


A method of operating a device comprising: a first conductor layer defining a plurality of source conductors each associated with a respective group of transistors, and a plurality of drain conductors each associated with a respective transistor; a semiconductor layer defining semiconductor channels between said source and drain conductors; a second conductor layer defining a plurality of gate conductors each associated with a respective set of transistors, and one or more storage capacitor conductors capacitively coupled to the drain conductors for a respective set of transistors; the method comprising: using the gate conductors to switch the transistors between on and off states; and using the storage capacitor conductors to reduce the conductivity of one or more semiconductor layer connecting the drain conductor of each transistor in the on state to source and/or drain conductors other than those associated with that transistor.. .
Flexenable Limited


08/11/16
20160233238 

Display device


A display device in which the current load of wirings are distributed and display variations due to voltage drop are suppressed. An active matrix display device of the invention comprises a first current input terminal, a second current input terminal, and a plurality of current supply lines extending parallel to each other.
Semiconductor Energy Laboratory Co., Ltd.


08/11/16
20160233237 

Transistor array routing


A device comprising an array of transistors, wherein the device comprises: a first conductor layer at a first level defining a plurality of first conductors providing either source or gate electrodes for said array of transistors; a second conductor layer at a second level defining a plurality of second conductors providing the other of source or gate electrodes for said array of transistors; wherein said second conductor layer further defines routing conductors at one or more locations between said second conductors, each routing conductor connected by one or more interlayer conductive connections to a respective first conductor.. .
Flexenable Limited


08/11/16
20160233229 

3d nonvolatile memory device


A 3d nonvolatile memory device is disclosed. The 3d nonvolatile memory device includes a word line stack in which a plurality of word lines are stacked therein and includes a cell region and a slimming region, and pass transistors located below the word line stack, and electrically coupled to the slimming region.
Sk Hynix Inc.


08/11/16
20160233094 

Methods of forming field effect transistors using a gate cut process following final gate formation


Disclosed are field effect transistor (fet) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate across first and second semiconductor bodies for first and second fets, respectively.
International Business Machines Corporation


08/11/16
20160232986 

Circuits, methods, and media for detecting and countering aging degradation in memory cells


Circuits for estimating threshold voltages of transistors in memory device bitcells are provided. The circuits use a multiplexer, a sensor switch network, a power switch network, and an nmos device configured as a sensor to couple a desired one the transistors in the bitcells and the nmos device to each other, to a test voltage, and to ground.

08/11/16
20160232964 

Integrated circuit devices and methods


An integrated circuit can include multiple sram cells, each including at least two pull-up transistors, at least two pull-down transistors, and at least two pass-gate transistors, each of the transistors having a gate; at least one of the pull-up transistors, the pull-down transistors, or the pass-gate transistors having a screening region a distance below the gate and separated from the gate by a semiconductor layer, the screening region having a concentration of screening region dopants, the concentration of screening region dopants being higher than a concentration of dopants in the semiconductor layer, the screening region providing an enhanced body coefficient for the pull-down transistors and the pass-gate transistors to increase the read static noise margin for the sram cell when a bias voltage is applied to the screening region; and a bias voltage network operable to apply one or more bias voltages to the multiple sram cells.. .
Mie Fujitsu Semiconductor Limited


08/11/16
20160232861 

Black pixel inserting 3d display and circuit using the method


The present invention relates to a black pixel inserting method for 3d display. Multiple data lines for supplying data signals, multiple gate lines for supplying scan signals, and multiple pixels are provided.
Shenzhen China Star Optoelectronics Technology Co. Ltd.


08/11/16
20160232127 

Heterogeneous multicore processor with graphene-based transistors


Techniques described herein generally include methods and systems related to the use of processors that include graphene-containing computing elements while minimizing or otherwise reducing the effects of high leakage energy associated with graphene computing elements. Furthermore, embodiments of the present disclosure provide systems and methods for scheduling instructions for processing by a chip multiprocessor that includes graphene-containing computing elements arranged in multiple processor groups..
Empire Technology Development Llc


08/04/16
20160226501 

System and fast-capture multi-gain phase lock loop


A phase locked loop system has a voltage-controlled variable-load ring oscillator (vlco) that operates in a frequency band determined by a selected load on each stage of the ring oscillator. Each stage of the vlco has multiple load selection transistors, each coupled to a load capacitor.
Treehouse Design, Inc.


08/04/16
20160226478 

Circuit and controlling charge injection in radio frequency switches


A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (soi) radio frequency (rf) switch.
Peregrine Semiconductor Corporation


08/04/16
20160226407 

Motor drive having function of detecting failure in dynamic braking circuit


A motor drive according to the present invention has a dynamic braking circuit. The motor drive includes a motor drive control circuit for applying a voltage to windings of a synchronous motor and the dynamic braking circuit for a predetermined time by switching power transistors connected to a direct current power supply, a current detection circuit for detecting a current value outputted from the power transistor, and a failure determination circuit for determining the presence or absence of a failure in the dynamic braking circuit from the current value detected by the current detection circuit and a predetermined threshold value.
Fanuc Corporation


08/04/16
20160226406 

Variable voltage drive using bidirectional bipolar transistors


A variable voltage drive (vvd) with highly efficient bidirectional bipolar transistor (“b-tran”) improves partial load efficiency of ac induction motors.. .
Ideal Power Inc.


08/04/16
20160226394 

Ac line filter and ac-to-dc rectifier module


An ac line filter/rectifier module (aclf/rm) has a metal housing and an outward appearance of a conventional ac line filter, but the aclf/rm includes circuitry that performs both emi filtering and line filtering as well as very efficient ac-to-dc rectification. Rectification circuitry within the aclf/rm rectifies an ac voltage signal received onto ac input module terminals and outputs a rectified version of the ac voltage signal onto dc output module terminals.
Ixys Corporation


08/04/16
20160226379 

Applying force voltage to switching node of disabled buck converter power stage


Reliability of a buck power stage may be enhanced by extending the maximum input voltage able to be withstood in the disabled (non-switching) state. During device qualification/testing, a power management unit (pmu) in the disabled state may have its input node subjected to greater than a maximum input voltage permitted for reliability (vmax).
Qualcomm Incorporated


08/04/16
20160225915 

Metal oxynitride transistor devices


transistors with a first metal oxynitride channel layer and a second metal oxynitride barrier layer are provided. The first metal oxynitride channel layer is lightly doped or without intentional doping to achieve high carrier mobility.

08/04/16
20160225913 

Ingaaln-based semiconductor device


transistors using nitride semiconductor layers as channels were experimentally manufactured. The nitride semiconductor layers were all formed through a sputtering method.
Japan Science And Technology Agency


08/04/16
20160225903 

Method and device for high k metal gate transistors


A method of manufacturing a semiconductor device includes providing a semiconductor substrate. The semiconductor substrate includes a dummy gate structure formed thereon and an offset spacer formed on a sidewall of the dummy gate structure.
Semiconductor Manufacturing International (shanghai) Corporation


08/04/16
20160225860 

Vertical ferroelectric field effect transistor constructions, constructions comprising a pair of vertical ferroelectric field effect transistors, vertical strings of ferroelectric field effect transistors, and vertical strings of laterally opposing pairs of vertical ferroelectric field effect transistors


A vertical ferroelectric field effect transistor construction comprises an isolating core. A transition metal dichalcogenide material encircles the isolating core and has a lateral wall thickness of 1 monolayer to 7 monolayers.
Micron Technology, Inc.


08/04/16
20160225852 

Fabricating transistors having resurfaced source/drain regions with stressed portions


Methods are providing for fabricating transistors having at least one source region or drain region with a stressed portion. The methods include: forming, within a cavity of a substrate structure, the at least one source region or drain region with the internal stress; and resurfacing the at least one source region or drain region to reduce surface defects of the at least one source region or drain region without relaxing the stressed portion thereof.
Globalfoundries Inc.


08/04/16
20160225850 

Semiconductor structure


The present invention provides some methods for forming at least two different nanowire structures with different diameters on one substrate. Since the diameter of the nanowire structure will influence the threshold voltage (vt) and the drive currents of a nanowire field effect transistor, in this invention, at least two nanowire structures with different diameters can be formed on one substrate.
United Microelectronics Corp.


08/04/16
20160225849 

Methods of fabricating nanowire structures


Methods are presented for fabricating nanowire structures, such as one or more nanowire field effect transistors. The methods include, for instance: providing a substrate and forming a fin above the substrate so that the fin has a first sidewall including one or more elongate first sidewall protrusions and a second sidewall including one or more elongate second sidewall protrusions, with the one or more elongate second sidewall protrusions being substantially aligned with the one or more elongate first sidewall protrusions; and, anisotropically etching the fin with the elongate first sidewall protrusions and the elongate second sidewall protrusions to define the one or more nanowires.
Globalfoundries Inc.


08/04/16
20160225836 

Foldable display


A foldable display according to the present disclosure includes: a substrate having a folding portion which is folded; and a plurality of transistors in the substrate each of the transistors including: a gate electrode on the substrate; a channel overlapping the gate electrode; and a source electrode and a drain electrode positioned at respective sides of the channel, wherein the gate electrode is divided into a plurality of sub-gate electrodes by at least one gate cutout.. .
Samsung Display Co., Ltd.


08/04/16
20160225819 

Magnetic memory cells with high write current and read stability


Memory cells and methods of forming thereof are disclosed. The memory cell includes a substrate and first and second select transistors.
Globalfoundries Singapore Pte. Ltd.


08/04/16
20160225797 

Display device including transistor and manufacturing method thereof


An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit.
Semiconductor Energy Laboratory Co., Ltd.


08/04/16
20160225788 

Thin film transistor array panel and a manufacturing the same


A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.. .
Samsung Display Co., Ltd.


08/04/16
20160225773 

Semiconductor device


A semiconductor device capable of retaining data for a long time is provided. The semiconductor device includes first to third transistors, a fourth transistor including first and second gates, first to third nodes, a capacitor, and an input terminal.
Semiconductor Energy Laboratory Co., Ltd.


08/04/16
20160225769 

Circuit design system and semiconductor circuit designed by using the system


A system and method may determine the operating parameters, such as voltages, of mos transistors within a circuit design by testing or simulation, for example and may identify a mos transistor operating with its drain voltage higher than its gate voltage in the circuit. The design system and method may substitute a smaller transistor, having a high-k dielectric layer, for the original transistor in the circuit design..

08/04/16
20160225764 

Semiconductor device and manufacturing method thereof


A semiconductor device includes first and second fin fet transistors and a separation plug made of an insulating material and disposed between the first and second fin fet transistors. The first fin fet transistor includes a first fin structure extending in a first direction, a first gate dielectric formed over the first fin structure and a first gate electrode formed over the first gate dielectric and extending a second direction perpendicular to the first direction.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/04/16
20160225741 

Methods for constructing three dimensional (3d) integrated circuits (ics) (3dics) and related systems


Methods for constructing three dimensional integrated circuits and related systems are disclosed. In one aspect, a first tier is constructed by creating active elements such as transistors on a holding substrate.
Qualcomm Incorporated


08/04/16
20160225709 

Metal layout for radio-frequency switches


Metal layout for radio-frequency (rf) switches. In some embodiments, an rf switching device can include a plurality of field-effect transistors (fets) arranged in series to form a stack.
Skyworks Solutions, Inc.


08/04/16
20160225673 

High mobility transistors


An integrated circuit containing an n-channel finfet and a p-channel finfet has a dielectric layer over a silicon substrate. The fins of the finfets have semiconductor materials with higher mobilities than silicon.
Texas Instruments Incorporated


08/04/16
20160225451 

Non-volatile memory device having vertical structure and operating the same


A non-volatile memory device having a vertical structure includes a nand string having a vertical structure. The nand string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells.
Samsung Electronics Co., Ltd.


08/04/16
20160225328 

Liquid crystal display having a rolling backlight


A liquid crystal display (lcd) that may include: a plurality of transistors groups forming a pixel array of said lcd, wherein the transistors groups are independently controllable; a plurality of backlight units, forming a backlight surface of said lcd, wherein the backlight units are independently controllable; a data refresh module configured to periodically refresh data at said groups of transistors, at a specified order, over a refresh cycle time; and a backlight control module configured to periodically dim the backlight units at said specified order over a backlight cycle time which is substantially shorter than the refresh cycle time.. .
Elbit Systems Ltd.


08/04/16
20160225307 

Display apparatus having gate driving circuit


A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.. .
Samsung Display Co., Ltd.


08/04/16
20160224700 

Method for determining the sizing of the transistors of an analog circuit


A method for determining electrical parameter values of the transistors of an analog circuit of a system on chip includes breaking the circuit down into a set of blocks connected to one another; establishing the wiring diagram of said circuit; defining a set of electrical constraints that are specific to said circuit, blocks and transistors of each block; defining electrical parameters of the circuit, block and transistors; selecting for each transistor of the circuit an operator for calculating the electrical parameter values of said transistor; generating structured diagrams of each block of the circuit from the defined constraints and the chosen operators; assembling said structured diagrams of blocks into a general diagram of the circuit; identifying whether there is any conflict; and, if so, emitting an alarm signal.. .
Universite Pierre Et Marie Curie (paris 6)


08/04/16
20160223848 

Display panel, display device and manufacturing the display panel


A display panel, a display device and a manufacturing method of the display panel are disclosed. The display panel includes: an array substrate and a counter substrate disposed in opposition to each other, and a sealant adhered between the array substrate and the counter substrate; in a peripheral region of the array substrate positioned in opposition to the sealant, there are provided a plurality of thin film transistors, a surface of each of the thin film transistors is covered with a block-like insulating film, and there is depressed region between adjacent block-like insulating films; at the location of the counter substrate corresponding to the depressed region, there is provided a protruding structure.
Boe Technology Group Co., Ltd.


08/04/16
20160223606 

Method for the characterization and monitoring of integrated circuits


A method for characterizing an integrated circuit that includes ramping the supply voltage to an integrated circuit as a function of time for each of the transistors in the integrated circuit, and measuring a power supply current for the integrated circuit during the ramping of the power supply voltage. The measured peaks in the power supply current are a current pulse that identifies an operation state in which each of the transistors are in an on state.
International Business Machines Corporation


08/04/16
20160221104 

Systems and methods for efficient provision of arc welding power source


Methods and systems for creating and controlling an ac output for welding, plasma cutting or heating are provided. One embodiment of the present disclosure achieves a desired square wave ac output and reduces the number of circuit components needed by combining components of a buck converter and a full bridge inverter.
Illinois Tool Works Inc.


07/28/16
20160219238 

Image pickup apparatus, image pickup system, and driving image pickup apparatus


Provided is an image pickup apparatus, including: first and second photoelectric conversion elements; first and second transfer transistors configured to transfer charges respectively from the first and second photoelectric conversion elements when the first and second transfer transistors are brought into conductive states, respectively; a floating diffusion region configured to accumulate the charges transferred by the first and second transfer transistors; an amplifying transistor configured to output a signal corresponding to the charges transferred by the first and second transfer transistors; first and second drive wirings, which are electrically connected to gates of the first and second transfer transistors, respectively; and a conductive member, which is configured to electrically connect the floating diffusion region and a gate of the amplifying transistor to each other, and is configured to extend beyond the floating diffusion region in a plan view while being opposed to the first drive wiring.. .
Canon Kabushiki Kaisha


07/28/16
20160218710 

Switch circuit


To provide a switch circuit which is capable of reliably controlling transmission of a voltage from gnd to vdd to an internal circuit or shut-off thereof even when a positive or negative voltage is inputted to an input terminal, and thereby reduces the risk of latch-up. A switch circuit is comprised of nmos transistors, and the gates of the nmos transistors are controlled by an output voltage of a boosting circuit, thereby making it possible to reliably control transmission or shut-off of a voltage from gnd to vdd..
Seiko Instruments Inc.


07/28/16
20160218709 

Current driver circuit


A current driver circuit includes: a current conversion unit including an input side transistor, in which a reference current is input, and multiple output side transistors, which output an output current corresponding to the reference current, and having an digital-analog conversion function for converting a digital control signal to an analog signal and a current amplifying function for amplifying the reference current according to an amplification ratio corresponding to the digital control signal; and an adjustment unit adjusting the digital control signal to be input into the output side transistors. When the adjustment unit adjusts the digital control signal, the current conversion unit changes the amplification ratio to gradually increase or decrease the output current, and controls a slew rate of the output current within a predetermined range..
Denso Corporation


07/28/16
20160218202 

Buffer stack for group iiia-n devices


A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided group iiia-n layer is deposited on the substrate, and a first essentially void-free group iiia-n layer is then deposited on the first voided group iiia-n layer.
Texas Instruments Incorporated


07/28/16
20160218162 

Organic light emitting display


An organic light emitting display includes a substrate including a first region and a second region adjacent to the first region, a plurality of first organic light emitting elements located in the first region, a plurality of second organic light emitting elements located in the second region, and a plurality of first thin film transistors located in the second region and connected to the first organic light emitting elements in the first region to drive the first organic light emitting elements. The first thin film transistors do not overlap with the first organic light emitting elements..
Samsung Display Co., Ltd.


07/28/16
20160218158 

Organic light-emitting diode display panel


Disclosed is an organic light-emitting diode display panel, including: a substrate; a thin-film transistor layer including a plurality of thin-film transistors, arranged on the substrate; a plurality of organic light-emitting diode subpixel structures, arranged on the thin-film transistor layer; a pixel defining layer including a plurality of openings, arranged on the thin-film transistor layer; a plurality of first direction induction lines and second direction induction lines, arranged on the pixel defining layer; an insulation layer, arranged between the plurality of first direction induction lines and second direction induction lines; and a packaging substrate, arranged on the plurality of second direction induction lines. The organic light-emitting diode display panel employs a touch control electrode having a metal mesh structure, the touch control electrode is directly deposited on the pixel defining layer, and the touch control function is directly integrated on the organic light-emitting diode display panel..
Everdisplay Optronics (shanghai) Limited


07/28/16
20160218119 

Display device


A display device includes a driver circuit including a logic circuit including a first transistor which is a depletion type transistor and a second transistor which is an enhancement type transistor; a signal line which is electrically connected to the driver circuit; a pixel portion including a pixel whose display state is controlled by input of a signal including image data from the driver circuit through the signal line; a reference voltage line to which reference voltage is applied; and a third transistor which is a depletion type transistor and controls electrical connection between the signal line and the reference voltage line. The first to the third transistors each include an oxide semiconductor layer including a channel formation region..
Semiconductor Energy Laboratory Co., Ltd.


07/28/16
20160218113 

Integrated circuits with non-volatile memory and methods for manufacture


Semiconductor devices and methods of manufacturing thereof are described. According to an example embodiment, a semiconductor device comprises: a substrate comprising a core region and a peripheral region, where the core region is adjacent to the peripheral region; a memory array comprising non-volatile memory cells that are located in the core region of the substrate; a high-voltage control logic comprising high-voltage transistors that are located in the peripheral region of the substrate; and a low-voltage control logic comprising low-voltage transistors that are located in the peripheral region of the substrate..
Cypress Semiconductor Corporation


07/28/16
20160218106 

Semiconductor device


The semiconductor device of the present invention comprises first and second transistors and first and second capacitors. One of source and drain electrodes of the first transistor is electrically connected to a first wiring, the other is electrically connected to a second wiring, and a gate electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor and one of electrodes of the first capacitor.
Semiconductor Energy Laboratory Co., Ltd.


07/28/16
20160218103 

Semiconductor integrated circuit device and manufacturing thereof


It is therefore an object of the present invention to provide a method in which, in a semiconductor integrated circuit device, a plurality of transistors having wide-rangingly different ioff levels are embedded together in a semiconductor device including transistors each using a non-doped channel. By controlling an effective channel length, a leakage current is controlled without changing an impurity concentration distribution in a transistor including a non-doped channel layer and a screen layer provided immediately under the non-doped channel layer..
Fujitsu Semiconductor Limited


07/28/16
20160218046 

Semiconductor device and structure


A 3d device, including: a first layer including first transistors, the first transistors interconnected by a first layer of interconnection; a second layer including second transistors, the second transistors overlaying the first layer of interconnection, where the first layer includes a first clock distribution structure, where the second layer includes a second clock distribution structure, where the device includes a phase lock loop (“pll”) circuit, where the second clock distribution structure is connected to the phase lock loop (“pll”) circuit, and where the second transistors are aligned to the first transistors with less than 200 nm alignment error.. .
Monolithic 3d Inc.


07/28/16
20160217868 

Pre-program detection of threshold voltages of select gate transistors in a memory device


A memory device includes memory cells arranged in nand strings between select gate transistors. A threshold voltage (vth) distribution of the select gate transistors is evaluated, such as in response to a program, erase or read command involving a block or sub-block of memory cells.
Sandisk Technologies Inc.


07/28/16
20160217861 

Split voltage non-volatile latch cell


A memory including an array of non-volatile latch (nvl) cells and method of operating the same are provided. In one embodiment, each nvl cell includes a non-volatile portion and a volatile portion.
Cypress Semiconductor Corporation


07/28/16
20160217832 

Data-dependent self-biased differential sense amplifier


A system and method of operating a twin-transistor single bit multi-time programmable memory cell to provide a high gain, sensing scheme for small signals. The memory cell includes a pair of a first transistor and a second transistor providing a differential signal output.
Globalfoundries Inc.


07/28/16
20160217761 

Semiconductor device, and display device and electronic device utilizing the same


A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning off a diode-connected transistor 101, the gate terminal of a first transistor 102 is brought into a floating state.
Semiconductor Energy Laboratory Co., Ltd.


07/28/16
20160217743 

Organic light emitting diode display and manufacturing method thereof


An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.. .
Samsung Display Co., Ltd.


07/28/16
20160217739 

Display device and driving method thereof


A display device includes a plurality of pixel rows including a plurality of pixel circuits; a scan driver supplying scan signals to the plurality of pixel rows; and a data driver supplying a data voltage to the plurality of pixel circuits of the plurality of pixel rows, wherein the plurality of pixel circuits each include driving transistors and an organic light emitting diode which emit light depending on a current flowing in the driving transistors, the plurality of pixel rows are divided into a plurality of blocks, each of the blocks including at least one pixel row, and a period for which the data voltage is written in the plurality of pixel circuits in a first block among the plurality of blocks and a period for which a threshold voltage of the driving transistors of the plurality of pixel circuits in a second block temporally close to the first block is compensated partially overlap each other.. .
Samsung Display Co., Ltd.


07/28/16
20160217738 

Image display device and electronic appliance


An image display device includes: a pixel array part formed of first to fourth scanning lines arranged in rows, signal lines arranged in columns, pixel circuits in a matrix connected to the scanning lines and signal lines, and a plurality of power source lines which supplies first to third potentials necessary for the operations of pixel circuit; a signal part which supplies a video signal to the signal lines; and a scanner part which supplies a control signal to the first to fourth scanning lines, and in turn scans the pixel circuit for every row, wherein the pixel circuits include a sampling transistor, a drive transistor, first to third switching transistors, a pixel capacitance, and a light emitting device, and a channel length of the drive transistor is made longer than a channel length of the switching transistors to suppress fluctuations in threshold voltage.. .
Sony Corporation




Transistors topics: Transistors, Semiconductor, Semiconductor Device, Integrated Circuit, High Speed, Photodiode, Memory Effect, Silicon Nitride, Enhancement, Ion Implant, Ion Channel, Interrupted, Reference Voltage, Semiconductor Devices, Semiconductor Substrate

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