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Transistors

Transistors-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Power gated lookup table circuitry
Altera Corporation
October 12, 2017 - N°20170294914

A programmable integrated circuit with lookup table circuitry is provided. The lookup table (lut) circuitry may be formed using multiplexers. A multiplexer in the lookup table circuitry may be implemented using only tristate inverting circuits. Each tristate inverting circuit may include a first set of n-channel and p-channel transistors that receive a static control bit from a memory element and ...
Method and device for ac fed switch mode power supply based on normally on transistors
Visic Technologies Ltd.
October 12, 2017 - N°20170294848

A device for providing high dc voltage using a solid state normally open switch. The solid state switch is controlled to gradually rise the voltage of the dc output by applying on/off modulation scheme. The modulation scheme opens the switch initially for a very short time duration around the zero crossing of the input ac voltage and gradually the ...
High electron mobility transistors with improved heat dissipation
University Of Florida Research Foundation, Incorporated
October 12, 2017 - N°20170294528

Iii-nitride based high electron mobility transistors (hemts), such as algan/gan hemts on silicon substrates, with improved heat dissipation are described herein. A semiconductor device having improved heat dissipation may include a substrate having a top surface and a bottom surface, a nucleation layer on the top surface of the substrate, a transition layer on the nucleation layer, a buffer ...
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Semiconductor device, display device, and electronic device
Japan Display Inc.
October 12, 2017 - N°20170294452

A semiconductor device including: one or more pieces of first wiring having a main wiring section and a bifurcation wiring section; one or a plurality of pieces of second wiring having a trunk wiring section and a plurality of branch wiring sections within a gap region between the main wiring section and the bifurcation wiring section; one or a plurality ...
Static random access memory (sram) cells including vertical channel transistors and methods of forming the ...
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294441

A static random access memory (sram) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor sram cell, wherein each of the transistors is configured as a vertical channel transistor.
Standard cell for removing routing interference between adjacent pins and device including the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294430

An integrated circuit including a first standard cell including, first transistors, the first transistors being first unfolded transistors, a first metal pin, a second metal pin, and a third metal pin on a first layer, the first metal pin and the second metal pin having a first minimum metal center-to-metal center pitch therebetween less than or equal to 80 nm, a ...
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Dicing techniques for power transistors
Taiwan Semiconductor Manufacturing Co., Ltd.
October 12, 2017 - N°20170294391

Some embodiments relate to a die that has been formed by improved dicing techniques. The die includes a substrate which includes upper and lower substrate surfaces with a vertical substrate sidewall extending therebetween. The vertical substrate sidewall corresponds to an outermost edge of the substrate. A device layer is arranged over the upper substrate surface. A crack stop is arranged ...
Antifuse cell with capacitor and transistors
Stmicroelectronics S.r.l.
October 12, 2017 - N°20170294234

An antifuse cell includes an antifuse capacitor that is activatable with a breakdown voltage to provide an electrically conductive path through the capacitor. A pull-up transistor is coupled to the antifuse capacitor. A current path of the pull-up transistor is arranged in parallel with the antifuse capacitor. A shooting transistor is coupled to the pull-up transistor with the current paths ...
Display having vertical gate line extensions and minimized borders
Apple Inc.
October 12, 2017 - N°20170294172

A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of ...
Five-transistor-one-capacitor amoled pixel driving circuit and pixel driving method based on the circuit
Shenzhen China Star Optoelectronics Technology Co. Ltd.
October 12, 2017 - N°20170294164

An amoled pixel driving circuit has a 5t1c structure, which includes a first, a second, a third, a fourth, and a fifth thin film transistors, a capacitor, and an organic light emitting diode (oled). The first thin film transistor is a drive thin film transistor. A first global signal, a second global signal, and a scan signal are fed, ...
Amoled pixel driving circuit and pixel driving method
Shenzhen China Star Optoelectronics Technology Co., Ltd.
October 12, 2017 - N°20170294163

An amoled pixel driving circuit involves a 4t2c structure, including first to fourth thin film transistors, first and second capacitors, and an organic light emitting diode. First and second global signals and a reference voltage are supplied to the circuit. The third thin film transistor is arranged to selectively supply the reference voltage to a first node in order ...
Correlated double sampling (cds) circuit for decreasing settling time and image sensor including the same
Samsung Electronics Co., Ltd.
October 05, 2017 - N°20170289475

A correlated double sampling (cds) circuit includes a comparator and a first circuit. The comparator including, a first input terminal, a second input terminal, at least one output terminal, and a plurality of first transistors operably coupled between the at least one output terminal and the first and second input terminals. The first circuit includes at least one second transistor, ...
Optical communication system and device for linearizing non-linear signal transmission characteristics
Telefonaktiebolaget Lm Ericsson (publ)
October 05, 2017 - N°20170288783

A device for linearizing non-linear signal transmission characteristics of an optical communication system. A non-linearity introducing part is between an input port and an output port of the optical communication system. The non-linearity introducing part at least partly causes said non-linear signal transmission characteristics. The device is configured for connection between said input port and the non-linearity introducing part, in ...
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Current reuse amplifier
Sumitomo Electric Industries, Ltd.
October 05, 2017 - N°20170288623

A two-stage amplifier of a type of the current re-use configuration is disclosed. The amplifier includes first to third transistors, where the first transistor constitute the first stage, while, the latter two transistors constitute the second stance. The first to third transistors are connected in series between a power supply and ground such that a bias current supplied to the ...
Semiconductor device
Renesas Electronics Corporation
October 05, 2017 - N°20170288597

In a semiconductor device in the related art, it has been necessary to match the threshold voltage of a power element with the circuit operation of a gate driver; accordingly, it has been difficult to realize the operation of the gate driver most appropriate for the employed power element. According to one embodiment, when a power element is turned off, ...
Method for making a motor quieter
Ld Design Electronics Ab
October 05, 2017 - N°20170288579

The method is for making an electric motor more efficient by iteratively changing when a processor sends activation signals to transistors to minimize a current required to rotate a rotor at a constant rotational speed. The method is also for changing a rotational direction of the rotor by switching the order in which activation signals are sent to the transistors.
Rectifier circuit, and corresponding device and method
Stmicroelectronics S.r.l.
October 05, 2017 - N°20170288568

A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a. C. Signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with ...
Apparatuses and methods for a load current control circuit for a source follower voltage regulator
Micron Technology, Inc.
October 05, 2017 - N°20170288542

According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node and a power node, each of the plurality of current circuits including first and second transistors coupled in series, the first transistor of each of ...
Active clamp power converter and method of reducing shoot-through current during soft start
Semiconductor Components Industries, Llc
October 05, 2017 - N°20170288528

An acf power converter uses a soft start operation to reduce overheating and stress on components. The power converter includes a first transistor and second transistor. A high side driver controls the first transistor, and low side driver controls the second transistor. A first operating potential is provided to the low side driver during a first period of time. The ...
Electrostatic discharge (esd) isolated input/output (i/o) circuits
Qualcomm Incorporated
October 05, 2017 - N°20170288398

A method of protecting a serializer/deserializer (serdes) differential input/output (i/o) circuit includes detecting an electrostatic discharge event. The method also includes selectively disengaging a power supply terminal from a pair of i/o transistors of the serdes differential i/o circuit in response to the detected electrostatic discharge event. The method further includes selectively disengaging a ground ...
Group iii-n nanowire transistors
Intel Corporation
October 05, 2017 - N°20170288022

A group iii-n nanowire is disposed on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first group iii-n material, a source region electrically coupled with a first end of the channel region, and a drain region electrically coupled with a second end of the channel region. A second group iii-n material on ...
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