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Transistors

Transistors-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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NEW Solid-state imaging device, method of driving the same, and electronic apparatus
Sony Corporation
August 17, 2017 - N°20170237920

A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to ...
NEW Phase shift circuit, phased array device, and phase control method
Fujitsu Limited
August 17, 2017 - N°20170237475

A phase shift circuitry includes: a signal generation circuitry that receives an input signal, and outputs four signals different in phase from each other by 90 degrees based on the input signal, the four signals includes a first signal and a second signal; four variable amplifier circuitry that each includes a transistor, and amplify the four signals individually, with amplification factors ...
NEW Wide operating level shifters
University Of South Florida
August 17, 2017 - N°20170237439

Aspects of wide operating range level shifter designs are described. One embodiment includes a level shifter configured to receive an input signal in a first voltage domain and generate an output signal in a second voltage domain, a pulse generator configured to generate a pulse in response to sensing a rise transition on the input signal, and a droop circuit ...
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NEW Circuits and methods for impedance calibration
Altera Corporation
August 17, 2017 - N°20170237433

A driver circuit drives data to an output based on an input data signal in a transmission mode. The driver circuit includes transistors. A comparator generates a comparison output in a calibration mode based on a reference signal and a signal at the output of the driver circuit. A calibration control circuit adjusts an equivalent resistance of the transistors in ...
NEW Power control circuit
Renesas Electronics Corporation
August 17, 2017 - N°20170237363

A power control circuit according to one embodiment includes an h-bridge circuit formed using a plurality of power transistors. The power transistors are respectively connected to current measurement circuits that measure currents flowing through the power transistors. Each of the power transistors includes a main emitter and a sense emitter through which a current corresponding to a current flowing through ...
NEW Inverter
Renesas Electronics Corporation
August 17, 2017 - N°20170237359

D2) connected in anti-parallel to the first and second transistors (q1, q2), respectively; and a bidirectional switch that is connected between a third input terminal (t3) and the output terminal (t4) and that includes third and fourth transistors (q3, q4) and third and fourth diodes (d3, d4). The first and second transistors (q1, q2) and the third and fourth diodes (...
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NEW Electroluminescent imidazo-quinoxaline carbene metal complexes
Udc Ireland Limited
August 17, 2017 - N°20170237020

Metal carbene complexes comprising at least one imidazo-quinoxaline ligand, organic electronic devices, especially oleds (organic light-emitting diodes) which comprise such complexes, a light-emitting layer comprising at least one inventive metal carbene complex, an apparatus selected from the group consisting of illuminating elements, stationary visual display units and mobile visual display units comprising such an oled, the use of such a ...
NEW Method of fabricating display device
Samsung Display Co., Ltd.
August 17, 2017 - N°20170237009

A display device includes a display area, a test pad, a plurality of first test transistors, and at least one outline. The display area includes pixels coupled to data lines and scan lines. The test pad receives a test signal. The first test transistors are coupled between the data lines of the display area and the test pad. The at ...
NEW Rf-transistors with self-aligned point contacts
International Business Machines Corporation
August 17, 2017 - N°20170237008

A method of fabricating a semiconductor device includes depositing a dielectric layer on a substrate and a nanomaterial on the dielectric layer. The method also includes depositing a thin metal layer on the nanomaterial and removing a portion of the thin metal layer from a gate area. The method also includes depositing a gate dielectric layer. The method also includes ...
NEW Rf-transistors with self-aligned point contacts
International Business Machines Corporation
August 17, 2017 - N°20170237007

A method of fabricating a semiconductor device includes depositing a dielectric layer on a substrate and a nanomaterial on the dielectric layer. The method also includes depositing a thin metal layer on the nanomaterial and removing a portion of the thin metal layer from a gate area. The method also includes depositing a gate dielectric layer. The method also includes ...
NEW Process for preparing a crystalline organic semiconductor material
Basf Se
August 17, 2017 - N°20170237005

Provided are a process for preparing a crystalline organic semiconductor material wherein the conditions of crystallization lead to the formation of crystals at the gas liquid interface having advantageous semiconductor properties, the obtained crystalline organic semiconductor material and the use thereof for the production of organic semiconductor devices, in particular organic field effect transistors and organic solar cells.
NEW Structures for nitride vertical transistors
Massachusetts Institute Of Technology
August 17, 2017 - N°20170236951

A vertical semiconductor transistor and a method of forming the same. A vertical semiconductor transistor has at least one semiconductor region, a source, and at least one gate region. The at least one semiconductor region includes a iii-nitride semiconductor material. The source is formed over the at least one semiconductor region. The at least one gate region is formed around ...
NEW Support for long channel length nanowire transistors
International Business Machines Corporation
August 17, 2017 - N°20170236944

A nanowire device includes a first component formed on a substrate and a second component disposed apart from the first component on the substrate. A nanowire is configured to connect the first component to the second component. An anchor pad is formed along a span of the nanowire and configured to support the nanowire along the span to prevent sagging.
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NEW Wide band gap transistor on non-native semiconductor substrates and methods of manufacture thereof
Intel Corporation
August 17, 2017 - N°20170236936

Techniques are disclosed for forming a gan transistor on a semiconductor substrate. An insulating layer forms on top of a semiconductor substrate. A trench, filled with a trench material comprising a iii-v semiconductor material, forms through the insulating layer and extends into the semiconductor substrate. A channel structure, containing iii-v material having a defect density lower than the trench material, ...
NEW Low sheet resistance gan channel on si substrate using inaln and algan bi-layer capping stack
Intel Corporation
August 17, 2017 - N°20170236928

Transistors or transistor layers include an inaln and algan bi-layer capping stack on a 2deg gan channel, such as for gan mos structures on si substrates. The gan channel may be formed in a gan buffer layer or stack, to compensate for the high crystal structure lattice size and coefficient of thermal expansion mismatch between gan and si. The bi-layer ...
NEW Semiconductor device with multiple hbts having different emitter ballast resistances
Qorvo Us, Inc.
August 17, 2017 - N°20170236925

The present disclosure relates to a semiconductor device with multiple heterojunction bipolar transistors (hbts) that have different emitter ballast resistances. The disclosed semiconductor device includes a substrate, a first hbt and a second hbt formed over the substrate. The first hbt includes a first collector, a first base over the first collector, a first emitter over the first base, and ...
NEW Nanowire with sacrificial top wire
International Business Machines Corporation
August 17, 2017 - N°20170236900

Field effect transistors and methods of forming the same include forming a stack of nanowires of alternating layers of channel material and sacrificial material. A layer of sacrificial material forms a top layer of the stack. A dummy gate is formed over the stack. Stack material outside of a region covered by the dummy gate is removed. The sacrificial material ...
NEW Semiconductor device with thresholdmosfet for high voltage termination
Alpha And Omega Semiconductor Incorporated
August 17, 2017 - N°20170236895

This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a lightly doped layer formed on a heavily doped layer and having an active cell area and an edge termination area. The edge termination area comprises a plurality p-channel mosfets. By connecting the gate to the drain electrode, the p-channel mosfet transistors formed on the edge termination ...
NEW Electro-optical device and electronic apparatus
Seiko Epson Corporation
August 17, 2017 - N°20170236891

Subpixels of r, g, and b corresponding to a scanning line extended in a row direction and a data transfer line extended in a column direction are provided. A plurality of transistors in the subpixel of each of the colors is disposed along the column direction, and a reflective layer in the subpixel of at least one color is disposed ...
NEW Electro-optical device and electronic apparatus
Seiko Epson Corporation
August 17, 2017 - N°20170236885

Subpixels of r, g, and b corresponding to a scanning line as a first conductive layer extended in a row direction and a data transfer line as a second conductive layer extended in a column direction are provided. A plurality of transistors in the subpixel of each of the colors is disposed along the column direction, and a reflective layer ...
NEW Bonding p-type and n-type sheets to form complementary circuits
Polyera Corporation
August 17, 2017 - N°20170236874

A method for fabricating at least a portion of a complementary circuit, such as a complementary inverter circuit, includes fabricating a first sheet and a second sheet. Each of the sheets includes metal layers, a dielectric layer, and a semiconductor channel layer, configured so as to form a plurality of transistors of a respective polarity (i. E., p-type for one ...
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