|| List of recent Solder-related patents
| Electrical connector|
An electrical connector includes an insulating body having multiple signal receiving slots and at least one grounding receiving slot, multiple signal terminals and at least one grounding terminal respectively received in the signal receiving slots and the grounding receiving slot, a first conducting layer disposed in the grounding receiving slot for shielding the signal terminals, and a solder located in the grounding receiving slot and contacts the first conducting layer and the grounding terminal. The electrical connector may further includes an upper conducting layer and a lower conducting layer, respectively disposed on an upper surface and a lower surface of the insulating body, and multiple through holes surrounding each signal receiving slot.
| Contact with anti-rotation elements and solder flow abatement|
A contact includes a head, a tail including an opening, a body connected at one end thereof to the head and at another end thereof to the tail, a first lance and a second lance extending from the body, a dimple raised from the body, and a solder member attached to the tail such that the solder member engages at least a portion of the opening. The first lance and the second lance are arranged to deflect when the contact is inserted into a connector; and the first lance, the second lance, and the dimple are arranged to frictionally secure the contact to the connector..
| Method of forming bump structure|
A method of forming a bump structure includes forming a metallization layer on a top metal layer by electroless plating process, forming a polymer layer over the metallization layer; forming an opening on the polymer layer to expose the metallization layer, and forming a solder bump over the exposed metallization layer to make electrical contact with the top metal layer.. .
| Making an integtated circuit module with dual leadframes|
A method of making an integrated circuit module starts with a top leadframe strip comprising a plurality of integrally connected top leadframes. A plurality of flipchip dies are mounted on the top leadframe strip with solder bumps of each flipchip bonded to predetermined pad portions on each of the top leadframes.
| Dental prosthesis and method for the production thereof|
A dental prosthesis, includes a metal framework having at least one cap, which can be joined to an abutment of a dental implant. The metal framework includes a connecting element which can be, or is, joined to the cap in the oral cavity of a patient, in particular by way of welding, soldering or gluing, wherein the cap has a tip and, on the inside, a cavity into which the abutment can be inserted through an opening located opposite the tip.
| Device and method for coupling a light source to a printed circuit board in lamps|
A lamp includes a collar with internal and outer surfaces, where two or more connection pins extend from the internal surface of the collar. At least two connection pins have a head portion distal from the collar internal surface.
| Solder in cavity interconnection technology|
An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities.
| Motherboard with electrostatic discharge protection function|
A motherboard with an electrostatic discharge protection (esd) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level.
| Electronic device with diverse antenna array having soldered connections|
A wireless electronic device may be provided with antenna structures. The antenna structures may be formed from an antenna ground and an array of antenna resonating elements.
| Bump-on-trace methods and structures in packaging|
A method and structure for bump-on-trace bonding is provided. In an embodiment traces to be used for bump-on-trace (bot) bonding are protected during a pre-solder treatment.
| Packaging substrate and fabrication method thereof|
A packaging substrate and a fabrication method thereof are disclosed. The packaging substrate includes: a substrate body having a plurality of first and second conductive pads formed on a surface thereof; a first insulating layer formed on the surface of the substrate body and having a plurality of first and second openings for respectively exposing the first and second conductive pads; a conductive layer formed on the first and second conductive pads and the first insulating layer around peripheries of the first and second conductive pads; a plurality of first and second conductive bumps formed on the conductive layer on the first and second conductive pads, respectively; a solder layer formed on the second conductive bumps; and a plurality of conductive posts formed on the first conductive bumps and having a width different from that of the first conductive bumps.
| Semiconductor packages and methods of forming the same|
A semiconductor package including a package substrate having a chip mounting region and a peripheral region and including a ground layer formed in the peripheral region, first solder balls on the package substrate in the chip mounting region, second solder balls on the ground layer, at least one semiconductor chip stacked on the package substrate in the chip mounting region, and a package cap covering the semiconductor chip and contacting the package substrate in the peripheral region may be provided. The package cap is electrically connected to the second solder balls.
| Semiconductor device|
A semiconductor device includes a lead frame, a semiconductor chip soldered to the lead frame, and a metal bar. The metal bar is arranged inside a solder layer so as to extend along one side of the semiconductor chip.
| Wafer level chip scale package and process of manufacture|
Power wafer level chip scale package (csp) and process of manufacture are enclosed. The power wafer level chip scale package includes all source, gate and drain electrodes located on one side of the device, which is convenient for mounting to a printed circuit board (pcb) with solder paste..
| Light emitter packages and methods|
Light emitter packages and related methods having improved performance are disclosed. In one aspect, a light emitter package can include at least one light emitter chip disposed over a substrate or submount.
| Displays with shared flexible substrates|
An electronic device may be provided with a display such as an organic light-emitting diode display. The display may include an array of display pixels formed on a polymer substrate layer.
| Vehicle bicycle rack|
An improved vehicle bicycle rack structure includes a hook and a connecting body. The hook has a rack that includes the upper and lower tubes for a hook shell, which can receive the connecting body and secure it by soldering the connecting portion, so that the structure of hook shell of the hook can be strengthened because the connecting body is received therein.
|Layered composite of a substrate film and of a layer assembly comprising a sinterable layer made of at least one metal powder and a solder layer|
The invention relates to a layered composite (10), in particular for connecting electronic components as joining partners, comprising at least one substrate film (11) and a layer assembly (12) applied to the substrate film. The layer assembly comprises at least one sinterable layer (13), which is applied to the substrate film (11) and which contains at least one metal powder, and a solder layer (14) applied to the sinterable layer (13).
|Tape package and flat panel display device including the same|
Provided are a tape package and a flat panel display device including the tape package. The tape package includes a base film, a semiconductor chip mounted on one surface of the base film, a wire pattern including an input wire pattern and an output wire pattern formed on one surface of the base film and electrically connected with the semiconductor chip, a solder resist covering the remaining portion, except for an end of the wire pattern, and a protection film provided on an edge at one side of the solder resist facing an end of the output wire pattern..
|Thermal metal oxide varistor circuit protection device|
Exemplary embodiments of the present invention are directed to a circuit protection device. A circuit protection device may comprise a housing defining a cavity and a metal oxide varistor (mov) disposed within the cavity.
|Relay assembly with fastening clip|
A relay assembly comprises a relay mounted on a board. The relay may be a single or individual relay or a polyphasic relay.
|Stacked package, method of fabricating stacked package, and method of mounting stacked package fabricated by the method|
Provided are a stacked package, a method of fabricating a stacked package, and a method of mounting the stacked package fabricated by the same. The method of fabricating a stacked package includes providing an upper semiconductor package including an upper package substrate, upper semiconductor chips formed on a top surface of the upper package substrate, and first solders formed on a bottom surface of the upper package substrate and having a first melting temperature, providing a lower semiconductor package including a lower package substrate, lower semiconductor chips formed on a top surface of the lower package substrate, and solder paste nodes formed on the top surface of the lower package substrate and having a second melting temperature lower than the first melting temperature, and forming inter-package bonding units by attaching respective first solders and solder paste nodes to each other by performing annealing at a temperature higher than the second melting temperature and lower than the first melting temperature..
|Stacked type semiconductor device and printed circuit board|
The printed circuit board (100) includes the interposer (2) where the semiconductor element (1) is mounted and the electrode pad (8) is formed on one surface, the printed wiring board (3) where the electrode pad (9) is formed on one surface facing the interposer (2), and the joint material (70) for bonding the electrode pads (8) and (9). The joint material (70) includes the solder layer (60) formed by the solder material (11) and the metal layers (50), (50) provided to the electrode pads (8) and (9).
|Apparatus for lead free solder interconnections for integrated circuits|
An apparatus includes an integrated circuit having at least one input/output terminal comprising copper formed thereon. A metal cap layer overlies an upper surface of the at least one input/output terminal.
Embodiments of the present disclosure provide a first package configured to be coupled to a second package, wherein the first package comprises: a ball grid array substrate; a die coupled to the ball grid array substrate; two rows of ball pads arranged around a periphery of the ball grid array substrate, wherein the ball pads of the two rows of ball pads are configured to receive solder balls to couple the first package to the second package, wherein an outer row of the two rows of ball pads comprises at least some ball pads configured as a first type of ball pad, wherein an inner row of the two rows of ball pads comprises at least some ball pads configured as a second type of ball pad, wherein the first type of ball pad is different than the second type of ball pad.. .
|Millimeter wave wafer level chip scale packaging (wlcsp) device and related method|
Various embodiments include wafer level chip scale package (wlcsp) structures and methods of tuning such structures. In some embodiments, the wlcsp structure includes: a printed circuit board (pcb) trace connection including at least one pcb ground connection connected with a pcb ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the pcb ground plane; a signal ball contacting the signal pcb trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad..
|Packaging methods and packaged semiconductor devices|
Packaging methods and packaged semiconductor devices are disclosed. In one embodiment, a packaging method includes providing a first die, partially packaging the first die, and forming a plurality of solder balls on a surface of the partially packaged first die.
|Method for producing a solder joint|
The invention relates to a method for producing a solder joint between at least one base part (2) and at least one first component (3), comprising the following steps: providing the base part (2); partially blasting a surface of the base part (2) using a saco blasting agent, the blasting material (50) of which has a silicate coating (52), in such a way that a saco-blasted region (20) and a non-blasted positioning region (40) are present; and soldering the at least first component (3) onto the non-blasted positioning region (40), wherein the saco-blasted region (20) acts as a solder resist.. .
|Semiconductor device including electromagnetic absorption and shielding|
A semiconductor device is disclosed including material for absorbing emi and/or rfi the device includes a substrate (202), one or more semiconductor die (224,225), and molding compound around the one or more semiconductor die (224,225). The material for absorbing emi and/or rfi may be provided within or on a solder mask layer (210) on the substrate (202).
|Method of manufacturing electronic component unit|
An electronic component unit manufacturing method includes: preparing a circuit board including a heat generating element mounted thereon and a bonding metal foil layer formed thereon, a heat transfer board including an insulative layer formed on one face thereof and a heat transfer metal foil layer formed on the insulative layer, and a heat sink; applying a cream solder to form a solder layer on the board bonding metal foil layer or the heat transfer metal foil layer; superimposing the bonding metal foil layer and the heat transfer metal foil layer with each other via the solder layer; re-melting the solder layer to solder the bonding metal foil layer and the heat transfer metal foil layer; and superimposing the other face of the heat transfer board with the heat sink to thereby assemble the circuit board with the heat sink via the heat transfer board.. .
|Multi-finish printed circuit board|
A multi-finish printed circuit board may include one or more electrically conductive elements, such as through hole pads, that may have a first surface finish and one or more electrically conductive elements, such as surface mount pads, that may have a second surface finish that is different from the first surface finish. The first surface finish may be a hot air solder leveling (hasl) surface finish or a lead-free hot air solder leveling (lf hasl) surface finish and the second surface finish may be an organic surface protector (osp) surface finish.
|Method for repairing surface damage to a turbomachine component|
A method for repairing surface damage to a turbomachine component that has a base material which has titanium with the base material having tial6v4 and/or pure titanium is provided. The method includes the following steps: mixing a solder that has a titanium-containing alloy and a powder which is distributed in the solder and which has the base material; applying the solder onto turbomachine component areas where the surface damage is located; introducing a quantity of heat into the solder and into the turbomachine component such that the alloy liquefies and the areas are thus wetted; and cooling the solder such that the alloy solidifies..
The invention relates to a solderable contact formed by a substantially u-shaped contact part consisting of a base plate with two legs that are joined to the base plate. A spring arm which is arranged on one leg extends in the direction of the leg opposite said leg.
|Methods for reducing thermal resistance of carbon nanotube arrays or sheets|
Carbon nanotube (cnt) forests or sheets coated and/or bonded at room temperature with one or more coatings were measured to produce thermal resistances that are on par with conventional metallic solders. These results were achieved by reducing the high contact resistance at cnt tips and/or sidewalls, which has encumbered the development of high-performance thermal interface materials based on cnts.
According to one embodiment, a coil terminal is electrically connected to a coil being wound around an electromagnetic block and connected to a coated wire. The coil terminal includes a connection portion electrically connected to the coil, and a terminal body portion extending from the connection portion and connected to the coated wire.
|Isolation structure for stacked dies|
An isolation structure for stacked dies is provided. A through-silicon via is formed in a semiconductor substrate.
|Solder and die-bonding structure|
A solder includes zinc as a main component and the solder contains 6 to 8 mass percent of indium. A solder includes zinc as a main component, wherein the solder contains only indium.
|Methods and structures for reducing stress on die assembly|
A first set of electrically conductive cladding is disposed on an inner section of one external side of a package substrate. The first set electrically conductive cladding is fabricated with a first solder compound.
|Solderless die attach to a direct bonded aluminum substrate|
A dba-based power device includes a dba (direct bonded aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the dba.
|Semiconductor device and method of confining conductive bump material during reflow with solder mask patch|
A semiconductor device has a semiconductor die with die bump pads and substrate with trace lines having integrated bump pads. A solder mask patch is formed interstitially between the die bump pads or integrated bump pads.
A semiconductor device includes a metal substrate, semiconductor elements, wires, a control terminal, a main electrode terminal, a control substrate, a cover, a sealing resin, a case, and an insulator. The metal substrate includes a metal plate, an insulating layer formed on the top surface of the metal plate, and electrode patterns provided on the insulating layer.
|Method of manufacturing a semiconductor device|
A soldering method achieves little void and good joint condition in soldering an insulated circuit board and a semiconductor chip using a tin—high antimony solder material. A method of manufacturing a semiconductor device includes the steps of preparing a solder plate having a u-shape; mounting the solder plate on a substrate; mounting a semiconductor chip on the solder plate; fusing the solder plate in a reducing gas atmosphere; and reducing a pressure of the reducing gas atmosphere to a pressure lower than the atmospheric pressure when melting the solder plate..
|Wire solder, method of feeding the same, and apparatus and system therefor|
Provided is an apparatus for feeding wire solder with high tensile strength and pull cut resistance. The wire solder has an extended wire solder and a core wire having a higher tensile strength than the wire solder.
|Method for manufacturing optical module|
A method for manufacturing an optical module 1 includes: a cladding 12 of one end of the optical fiber is exposed; an arrangement process of arranging the optical fiber 10 such that at least a leading end of a portion on which the cladding 12 is exposed is positioned in a box portion through a pipe portion 35 in which one end is connected to the box portion 31 configured to accommodate an optical element and which extends to an outside of the box portion 31; and a soldering process of soldering an inner wall of the pipe portion 35 and the optical fiber 10 by heating at least a part of a lower region bar interposed between a heat dissipation portion and the pipe portion 35 in a state where a part of a wall of the box portion 31, in which the optical element is accommodated, is heat-dissipated.. .
|High-speed transportation mechanism for micro solder balls|
Approaches to a solder ball bonding (sbb) tool and a method for solder ball bonding work pieces. The sbb tool comprises a rotatable feed plate for transporting solder balls from a reservoir to a nozzle, which is a position at which a laser light source can irradiate and melt the solder balls.
|Solder mask ink comprising amide gellant|
Inkjet printer-compatible solder mask inks include amide gellants to provide improved print resolution. A solder mask ink includes an amide gellant and a plurality of acrylate monomers, oligomers, or combinations thereof..
|Impact resistant housing for data signal devices|
An impact resistant housing used to house devices to split, amplify, or modulate signals for catv, satellite and phone systems comprises a base and a cover. The base includes a bottom, a top opening, and a peripheral recession portion that is recessed from internal walls of the base and located adjacent to the top opening.
|Antifreeze concentrate with corrosion protection and aqueous coolant composition produced therefrom|
Antifreeze concentrate with corrosion protection which is suitable for coolants and heat transfer fluids and comprises freezing point-lowering liquids and also particular sulfur-comprising organic compounds, inorganic molybdate salts, inorganic phosphate salts and aliphatic, cycloaliphatic or aromatic monocarboxylic, dicarboxylic or tricarboxylic acids as corrosion inhibitors. Aqueous coolant compositions which are suitable for cooling an internal combustion engine whose cooling apparatus has been made of aluminum using a soldering process using a fluoroaluminate flux can be obtained therefrom..
|Multidimensional strain gage|
A strain sensor is provided having an annular collar. At least one sensor is movably coupled to the collar, the at least one sensor having a body with a plurality of silicon strain gages coupled thereto.
|Photo-curable and thermo-curable resin compostion, and dry film solder resist|
The present invention relates to a photo-curable and thermo-curable resin composition that can provide a dry film solder resist having a higher glass transition temperature and improved heat resistance reliability, and the dry film solder resist. Said resin composition may include an acid-modified oligomer including an iminocarbonate-based compound having a carboxy group (—cooh) and a photo-curable unsaturated functional group, a photo-polymerizable monomer having two or more photo-curable unsaturated functional groups, a thermo-curable binder having a thermo-curable functional group, and a photo-initiator..
|Electrical connector assembly and electrical connector used therefor|
An electrical connector assembly is provided with a plug connector and a receptacle connector. The plug connector includes a housing and a plurality of conductive plug terminals arranged along a row in the housing.
An electrical connector includes a body, a soldering portion, an insertion arm, a through hole, and a conductive layer. The soldering portion is disposed on the body.
|Cable connector assembly with an improved grounding contact|
A cable connector assembly comprises an insulative housing, a plurality of first contacts and second contacts, a cable electrically connected with the contacts, a metallic shell enclosing the insulative housing. The first contacts are received in the first tongue, and the second contacts are held in the second tongue, the second contacts have a grounding contact in the middle thereof.
|Conductive connection structure for secondary batteries|
A conductive connection structure for secondary batteries employs conductive portions disposed under two lateral sides of a cover plate to conductively connect to at least one battery cell. The conductive portions disposed under the two lateral sides of the cover plate are bendable, and the conductive portions are bent toward outer sides of the cover plate, so that the conductive portions are disposed horizontally; a connecting portion is extended upward respectively from an anode and a cathode terminals on two lateral sides of each of the battery cells, and the connecting portions and the conductive portions are electrically connected.
|High impact toughness solder alloy|
High impact toughness alloy the invention provides an alloy, preferably a lead-free solder alloy, comprising: from 35 to 59% wt bi; from 0 to 0.0 wt % ag; from 0 to 1.0% wt au; from 0 to 1.0% wt cr; from 0 to 2.0% wt in; from 0 to 1.0% wt p; from 0 to 1.0% wt sb; from 0 to 1.0% wt sc; from 0 to 1.0% wt y; from 0 to 1.0% wt zn; from 0 to 1.0% wt rare earth elements; one or more of: 10 from greater than 0 to 1.0% wt al; from 0.01 to 1.0% wt ce; from greater than 0 to 1.0% wt co; from greater than 0 to 0.0% wt cu; from 0.001 to 1.0% wt ge; from greater than 0 to 0.0% wt mg; from greater than 0 to 1.0% wt mn; from 0.01 to 1.0% wt ni; and from greater than 0 to 1.0% wt ti, and the 1 balance sn, together with any unavoidable impurities.. .
|Electronic device, bonding material, and method for producing electronic device|
An electronic device has a printed substrate having land electrodes and a chip-type electronic component having external electrodes formed on a surface of a component element body. The land electrodes and the external electrodes are bonded via a solder to form electrode bonding parts.
The invention relates to a fuse (3) for connection to a protective component (2) of an overvoltage protective device (2), wherein the fuse (3) has a housing (3f), a first cap (3a), a second cap (3b) and a fuse wire (3d), which runs within the housing between the first cap (3a) and the second cap (3b), wherein the first cap (3a) is designed for thermal and electrical connection to the protective component (2), wherein the fuse wire (3d) is held on the first cap (3a) by means of a soldered connection (3c), wherein the fuse wire (3d) is fastened to a connection electrode (4) opposite the first cap (3a), wherein the connection electrode (4) is held in a guide (8) so as to be movable with respect to the body of the fuse (3) and is under a mechanical pretension (6) with respect to the body of the fuse (3), wherein the fuse wire (3d) is designed such that it melts when acted on with a high i2t, and wherein the soldered connection (3c) is designed such that the soldered connection (3c), in the event of external heating by the overvoltage protective device (2) above a specified temperature, melts due to the thermal connection, and wherein, due to the mechanical pretension (6), the electric contact between the first cap (3a) and the connection electrode (4) is cancelled if the fuse wire (3d) and also the soldered connection (3c) melt.. .
|Flip chip type saw band reject filter design|
A method and system for providing a surface acoustic wave band reject filter are disclosed. According to one aspect, a surface acoustic wave band reject filter includes a substrate having electrode bars and bonding pads formed on the substrate.
Provided is a semiconductor package with improved mounting property. A concave portion is provided in an insulating resin between an island for mounting a semiconductor chip thereon and an opposing lead, to thereby prevent contact between solder printed on a circuit board and the insulating resin.
|Semiconductor device and method of fabricating the same|
A semiconductor device includes a bonding pad on a semiconductor substrate, a bump on the bonding pad, a solder on the bump, and an anti-wetting layer between the bump and the solder extending along a sidewall of the bump, the anti-wetting layer having a first thickness t1 along the sidewall of the bump closer to the solder and a second thickness t2 along the sidewall of the bump closer to the bonding pad, wherein t2<t1.. .
|High density package interconnects|
Electronic assemblies and methods including the formation of interconnect structures are described. In one embodiment an apparatus includes semiconductor die and a first metal bump on the die, the first metal bump including a surface having a first part and a second part.
|Low cost and high performance flip chip package|
A low cost and high performance flip chip package is disclosed. By assembling the package using a substrate panel level process, a separate fabrication of a substrate is avoided, thus enabling the use of a coreless substrate.
|Heat sink package|
The heat sink package includes a heat sink having a cavity on an upper surface thereof; a metal layer formed on the bottom surface of the cavity; a solder paste layer formed on the metal layer; a substrate on the solder paste layer; and a lead and a semiconductor chip mounted on the substrate.. .
|Submount-free light emitting diode (led) components and methods of fabricating same|
Light emitting devices include a light emitting diode (led) chip having an anode contact and a cathode contact on a face thereof. A solder mask extends from the gap between the contacts onto one or both of the contacts.
|Removal of electronic chips and other components from printed wire boards using liquid heat media|
Systems and methods for the removal of electronic chips and other components from pwbs using liquid heat media are generally described. The systems and methods described herein can be used to remove solder, electronic chips (including those in which an integrated circuit is positioned on a piece of semiconductor material, such as silicon), and/or other electronic components from pwbs.
|Joining method and semiconductor device manufacturing method|
A joining method that allows joining processing to be carried out simultaneously at a plurality of portions without being influenced by a supply time restriction on a joining material, and a semiconductor device manufacturing method using the joining method are provided. A chip and a lead frame are tentatively assembled having a solid solder block interposed therebetween.