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Silicon-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Phased-array antenna with in-plane optical feed and method of manufacture
Phase Sensitive Innovations, Inc.
October 12, 2017 - N°20170294720

A phased antenna array comprises a plurality of antennas and photodiodes arranged on a substrate. Each antenna is driven by an electrical signal output by the photodiode. The photodiodes each receive an optical signal via an optical fiber. The optical fibers conform to the sheet-like shape of the antenna array (which may be planar or curved) and optically communicate with ...
Electrolytes with ionic liquid additives for lithium ion batteries
Storedot Ltd.
October 12, 2017 - N°20170294681

Electrolytes, anodes, lithium ion cells and methods are provided for preventing lithium metallization in lithium ion batteries to enhance their safety. Electrolytes comprise up to 20% ionic liquid additives which form a mobile solid electrolyte interface during charging of the cell and prevent lithium metallization and electrolyte decomposition on the anode while maintaining the lithium ion mobility at a level which ...
Partly immobilized ionic liquid electrolyte additives for lithium ion batteries
Storedot Ltd.
October 12, 2017 - N°20170294680

Electrolytes, anodes, lithium ion cells and methods are provided for preventing lithium metallization in lithium ion batteries to enhance their safety. Electrolytes comprise up to 20% ionic liquid additives which form a mobile solid electrolyte interface during charging of the cell and prevent lithium metallization and electrolyte decomposition on the anode while maintaining the lithium ion mobility at a level which ...
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Tin silicon anode active material
Storedot Ltd.
October 12, 2017 - N°20170294643

Improved anodes and cells are provided, which enable fast charging rates with enhanced safety due to much reduced probability of metallization of lithium on the anode, preventing dendrite growth and related risks of fire or explosion. Anodes and/or electrolytes have buffering zones for partly reducing and gradually introducing lithium ions into the anode for lithiation, to prevent lithium ion ...
A process for preparing passivated emitter rear contact (perc) solar cells
Csi Cells Co., Ltd
October 12, 2017 - N°20170294545

A process for preparing a passivated emitter rear contact solar cell, which includes the steps as follows: removing the damaged layer on the surface of the silicon wafer and at the same time polishing both surfaces, texturing, forming pn junction, etching, removing the glass impurity, depositing a passivation film on the back surface, depositing a passivating antireflective layer on the ...
Bulk to silicon on insulator device
International Business Machines Corporation
October 12, 2017 - N°20170294534

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. ...
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Silicon Patent Applications
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  • 4172+ full patent PDF documents of Silicon-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
High electron mobility transistors with improved heat dissipation
University Of Florida Research Foundation, Incorporated
October 12, 2017 - N°20170294528

Iii-nitride based high electron mobility transistors (hemts), such as algan/gan hemts on silicon substrates, with improved heat dissipation are described herein. A semiconductor device having improved heat dissipation may include a substrate having a top surface and a bottom surface, a nucleation layer on the top surface of the substrate, a transition layer on the nucleation layer, a buffer ...
Semiconductor device and method for manufacturing the same
Mitsubishi Electric Corporation
October 12, 2017 - N°20170294527

An insulated gate bipolar transistor (igbt) includes: a p base layer disposed close to a front surface of an n-type silicon substrate; and a deep n+ buffer layer and a shallow n+ buffer layer disposed close to a back surface of the n-type silicon substrate. The p base layer has a higher impurity concentration than the n-type silicon substrate. The ...
Recess liner for silicon germanium fin formation
Globalfoundries Inc.
October 12, 2017 - N°20170294515

Semiconductor device fabrication method and structures are provided having a substrate structure which includes a silicon layer at an upper portion. The silicon layer is recessed in a first region of the substrate structure and remains unrecessed in a second region of the substrate structure. A protective layer having a first germanium concentration is formed above the recessed silicon layer ...
Semiconductor device and manufacturing method of the same
Globalfoundries Inc.
October 12, 2017 - N°20170294513

A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the soi substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of ...
Bulk to silicon on insulator device
International Business Machines Corporation
October 12, 2017 - N°20170294507

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. ...
Display device
Innolux Corporation
October 12, 2017 - N°20170294497

A display device is disclosed, which includes: a substrate; a light emitting diode disposed above the substrate; a first transistor disposed above the substrate; and a second transistor disposed above the substrate. The first transistor includes: a first semiconductor layer; a first top gate electrode disposed above the first semiconductor layer; a first bottom gate electrode disposed under the first ...
Display device
Innolux Corporation
October 12, 2017 - N°20170294460

A display device includes a substrate; a gate insulating layer disposed on the substrate, a first gate electrode and a second gate electrode; a first active layer disposed on the gate insulating layer and comprising a polysilicon layer; a first insulating layer disposed on the first active layer and the gate insulating layer; a second active layer disposed on the ...
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  • 4172+ full patent PDF documents of Silicon-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
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Semiconductor structure having gate replacement and method for manufacturing the same
Macronix International Co., Ltd.
October 12, 2017 - N°20170294444

A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first stacked structures and two second stacked structures disposed on the substrate. Each of the first stacked structures includes alternately stacked metal layers and oxide layers. Each of the second stacked structures includes alternately stacked silicon nitride layers and oxide layers. The first stacked structures are ...
Semiconductor device and method for forming the same
Nanya Technology Corporation
October 12, 2017 - N°20170294380

A semiconductor device with a ring structure surrounding a through silicon via (tsv) electrode and a method for forming the same are disclosed. The method includes receiving a substrate including a back side and a front side having a conductor thereon, forming a via hole in the substrate and exposing the conductor, forming a groove extending from the back side ...
Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, ...
Stmicroelectronics (crolles 2) Sas
October 12, 2017 - N°20170294379

A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, ...
Reliable packaging and interconnect structures
Tessera, Inc.
October 12, 2017 - N°20170294376

Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be ...
Co-integration of silicon and silicon-germanium channels for nanosheet devices
International Business Machines Corporation
October 12, 2017 - N°20170294357

Nanosheet semiconductor devices and methods of forming the same include forming a first stack in a first device region, the first stack including layers of a first channel material and layers of a sacrificial material. A second stack is formed in a second device region, the second stack including layers of a second channel material, layers of the sacrificial material, ...
Integration of nominal gate width finfets and devices having larger gate width
Globalfoundries Inc.
October 12, 2017 - N°20170294354

A starting semiconductor structure includes a layer of filler material (e. G., amorphous silicon), a hard mask layer over the layer of filler material, and filler material lines over the hard mask layer. A protective layer is formed over one or more, but less than all of the filler material lines, at least one protected filler material line and at ...
Semiconductor device and manufacturing method thereof
Renesas Electronics Corporation
October 12, 2017 - N°20170294352

A semiconductor device with a through via penetrating a semiconductor substrate, in which shorting between a wiring and a semiconductor element is prevented to improve the reliability of the semiconductor device. A liner insulating film as a low-k film, which has a function to insulate the semiconductor substrate and a through-silicon via from each other and is thick enough to ...
Bulk to silicon on insulator device
International Business Machines Corporation
October 12, 2017 - N°20170294340

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. ...
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