|| List of recent Silicon-related patents
| System and method for configuring a transistor device using rx tuck|
The present disclosure relates to methods and systems for designing and fabricating an integrated circuit. In particular, a method includes electronically searching a virtual layout of an integrated circuit to locate a dummy polysilicon structure positioned between adjacent terminals of first and second mosfet devices that are connected to different nodes of the integrated circuit.
| Enhanced low friction coating for medical leads and methods of making|
An implantable or insertable medical device can include a silicone substrate and a plasma-enhanced chemical vapor deposition coating on the silicone substrate. The coating may include a silicon-containing compound.
| Optical neuron stimulation prosthetic using silicon carbide|
The microfabricated prosthetic device uses local, direct, and wavelength-specific optical stimulation to achieve an action potential from a single or small group of neurons within the central nervous system (cns). The device is biocompatible, mechanically flexible, and optically transparent.
| Novel fluorene compound and process for preparing the same|
Wherein r represents a hydrogen atom or a methyl group, which compound gives a compound excellent in regioselectivity at the time of hydrosilylation with a si—h containing organosilicon compound, with a less formed amount of an internally added β adduct, as compared with the conventionally known fluorene compound having an allyl group, so that heat resistance of the resulting organosilicon compound is expected to be improved whereby it is a useful compound.. .
| Room-temperature-curable silicone rubber composition|
A room-temperature-curable silicone rubber composition comprises: (a) an organopolysiloxane having on silicon atoms in the molecular chain in one molecule at least two specific alkoxysilyl-containing groups; (b) an organopolysiloxane having on silicon atom in the molecular chain neither a hydroxyl group nor an alkoxy group; (c) an alkoxysilane or its partial hydrolysis and condensation product; (d) a condensation reaction catalyst; and optionally comprises (e) an adhesion promoter and/or (f) a re-inforcing filler. The composition cures at room temperature due to contact with atmospheric moisture and exhibits an excellent adhesiveness to substrate in contact with the composition during the cure of the composition..
| Contact lenses made with hema-compatible polysiloxane macromers|
Optically clear silicone hydrogel contact lenses are described that comprise a polymeric lens body that is the reaction product of a polymerizable composition comprising at least 25 wt. % of at least one hydroxyalkyl methacrylate; and at least 20 wt.
| Liquid insecticide composition|
A liquid insecticide composition is provided containing a neonicotinoid-based compound, a silicone-based surfactant, and a water-soluble organic solvent. Furthermore, a method is provided for enhancing an insecticidal effect which includes using a silicone-based surfactant in combination with a neonicotinoid-based compound as an insecticidal active ingredient..
| Translucent fragrance composition|
The present invention provides an alcohol-based stable and translucent fragrance composition containing a large amount of perfume. The fragrance composition of the present invention is a composition in which the total amount of (a) silicone oil and (b) α-olefin oligomer that is a hydrogenated trimer, tetramer, pentamer, and/or hexamer of α-olefin having 4 to 12 carbon atoms is 2 to 12% by mass in the composition, and the mass ratio of (b)/(a) is 0.1 to 0.7; the amount of (c) polyether-modified silicone with respect to (b) α-olefin oligomer is 2 to 10 times in mass; the amount of (d) perfume is 3 to 30% by mass in the composition; the amount of (e) lower alcohol having 1 to 4 carbon atoms is 50% by mass or more in the composition; the amount of (f) water is 3.5 to 15% by mass in the composition; and the l value of the composition is 70 to 95 provided the l value is a percentage (%) of strength of a transmitted light compared with a strength of an incident light..
| Catalysts for synthesis of liquid hydrocarbons using syngas and preparation methods thereof|
Disclosed is a co/al2o3/sic catalyst for fischer-tropsch synthesis exhibiting superior heat transfer and mass transport effects, wherein an al2o3/sic support in which alumina is coated on silicon carbide (sic) with superior thermal conductivity is used and cobalt (co) is supported thereon as an active component to provide a bimodal pore size distribution, and a method for preparing same. Use of the al2o3/sic support improves cobalt dispersion and enhances cobalt-support interaction, thereby inhibiting generation of cokes (carbon filaments).
| Bond silicone coating|
A silicone rubber coating material to be bonded to substrates such as on gas turbine components is made by providing a silicone rubber layer having a fiber layer attached to one side of the silicone rubber layer prior to its molding into a compound. The fibers may be either woven fabrics or random fiber sheets and the fiber layer may be from about 3 mils to about 30 mils (0.0762 mm to 0.762 mm) thick..
| Amino vinylsilane precursors for stressed sin films|
The present invention is a method to increase the intrinsic compressive stress in plasma enhanced chemical vapor deposition (pecvd) silicon nitride (sin) and silicon carbonitride (sicn) thin films, comprising depositing the film from an amino vinylsilane-based precursor. More specifically the present invention uses the amino vinylsilane-based precursor selected from the formula: [rr1n]xsir3y(r2)z, where x+y+z=4, x=1-3, y=0-2, and z=1-3; r, r1 and r3 can be hydrogen, c1 to c10 alkane, alkene, or c4 to c12 aromatic; each r2 is a vinyl, allyl or vinyl-containing functional group..
| Methods and apparatus for forming tantalum silicate layers on germanium or iii-v semiconductor devices|
Described are apparatus and methods for forming tantalum silicate layers on germanium or iii-v materials. Such tantalum silicate layers may have si/(ta+si) atomic ratios from about 0.01 to about 0.15.
| Method of manufacturing mold for nano-imprint and substrate fabricating method|
Provided is a method of manufacturing a mold for nano-imprint, for forming a projection/recess pattern on a surface of a silicon substrate, including: etching a substrate to form the projection/recess pattern on the surface of the silicon substrate by applying dry-etching to the silicon substrate using a hard mask pattern as a mask, in a state of covering the surface of the silicon substrate with the hard mask pattern made of a chromium-based material; and applying dry-etching to the silicon substrate in etching the substrate using a fluorine-based gas as a reactive gas of an etching gas used for the dry-etching applied to the silicon substrate, and adding an inert gas to the etching gas.. .
| Semiconductor device and method for fabricating the same|
A method of fabricating a semiconductor device includes forming a first gate pattern and a dummy gate pattern on a first active area and a second active area of a substrate, respectively, the first gate pattern including a first gate insulating layer and a silicon gate electrode, removing the dummy gate pattern to expose a surface of the substrate in the second active area, forming a second gate pattern including a second gate insulating layer and a metal gate electrode on the exposed surface of the substrate, the first gate insulating layer having a thickness larger than a thickness of the second gate insulating layer, and forming a gate silicide on the silicon gate electrode after forming the second gate pattern.. .
| Low temperature polysilicon thin film and manufacturing method thereof|
An embodiment of the present invention relates to a low temperature polysilicon thin film and a manufacturing method thereof. The manufacturing method comprises: forming a buffer layer on a substrate (s11); forming a seed layer comprising a plurality of uniformly distributed crystal nuclei on the buffer layer by using a patterning process (s12); forming an amorphous silicon layer on the seed layer (s13); and performing an excimer laser annealing process on the amorphous silicon layer (s14)..
| Method for manufacturing silicon carbide semiconductor device|
Gas containing si, gas containing c and gas containing cl are introduced into a reacting furnace. Sic epitaxial film is grown on the surface of a 4h—sic substrate by cvd in a gas atmosphere including raw material gas, additive gas, doping gas and carrier gas.
| Method and apparatus for forming gate stack on si, sige or ge channels|
Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing..
| Allotropic or morphologic change in silicon induced by electromagnetic radiation for resistance turning of integrated circuits|
An electronic device includes a semiconductor substrate and a dielectric layer over the substrate. A resistive link located over the substrate includes a first resistive region and a second resistive region.
| Nonvolatile semiconductor memory device and manufacturing method thereof|
In a nonvolatile semiconductor memory device, there is provided a technique which promotes microfabrication by reducing a thickness of the device as suppressing an off current of a polysilicon diode which is a selective element. A polysilicon layer to which an impurity is doped at low concentration and which becomes an electric-field relaxation layer of the polysilicon diode which is a selective element of a resistance variable memory is formed so as to be divided into two or more layers such as polysilicon layers.
| Low loss sic mosfet|
A vertical multiple implanted silicon carbide power mosfet (vmimosfet) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed.
| Method for manufacturing a semiconductor device|
The improvement of the reliability of a semiconductor device having a split gate type monos memory is implemented. An ono film and a second polysilicon film are sequentially formed so as to fill between a first polysilicon film and a dummy gate electrode.
| Electrostatic discharge (esd) silicon controlled rectifier (scr) structure|
A structure includes first and second silicon controlled rectifiers (scrs) formed in a substrate. The first and the second scrs each include at least one component commonly shared between the first and the second scrs..
| Method for manufacturing a photovoltaic cell with a locally diffused rear side|
A method for manufacturing a photovoltaic cell with a locally diffused rear side, comprising steps of: (a) providing a doped silicon substrate, the substrate comprising a front, sunward facing, surface and a rear surface; (b) forming a silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the rear surface in a pattern, the boron-containing paste comprising a boron compound and a solvent; (d) depositing a phosphorus-containing doping paste on the rear surface in a pattern, the phosphorus-containing doping paste comprising a phosphorus compound and a solvent; (e) heating the silicon substrate in an ambient to a first temperature and for a first time period in order to locally diffuse boron and phosphorus into the rear surface of the silicon substrate.. .
| Leakage measurement of through silicon vias|
A method of testing a semiconductor substrate having through substrate vias for current leakage which includes: forming a current leakage measurement structure that includes substrate contacts, sensing circuits to sense current leakage from the through substrate vias, the sensing circuits connected to the through substrate vias and to the substrate contacts so that there is a one-to-one correspondence of a substrate contact and sensing circuit to each through substrate via, and a built-in self test (bist) engine to sense one of the through substrate vias for current leakage. A reference current is applied to the sensing circuits to set a current leakage threshold for the through substrate vias.
| Semiconductor apparatus having tsv and testing method thereof|
A semiconductor apparatus includes: a through-silicon via (tsv) formed in a silicon substrate; a first insulating layer formed to surround side and bottom portions of the tsv such that the tsv is isolated from the silicon substrate; a first conductive layer interposed between the first insulating layer and the silicon substrate and formed outside the tsv to surround the tsv.. .
| Material heating method|
A material heating method includes: a step of charging a silicon-containing carbon steel material into a heating furnace; a step of preheating the material; a first heating step of raising the temperature of the material; a second heating step of lowering the temperature of the material so as to reduce a temperature difference between the surface and inside of the material; a third heating step of raising the temperature of the material; and a soaking step of reducing the temperature difference between the surface and inside of the material. The temperature of the material in the heating furnace is maintained at the melting point of fayalite or lower..
| Pellicle for euv|
A pellicle for euv including a silicon film and a mesh work structure supporting the silicon film, and this pellicle is improved in that the grid frames of the mesh work structure are tapered in such a manner that the width of each grid frame lessens as the distance from the silicon film is increased.. .
| Increased energy density and swelling control in batteries for portable electronic devices|
The disclosed embodiments relate to the design and manufacture of a battery cell. The battery cell includes a cathode containing a first cathode active material and a second cathode active material with a lower first coulombic efficiency and a higher energy density than the first cathode active material.
| Titanium-silicon protective film composition and apparatus|
The present disclosure relates to a protective layer composition that includes tixsiya, where a is cm, cmnl, oncm, or oncmnl and x, y, l, m, and n are positive integers. In one implementation, the protective layer composition has a ratio of x over (x+y) in the range of between about 0.1 and about 1.0.
| Coating layer and method for forming coating layer|
The coating layer has excellent water repellency and satisfactory gloss to a base material and provides a method for forming a coating layer in which the agents used have, for example, excellent storage stability and dispersibility. The coating layer has a layer (i) formed by curing a film-forming agent containing predetermined amounts of a polyorganosiloxane having at least one hydrolyzable functional group in its molecule, a curing catalyst, and an organic solvent including a saturated hydrocarbon solvent and an aromatic hydrocarbon solvent each having 8 to 15 carbon atoms at a predetermined ratio and a layer (ii) formed by solidifying a finish treatment agent containing predetermined amounts of a polyorganosiloxane having at least one pendant amino group, a polyorganosiloxane having two or more terminal amino groups, a silicone resin emulsion emulsified with a nonionic or anionic surfactant, a hydrophilic group-containing organic solvent, and water..
| Fouling and stiction resistant coating|
A fouling and stiction-resistant coating suitable for use with marine streamers is made from a silicone undercoat layer and a powdery topcoat layer. The powdery topcoat layer is preferably a non-toxic fluoropolymer which has a low surface energy, a high modulus, and which is not continuous.
| Adhesive articles utilizing release agents free of silicon and fluorine, and related methods|
The present subject matter provides an adhesive article having a release agent or liner that is free of silicon-containing and fluorine-containing material, and related methods of adhering a backing material of the adhesive article to a substrate. The adhesive article utilizes an amorphous polyvinyl alcohol layer that facilitates removal of an optional release liner from an adhesive layer.
| Perfluorinated compounds for the non-viral transfer of nucleic acids|
The invention relates to a compound of general formula (i): a-b-c(f, g′)-d-e-f-g-a′ or a structure of general formula (ii): a-b-c-(f′, g′)-d-b-e-f-g-a′ (ii), wherein -a is at least one molecule selected from the group of the perfluorocarbons (pfcs), perfluorinated silicon compounds, and/or further perfluorinated compounds, -b is at least one predetermined breaking point in the form of a physically, chemically, or enzymatically severable bond, -c is absent or at least one linker molecule, -d is absent or at least one spacer molecule, -e is at least one molecule selected from the group containing nucleobases, nucleosides, nucleotides, oligonucleotides, nucleic, acids, modified nucleobases, modified nucleosides, modified nucleotides, modified oligonucleotides, modified nucleic acids, monomers of peptide nucleic acids, oligomers or peptide nucleic acids and peptide nucleic acids or other nucleic acid analogs, -f, f′ is absent or at least one ligand, -g, g′ is absent or at least one marker molecule, -a′ is absent or has the meaning of a, and wherein the compounds i), ii), iii), iv), v), vi) are excluded. The invention farther relates to the use of said compound for the non-viral transfer of molecule e into a cell, to a pharmaceutical composition containing said compound, and to the use of said pharmaceutical composition..
| Method for manufacturing silicon carbide powder|
A method for revitalizing worn and fatigued silicon carbide powder thermally reacted it continuously with a mixture of silicon oxide powder and/or carbon powder and a boron and carbon-containing additive in a non-oxidizing atmosphere at a temperature higher than 1850 degrees c. But lower than 2400 degrees c..
| Systems, methods and compositions for the production of silicon nitride nanostructures|
Systems, methods and compositions for the production of silicon nitride nanostructures are herein disclosed. In at least one embodiment, a carbon feedstock is preprocessed, combined with a silicon feedstock and annealed in the presence of a nitrogen containing compound to produce a silicon nitride nanostructure..
| Ferritic stainless steel with excellent oxidation resistance, good high temperature strength, and good formability|
Ferritic stainless steels with good oxidation resistance, good high temperature strength, and good formability are produced with ti addition and low al content for room temperature formability resulting from equiaxed as-cast grain structures. Columbium (niobium) and copper are added for high temperature strength.
| Ferritic stainless steel with excellent oxidation resistance, good high temperature strength, and good formability|
Ferritic stainless steels with good oxidation resistance, and good high temperature strength and good formability are produced with ti addition and low al content for room temperature formability resulting from equiaxed as-cast grain structures. Columbium (niobium) and copper are added for high temperature strength.
| Method for detecting damage to silicone implants and computed tomography device|
A method is disclosed for detecting damage to silicone implants. In an embodiment, the method includes taking at least two computed tomography recordings at different x-ray spectra or different mono-energies of the x-ray radiation and reconstruction thereof.
| Earphone with tension diaphragm|
An earphone with tension diaphragm includes a front portion, a rear portion, a silicone gel earplug, a filtering net and a sound generating unit. As a user pushes the earphone into his ear, the diaphragm of the sound generating unit has a deformation and thus an air turbulence would be generated.
| Loudspeaker system|
A loudspeaker system with an enclosure, an electro-acoustic transducer mounted in the enclosure so as to leave space inside of the enclosure that is unoccupied by the transducer, and an air-adsorbing material in the space inside of the enclosure that is unoccupied by the transducer. The air-adsorbing material includes a silicon-based zeolite with a small amount of a second metal.
| Method and apparatus including movable-mirror mems-tuned surface-emitting lasers|
Vcsel apparatus having a substrate, a solid-state gain medium, a reflective mirror on one side of the medium, a movable reflective mirror on an opposite side of the medium, and a mechanism configured to move the movable mirror to tune a characteristic wavelength. Also described is a vcsel apparatus having a silicon substrate having a slot therethrough and electrical connections formed on a first face, a substrate having vcsels thereon and mounted across the slot and electrically connected to the electrical connections on the silicon substrate, and a glass substrate affixed to a second face of the silicon substrate.
| Semiconductor device including buried gate, module and system, and method for manufacturing|
An embodiment of the semiconductor device includes a recess formed in an active region, a gate buried in a lower part of the recess, a first capping insulation film formed over the gate, a second capping insulation film formed over the first capping insulation film, and a third capping insulation film formed over the second capping insulation film. In the semiconductor device including the buried gate, mechanical stress caused by a nitride film can be reduced by reducing the volume of a nitride film in a capping insulation film formed over a buried gate, and the ratio of silicon to nitrogen of the nitride film is adjusted, so that mechanical stress is reduced, resulting in improvement of operation characteristics of the semiconductor device..
| Nor flash memory array structure, mixed nonvolatile flash memory and memory system comprising the same|
A nor flash memory array structure is provided, comprising: a substrate (100); and a two dimensional memory array structure formed on the substrate (100) and comprising: a plurality of memory cell columns arranged in a first direction, and each memory cell column including a plurality of memory cells (300), in which each memory cell (300) comprises: a channel region (308) located on the substrate (100), a gate structure located on the channel region (308) and formed by a tunneling oxide layer (304), a silicon nitride layer (303), a barrier oxide layer (302) and a polysilicon gate layer (301) stacked sequentially, a source region (306) and a drain region (305) located at a first edge and a second edge of the gate structure respectively; a plurality of word lines wl; a source line sl for connecting the source regions of all the memory cells; and a plurality of bit lines bl.. .
| Power-rail electro-static discharge (esd) clamp circuit|
A power-rail esd clamp circuit with a silicon controlled rectifier and a control module is provided. The silicon controlled rectifier is connected to a high voltage level and a low voltage level for bearing a current flow.
| Interior side mirror for side blind spot of a car|
An interior side mirror for side blind spot of a car comprises a base fixed on the dash board or side door of the car, a side mirror, a flexible bar for connecting the base with the side mirror. The base and flexible bar locate the mirror at a best place before a driver, let the driver can view the side blind spot without turning head.
| Double through silicon via structure|
This invention discloses a double through silicon via (tsv) structure, including a first die unit, a first signal path, a second signal path, a receiving unit and a second die unit. The first and the second signal paths respectively include a driving unit and a tsv unit.
| Semiconductor structure having an active device and method for manufacturing and manipulating the same|
A semiconductor structure comprising a substrate, an active device, a field oxide layer and a poly-silicon resistor is disclosed. The active device is formed in a surface area of the substrate.
| Scr dimming circuit and method|
The present invention relates to a silicon-controlled rectifier (scr) dimming circuit and method for regulating the luminance of a light-emitting diode (led) load. In one embodiment, an scr dimming circuit can include: an scr rectifying circuit having an scr element that receives an ac power supply, and generates a lack-phase ac voltage; a rectifier bridge that converts the lack-phase ac voltage to a lack-phase dc voltage, where the lack-phase dc voltage is filtered through a filter capacitor to generate a smooth dc voltage; a conduction phase angle signal generator that receives the lack-phase dc voltage and generates a controlling signal indicating a conduction phase angle range of the scr element; and a dimming signal generator that compares the controlling signal and a slope reference signal to output a dimming signal to control the luminance of the led load..
| Controlled-silicon adapting led driving circuit, method and switch mode power supply|
Disclosed are light-emitting diode (led) driver circuits, methods, and a switch mode power supply. In one embodiment, an led driver can include: (i) a silicon-controlled rectifier (scr) and a rectifier bridge configured to receive an ac voltage, and to generate a phase-loss half sine wave voltage signal; (ii) a threshold voltage control circuit configured to receive a threshold voltage and an input voltage signal that represents the phase-loss half sine wave voltage signal, and to determine whether to output the threshold voltage based on angle information of the input voltage signal; (iii) a first control circuit configured to compare the input voltage signal against the threshold voltage output by the threshold voltage control circuit, and to generate a first control signal; and (iv) a power switch controllable by the first control signal to be off until an absolute value of the ac voltage is reduced to zero..
| Ceramic filter and methods for manufacturing and using same|
A process for manufacturing a ceramic filter includes mixing silicon, yttrium oxide-doped zirconia, magnesium-aluminum spinel, silicon nitride, a pore-forming material, and a binder to form a ceramic precursor; extruding the ceramic precursor into a generally honeycomb shaped monolithic filter precursor or into a single filter tube precursor; drying the filter precursor or filter tube precursor to form a dried ceramic precursor; heating the dried ceramic precursor to remove the binder; and sintering to form the silicon nitride ceramic filter.. .
| Semiconductor device|
A semiconductor device is disclosed allowing detection of a connection state of a through silicon via (tsv) at a wafer level. The semiconductor device includes a first line formed over a through silicon via (tsv), a second line formed over the first line, and a first power line and a second power line formed over the same layer as the second line.
| Patterned graphene structures on silicon carbide|
In a method for making graphitic ribbons in a face of a carbide crystal (110), in which an elongated trench (120) is formed along a predetermined path in the face (112) of the carbide crystal (110), the trench (120) including a horizontal floor (124) coupling two vertical walls (122), the trench (120) following a path on which it is desired to form a graphitic ribbon (130). The carbide crystal (110) and the trench (120) are subjected to an annealing environment for an amount of time sufficient to cause a graphene ribbon (130) having a v-shaped cross section to form along the predetermined path of the trench (120)..
| Semiconductor device and method for fabricating the same|
An exemplary semiconductor device comprises a through silicon via penetrating a semiconductor substrate including a circuit pattern on one side of the substrate, a first doped layer formed in the other side, and a bump connected with the through silicon via.. .
| Semiconductor device and fabrication method|
Various embodiments provide semiconductor devices including high-k dielectric layer(s) and fabrication methods. An exemplary high-k dielectric layer can be formed by providing a semiconductor substrate including a first region and a second region, and forming a first silicon oxide layer on the semiconductor substrate in the first region.
| Method of manufacturing a semiconductor device and a semiconductor device|
A method of manufacturing a semiconductor device with an son structure having a thick cavity inside a semiconductor substrate is disclosed. The method forms a plurality of trenches with a predetermined distance between adjacent trenches.
| Method for depositing one or more polycrystalline silicon layers on substrate|
A method for depositing one or more polycrystalline silicon layers (230c) on a substrate (210) by a chemical vapour deposition in a reactor, includes adjusting a deposition temperature between 605° c.-800° c. In a process chamber of the reactor, and depositing the one or more polycrystalline silicon layers on the substrate by using a silicon source gas including sih4 or sih2cl2, and a dopant gas including bcl3..
| Semiconductor device, high-frequency transmitter and semiconductor production method|
A semiconductor device has a silicon substrate, a shield which is disposed on the silicon substrate and comprises a conductive material, a capacitor electrode disposed on the shield, and at least one pillar member which is provided between the shield and the silicon substrate and comprises a conductive material. The pillar member may be disposed at a location other than a location of the through-hole..
| Image sensor including multiple lenses and method of manufacture thereof|
A device includes an image sensing element. The device also includes a silicon dioxide (sio2) layer, located over the image sensing element, exhibiting a first index of refraction.
| Infrared multiplier for photo-conducting sensors|
Photo-conducting infrared sensors are provided including a substrate (e.g., silicon) with one or more trenches formed on a first surface. An infrared-reflective film can be deposited directly or indirectly onto and conforming in shape with the first surface of the substrate.
| Surface plasmon device|
The electro-optical device includes a semiconductor layer, a first metal layer and an electrical insulator layer disposed between the semiconductor layer and the first metal layer. The electrical insulator layer includes a silicon nitride layer so as to provide an interface between the first metal layer and the silicon nitride layer.
| High sensitivity, solid state neutron detector|
An apparatus (200) for detecting slow or thermal neutrons (160). The apparatus (200) includes an alpha particle-detecting layer (240) that is a hydrogenated amorphous silicon p-i-n diode structure.
| Substrate backside peeling control|
Structures and methods for reducing backside polysilicon peeling are disclosed. A structure includes a substrate having a first side and a second opposite side, a first dielectric layer on the second side of the substrate extending in a direction from an edge of the substrate towards a center of the substrate, a high-k layer on the first dielectric layer, and a polysilicon layer on the high-k layer.
| Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for cmos devices|
A semiconductor device including a germanium containing substrate including a gate structure on a channel region of the semiconductor substrate. The gate structure may include a silicon oxide layer that is in direct contact with an upper surface of the germanium containing substrate, at least one high-k gate dielectric layer in direct contact with the silicon oxide layer, and at least one gate conductor in direct contact with the high-k gate dielectric layer.
| Semiconductor structures and fabrication method|
A method is provided for fabricating a semiconductor structure. The method includes providing a semiconductor substrate, and forming a shallow trench isolation structure in the semiconductor substrate.
| Silicon-on-insulator transistor with self-aligned borderless source/drain contacts|
A method is provided for fabricating an integrated circuit that includes multiple transistors. A replacement gate stack is formed on a semiconductor layer, a gate spacer is formed, and a dielectric layer is formed.
| Split-gate lateral diffused metal oxide semiconductor device|
A semiconductor device includes a source region, a drain region, and a drift region between the source and drain regions. A split gate is disposed over a portion of the drift region, and between the source and drain regions.
| Semiconductor device and manufacturing method of the same|
According to one embodiment, a nonvolatile semiconductor storage device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge accumulation film formed on the first insulating film, a second insulating film formed on the charge accumulation film, and a control electrode formed on a second insulating film, and one of the first and the second insulating film includes a layer containing nitrogen, a layer that is formed on the layer containing nitrogen and that includes a first oxygen containing aluminum atoms and oxygen atoms, and a layer that is formed on the layer including the first oxygen and that includes a second oxygen containing silicon atoms and oxygen atoms; and a concentration of the aluminum atoms is from 1e12 atoms/cm2 to 1e16 atoms/cm2.. .
| Nonvolatile semiconductor memory device|
According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate, a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate electrode. The first gate insulating film is arranged on the semiconductor substrate.
| Method for manufacturing semiconductor device and semiconductor device|
According to one embodiment, a method for manufacturing a semiconductor device includes forming a plurality of electrode structures above a substrate. The method includes forming an insulating film on the plurality of electrode structures to make a gap between mutually-adjacent electrode structures.
| Method to form a cmos image sensor|
The present disclosure relates to a method and composition to limit crystalline defects introduced in a semiconductor device during ion implantation. A high-temperature low dosage implant is performed utilizing a tri-layer photoresist which maintains the crystalline structure of the semiconductor device while limiting defect formation within the semiconductor device.
| Gate biasing electrodes for fet sensors|
A fet sensor with a gate biasing electrode is disclosed in one embodiment. In another embodiment, a process for forming a finfet sensor with a polysilicon gate biasing electrode is disclosed.
| Nitride semiconductor wafer, nitride semiconductor device, and method for manufacturing nitride semiconductor wafer|
According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor.
| Opto-electronic sensor|
Some embodiments of the present disclosure relate to an infrared (ir) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The ir sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit.
| Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device|
A silicon carbide semiconductor device that is able to increase the gate reliability, and to provide a method for manufacturing the silicon carbide semiconductor device, and that includes: a source electrode selectively formed on a source region; a gate insulating film formed so as to extend over the source region; and a gate electrode formed on the gate insulating film. The source region includes a first source region located below the source electrode, and a second source region surrounding the first source region.
| Array substrate for organic electroluminescent display device and method of fabricating the same|
An array substrate for an organic electroluminescent display device includes a substrate including a display area and a non-display area; a gate line and a data line; a thin film transistor including a semiconductor layer of polycrystalline silicon, a gate insulating layer, a gate electrode, an inter insulating layer, a source electrode, and a drain electrode; auxiliary lines formed of a same material and on a same layer as the data line; a passivation layer of organic insulating material and including a drain contact hole exposing the drain electrode, and an auxiliary line contact hole exposing one of the auxiliary lines; and a first electrode and a line connection pattern on the passivation layer, wherein the first electrode contacts the drain electrode and the line connection pattern contacts the one of the first auxiliary pattern.. .
| Method for extreme ultraviolet electrostatic chuck with reduced clamping effect|
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate..
| Display device|
By applying an ac pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an ac pulse.
| Germanium-based quantum well devices|
A quantum well transistor has a germanium quantum well channel region. A silicon-containing etch stop layer provides easy placement of a gate dielectric close to the channel.
| Group iii-v compound semiconductor photo detector, method of fabricating group iii-v compound semiconductor photo detector, photo detector, and epitaxial wafer|
An object of the present invention is to provide a group iii-v compound semiconductor photo detector comprising an absorption layer having a group iii-v compound semiconductor layer containing sb as a group v constituent element, and an n-type inp window layer, resulting in reduced dark current. The inp layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a gaassb layer of the absorption layer 21.
| Silicon nanotube mosfet|
A nanotubular mosfet device extends a scaling roadmap while maintaining good short channel effects and providing competitive drive current. The nanotubular mosfet device includes a concentric tubular inner and outer gate separated from each other by a tubular shaped epitaxially grown silicon layer, and a source and drain respectively separated by spacers surrounding the tubular inner and outer gates..
| Semiconductor device and method of manufacturing the same|
This technology relates to a semiconductor device and a method of manufacturing the same. A semiconductor device may include a line layer formed over a substrate, and connection structures each configured to include a first metal layer pattern, a barrier layer pattern, and a second metal layer pattern sequentially stacked over the line layer, for bonding another substrate to the substrate.
| Lanthanum boride sintered body and method for producing the same|
A lanthanum boride sintered body 10 includes a phase 16 including lanthanum and silicon at grain boundaries 14 between crystal grains 12 of lanthanum boride. In this lanthanum boride sintered body 10, the phase 16 exists in various configurations such as a phase 16a present at a triple point of grain boundary 14, and a phase 16b present along the grain boundary 14.
| Methods, process and fabrication technology for high-efficiency low-cost crystalline silicon solar cells|
Disclosed is a method, process, solar cell design, and fabrication technology for high-efficiency, low-cost, crystalline silicon (si) solar cells including but not restricted to solar grade single crystal si (c-si), multi-crystalline si (mc-si), poly-si, and micro-si solar cells and solar modules. The rtwcg solar cell fabrication technology creates a rtwcg siox thin film antireflection coating (arc) with a graded index of refraction and a selective emitter (se).
| Silicon-containing dopant compositions, systems and methods of use thereof for improving ion beam current and performance during silicon ion implantation|
A novel composition, system and method thereof for improving beam current during silicon ion implantation are provided. The silicon ion implant process involves utilizing a first silicon-based co-species and a second species.
| Stirring and chopping device|
A kitchen utensil device comprising of an elongated handle and tapered silicone fins. The kitchen utensil device is useful for effectively stirring foods and liquids and also has a sharp cutting edge on the bottom.
| Apparatus for heating by electromagnetic induction, in particular induction heating or induction furnace|
An apparatus for heating by electromagnetic induction heating e.g., for heating silicon carbide, with a first power supply arrangement (1) having an output with two terminals (11, 12), with a second power supply arrangement (2) for providing an n-phase multi-phase ac voltage at n outputs, each output having two terminals (21, 22, 23). The phase shift between the chained voltages (u12, u21) of the n-phase multi-phase ac voltage provided at output side of second power supply arrangement is 360°/n.
| Sheet heater and image fixing device including the sheet heater|
A sheet heater that includes a sheet article composed of a conductive resin composition containing a conductive material and a resin, and a pair of metal plate electrodes, each of the electrodes being bonded to each of the ends of the sheet article, wherein when elements of the sheet article are detected at a portion 1 μm depth from a surface of the metal plate electrode, a peak area ratio of silicon (si) to metal ion (m) is 1/100 to 1, the metal ion m being most abundant of all metal ions detected at the portion, the peaks being obtained by measuring an x ray generated at the portion by applying an x ray to the portion with the scanning electron microscope-energy dispersive x-ray spectrometer.. .
| Hydrophilic coatings, methods for depositing hydrophilic coatings and improved deposition technology for thin films|
The invention provides certain embodiments that involve sputtering techniques for applying a mixed oxide film comprising silica and titania. In these embodiments, the techniques involve sputtering at least two targets in a common chamber (e.g., in a shared gaseous atmosphere).
| Water desalination system|
An improved water desalination system is disclosed, in which contaminated water such as seawater or brackish water is preheated and fed into a primary pressure vessel through a distribution head. The seawater is distributed from the distribution head over a non-adherent surface such as a plurality of silicone chords hanging below a distribution tank or a cone- and cylindrical-shaped surface.