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This page is updated frequently with new Silicon Nitride-related patent applications. Subscribe to the Silicon Nitride RSS feed to automatically get the update: related Silicon RSS feeds. RSS updates for this page: Silicon Nitride RSS RSS


Cap bonding structure and method for backside absolute pressure sensors

Coated article with low-e coating having titanium oxide layer and/or nicr based layer(s) to improve color values and/or…

Date/App# patent app List of recent Silicon Nitride-related patents
08/28/14
20140242796
 Method of manufacturing semiconductor device patent thumbnailnew patent Method of manufacturing semiconductor device
To improve a semiconductor device having a nonvolatile memory. A first misfet, a second misfet, and a memory cell are formed, and a stopper film made of a silicon oxide film is formed thereover.
08/28/14
20140242382
 Coated article with low-e coating having titanium oxide layer and/or nicr based layer(s) to improve color values and/or transmission, and method of making same patent thumbnailnew patent Coated article with low-e coating having titanium oxide layer and/or nicr based layer(s) to improve color values and/or transmission, and method of making same
Certain example embodiments of this invention relate to a coated article including a low-e coating. In certain example embodiments, a titanium oxide inclusive bottom layer stack and/or a nicr-based layer(s) are designed to improve b* coloration values and/or transmission of the coated article.
08/28/14
20140239424
 Cap bonding structure and method for backside absolute pressure sensors patent thumbnailnew patent Cap bonding structure and method for backside absolute pressure sensors
A pressure sensor includes a pressure sensing element having a diaphragm, a cavity, and bridge circuitry connected to the diaphragm. A top surface is formed as part of the pressure sensing element such that at least a portion of the top surface is part of the diaphragm, and the plurality of piezoresistors are located on the top surface.
08/28/14
20140239420
 Silicon nitride gate encapsulation by implantation patent thumbnailnew patent Silicon nitride gate encapsulation by implantation
A method of forming a finfet structure which includes forming fins on a semiconductor substrate; forming a gate wrapping around at least one of the fins, the gate having a first surface and an opposing second surface facing the fins; depositing a hard mask on a top of the gate; angle implanting nitrogen into the first and second surfaces of the gate so as to form a nitrogen-containing layer in the gate that is below and in direct contact with the hard mask on top of the gate; forming spacers on the gate and in contact with the nitrogen-containing layer; and epitaxially depositing silicon on the at least one fin so as to form a raised source/drain. Also disclosed is a finfet structure..
08/28/14
20140239401
 Silicon nitride gate encapsulation by implantation patent thumbnailnew patent Silicon nitride gate encapsulation by implantation
A finfet structure which includes: silicon fins on a semiconductor substrate, each silicon fin having two sides and a horizontal surface; a gate wrapping around at least one of the silicon fins, the gate having a first surface and an opposing second surface facing the at least one of the silicon fins; a hard mask on a top surface of the gate; a silicon nitride layer formed in each of the first and second surfaces so as to be below and in direct contact with the hard mask on the top surface of the gate; spacers on the gate and in contact with the silicon nitride layer; and epitaxially deposited silicon on the at least one of the silicon fins so as to form a raised source/drain.. .
08/28/14
20140239379
 Nonvolatile semiconductor memory device provided with charge storage layer in memory cell patent thumbnailnew patent Nonvolatile semiconductor memory device provided with charge storage layer in memory cell
A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a charge storage layer formed on the first insulation layer, a second insulation layer formed on the charge storage layer, and a control electrode formed on the second insulation layer. The second insulation layer includes a first silicon oxide film formed above the charge storage layer, a silicon nitride film formed on the first silicon oxide film, a metal oxide film formed on the silicon nitride film, and a nitride film formed on the metal oxide film.
08/21/14
20140235020
 Method of manufacturing semiconductor device and semiconductor device patent thumbnailMethod of manufacturing semiconductor device and semiconductor device
Techniques capable of improving the yield of igbts capable of reducing steady loss, turn-off time, and turn-off loss are provided. Upon formation of openings in an interlayer insulting film formed on a main surface of a substrate, etching of a laminated insulating film of a psg film and an sog film and a silicon oxide film is once stopped at a silicon nitride film.
08/21/14
20140234664
 Peeling method, semiconductor device, and peeling apparatus patent thumbnailPeeling method, semiconductor device, and peeling apparatus
To improve peelability, yield in a peeling step, and yield in manufacturing a flexible device. A peeling method is employed which includes a first step of forming a peeling layer containing tungsten over a support substrate; a second step of forming, over the peeling layer, a layer to be peeled formed of a stack including a first layer containing silicon oxynitride and a second layer containing silicon nitride in this order and forming an oxide layer containing tungsten oxide between the peeling layer and the layer to be peeled; a third step of forming a compound containing tungsten and nitrogen in the oxide layer by heat treatment; and a fourth step of peeling the peeling layer from the layer to be peeled at the oxide layer..
08/21/14
20140231893
 Capacitor and preparation method thereof patent thumbnailCapacitor and preparation method thereof
A capacitor and a method of fabricating thereof are provided. A structure of low pressure tetraethyl orthosilicate-low pressure silicon nitride-low pressure tetraethyl orthosilicate is used in the capacitor to replace the oxide-nitride-oxide structure of the existing capacitor; the capacitor has a relatively high unit capacitance value.
08/21/14
20140231781
 Photoelectric conversion element and imaging device patent thumbnailPhotoelectric conversion element and imaging device
A photoelectric conversion element is formed by laminating, in order, a substrate, a lower electrode, an organic layer which generates electric charge by light irradiation, an upper electrode which transmits light, a buffer layer and a protective film. The buffer layer is formed from hydrogenated silicon oxide containing hydrogen ions, and has a thickness of 1 to 100 nm.
08/14/14
20140227952
Grinding tool for machining brittle materials and a method of making a grinding tool
The invention relates to a grinding tool for machining brittle materials. The grinding tool has a core and an abrasive rim.
08/14/14
20140227434
Piezoelectric device and method for manufacturing piezoelectric device
In a method for manufacturing a piezoelectric device, a silicon oxide film is deposited by sputtering on a surface of a single-crystal piezoelectric substrate closer to an ion-implanted region, and a silicon nitride film is deposited by sputtering on a surface of the dielectric film opposite to a side thereof closer to the single-crystal piezoelectric substrate. The silicon oxide film has a composition that is deficient in oxygen relative to the stoichiometric composition.
08/14/14
20140225160
Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
An soi wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (box) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed.
08/07/14
20140220779
Surface selective polishing compositions
The disclosure provides polishing compositions that show a high polishing rate ratio of a silicon nitride (sin) surface to a silicon oxide surface, and/or of a sin surface to a polycrystalline silicon (poly si) surface. Such compositions comprise, in certain aspects, of colloidal silica, and one or more water soluble polymers, and has a ph of 6 or less, wherein the colloidal silica comprises one or more organic acids bound to its surface, and the water soluble polymer is a polyoxyalkylene hydrocarbyl ether which hydrocarbyl moiety has 12 or more carbon atoms..
08/07/14
20140220407
Method of manufacturing solid type secondary battery and solid type secondary battery based on the same
A method of manufacturing a solid type secondary battery and a solid type secondary battery manufactured using the same, in which positive and negative electrodes include silicon carbide and silicon nitride, nonaqueous electrolyte includes ion exchange resin or ion exchange inorganic substance, the method including the steps of manufacturing a positive electrode print layer 2, a negative electrode print layer 3, and a nonaqueous electrolyte print layer 4 by mixing each pigment powder of 100 parts by weight for materials of the positive electrode layer, the negative electrode layer, and the nonaqueous electrolyte layer with water-soluble silicon resin of 1 to 50 parts by weight and water of 10 to 100 parts by weight; sequentially performing layered printing for each print layer; and drying the stack.. .
08/07/14
20140220302
Silicon nitride substrate and method for producing silicon nitride substrate
A silicon nitride substrate including a phase encompassed of silicon nitride particles, and intergranular phase formed from a sintering aid, wherein a separation layer is formed on the surface of a molded body including silicon nitride powder, sintering aid powder, and organic binder, by using a boron nitride paste containing boron nitride powder, organic binder, and organic solvent; the separation layer and molded body are heated; the organic binder is removed from the separation layer and molded body; subsequently molded bodies stacked with a separation layer therebetween, are sintered. Boron nitride paste contains 0.01 to 0.50% by oxygen mass and 0.001 to 0.5% by carbon mass, and c/a is within range of 0.02 to 10.00, where c is oxygen content in the powder of the boron nitride paste, and a carbon content in the degreased separation layer, which includes 0.2 to 3.5 mg/cm2 of hexagonal boron nitride powder..
08/07/14
20140220239
Copper paste composition and its use in a method for forming copper conductors on substrates
This invention relates to a copper thick film paste composition paste comprising copper powder, a pb-free, bi-free and cd-free borosilicate glass frit, a component selected from the group consisting of ruthenium-based powder, copper oxide powder and mixtures thereof and an organic vehicle. The invention also provides methods of using the copper thick film paste composition to make a copper conductor on a substrate.
08/07/14
20140217485
Stress engineered multi-layers for integration of cmos and si nanophotonics
A method of forming an integrated photonic semiconductor structure having a photonic device and a cmos device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device..
07/31/14
20140211178
Method for producing a capping layer composed of silicon oxide on an euv mirror, euv mirror, and euv lithography apparatus
A method for producing a capping layer (18) composed of silicon oxide siox on a coating (16) of a mirror (13), the coating reflecting euv radiation (6) e.g. For use in an euv lithography apparatus or in an euv mask metrology system.
07/31/14
20140209877
Tft substrate including barrier layer, organic light-emitting display device including the tft substrate, and method of manufacturinq the tft substrate
A thin-film transistor (tft) substrate includes a flexible substrate. A first barrier layer is formed on the flexible substrate.
07/31/14
20140209851
Memory cell constructions, and methods for fabricating memory cell constructions
Some embodiments include methods for fabricating memory cell constructions. A memory cell may be formed to have a programmable material directly against a material having a different coefficient of expansion than the programmable material.
07/24/14
20140206195
Process for removing carbon material from substrates
A method of removing carbon materials, preferably amorphous carbon, from a substrate includes dispensing a liquid sulfuric acid composition including sulfuric acid and/or its desiccating species and precursors and having a water/sulfuric acid molar ratio of no greater than 5:1 onto an material coated substrate in an amount effective to substantially uniformly coat the carbon material coated substrate. The liquid sulfuric acid composition is exposed to water vapor in an amount effective to increase the temperature of the liquid sulfuric acid composition above the temperature of the liquid sulfuric acid composition prior to exposure to the water vapor.
07/24/14
20140206176
Method for low temperature bonding and bonded structure
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and sio2.
07/24/14
20140206161
Method of fabricating a semiconductor device having a capping layer
A method of semiconductor device fabrication includes forming a first dummy gate structure in a first region of a semiconductor substrate and forming a second dummy gate structure in a second region of the semiconductor substrate. A protective layer (e.g., oxide and/or silicon nitride hard mask) is formed on the second dummy gate structure.
07/24/14
20140203407
Method for low temperature bonding and bonded structure
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and sio2.
07/17/14
20140200131
Si3n4 insulator material for corona discharge igniter systems
A silicon nitride material is disclosed which has properties beneficial for efficient operation of a corona discharge igniter system in an internal combustion gas engine.. .
07/17/14
20140199851
Method of patterning a silicon nitride dielectric film
Methods of patterning silicon nitride dielectric films are described. For example, a method of isotropically etching a dielectric film involves partially modifying exposed regions of a silicon nitride layer with an oxygen-based plasma process to provide a modified portion and an unmodified portion of the silicon nitride layer.
07/17/14
20140199850
Dry-etch for selective oxidation removal
Methods of selectively etching tungsten oxide relative to tungsten, silicon oxide, silicon nitride and/or titanium nitride are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (h2).
07/17/14
20140199847
Semiconductor device manufacturing method
According to one embodiment, a semiconductor device manufacturing method includes depositing a silicon film above a semiconductor substrate, forming an insulating film which includes silicon oxide or silicon nitride on the silicon film, forming a physical guide having a depressed portion above the insulating film, forming a directed self-assembly material layer which includes a first polymer and a second polymer in the depressed portion of the physical guide, phase-separating the directed self-assembly material layer into a first region which includes the first polymer and a second region which includes the second polymer, removing the second region, processing the insulating film by using the physical guide and the first region as masks, and transferring a pattern corresponding to the second region to the insulating film. Further, the silicon film is processed by using the pattern transferred onto the insulating film as a mask..
07/17/14
20140199846
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device is disclosed. The method may comprise: etching a plurality of first openings in an interlayer dielectric layer on a substrate; forming an opening modifying layer in the plurality of first openings; and etching the opening modifying layer until the substrate is exposed, resulting in a plurality of second openings, wherein the second openings have a depth-to-width ratio greater than that of the first openings.
07/17/14
20140197513
Image sensor with improved dark current performance
Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region.
07/17/14
20140197473
Nonvolatile semiconductor storage device and method of manufacturing the same
A nonvolatile semiconductor storage device includes a substrate; an isolation film extending in a first direction and dividing the substrate into element regions; a cell string including memory cells in the element regions; a cell unit including the cell string and a select transistor on first directional ends of the cell string; diffusion layers formed in a portion of the element region first directionally beside the select gate electrode, the diffusion layers being adjacent to one another in a second direction intersecting with the first direction; and contacts extending through an interlayer insulating film and contacting the diffusion layers. An upper surface of the isolation film located between the diffusion layers is lower than an upper surface of the substrate.
07/17/14
20140197460
Semiconductor device, method for manufacturing the same, power supply device, and high-frequency amplifier
A semiconductor device includes: a compound semiconductor stack structure including a plurality of compound semiconductor layers stacked over a semiconductor substrate; and a first insulating film covering the surface of the compound semiconductor stack structure, the first insulating film being a silicon nitride film including, on the top side, a first region containing nitrogen element in excess of the stoichiometric ratio.. .
07/17/14
20140197356
Cmp compositions and methods for suppressing polysilicon removal rates
The present invention provides a chemical-mechanical polishing (cmp) composition suitable for polishing a silicon nitride-containing substrate while suppressing polysilicon removal from the substrate. The composition comprises abrasive particles suspended in an acidic aqueous carrier containing a surfactant comprising an alkyne-diol, an alkyne diol ethoxylate, or a combination thereof.
07/10/14
20140191231
Display device and method of manufacturing the same
According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.. .
07/03/14
20140187052
Selective etching of hafnium oxide using diluted hydrofluoric acid
Provided are methods for processing semiconductor substrates having hafnium oxide structures as well as silicon nitride and/or silicon oxide structures. Etching solutions and processing conditions described herein provide high etching selectivity of hafnium oxide relative to these other materials.
07/03/14
20140187045
Silicon nitride gapfill implementing high density plasma
Methods of filling features with silicon nitride using high-density plasma chemical vapor deposition are described. Narrow trenches may be filled with gapfill silicon nitride without damaging compressive stress.
07/03/14
20140187009
Uniform, damage free nitride etch
An integrated circuit may be formed by forming a sacrificial silicon nitride feature. At least a portion of the sacrificial silicon nitride feature may be removed by placing the integrated circuit in a two-step oxidized layer etch tool and removing a surface layer of oxidized silicon from the sacrificial silicon nitride feature using a two-step etch process.
07/03/14
20140185981
Silicon photonics photodetector integration
A method of forming an integrated photonic semiconductor structure having a photonic device and adjacent cmos devices may include depositing a first silicon nitride layer over the adjacent cmos devices and depositing an oxide layer over the first silicon nitride layer, wherein the oxide layer conformally covers the first silicon nitride layer and the underlying adjacent cmos devices to form a substantially planarized surface over the adjacent cmos devices. A second silicon nitride layer is then deposited over the oxide layer and a region corresponding to forming the photonic device.
07/03/14
20140185347
Compound semiconductor device and manufacturing method therefor
An hemt includes, on an sic substrate, a compound semiconductor layer, a silicon nitride (sin) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a..
07/03/14
20140183734
Semiconductor device
Technique capable of achieving reliability improvement of a semiconductor device even if temperature rising of an operation guarantee temperature of the semiconductor device is performed is provided. Gap portions are provided among a plurality of pads, and a glass coat composed of, for example, a silicon oxide film or a silicon nitride film is embedded in the gap portions.
07/03/14
20140183720
Methods of manufacturing integrated circuits having a compressive nitride layer
Methods of manufacturing semiconductor integrated circuits having a compressive nitride layer are disclosed. In one example, a method of fabricating an integrated circuit includes depositing an aluminum layer over a semiconductor substrate, depositing a tensile silicon nitride layer or a neutral silicon nitride layer over the aluminum layer, and depositing a compressive silicon nitride layer over the tensile silicon nitride layer or the neutral silicon nitride layer.
07/03/14
20140183498
Thin film silicon nitride barrier layers on flexible substrate
An article comprising a polymeric substrate and at least one inorganic barrier layer, wherein the inorganic barrier layer has a stress not greater than about 400 mpa and a density of at least about 1.5 g/cm3. The article is preferably an optical device, such as an organic light emitting diode (oled) or a photovoltaic (pv) module, wherein a silicon nitride barrier layer has been directly deposited on a flexible polymeric substrate via plasma enhanced chemical vapor deposition (pecvd)..
06/26/14
20140179107
Etching silicon nitride using dilute hydrofluoric acid
Provided are methods for processing semiconductor substrates or, more specifically, methods for etching silicon nitride structures without damaging photoresist structures that are exposed to the same etching solutions. In some embodiments, a highly diluted hydrofluoric acid is used for etching silicon nitride.
06/26/14
20140179082
Selective etching of hafnium oxide using non-aqueous solutions
Provided are methods for processing semiconductor substrates having hafnium oxide structures as well as one or more of silicon nitride, silicon oxide, polysilicon, and titanium nitride structures. Selected etching solution compositions and processing conditions provide high etching selectivity of hafnium oxide relative to these other materials.
06/26/14
20140179078
Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes: forming a silicon nitride film having a refractive index equal to or larger than 2.2 on a nitride semiconductor layer; and introducing at least one of elements that are oxygen, nitrogen, fluorine, phosphorus, sulfur and selenium into the silicon nitride film, the silicon nitride film including the at least one of elements remaining on the nitride semiconductor layer. The at least one of elements is introduced by a process of exposing the silicon nitride film to plasma including the at least one of elements, a process of ion-implanting the at least one of elements into the silicon nitride film, or a process of thermally diffusing the at least one of elements into the silicon nitride film.
06/26/14
20140178659
Al2o3 or al2o3-contained multilayer coatings for silicon nitride cutting tools by physical vapor deposition and methods of making the same
The present invention provides an al2o3 coated si3n4 cutting tool comprising a si3n4 based substrate body and a coating layer on the substrate body, wherein the coating layer has at least one al2o3 coating layer consisting of amorphous al2o3 or nanocrystalline α-, γ-, or κ-al2o3. The hard and wear resistant refractory coating is deposited onto the si3n4-based substrate body by reactive sputtering using bipolar pulsed dms technique or dual magnetron sputtering method at substrate temperatures of 300-700° c.
06/26/14
20140177039
Sub-wavelength extreme ultraviolet metal transmission grating and manufacturing method thereof
A method of manufacturing a sub-wavelength extreme ultraviolet metal transmission grating is disclosed. In one aspect, the method comprises forming a silicon nitride self-supporting film window on a back surface of a silicon-based substrate having both surfaces polished, then spin-coating a silicon nitride film on a front surface of the substrate with an electron beam resist hsq.
06/26/14
20140175557
Semiconductor device having insulating film with different stress levels in adjacent regions and manufacturing method thereof
An n-channel misfetqn is formed in an nmis first formation region of a semiconductor substrate and a p-channel misfetqp is formed in an adjacent pmis second formation region of the semiconductor substrate. A silicon nitride film having a tensile stress is formed to cover the n-channel misfetqn and the p-channel misfetqp.
06/26/14
20140175520
Metal silicide self-aligned sige heterojunction bipolar transistor and method of forming the same
The present invention discloses a metal silicide self-aligned sige heterojunction bipolar transistor, which is designed to overcome the shortcomings such as the large base resistance rb of the prior art products. The metal silicide self-aligned sige heterojunction bipolar transistor of the present invention mainly comprises an si collector region, a local dielectric region, a base region, a base-region low-resistance metal silicide layer, a polysilicon emitter region, an emitter-base spacer dielectric region composed of a liner silicon oxide layer and a silicon nitride inner sidewall, a monocrystalline emitter region, a contact hole dielectric layer, an emitter metal electrode and a base metal electrode.
06/26/14
20140175473
Light emitting diodes including light emitting surface barrier layers, and methods of fabricating same
A light emitting device includes a light emitting diode (led) having a light emitting surface, a silicon nitride layer on the light emitting surface and a sealed environment surrounding the light emitting surface. The silicon nitride layer may be directly on and cover the light emitting surface.
06/26/14
20140175359
Diffusion barrier layer for resistive random access memory cells
Provided are resistive random access memory (reram) cells having diffusion barrier layers formed from various materials, such as beryllium oxide or titanium silicon nitrides. Resistive switching layers used in reram cells often need to have at least one inert interface such that substantially no materials pass through this interface.
06/26/14
20140174532
Optimized anti-reflection coating layer for crystalline silicon solar cells
Embodiments of the invention include a solar cell and methods of forming a solar cell. Specifically, the methods may be used to form a passivation/anti-reflection layer having desired functional and optical properties on a solar cell substrate.
06/19/14
20140170050
Process for converting silicon tetrachloride to trichlorosilane
The invention relates to a process for converting silicon tetrachloride (stc) to trichlorosilane (tcs), by introducing reactant gas containing stc and hydrogen into a reaction zone of a reactor in which the temperature is 1000-1600° c., wherein the reaction zone is heated by a heater located outside the reaction zone and the product gas containing tcs which forms is then cooled, with the proviso that it is cooled to a temperature of 700-900° c. Within 0.1-35 ms, wherein the reactant gas is heated by the product gas by means of a heat exchanger working in countercurrent, wherein reactor and heat exchanger form a single, gas-tight component, wherein the component includes one or more ceramic materials selected from the group consisting of silicon carbide, silicon nitride, graphite, sic-coated graphite and quartz glass..
06/19/14
20140167265
Methods of forming a bi-layer cap layer on copper-based conductive structures and devices with such a cap layer
One illustrative device disclosed herein includes a layer of insulating material, a copper-based conductive structure positioned in the layer of insulating material and a bi-layer cap layer comprised of a first layer of material positioned on the copper-based conductive structure and a second layer of material positioned on the first layer of material. One method disclosed herein includes forming a copper-based conductive structure in a first layer of insulating material, forming a first layer of a bi-layer cap layer on the copper-based conductive structure, the first layer being comprised of silicon carbon nitride, forming a second layer of the bi-layer cap layer on the first layer, the second layer being comprised of silicon nitride, and forming a second layer of insulating material above the second layer..
06/19/14
20140167211
Method for amnufacturing a semiconductor device
A method of manufacturing a semiconductor device includes forming a silicon nitride film having an opening portion on a semiconductor substrate, forming a silicon oxide film on the silicon nitride film and on a side face of the opening portion, performing an etching treatment to the silicon oxide film so that a sidewall is formed on the side face of the opening portion, forming a trench on the semiconductor substrate with use of the sidewall and the silicon nitride film as a mask, and forming an insulating layer in the trench. The step of forming the silicon oxide film includes oxidizing the silicon nitride film with a plasma oxidation method or a radical oxidation method..
06/19/14
20140166617
Non-local plasma oxide etch
A method of etching exposed titanium oxide on heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flawed into a substrate processing region where the plasma effluents may combine with a nitrogen-containing precursor such as an amine (n:) containing precursor.
06/12/14
20140162430
Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative to conductive material
The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride.
06/12/14
20140158858
Polycrystalline silicon ingot casting mold and method for producing same, and silicon nitride powder for mold release material for polycrystalline silicon ingot casting mold and slurry containing same
Provided are a polycrystalline silicon ingot casting mold and a method for producing a polycrystalline silicon ingot casting mold, with which high-quality silicon ingots can be obtained at high yields by minimizing sticking with the surfaces of the silicon ingot casting mold, and losses and damages that occur when solidified silicon ingot is released from the mold. The method for producing a polycrystalline silicon ingot casting mold having a release layer, including: forming a slurry by mixing a silicon nitride powder with water, coating the surface of the mold with the slurry, and heating the mold at 400 to 800° c.
06/05/14
20140151621
Method of forming anneal-resistant embedded resistor for non-volatile memory application
Embodiments of the invention include a nonvolatile memory device that contains nonvolatile resistive random access memory device with improved device performance and lifetime. In some embodiments, nonvolatile resistive random access memory device includes a diode, a metal silicon nitride embedded resistor, and a resistive switching layer disposed between a first electrode layer and a second electrode layer.
05/29/14
20140145248
Dummy fin formation by gas cluster ion beam
Finfet structures with dielectric fins and methods of fabrication are disclosed. A gas cluster ion beam (gcib) tool is used to apply an ion beam to exposed fins, which converts the fins from a semiconductor material such as silicon, to a dielectric such as silicon nitride or silicon oxide.
05/22/14
20140141626
Method for depositing a chlorine-free conformal sin film
Described are methods of making silicon nitride (sin) materials on substrates. Improved sin films made by the methods are also included.
05/22/14
20140141542
Methods for depositing films on sensitive substrates
Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties.
05/15/14
20140134819
Nanopillar field-effect and junction transistors
Methods for fabrication of nanopillar field effect transistors are described. These transistors can have high height-to-width aspect ratios and be cmos compatible.
05/15/14
20140132908
Liquid crystal display device and method for manufacturing the same
A liquid crystal display device using a plastic substrate becomes required to have high resolution, high opening ratio, high reliability, or the like, with the increasing of a screen size. Besides, high productivity and cost reduction is also required.
05/15/14
20140132902
Manufacturing method for liquid crystal display device
A lcd device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode.
05/15/14
20140131807
Semiconductor device and method of manufacturing the same
A device isolation region is made of a silicon oxide film embedded in a trench, an upper portion thereof is protruded from a semiconductor substrate, and a sidewall insulating film made of silicon nitride or silicon oxynitride is formed on a sidewall of a portion of the device isolation region which is protruded from the semiconductor substrate. A gate insulating film of a misfet is made of an hf-containing insulating film containing hafnium, oxygen and an element for threshold reduction as main components, and a gate electrode that is a metal gate electrode extends on an active region, the sidewall insulating film and the device isolation region.
05/15/14
20140131701
Semiconductor device
To provide a semiconductor device which includes a gate insulating film with high withstand voltage and thus can have high reliability. The semiconductor device includes an oxide semiconductor film over an insulating surface; a pair of first conductive films over the oxide semiconductor film; a first insulating film, a second insulating film, and a third insulating film which are stacked in this order over the oxide semiconductor film and the pair of first conductive films; and a second conductive film overlapping with the oxide semiconductor film over the first to third insulating films.
05/08/14
20140127832
Forming method of an annular storage unit of a magneto-resistive memory
The present invention discloses a method of forming an annular storage structure of a magneto-resistive memory. It relates to the manufacturing process of the semiconductor devices.
05/08/14
20140125936
Electronic device having liquid crystal display device
A display device of the present invention includes a thin film transistor in a pixel region formed over a substrate, the thin film transistor including an active layer and a gate electrode with a gate insulating film interposed between the active layer and the gate electrode, a silicon nitride film formed over the thin film transistor, a resin film formed over the silicon nitride film, an inorganic insulating film formed over the resin film; a metal layer formed over the substrate; and a sealing material formed over the metal layer, wherein the sealing material covers a region where the resin film is not formed over the silicon nitride film.. .
05/08/14
20140124849
B4-flash device and the manufacturing method therof
The invention provides a b4-flash device and the manufacture method thereof, wherein the device comprises a substrate, a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer, and all those layers are disposed on the substrate in sequence. The first silicon oxide layer comprises a first section, a second section and a third section, and all those sections are along the channel direction in sequence.


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Silicon Nitride topics: Silicon Nitride, Semiconductor, Silicon Dioxide, Silicon Carbide, Ion Channel, Enhancement, Semiconductor Substrate, Ion Implant, Transistors, Interrupted, Photodiode, Gallium Nitride, Planarization, Replacement Gate, Semiconductor Device

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