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Silicon Interposer

Silicon Interposer-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Scalable 2.5d interface architecture
Altera Corporation
March 08, 2018 - N°20180069551

Systems and methods for interface block. The interface block includes input/output modules distributed along the interface block and a mid-stack module interspersed within the input/output modules.
Thermally enhanced fully molded fan-out module
Deca Technologies Inc.
January 11, 2018 - N°20180012881

A method of making a semiconductor device can include providing a temporary carrier with adhesive. A first semiconductor die and a second semiconductor die can be mounted face up to the temporary carrier such that back surfaces of the first semiconductor die and the second semiconductor die are depressed within the adhesive.
Silicon interposer sandwich structure for esd, emc, and emc shielding and protection
International Business Machines Corporation
December 14, 2017 - N°20170358552

A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer.
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Silicon Interposer Patent Applications
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Testing interposer method and apparatus
Texas Instruments Incorporated
August 24, 2017 - N°20170242069

The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the interposer. The improvement allows for the stacked die to be selectively tested by an external tester or by the test circuitry included in the interposer..
Method of fabricating semiconductor package
May 25, 2017 - N°20170148761

The present invention provides a semiconductor package and a method of fabricating the same, including: placing in a groove of a carrier a semiconductor element having opposing active and non-active surfaces, and side surfaces abutting the active surface and the non-active surface; applying an adhesive material in the groove and around a periphery of the side surfaces of the semiconductor ...
Thermally enhanced fully molded fan-out module
Deca Technologies Inc.
March 23, 2017 - N°20170084596

A method of making a semiconductor device can include providing a temporary carrier with adhesive. A first semiconductor die and a second semiconductor die can be mounted face up to the temporary carrier such that back surfaces of the first semiconductor die and the second semiconductor die are depressed within the adhesive.
Silicon Interposer Patent Pack
Download + patent application PDFs
Silicon Interposer Patent Applications
Download + Silicon Interposer-related PDFs
For professional research & prior art discovery
inventor
  • + full patent PDF documents of Silicon Interposer-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Semiconductor package and mounting structure thereof
Murata Manufacturing Co., Ltd.
December 01, 2016 - N°20160351504

A semiconductor package includes an interposer, a semiconductor element installed on a first surface of the interposer, bumps formed on a second surface of the interposer, and a chip component installed on the second surface of the interposer. The interposer is a silicon interposer; the semiconductor element is flip-chip mounted on the first surface of the interposer; the chip component ...
Electronic package and fabrication method thereof
Siliconware Precision Industries Co., Ltd.
November 10, 2016 - N°20160329267

An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the first side of the circuit structure; an encapsulant formed on the first side of the circuit structure for encapsulating the electronic element; a dielectric layer formed on portions of the second side of the circuit structure; ...
Probe card for testing wafer
Hermes-epitek Corp.
November 10, 2016 - N°20160327591

A probe card for circuit-testing comprising a testing pcb, a probe head, and a silicon interposer substrate is provided. The probe head has a plurality of probes provided with a fine pitch arrangement and held inside.
Semiconductor package with high routing density patch
Amkor Technology, Inc.
October 20, 2016 - N°20160307870

Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch ...
Silicon interposer sndwich structure for esd, emi, and emc shielding and protection
International Business Machines Corporation
August 11, 2016 - N°20160233190

A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer.
Interposer with lattice construction and embedded conductive metal structures
International Business Machines Corporation
June 16, 2016 - N°20160172290

A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for dielectric fields. Each unit cell is then filled with a dielectric material.
Interposer with lattice construction and embedded conductive metal structures
International Business Machines Corporation
June 16, 2016 - N°20160172288

A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for dielectric fields. Each unit cell is then filled with a dielectric material.
Silicon Interposer Patent Pack
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Silicon Interposer Patent Applications
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  • + full patent PDF documents of Silicon Interposer-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Carrier-less silicon interposer
Invensas Corporation
March 17, 2016 - N°20160079090

An interposer has conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component includes a first element having a thermal expansion coefficient less than 10 ppm/° c., and an insulating second element, with a plurality of openings extending from the second side through ...
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