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Silicon Interposer patents



      
           
This page is updated frequently with new Silicon Interposer-related patent applications. Subscribe to the Silicon Interposer RSS feed to automatically get the update: related Silicon RSS feeds. RSS updates for this page: Silicon Interposer RSS RSS



Date/App# patent app List of recent Silicon Interposer-related patents
06/18/15
20150168493 
 Testing interposer method and apparatus patent thumbnailTesting interposer method and apparatus
The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the interposer. The improvement allows for the stacked die to be selectively tested by an external tester or by the test circuitry included in the interposer..
Texas Instruments Incorporated


06/04/15
20150155230 
 Carrier-less silicon interposer using photo patterned polymer as substrate patent thumbnailCarrier-less silicon interposer using photo patterned polymer as substrate
A component, e.g., interposer has first and second opposite sides, conductive elements at the first side and terminals at the second side. The terminals can connect with another component, for example.
Invensas Corporation


05/28/15
20150145133 
 Apparatus for dicing interposer assembly patent thumbnailApparatus for dicing interposer assembly
Apparatus for performing dicing of die on wafer interposers. Apparatuses are disclosed for use with the methods of dicing an interposer having integrated circuit dies mounted thereon.
Taiwan Semiconductor Manufacturing Company, Ltd.


04/30/15
20150115437 
 Universal encapsulation substrate, encapsulation structure and encapsulation method patent thumbnailUniversal encapsulation substrate, encapsulation structure and encapsulation method
A universal packaging substrate, comprising a first substrate (102) and a silicon interposer (103), wherein, a plurality of bumps (106) are formed between the upper surface of the first substrate (102) and the lower surface of the silicon interposer (103) and electrically connect the upper surface of the first substrate (102) and the lower surface of the silicon interposer (103), and a plurality of wire bonding pads are formed on the upper surface of the silicon interposer (103) and are electrically connected to the bumps (106) respectively via silicon through holes (105). Also disclosed are a packaging structure provided with the packaging substrate and an packaging method.

04/23/15
20150111318 
 Heterogeneous integration of memory and split-architecture processor patent thumbnailHeterogeneous integration of memory and split-architecture processor
A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having third terminals. A first silicon interposer having first through silicon vias tsvs and a second silicon interposer having second tsvs is provided.
Texas Instruments Incorporated


02/05/15
20150035164 
 Semiconductor package and  fabricating the same patent thumbnailSemiconductor package and fabricating the same
The present invention provides a semiconductor package and a method of fabricating the same, including: placing in a groove of a carrier a semiconductor element having opposing active and non-active surfaces, and side surfaces abutting the active surface and the non-active surface; applying an adhesive material in the groove and around a periphery of the side surfaces of the semiconductor element; forming a dielectric layer on the adhesive material and the active surface of the semiconductor element; forming on the dielectric layer a circuit layer electrically connected to the semiconductor element; and removing a first portion of the carrier below the groove to keep a second portion of the carrier on a side wall of the groove intact for the second portion to function as a supporting member. The present invention does not require formation of a silicon interposer, and therefore the overall cost of a final product is much reduced..
Siliconware Precision Industries Co., Ltd.


02/05/15
20150035163 
 Semiconductor package and  fabricating the same patent thumbnailSemiconductor package and fabricating the same
The present invention provides a semiconductor package and a method of fabricating the same, including: placing a semiconductor element in a groove of a carrier; forming a dielectric layer on the semiconductor element; forming on the dielectric layer a circuit layer electrically connected to the semiconductor element; and removing a first portion of the carrier below the groove to keep a second of the carrier on a sidewall of the groove intact for the second portion to function as a supporting part. The present invention does not require formation of a silicon interposer, therefore the overall cost of the final product is much reduced..
Siliconware Precision Industries Co., Ltd.


11/27/14
20140346678 
 Parallel signal via structure patent thumbnailParallel signal via structure
A silicon interposer with redundant thru-silicon vias. The silicon interposer includes a first trace structure on a first side of the interposer and a second trace structure on a second side of the interposer.

09/04/14
20140248723 
 Wafer scale packaging platform for transceivers patent thumbnailWafer scale packaging platform for transceivers
A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components.

08/28/14
20140240938 
 Carrier-less silicon interposer patent thumbnailCarrier-less silicon interposer
An interposer can have conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component can include a first element having a thermal expansion coefficient less than 10 ppm/° c., and an insulating second element, with a plurality of openings extending from the second side through the second element towards the first element.

06/26/14
20140181483 

Computation memory operations in a logic layer of a stacked memory


Some die-stacked memories will contain a logic layer in addition to one or more layers of dram (or other memory technology). This logic layer may be a discrete logic die or logic on a silicon interposer associated with a stack of memory dies.

06/26/14
20140181427 

Compound memory operations in a logic layer of a stacked memory


Some die-stacked memories will contain a logic layer in addition to one or more layers of dram (or other memory technology). This logic layer may be a discrete logic die or logic on a silicon interposer associated with a stack of memory dies.

06/26/14
20140175666 

Integrated circuit device with stitched interposer


Systems, methods, and devices are provided to enable an integrated circuit device of relatively higher capacity. Such an integrated circuit device may include at least two component integrated circuits that communicate with one another.

06/12/14
20140159247 

3d semiconductor interposer for heterogeneous integration of standard memory and split-architecture processor


A standard memory chip (150) is vertically assembled with two processor chips (130, 140) of split architecture by means of a small silicon interposer (120) stacked onto a large silicon interposer (110); both interposers include through-silicon vias (tsvs), while the chips are free of tsvs. The tsvs of small interposer (120) connect to the memory chip (150) and to the bottom interposer (110).

05/29/14
20140145300 

Integration of chips and silicon-based trench capacitors using low parasitic silicon-level connections


Methods and apparatuses are described for integration of integrated circuit die and silicon-based trench capacitors using silicon-level connections to reduce connection lengths, parasitics and necessary capacitance magnitudes and volumes. A trench capacitor can be fabricated on silicon and mounted on or embedded in a chip or one or more sides of a through silicon interposer (tsi) for silicon-level connections to chip circuitry.

04/03/14
20140091827 

Probe card for circuit-testing


A probe card for circuit-testing comprising a testing pcb, a probe head, and a silicon interposer substrate is provided. The probe head has a plurality of probes provided with a fine pitch arrangement and held inside.

02/13/14
20140044389 

Optoelectronic integrated package module and manufacturing the same


According to one embodiment, there is provided an optoelectronic integrated package module including a silicon interposer, an optical semiconductor element formed in the silicon interposer, and a semiconductor integrated circuit chip module including a first semiconductor integrated circuit chip including a logic circuit and mounted on a first principal surface and a second semiconductor integrated circuit chip having a second principal surface side mounted on the silicon interposer. The first and second semiconductor integrated circuit chips are electrically connected to each other via the via interconnections formed inside the second semiconductor integrated circuit chip from the first principal surface.

02/13/14
20140042463 

Optoelectronic integrated package module


According to one embodiment, there is provided an optoelectronic integrated package module including a silicon interposer that has an electrical interconnection and an optical waveguide, and formed on a silicon substrate, an optical semiconductor element formed in the silicon interposer, and electrically connected to the electrical interconnection and optically coupled to the optical waveguide, an electrical circuit element formed in the silicon interposer, and electrically connected to the optical semiconductor element, and a semiconductor integrated circuit chip mounted on the silicon interposer, and electrically connected to the electrical circuit element. The semiconductor integrated circuit chip transmits an electrical signal to the optical semiconductor element via the electrical circuit element or receives an electrical signal from the optical semiconductor element via the electrical circuit element..

01/02/14
20140001639 

Semiconductor device having silicon interposer on which semiconductor chip is mounted


Disclosed herein is a device that includes a silicon interposer having wiring lines on first and second wiring layers. The wiring lines includes first, second and third wiring lines provided on the first wiring layer and a fourth wiring line provided on the second wiring layer.

10/31/13
20130285241 

Apparatus for dicing interposer assembly


Apparatus for performing dicing of die on wafer interposers. Apparatuses are disclosed for use with the methods of dicing an interposer having integrated circuit dies mounted thereon.

08/15/13
20130210198 

Process for forming semiconductor structure


A method for forming a semiconductor structure. A semiconductor substrate including a plurality of dies mounted thereon is provided.

07/18/13
20130181354 

Semiconductor interposer having a cavity for intra-interposer die


A semiconductor package may include a substrate, and a semiconductor interposer having a cavity and a plurality of through semiconductor vias. The semiconductor interposer is situated over the substrate.

05/02/13
20130107479 

Silicon interposer systems


A universal silicon interposer system and method to enabling the selective use of multiple proprietary microelectronic devices without the need to substantially alter the end-use application(s). The system may be used in the implementation of three-dimensional (stacked) microelectronics having proprietary contact pin patterns..

04/11/13
20130087884 

Silicon interposer including backside inductor


Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate..



Popular terms: [SEARCH]

Silicon Interposer topics: Silicon Interposer, Semiconductor, Integrated Circuit, Circuit Board, Semiconductor Substrate, Electronic Device

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This listing is a sample listing of patent applications related to Silicon Interposer for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Silicon Interposer with additional patents listed. Browse our RSS directory or Search for other possible listings.


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