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This page is updated frequently with new Semiconductor-related patents. Subscribe to the Semiconductor RSS feed to automatically get the update: related Semiconductor RSS feeds.

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Date/App# patent app List of recent Semiconductor-related patents
04/10/14
20140101395
 Semiconductor memory devices including a discharge circuit patent thumbnailSemiconductor memory devices including a discharge circuit
Semiconductor memory devices are provided. Each of the semiconductor memory devices may include first and second memory cells.
04/10/14
20140101353
 Multi-processor device patent thumbnailMulti-processor device
The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each group of processors of different architectures, if a single chip includes a plurality of multi-processor groups. A multi-processor device of the present invention comprises a plurality of processors including first and second groups of processors of different architectures such as cpus, simd type super-parallel processors, and dsps, a first bus which is a cpu bus to which the first processor group is coupled, a second bus which is an internal peripheral bus to which the second processor group is coupled, independent of the first bus, a first external bus interface to which the first bus is coupled, and a second external bus interface to which the second bus is coupled, over a single semiconductor chip..
04/10/14
20140100684
 2d/3d analysis for abnormal tools and stages diagnosis patent thumbnail2d/3d analysis for abnormal tools and stages diagnosis
A method for analyzing abnormalities in a semiconductor processing system provides performing an analysis of variance on a production history associated with each of a plurality of tools at each of a plurality of process steps for each of a plurality of processed wafers, and key process steps are identified. A regression analysis on a plurality of measurements of the plurality of wafers at each process step is performed and key measurement parameters are identified.
04/10/14
20140099999
 Light-emitting device, method for manufacturing the same, and cellular phone patent thumbnailLight-emitting device, method for manufacturing the same, and cellular phone
The invention relates to: a light-emitting device which includes a first flexible substrate having a first electrode, a light-emitting layer over the first electrode, and a second electrode with a projecting portion over the light-emitting layer and a second flexible substrate having a semiconductor circuit and a third electrode electrically connected to the semiconductor circuit, in which the projecting portion of the second electrode and the third electrode are electrically connected to each other, a method for manufacturing the light-emitting device; and a cellular phone which includes a housing incorporating the light-emitting device and having a longitudinal direction and a lateral direction, in which the light-emitting device is disposed on a front side and in an upper portion in the longitudinal direction of the housing.. .
04/10/14
20140099799
 Lithography masks, systems, and manufacturing methods patent thumbnailLithography masks, systems, and manufacturing methods
Lithography masks, lithography systems, methods of manufacturing lithography masks, methods of altering material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a lithography mask includes a first pattern for at least one material layer of at least one die, the first pattern being oriented in a first position.
04/10/14
20140099798
 Uv-curing apparatus provided with wavelength-tuned excimer lamp and method of processing semiconductor substrate using same patent thumbnailUv-curing apparatus provided with wavelength-tuned excimer lamp and method of processing semiconductor substrate using same
A uv irradiation apparatus for processing a semiconductor substrate includes: a uv lamp unit having at least one dielectric barrier discharge excimer lamp which is constituted by a luminous tube containing a rare gas wherein an inner surface of the luminous tube is coated with a fluorescent substance having a peak emission spectrum in a wavelength range of 190 nm to 350 nm; and a reaction chamber disposed under the uv lamp unit and connected thereto via a transmission window.. .
04/10/14
20140099797
 Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus patent thumbnailMethod of manufacturing semiconductor device, substrate processing method and substrate processing apparatus
A silicon oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a silicon-containing layer on the substrate by supplying a source gas containing silicon, to the substrate housed in a processing chamber and heated to a first temperature; and oxidizing and changing the silicon-containing layer formed on the substrate, to a silicon oxide layer by supplying reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure atmosphere of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure atmosphere of less than atmospheric pressure and heated to a second temperature equal to the first temperature or higher than the first temperature.. .
04/10/14
20140099796
 Method for developing low dielectric constant film and devices obtained thereof patent thumbnailMethod for developing low dielectric constant film and devices obtained thereof
A method for porogen removal of porous sioch film is provided, as well as devices obtained thereof. The devices and associated methods are in the field of advanced semiconductor interconnect technology, and more in particular in the development of dielectric films with low-k value..
04/10/14
20140099794
 Radical chemistry modulation and control using multiple flow pathways patent thumbnailRadical chemistry modulation and control using multiple flow pathways
Systems and methods are described relating to semiconductor processing chambers. An exemplary chamber may include a first remote plasma system fluidly coupled with a first access of the chamber, and a second remote plasma system fluidly coupled with a second access of the chamber.
04/10/14
20140099793
 Semiconductor device and method for fabricating the same patent thumbnailSemiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes forming a first mask on a substrate, forming a first side wall of a fin by performing a first etching of the substrate using the first mask, forming a second mask on the substrate, the second mask being different from the first mask, and forming a second side wall of the fin by performing a second etching of the substrate using the second mask.. .
04/10/14
20140099792
Single fin cut employing angled processing methods
Fin-defining spacers are formed on an array of mandrel structure. Mask material portions can be directionally deposited on fin-defining spacers located on one side of each mandrel structure, while not deposited on the other side.
04/10/14
20140099791
Composition for forming resist underlayer film for euv lithography
A method for producing a semiconductor device includes the steps of: applying a composition for forming a resist underlayer film for euv lithography including a novolac resin containing a halogen atom onto a substrate having a film to be fabricated for forming a transferring pattern and baking the composition so as to form a resist underlayer film for euv lithography; and applying a resist for euv lithography onto the resist underlayer film for euv lithography, irradiating, with euv through a mask, the resist underlayer film for euv lithography and a film of the resist for euv lithography on the resist underlayer film, developing the film of the resist for euv lithography, and transferring an image formed in the mask onto the substrate by dry etching so as to form an integrated circuit device.. .
04/10/14
20140099789
Method of making an interconnect device
A semiconductor system includes: providing a dielectric layer; providing a conductor in the dielectric layer, the conductor exposed at the top of the dielectric layer; capping the exposed conductor; and modifying the surface of the dielectric layer, modifying the surface of the dielectric layer, wherein modifying the surface includes cleaning conductor ions from the dielectric layer by dissolving the conductor in a low ph solution, dissolving the dielectric layer under the conductor ions, mechanically enhanced cleaning, or chemisorbing a hydrophobic layer on the dielectric layer.. .
04/10/14
20140099787
Semiconductor device processing with reduced wiring puddle formation
A method of forming an interconnect structure for a semiconductor device includes forming a lower antireflective coating layer over a dielectric layer; forming an organic planarizing layer on the lower antireflective coating layer; transferring a wiring pattern through the organic planarizing layer; transferring the wiring pattern through the lower antireflective coating layer; and transferring the wiring pattern through the dielectric layer, wherein unpatterned portions of the lower antireflective coating layer serve as an etch stop layer so as to prevent any bubble defects present in the organic planarizing layer from being transferred to the dielectric layer.. .
04/10/14
20140099786
Methods of forming through substrate interconnects
A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate.
04/10/14
20140099784
Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes forming an insulation film including a trench on a substrate, forming a first metal gate film pattern and a second metal gate film pattern in the trench, redepositing a second metal gate film on the first and second metal gate film patterns and the insulation film, and forming a redeposited second metal gate film pattern on the first and second metal gate film patterns by performing a planarization process for removing a portion of the redeposited second metal gate film so as to expose a top surface of the insulation film, and forming a blocking layer pattern on the redeposited second metal gate film pattern by oxidizing an exposed surface of the redeposited second metal gate film pattern.. .
04/10/14
20140099782
Method and apparatus for thermal control of ion sources and sputtering targets
A method and apparatus are disclosed for controlling a semiconductor process temperature. In one embodiment a thermal control device includes a heat source and a housing comprising a vapor chamber coupled to the heat source.
04/10/14
20140099781
Beam homogenizer, laser irradiation apparatus, and method for manufacturing semiconductor device
The energy distribution of the beam spot on the irradiated surface changes due to the change in the oscillation condition of the laser or before and after the maintenance. The present invention provides an optical system for forming a rectangular beam spot on an irradiated surface including a beam homogenizer for homogenizing the energy distribution of the rectangular beam spot on the irradiated surface in a direction of its long or short side.
04/10/14
20140099780
Laser doping of crystalline semiconductors using a dopant-containing amorphous silicon stack for dopant source and passivation
Techniques and structures for laser doping of crystalline semiconductors using a dopant-containing amorphous silicon stack for dopant source and passivation. A method includes forming a dopant-containing amorphous silicon layer stack on at least one portion of a surface of a crystalline semiconductor layer, and irradiating a selected area of the dopant-containing amorphous silicon layer stack, wherein the selected area of the dopant-containing amorphous silicon layer stack interacts with an upper portion of the underlying crystalline semiconductor layer to form a doped, conductive crystalline region, and each non-selected area of the dopant-containing amorphous silicon layer stack remains intact on the at least one portion of the surface of the crystalline semiconductor layer..
04/10/14
20140099779
Reverse tone sti formation
A method includes forming a hard mask over a substrate, patterning the hard mask to form a first plurality of trenches, and filling a dielectric material into the first plurality of trenches to form a plurality of dielectric regions. The hard mask is removed from between the plurality of dielectric regions, wherein a second plurality of trenches is left by the removed hard mask.
04/10/14
20140099777
Singulation processes
In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process.
04/10/14
20140099776
Compressively strained soi substrate
A method of forming a strained silicon-on-insulator includes forming a first wafer having a compressively strained active semiconductor layer, forming a second wafer having an insulation layer formed above a bulk semiconductor layer, and bonding the compressively strained active semiconductor layer of the first wafer to the insulation layer of the second wafer.. .
04/10/14
20140099775
Method for fabricating semiconductor device with mini sonos cell
A method for fabricating a semiconductor device with mini-sonos cell is disclosed. The method includes: providing a semiconductor substrate having a first mos region and a second mos region; forming a first trench in the semiconductor substrate between the first mos region and the second mos region; depositing a oxide liner and a nitride liner in the first trench; forming a sti in the first trench; removing a portion of the nitride liner for forming a second trench between the first mos region of the semiconductor substrate and the sti and a third trench between the sti and the second mos region of the semiconductor substrate; and forming a first conductive type nitride layer in the second trench..
04/10/14
20140099774
Method for producing strained ge fin structures
Disclosed are methods for forming fins. In an example embodiment, a method includes providing a substrate that includes at least two elongated structures separated by an isolation region.
04/10/14
20140099773
Dual shallow trench isolation liner for preventing electrical shorts
A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (soi) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion.
04/10/14
20140099772
Method of forming a backside contact structure having selective side-wall isolation
A backside contact structure is created using the following sequence of steps: etching a deep tench from the front surface of the semiconductor wafer to the buried layer to be contacted; depositing an isolation layer into the trench which covers the surfaces of the trench; performing an ion beam anisotropic etch in order to selectively etch the isolation layer at the bottom of the trench; filling the trench with a conductive material in order to create an electrical connection to the backside layer. The process can either be performed at a front-end stage of wafer processing following the formation of shallow trench isolation structures, or at a back-end stage after device transistors are formed.
04/10/14
20140099771
Reverse tone sti formation
A method includes forming a hard mask over a substrate, patterning the hard mask to form a first plurality of trenches, and filling a dielectric material into the first plurality of trenches to form a plurality of dielectric regions. The hard mask is removed from between the plurality of dielectric regions, wherein a second plurality of trenches is left by the removed hard mask.
04/10/14
20140099770
Semiconductor device and a method of manufacturing the same and designing the same
There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary bl between the element forming region da and dummy region fa by placing the first dummy pattern dp1 of relatively wider area and the second dummy pattern dp2 of relatively small area in the dummy region fa.
04/10/14
20140099768
Semiconductor devices having passive element in recessed portion of device isolation pattern and methods of fabricating the same
A semiconductor device includes a substrate, a device isolation pattern and a passive circuit element. The device isolation pattern is located on the substrate, delimits an active region of the substrate, and includes a recessed portion having a bottom surface located below a plane coincident with a surface of the active region.
04/10/14
20140099767
Manufacturing method of semiconductor device
An insulating film and another insulating film are formed over a semiconductor substrate in that order to cover first, second, and third gate electrodes. The another insulating film is etched back to form sidewall spacers over side surfaces of the insulating film.
04/10/14
20140099766
Method of manufacturing semiconductor device
A resist layer (46a) including a thick film section (47a), which is relatively thick, at one side thereof, and a thin film section (47b), which is relatively thin, at the other side thereof is formed using a multiple-tone mask. A gate electrode (15a) is formed at a place where it will be provided on a semiconductor layer (12a) so as to be narrower than the resist layer (46a), by executing isotropic etching to a conductive film (44) formed in advance using the resist layer (46a) as a mask, in order to form overhang portions (48) on the resist layer (46a) at both sides of the gate electrode (15a).
04/10/14
20140099765
Transistor structure with feed-through source-to-substrate contact
An ldmos (laterally diffused metal oxide semiconductor) structure connects the source to a substrate and also the gate shield while utilizing a reduced area for such contacts. The structure includes an electrically conductive substrate layer, a source, and a drain contact; the drain contact is separated from the substrate layer by at least one intervening layer.
04/10/14
20140099763
Forming silicon-carbon embedded source/drain junctions with high substitutional carbon level
Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (spe) process to form a highly substitutional silicon-carbon film.
04/10/14
20140099761
Three dimensional semiconductor memory devices and methods of forming the same
Provided are three-dimensional semiconductor memory devices and methods of forming the same. The device includes a substrate, conductive patterns stacked on the substrate, and an active pattern penetrating the conductive patterns to be connected to the substrate.
04/10/14
20140099760
Method for fabricating semiconductor device
A method for fabricating a semiconductor device, wherein the method comprises steps as follows: a dummy gate with a poly-silicon gate electrode and a passive device having a poly-silicon element layer are firstly provided. A hard mask layer is then formed on the dummy gate and the passive device.
04/10/14
20140099759
Apparatus and methods for forming a modulation doped non-planar transistor
Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed..
04/10/14
20140099758
Sram devices utilizing strained-channel transistors and methods of manufacture
A novel sram memory cell structure and method of making the same are provided. The sram memory cell structure comprises strained pmos transistors formed in a semiconductor substrate.
04/10/14
20140099756
Thin film transistor and fabricating method
A thin-film transistor comprises a semiconductor panel, a dielectric layer, a semiconductor film layer, a conduct layer, a source and a drain. The semiconductor panel comprises a base, an intra-dielectric layer, at least one metal wire layer and at least one via layer.
04/10/14
20140099755
Fabrication method of stacked package structure
A fabrication method of a stacked package structure is provided, which includes the steps of: providing a substrate having at least a semiconductor device disposed thereon; and disposing a semiconductor package on the substrate through a plurality of conductive elements such that the semiconductor device is located between the substrate and the semiconductor package, and forming an encapsulant between the substrate and the semiconductor package to encapsulate the semiconductor device. The encapsulant can be formed on the semiconductor package first and then laminated on the substrate to encapsulate the semiconductor device, or alternatively the encapsulant can be filled between the substrate and the semiconductor package driven by a capillary force after the semiconductor package is disposed on the substrate.
04/10/14
20140099752
Semiconductor device and manufacturing method thereof
An oxide semiconductor layer with excellent crystallinity is formed to enable manufacture of transistors with excellent electrical characteristics for practical application of a large display device, a high-performance semiconductor device, etc. By first heat treatment, a first oxide semiconductor layer is crystallized.
04/10/14
20140099747
Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate and a first insulating layer. The first insulating layer includes a first lower layer and a first upper layer on the first lower layer.
04/10/14
20140099742
Method for fabricating a semiconductor device
The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an oled bonded to a base material with curvature.
04/10/14
20140099596
Light curing device
The invention relates to a light curing device for dental purposes having a plurality of semiconductor light sources, each light source includes a light-emitting chip, wherein said chips are mounted on a common and chip-cooling substrate. Each chip is surrounded by an individual reflector body connected to the substrate and/or the chip associated therewith, and the reflector bodies of at least two chips are arranged next to one another but are not connected with one another..
04/10/14
20140099451
Method for depositing layers on a glass substrate by means of low-pressure pecvd
The invention relates to a method for producing metal or semiconductor oxide, nitride or oxynitride films on a substrate, by means of the pecvd method, including the steps that involve: (i) having a low-pressure pecvd device including at least one plasma source that includes at least one electrode connected to an ac, dc, or drawn dc generator for depositing said films on the substrate; and (ii) applying electrical power to the plasma source and applying, on the substrate, an oxide film gas precursor made of metal or semiconductor nitrides or oxynitrides and a reactive gas made of oxygen, oxygen derivatives, or nitrogen derivatives. The invention also relates to metal or semiconductor oxide, nitride, or oxynitride films obtained by the method..
04/10/14
20140099232
Sheet of semiconducting material, system for forming same, and method of forming same
A method of forming a sheet of semiconductor material utilizes a system. The system comprises a first convex member extending along a first axis and capable of rotating about the first axis and a second convex member spaced from the first convex member and extending along a second axis and capable of rotating about the second axis.
04/10/14
20140099176
Vacuum processing apparatus and vacuum processing method
A semiconductor processing apparatus is provided, which includes processing chambers coupled together by transport mechanisms having transfer robots. After having completed wafer processing in each processing chamber, the allowable value of a time permitted for a processing-completed wafer to continue residing within the processing chamber is set up.


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Semiconductor topics: Semiconductor, Semiconductor Substrate, Semiconductor Device, Semiconductor Material, Electric Conversion, Conductive Layer, Molybdenum, Camera Module, Semiconductor Devices, Semiconductors, Integrated Circuit, Surfactant, Photoelectric Conversion, Electronic Device, Transparent Conductive Oxide

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