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Semiconductor Substrate patents



      
           
This page is updated frequently with new Semiconductor Substrate-related patent applications. Subscribe to the Semiconductor Substrate RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Substrate RSS RSS


Etching method, and method of producing semiconductor substrate product and semiconductor device using the same, as well…

Fujifilm

Etching method, and method of producing semiconductor substrate product and semiconductor device using the same, as well…

Methods for fabricating integrated circuits using improved masks

Micron Technology

Methods of forming through substrate interconnects

Date/App# patent app List of recent Semiconductor Substrate-related patents
03/26/15
20150087977
 Monolithic ultrasonic imaging devices, systems and methods patent thumbnailMonolithic ultrasonic imaging devices, systems and methods
To implement a single-chip ultrasonic imaging solution, on-chip signal processing may be employed in the receive signal path to reduce data bandwidth and a high-speed serial data module may be used to move data for all received channels off-chip as digital data stream. The digitization of received signals on-chip allows advanced digital signal processing to be performed on-chip, and thus permits the full integration of an entire ultrasonic imaging system on a single semiconductor substrate.
Butterfly Network, Inc.
03/26/15
20150087156
 Etching method, and  producing semiconductor substrate product and semiconductor device using the same, as well as kit for preparation of etching liquid patent thumbnailEtching method, and producing semiconductor substrate product and semiconductor device using the same, as well as kit for preparation of etching liquid
A method of etching a semiconductor substrate, having the steps of: preparing an etching liquid by mixing a first liquid with a second liquid to be in the range of ph from 8.5 to 14, the first liquid containing a basic compound, the second liquid containing an oxidizing agent; and then applying the etching liquid to a semiconductor substrate on a timely basis for etching a ti-containing layer in or on the semiconductor substrate.. .
Fujifilm Corporation
03/26/15
20150087149
 Methods for fabricating integrated circuits using improved masks patent thumbnailMethods for fabricating integrated circuits using improved masks
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a mask overlying a material to be etched by forming first hard mask segments overlying the material to be etched, forming sacrificial mandrels overlying the material to be etched and around each hard mask segment, forming second hard mask segments overlying the semiconductor substrate and adjacent each sacrificial mandrel, and removing the sacrificial mandrels to form first gaps surrounding each first hard mask segment, wherein each first gap is bounded by a respective first hard mask segment and an adjacent second hard mask segment.
Globalfoundries, Inc.
03/26/15
20150087147
 Methods of forming through substrate interconnects patent thumbnailMethods of forming through substrate interconnects
A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate.
Micron Technology, Inc.
03/26/15
20150087144
 Apparatus and  manufacturing metal gate semiconductor device patent thumbnailApparatus and manufacturing metal gate semiconductor device
A method of manufacturing a semiconductor device includes providing a semiconductor substrate and forming a structure over the semiconductor substrate. The structure includes a sacrificial dielectric on the semiconductor substrate and a dummy gate over the sacrificial dielectric.
Taiwan Semiconductor Manufacturing Company Ltd.
03/26/15
20150087143
 Jog design in integrated circuits patent thumbnailJog design in integrated circuits
A device includes an active region in a semiconductor substrate, a gate strip over and crossing the active region, and a jog over the active region and connected to the gate strip to form a continuous region. The jog is on a side of the gate strip.
Taiwan Semiconductor Manufacturing Company, Ltd.
03/26/15
20150087134
 Semiconductor isolation region uniformity patent thumbnailSemiconductor isolation region uniformity
Methods of facilitating isolation region uniformity include: patterning a semiconductor substrate to form at least one isolation opening within the semiconductor substrate, the patterning comprising leaving, at least in part, a protective hard mask above a portion of the semiconductor substrate; providing an insulating material within and over the at least one isolation opening, and planarizing the insulating material to facilitate fabricating an isolation region within the semiconductor substrate; stopping the planarizing on the protective hard mask and exposing at least a portion of the protective hard mask above the portion of the semiconductor substrate; and non-selectively removing a remaining portion of the insulating material over the at least one isolation opening and the exposed protective hard mask above the portion of the semiconductor substrate while leaving the insulating material within the at least one isolation opening and exposing upper surfaces of the semiconductor substrate, to facilitate isolation region uniformity.. .
Globalfoundries Inc.
03/26/15
20150087128
 Method of manufacturing a semiconductor device that includes a misfet patent thumbnailMethod of manufacturing a semiconductor device that includes a misfet
An insulating film and another insulating film are formed over a semiconductor substrate in that order to cover first, second, and third gate electrodes. The another insulating film is etched back to form sidewall spacers over side surfaces of the insulating film.
Renesas Electronics Corporation
03/26/15
20150087126
 Method of fabrication transistor with non-uniform stress layer with stress concentrated regions patent thumbnailMethod of fabrication transistor with non-uniform stress layer with stress concentrated regions
A method of fabrication a transistor device with a non-uniform stress layer including the following processes. First, a semiconductor substrate having a first transistor region is provided.
United Microelectronics Corp.
03/26/15
20150087120
 Raised source/drain and gate portion with dielectric spacer or air gap spacer patent thumbnailRaised source/drain and gate portion with dielectric spacer or air gap spacer
A semiconductor structure and method of manufacturing the same are provided. The semiconductor device includes epitaxial raised source/drain (rsd) regions formed on the surface of a semiconductor substrate through selective epitaxial growth.
International Business Machines Corporation
03/26/15
20150087116

Sawtooth electric field drift region structure for power semiconductor devices


This invention discloses a semiconductor power device formed in a semiconductor substrate includes rows of multiple horizontal columns of thin layers of alternate conductivity types in a drift region of the semiconductor substrate where each of the thin layers having a thickness to enable a punch through the thin layers when the semiconductor power device is turned on. In a specific embodiment the thickness of the thin layers satisfying charge balance equation q*nd*wn=q*na*wp and a punch through condition of wp<2*wd*[nd/(na+nd)] where nd and wn represent the doping concentration and the thickness of the n type layers 160, while na and wp represent the doping concentration and thickness of the p type layers; wd represents the depletion width; and q represents an electron charge, which cancel out.
03/26/15
20150087111

3 dimensional semiconductor device and manufacturing the same


A 3d semiconductor device and a method of manufacturing the same are provided. The method includes forming a first semiconductor layer including a common source node on a semiconductor substrate, forming a transistor region on the first semiconductor layer, wherein the transistor region includes a horizontal channel region substantially parallel to a surface of the semiconductor substrate, and source and drain regions branched from the horizontal channel region to a direction substantially perpendicular to the surface of the semiconductor substrate, processing the first semiconductor layer to locate the common source node corresponding to the source region, forming a gate in a space between the source region and the drain region, forming heating electrodes on the source region and the drain region, and forming resistance variable material layers on the exposed heating electrodes..
Sk Hynix Inc.
03/26/15
20150087085

Device for determining the temperature of a substrate


An apparatus and a method for determining the temperature of a substrate, in particular of a semiconductor substrate during the heating thereof by means of at least one first radiation source are disclosed. A determination of the temperature is based on detecting first and second radiations, each comprising radiation emitted by the substrate due to its own temperature and radiation emitted by the first radiation, which is reflected at the substrate and at least one of a drive power of the first radiation source and the radiation intensity of the first radiation source..
Hq-dielectrics Gmbh
03/26/15
20150086221

Self biased dual mode differential cmos tia for 400g fiber optic links


A transimpedance amplifier (tia) device. The device includes a photodiode coupled to a differential tia with a first and second tia, which is followed by a level shifting/differential amplifier (ls/da).
Inphi Corporation
03/26/15
20150085868

Semiconductor with virtualized computation and switch resources


A semiconductor substrate has a processor configurable to support execution of a hypervisor controlling a set of virtual machines and a physical switch configurable to establish virtual ports to the set of virtual machines.. .
Cavium, Inc.
03/26/15
20150084846

Semiconductor device, liquid crystal display panel, and mobile information terminal


A semiconductor device includes a plurality of sets of external drive terminals in a marginal region along one long side of a rectangular semiconductor substrate, a plurality of sets of esd protection circuits arranged in the marginal region and coupled to corresponding sets of the drive terminals, and a plurality of output circuits coupled to corresponding sets of the drive terminals. Each set of drive terminals in a plurality of n columns along a y direction is laid out in a staggered arrangement with drive terminals in adjacent columns shifted relative to each other.
Renesas Electronics Corporation
03/26/15
20150084689

Semiconductor chip including a spare bump and stacked package having the same


A stacked package including: a semiconductor substrate, a circuit layer formed over the semiconductor substrate, a bump formed over the circuit layer, a spare bump formed correspondingly to the bump and over the circuit layer, and configured for replacing the bump with the spare bump, a through electrode configuring to pass through the semiconductor substrate on a same line as the bump and electrically coupled the bump or the spare bump in response to a selection signal, and a spare through electrode configured to pass through the semiconductor substrate on a same line as the spare bump and electrically coupled with the bump or the spare bump in response to a selection signal. When a bump has failed, a vertical input/output line of the semiconductor chips is established by a spare bump corresponding to the failed bump through the selective signal routing..
Sk Hynix Inc.
03/26/15
20150084193

Embedded on-chip security


Embodiments of the invention include a semiconductor structure containing a back end of line randomly patterned interconnect structure for implementing a physical unclonable function (puf), a method for forming the semiconductor device, and a circuit for enabling the interconnect structure to implement the physical unclonable function. The method includes forming a semiconductor substrate and a dielectric layer on the substrate.
International Business Machines Corporation
03/26/15
20150084160

Semiconductor device and manufacturing the same


A ferroelectric capacitor formed above a semiconductor substrate includes a lower electrode, a dielectric film (ferroelectric film) having ferroelectric characteristics, and an upper electrode. The upper electrode includes a conductive oxide film made of a ferroelectric material to which conductivity is provided by adding a conductive material such as ir, and the conductive oxide film is in contact with the dielectric film..
Fujitsu Semiconductor Limited
03/26/15
20150084158

Three dimensional circuit including shielded inductor and forming same


The three dimensional (3d) circuit includes a first tier including a semiconductor substrate, a second tier disposed adjacent to the first tier, a three dimensional inductor including an inductive element portion, the inductive element portion including a conductive via extending from the first tier to a dielectric layer of the second tier. The 3d circuit includes a ground shield surrounding at least a portion of the conductive via.
Taiwan Semiconductor Manufacturing Co., Ltd.
03/26/15
20150084155

Semiconductor device and fabricating the same


A method for fabricating a semiconductor device includes defining a curved active region by forming a plurality of trenches over a semiconductor substrate, forming an insulating layer to fill the plurality of trenches, and forming a pair of gate lines crossing the curved active region, so that it is possible to prevent leaning of an active region by forming a curved active region.. .
Sk Hynix Inc.
03/26/15
20150084154

Methods and esd structures


Methods and apparatus for esd structures. A semiconductor device includes a first active area containing an esd cell coupled to a first terminal and disposed in a well; a second active area in the semiconductor substrate, the second active area comprising a first diffusion of the first conductivity type for making a bulk contact to the well; and a third active area in the semiconductor substrate, separated from the first and second active areas by another isolation region, a portion of the third active area comprising an implant diffusion of the first conductivity type within a first diffusion of the second conductivity type and adjacent a boundary with the well of the first conductivity type; wherein the third active area comprises a diode coupled to the terminal and reverse biased with respect to the well of the first conductivity type..
Taiwan Semiconductor Manufacturing Company, Ltd.
03/26/15
20150084149

Radiation detector and radiation detection apparatus


A radiation detector according to an embodiment includes: a semiconductor substrate; a light detecting unit provided on a side of a first surface of the semiconductor substrate; a first insulating film provided covering the light detecting unit; a second insulating film covering the first insulating film; a scintillator provided on the second insulating film; an interconnection provided between the first and second insulating films, and connected to the light detecting unit; a first electrode connected to the interconnection through a bottom portion of the first opening; a second electrode provided on a region in the second surface of the semiconductor substrate, the region opposing at least a part of the light detecting unit; a second opening provided in a region surrounding the first electrode and not surrounding the second electrode; and an insulating resin layer covering the first and second electrodes and the first and second openings.. .
Kabushiki Kaisha Toshiba
03/26/15
20150084146

Backside illumination image sensor and image-capturing device


A backside illumination image sensor that includes a semiconductor substrate with a plurality of photoelectric conversion elements and a read circuit formed on a front surface side of the semiconductor substrate, and captures an image by outputting, via the read circuit, electrical signals generated as incident light having reached a back surface side of the semiconductor substrate is received at the photoelectric conversion elements includes: a light shielding film formed on a side where incident light enters the photoelectric conversion elements, with an opening formed therein in correspondence to each photoelectric conversion element; and an on-chip lens formed at a position set apart from the light shielding film by a predetermined distance in correspondence to each photoelectric conversion element. The light shielding film and an exit pupil plane of the image forming optical system achieve a conjugate relation to each other with regard to the on-chip lens..
Nikon Corporation
03/26/15
20150084145

Optical semiconductor element and manufacturing the same


A disclosed optical semiconductor element includes: a semiconductor substrate having a first main surface and a second main surface in which a plurality of first grooves are formed; a first optical waveguide defined by portions of the semiconductor substrate between the first grooves and having side faces defined by the first grooves; and a photoelectric converter configured to transmit or receive an optical signal propagating through the first optical waveguide. Moreover, the first grooves define part of a guide hole..
Fujitsu Limited
03/26/15
20150084144

Solid-state imaging device, manufacturing a solid-state imaging device, and electronic apparatus


Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern.
Sony Corporation
03/26/15
20150084141

Semiconductor device and manufacturing the same


According to one embodiment, a semiconductor device includes a mram chip including a semiconductor substrate and a memory cell array area includes magnetoresistive elements which are provided on the semiconductor substrate, and a magnetic shield layer surrounding the memory cell array area in a circumferential direction of the mram chip, and having a closed magnetic path.. .
Kabushiki Kaisha Toshiba
03/26/15
20150084138

Integrated circuit having varying substrate depth and forming same


A semiconductor device is formed such that a semiconductor substrate of the device has a non-uniform thickness. A cavity is etched at a selected side of the semiconductor substrate, and the selected side is then fusion bonded to another substrate, such as a carrier substrate.
Freescale Semiconductor, Inc.
03/26/15
20150084137

Mechanism for forming metal gate structure


Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a metal gate stack formed over the semiconductor substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.
03/26/15
20150084136

Mos p-n junction diode with enhanced response speed and manufacturing method thereof


A mos p-n junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a polysilicon oxide layer, a central conductive layer, ion implantation layer, a channel region, and a metallic sputtering layer. For manufacturing the mos p-n junction diode, a mask layer is formed on a semiconductor substrate.
Pfc Device Corp.
03/26/15
20150084128

Semiconductor-on-insulator (soi) structures with local heat dissipater(s) and methods


Disclosed are semiconductor-on-insulator (soi) structures comprising an soi device (e.g., an soi metal oxide semiconductor field effect transistor (mosfet)) with local heat dissipater(s). Each heat dissipater comprises an opening, which is adjacent an active region of the soi device, which extends through the insulator layer on which the soi device sits to the semiconductor substrate below, and which is at least partially filled with a fill material.
International Business Machines Corporation
03/26/15
20150084127

Semiconductor device and manufacturing the same


High integrity, lower power consuming semiconductor devices and methods for manufacturing the same. The semiconductor device includes: semiconductor substrate; a well region in the semiconductor substrate; an interlayer structure over the well region, the interlayer structure including a back gate conductor, semiconductor fins at both sides of the back gate conductor and respective back gate dielectric isolating the back gate conductor from the semiconductor fins, respectively, wherein the well region functions as one portion of a conductive path of the back gate conductor; a punch-through stop layer at a lower portion of the semiconductor fin; a front gate stack intersecting the semiconductor fin, the front gate stack including a front gate dielectric and a front gate conductor and the front gate dielectric isolating the front gate conductor from the semiconductor fin; and a source region and a drain region connected to a channel region provided by the semiconductor fin..
03/26/15
20150084126

Ldmos device with short channel and associated fabrication method


A method of fabricating an ldmos device includes: forming a gate of the ldmos device on a semiconductor substrate; performing tilt body implantation by implanting dopants of a first conductivity type in the semiconductor substrate using a mask, wherein the tilt body implantation is implanted at an angle from a vertical direction; performing zero tilt body implantation by implanting dopants of the first conductivity type using the same mask, wherein the zero tilt body implantation is implanted with zero tilt from the vertical direction, and wherein the tilt body implantation and the zero tilt body implantation are configured to form a body region of the ldmos device; and forming a source region and a drain contact region of the ldmos device, wherein the source region and the drain contact region are of a second conductivity type.. .
Monolithic Power Systems, Inc.
03/26/15
20150084124

Semiconductor device


A semiconductor device includes a semiconductor substrate having an element region and a termination region. The element region includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and first floating regions having the first conductivity type.
Denso Corporation
03/26/15
20150084122

Semiconductor device


A semiconductor device has an active region defined by a device isolation region arranged on a surface of a semiconductor substrate, a plurality of transistor pillars arranged along a first direction within the active region, and a first dummy pillar disposed in the device isolation region. The first dummy pillar is arranged on a line extending along the first direction from the transistor pillars.
Micron Technology, Inc.
03/26/15
20150084117

Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs)


A low voltage transient voltage suppressing (tvs) device supported on a semiconductor substrate supporting an epitaxial layer to form a bottom-source metal oxide semiconductor field effect transistor (bs-mosfet) that comprises a trench gate surrounded by a drain region encompassed in a body region disposed near a top surface of the semiconductor substrate. The drain region interfaces with the body region constituting a junction diode.
03/26/15
20150084114

Non-volatile memory devices including blocking insulation patterns with sub-layers having different energy band gaps


A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may be provided on the tunnel insulation layer.
03/26/15
20150084110

Flash memory and fabrication method thereof


A method is provided for forming a flash memory. The method includes providing a semiconductor substrate; and forming a first dielectric layer.
Semiconductor Manufacturing International (beijing) Corporation
03/26/15
20150084109

Semiconductor devices and methods of fabricating the same


A semiconductor device includes a lower insulating pattern on a semiconductor substrate, a lower gate pattern on the lower insulating pattern and formed of a doped polysilicon layer, a residual insulating pattern with an opening exposing a portion of a top surface of the lower gate pattern, an upper gate pattern on the residual insulating pattern, the upper gate pattern filling the opening, and a diffusion barrier pattern in contact with the portion of the top surface of the lower gate pattern and extending between the residual insulating pattern and the upper gate pattern.. .
Samsung Electronics Co., Ltd.
03/26/15
20150084106

Solid-state imaging device and manufacturing the device


A solid-state imaging device includes unit pixels formed on a semiconductor substrate. Each of the unit pixels includes a photoelectric converter, a floating diffusion, a pinning layer, and a pixel transistor.
Panasonic Intellectual Property Management Co., Ltd.
03/26/15
20150084101

Multi-fin finfets with merged-fin source/drains and replacement gates


A semiconductor structure including semiconductor fins, a gate over a middle portion of the semiconductor fins, and faceted semiconductor regions outside of the gate separated from gaps may be formed. The semiconductor structure may be formed by forming fins on a semiconductor substrate where each fin has a pair of sidewalls aligned parallel to the length of the fin, growing dummy semiconductor regions on the sidewalls of the fins, forming a sacrificial gate that covers a center portion of the fins and the dummy semiconductor regions, removing portions of the dummy semiconductor regions not covered by the sacrificial gate, and growing faceted semiconductor regions on the sidewalls of the portions of the fins not covered by the sacrificial gate.
International Business Machines Corporation
03/26/15
20150084100

Integrated circuit with co2 sensor, composition and manufacturing such an ic


Disclosed is an integrated circuit (100) comprising a semiconductor substrate (110) carrying a plurality of circuit elements (111); and a carbon dioxide sensor (120) over said semiconductor substrate, said sensor comprising a pair of electrodes (122, 124) laterally separated from each other; and a carbon dioxide (co2) permeable polymer matrix (128) at least partially covering the pair of electrodes, said matrix encapsulating a liquid (126) comprising an organic alcohol and an organic amidine or guanidine base. A composition for forming such a co2 sensor on the ic and a method of manufacturing such an ic are also disclosed..
Nxp B.v.
03/26/15
20150084058

Light emitting device grown on a silicon substrate


A method according embodiments of the invention includes growing a semiconductor structure on a substrate including silicon. The semiconductor substrate includes an aluminum-containing layer in direct contact with the substrate, and a iii-nitride light emitting layer disposed between an n-type region and a p-type region.
Koninklijke Philips N.v.
03/26/15
20150083217

Conductive paste composition and semiconductor devices made therefrom


A conductive paste composition contains a source of an electrically conductive metal, a lead-tellurium-based oxide, a discrete oxide of an adhesion promoting element, and an organic vehicle. An article such as a high-efficiency photovoltaic cell is formed by a process of deposition of the paste composition on a semiconductor substrate (e.g., by screen printing) and firing the paste to remove the organic vehicle and sinter the metal and lead-tellurium-based oxide..
E I Du Pont De Nemours And Company
03/26/15
20150083214

Solar cell


A solar cell includes a semiconductor substrate of first conductivity type, including first and second principal surfaces; a region of the first conductivity type, including a semiconductor layer structure of the first conductivity type provided on the first principal surface; and a region of an second conductivity type, including a semiconductor layer structure of the second conductivity type provided on the first principal surface. The semiconductor layer structure of the first conductivity type is formed extending into the region of the second conductivity type.
Sanyo Electric Co., Ltd.
03/26/15
20150083183

Solar cell, manufacturing solar cell, and solar cell module


A solar cell includes: a semiconductor substrate of a first conductivity type that includes an impurity diffusion layer, in which an impurity element of a second conductivity type is diffused, on one surface side; a passivation film that is formed on the impurity diffusion layer and that is made of an oxide film of a material of the semiconductor substrate; an anti-reflective film that is made of a translucent material having a refractive index different from that of the oxide film and that is formed on the passivation film; a light-receiving-surface-side electrode that is electrically connected to the impurity diffusion layer and that is formed on one surface side of the semiconductor substrate; and a rear-surface-side electrode that is formed on another surface side of the semiconductor substrate.. .
Mitsubishi Electric Corporation
03/19/15
20150079803

Method of forming strain-relaxed buffer layers


Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top.
Applied Materials, Inc.
03/19/15
20150079789

Abrasive composition and producing semiconductor substrate


The polishing composition has a ph of 7 or more and is used in applications for polishing a silicon substrate. The polishing composition contains abrasive grains and a water-soluble polymer.
Fujimi Incorporated
03/19/15
20150079781

Silicon carbide semiconductor device and manufacturing the same


In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of single crystal silicon carbide is prepared. At a portion of the semiconductor substrate where a first electrode is to be formed, a metal thin film made of electrode material including an impurity is formed.
Denso Corporation
03/19/15
20150079778

Vertical semiconductor device and manufacturing the same


A vertical semiconductor device includes a first active pillar vertically protruded from a semiconductor substrate; a first vertical gate connected to at least one side of the first active pillar and formed along a direction that crosses a buried bit line; and a first body line connected to at least one side of the first active pillar which is not connected to the first vertical gate.. .
Sk Hynix Inc.
03/19/15
20150079773

Conformal doping for finfet devices


A conformal doping process for finfet devices on a semiconductor substrate which includes nfet fins and pfet fins. In a first exemplary embodiment, an n-type dopant composition is conformally deposited over the nfet fins and the pfet fins.
International Business Machines Corporation
03/19/15
20150079771

Method for manufacturing a semiconductor structure


The present disclosure provides a method for manufacturing a semiconductor structure. The method includes several operations as follows.
Taiwan Semiconductor Manufacturing Company Ltd.
03/19/15
20150079767

Semiconductor device having buried bit lines and fabricating the same


A semiconductor device includes semiconductor bodies formed substantially perpendicular to a semiconductor substrate, buried bit lines formed in the semiconductor bodies and including a metal silicide; and barrier layers formed under and over the buried bit lines and containing germanium.. .
Sk Hynix Inc.
03/19/15
20150079766

Optimized fabricating patterns of iii-v semiconductor material on a semiconductor substrate


With r being determined to be greater than tan(θ).. .
03/19/15
20150079756

Semiconductor device and fabrication method thereof


The semiconductor device fabrication method of the present invention includes: laminating a plurality of amorphous silicon films on a semiconductor substrate, forming through-holes that pass through the plurality of amorphous silicon films, and subjecting the plurality of amorphous silicon films 301 that include the through-holes to an etching process that uses an alkaline aqueous solution; wherein the plurality of amorphous silicon films is formed to include a first amorphous silicon film and a second amorphous silicon film in which the rate of etching by using the alkaline aqueous solution is slower than that of the first amorphous silicon film and the first amorphous silicon film is interposed between the semiconductor substrate and the second amorphous silicon film.. .
Micron Technology, Inc
03/19/15
20150079745

Method of manufacturing a semiconductor device


The generation of a variation in properties of vertical transistors is restrained. A vertical mos transistor is formed in a semiconductor substrate.
Renesas Electronics Corporation
03/19/15
20150079739

Method for manufacturing semiconductor substrate


A method for manufacturing a semiconductor substrate includes following steps. A wafer having a front side and a back side is provided.
United Microelectronics Corp.
03/19/15
20150079706

On-chip plasma charging sensor


A device for monitoring charging effects includes a semiconductor substrate having a surface region. The device also includes first, second, and third doped regions spaced apart in the semiconductor substrate and a dielectric layer overlying the surface region.
Semiconductor Manufacturing International (shanghai) Corporation
03/19/15
20150078416

Differential acoustic time of flight measurement of temperature of semiconductor substrates


Disclosed is a method and apparatus for measuring semiconductor substrate temperature using a differential acoustic time of flight measurement technique. The measurement is based on measuring the time of flight of acoustic (ultrasonic) waves across the substrate, and calculating a substrate temperature from the measured time of flight and the known temperature dependence of the speed of sound for the substrate material.
Tokyo Electron Limited
03/19/15
20150077602

Image sensor and image capturing apparatus


An image sensor comprises a first semiconductor substrate on which a plurality of photoelectric conversion elements are arranged, a second semiconductor substrate on which a plurality of storage devices each for storing pixel signals are arranged; and a plurality of connection units configured to electrically connect the photodiodes and the storage devices, wherein the plurality of storage devices are arranged in correspondence with the plurality of photoelectric conversion elements.. .
Canon Kabushiki Kaisha
03/19/15
20150077086

Fin width measurement using quantum well structure


A method for accurately electrically measuring a width of a fin of a finfet, using a semiconductor fin quantum well structure is provided. The semiconductor fin quantum well structure includes a semiconductor substrate and at least one semiconductor fin coupled to the substrate.
Globalfoundries Inc
03/19/15
20150076702

Semiconductor device and manufacturing the same


A semiconductor device including a semiconductor substrate having a hook-up region; wirings extending in a first direction above the semiconductor substrate and being aligned with a first spacing between one another, every two wirings forming pairs of wirings, each pair having a first portion being bent in a second direction different from the first direction in the hook-up region, the wirings of each pair being spaced from one another by a first spacing, the pairs being spaced from one another by a second spacing greater than the first spacing; and fringe patterns each being formed on a first side of each of the wirings of each of the pairs, the first side facing the second spacing.. .
Kabushiki Kaisha Toshiba
03/19/15
20150076701

Semiconductor device


Certain embodiments provide a semiconductor device including a semiconductor substrate, a side wall portion, a cap substrate, a plurality of external connection terminals, and a ground conductor. The semiconductor substrate includes a semiconductor element on its front surface.
Kabushiki Kaisha Toshiba
03/19/15
20150076694

Interposer structure and manufacturing method thereof


An interposer structure including a semiconductor substrate, a plurality of shallow trenches, a plurality of deep trenches and a plurality of metal damascene structures is provided. The semiconductor substrate has a first surface and a second surface opposite to each other.
United Microelectronics Corporation
03/19/15
20150076667

Semiconductor substrate including a cooling channel and forming a semiconductor substrate including a cooling channel


A semiconductor substrate for use in an integrated circuit, the semiconductor substrate including a channel defined on a surface of the substrate. The channel includes a first wall, a second wall, and a third wall.
Hamilton Sundstrand Corporation
03/19/15
20150076660

Semiconductor structure and manufacturing method thereof


A semiconductor structure includes a semiconductor substrate, a first doped region, a second doped region and a dielectric. The first doped region and the second doped region respectively has an aspect ratio and a dopant concentration uniformity along a depth in the semiconductor substrate.
Taiwan Semiconductor Manufacturing Company Ltd.
03/19/15
20150076650

Semiconductor device and a forming a semiconductor device


A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first doping region arranged at a main surface of the semiconductor substrate, an emitter layer arranged at a back side surface of the semiconductor substrate, at least one first conductivity type area separated from the first doping region by a second doping region of the semiconductor substrate and at least one temperature-stabilizing resistance area.
Infineon Technologies Ag
03/19/15
20150076646

Semiconductor device and manufacturing method thereof


A backside illumination semiconductor image sensing device includes a semiconductor substrate. The semiconductor substrate includes a radiation sensitive diode and a peripheral region.
Taiwan Semiconductor Manufacturing Company Ltd.
03/19/15
20150076642

Photodetection device and sensor package


A photodetection device of the present invention includes a semiconductor substrate which is defined such that a first light-receiving portion and a second light-receiving portion are spaced from one another, and an optical filter which is formed on the semiconductor substrate, and includes a first filter which is disposed so as to cover the first light-receiving portion, to selectively allow an optic element in a first wavelength band to transmit through, and a second filter which is disposed so as to cover the second light-receiving portion, to selectively allow an optic element in a second wavelength band different from the first wavelength band, to transmit through, and the optical filter has a filter laminated structure which is defined such that edge portions of the first filter and the second filter overlap one another on a boundary region between the first light-receiving portion and the second light-receiving portion.. .
Rohm Co., Ltd.
03/19/15
20150076622

Reducing gate expansion after source and drain implant in gate last process


A semiconductor structure includes a semiconductor substrate, an active region and a dummy gate structure disposed over the active region. A sacrificial conformal layer, including a bottom oxide layer and a top nitride layer are provided over the dummy gate structure and active region to protect the dummy gate during source and drain implantation.
Globalfoundries Inc.
03/19/15
20150076617

Methods of forming patterns of a semiconductor device


Methods of forming patterns of a semiconductor device are provided. The methods may include forming a hard mask film on a semiconductor substrate.
Samsung Electronics Co., Ltd.
03/19/15
20150076612

Semiconductor device


The semiconductor device includes a bit line, a word line intersecting the bit line, a plurality of first contact patterns, and a plurality of second contact patterns. The word line extends so as to intersect the bit line in plan view.
Renesas Electronics Corporation
03/19/15
20150076603

Semiconductor structure and manufacturing the same


The present invention provides a semiconductor structure comprising: a semiconductor base located on an insulating layer, wherein the insulating layer is located on a semiconductor substrate; source/drain regions, which are in contact with first sidewalls of the semiconductor base opposite to each other; gates located on second sidewalls of the semiconductor base opposite to each other; an insulating via located on the insulating layer and embedded into the semiconductor base; and an epitaxial layer sandwiched between the insulating via and the semiconductor base. The present invention further provides a method for manufacturing a semiconductor structure comprising: forming an insulating layer on a semiconductor substrate; forming a semiconductor base on the insulating layer; forming a void within the semiconductor base, wherein the void exposes the semiconductor substrate; forming an epitaxial layer in the void through selective epitaxy; and forming an insulating via within the void.
Institute Of Microelectronics, Chinese Academy Of Sciences
03/19/15
20150076590

Semiconductor device, integrated circuit and manufacturing a semiconductor device


A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region.
Infineon Technologies Ag
03/19/15
20150076587

Nonvolatile memory devices having a three dimensional structure


Provided is a nonvolatile memory device having a three dimensional structure. The nonvolatile memory device may include cell arrays having a plurality of conductive patterns having a line shape three dimensionally arranged on a semiconductor substrate, the cell arrays being separated from one another; semiconductor patterns extending from the semiconductor substrate to cross sidewalls of the conductive patterns; common source regions provided in the semiconductor substrate under a lower portion of the semiconductor patterns in a direction in which the conductive patterns extend; a first impurity region provided in the semiconductor substrate so that the first impurity region extends in a direction crossing the conductive patterns to electrically connect the common source regions; and a first contact hole exposing a portion of the first impurity region between the separated cell arrays..
03/19/15
20150076574

Solid-state imaging device and manufacturing method therefor


A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (fd), and a transferring transistor are provided.
Canon Kabushiki Kaisha
03/19/15
20150076572

Semiconductor device


A semiconductor device includes a semiconductor substrate, a plurality of photoelectric conversion elements arranged on the semiconductor substrate to collectively form an image sensor, a plurality of trenches each formed between the photoelectric conversion elements adjacent to each other, and a plurality of impurity diffusion layers each provided at a bottom of the trench at a position deeper than a p-n junction of the photoelectric conversion element.. .
Ricoh Company, Ltd.
03/19/15
20150076555

Semiconductor devices and fabrication methods thereof


A semiconductor device is provided. The semiconductor device includes a semiconductor substrate; and a body region and a drift region formed in the semiconductor substrate.
Semiconductor Manufacturing International (shanghai) Corporation
03/19/15
20150076520

Silicon carbide semiconductor element and fabrication method thereof


In a fabrication method of a silicon carbide semiconductor element including a drift layer playing a role of retaining a high withstand voltage on a front side of a semiconductor substrate of silicon carbide and including an ohmic electrode on a backside, dicing is added to form at least one dicing line in an element active region on a surface of the semiconductor substrate on a side opposite of the drift layer before forming the ohmic electrode on the backside of the semiconductor substrate. Thus, a silicon carbide semiconductor element and fabrication method thereof is provided such that even if the semiconductor substrate is made thinner to reduce the on-resistance, the strength of the substrate can be maintained and cracking of the wafer during wafer processing can be reduced..
National Institute Of Advanced Industrial Science And Technology
03/19/15
20150076512

Semiconductor substrate and forming


A method of forming a semiconductive substrate material for an electronic device including forming a plurality of semiconductive layers on a substrate during a continuous growth process in a reaction chamber, wherein during the continuous growth process, a release layer is formed between a base layer and an epitaxial layer by altering at least one growth process parameter during the continuous growth process. The method also including separating the plurality of semiconductive layers from the substrate..
Saint-gobain Cristaux Et Detecteurs
03/19/15
20150076484

Solid-state imaging device and manufacturing the same


A solid-state imaging device includes: a semiconductor substrate; a pixel unit formed on the semiconductor substrate; and a peripheral circuit unit formed on the semiconductor substrate, at a periphery of the pixel unit, in which the pixel unit includes: a photoelectric conversion film which converts incident light into charges; and a floating diffusion which holds the charges, the peripheral circuit unit includes a transistor including a gate electrode and two source and drain diffusion regions, and the two source and drain diffusion regions have a higher impurity concentration than an impurity concentration of the floating diffusion.. .
Panasonic Intellectual Property Management Co., Ltd.
03/19/15
20150076444

Semiconductor light emitting element and light emitting device including the same


A semiconductor light emitting element includes a semiconductor substrate including a first region of a first conductivity type. A first semiconductor layer of a second conductivity type is disposed on a first surface of the semiconductor substrate.
Kabushiki Kaisha Toshiba
03/19/15
20150076441

Variable resistance memory device and manufacturing the same


A variable resistance memory device and a method of manufacturing the same are provided. The variable resistance memory device includes a multi-layered insulating layer including a plurality of holes formed on a semiconductor substrate, a lower electrode formed in a bottom of each of the holes, a first spacer formed on the lower electrode and a sidewall of each of the holes, a second spacer formed on an upper sidewall of the first spacer, a third spacer formed on a lower sidewall of the first spacer below the second spacer, a variable resistance part that is formed on the lower electrode has a height lower than a height of a top of each hole, and an upper electrode formed on the variable resistance part to be buried in each hole..
Sk Hynix Inc.


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Semiconductor Substrate topics: Semiconductor Substrate, Semiconductor, Semiconductor Device, Gallium Nitride, Memory Cell, Phase Change Memory, Phase Change Material, Memory Device, Semiconductor Memory, Integrated Circuit, Transistors, Field Effect Transistor, Planarization, Conductive Layer, Semiconductor Devices

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