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Semiconductor Substrate

Semiconductor Substrate-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Method for fabricating a heterojunction schottky gate bipolar transistor
Texas A&m University System
January 11, 2018 - N°20180013032

Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure ...
Solar cell
Panasonic Intellectual Property Management Co., Ltd.
January 11, 2018 - N°20180013021

A solar cell includes: a semiconductor substrate formed of n-type crystalline silicon; a first stack formed of amorphous silicon in a first region on a first principle surface of the semiconductor substrate; a second stack formed of amorphous silicon in a second region different from the first region on the first principle surface; and a third stack formed of amorphous ...
Solar cell module and method for manufacturing the same
Lg Electronics Inc.
January 11, 2018 - N°20180013019

A method for manufacturing a solar cell module, the method includes a cell forming operation for forming a first solar cell and a second solar cell by, for each of the first and second solar cells, attaching a first auxiliary electrode and a second auxiliary electrode to a back surface of a semiconductor substrate on which a plurality of first ...
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Semiconductor devices and methods for forming semiconductor devices
Infineon Technologies Ag
January 11, 2018 - N°20180013013

A semiconductor device includes an anode doping region of a diode structure arranged in a semiconductor substrate. The anode doping region has a first conductivity type. The semiconductor device further includes a second conductivity type contact doping region having a second conductivity type. The second conductivity type contact doping region is arranged at a surface of the semiconductor substrate and ...
Semiconductor device and electronic apparatus
Fujitsu Limited
January 11, 2018 - N°20180012999

A semiconductor device includes a via and first and second transistors of the same channel type which are formed in a semiconductor substrate. The first and second transistors are located in a first lateral direction of the via and have their channel direction that matches the first lateral direction. A first stress relaxation region is formed in the semiconductor substrate ...
Source and drain stressors with recessed top surfaces
Taiwan Semiconductor Manufacturing Company, Ltd.
January 11, 2018 - N°20180012997

An integrated circuit structure includes a gate stack over a semiconductor substrate, and a silicon germanium region extending into the semiconductor substrate and adjacent to the gate stack. The silicon germanium region has a top surface, with a center portion of the top surface recessed from edge portions of the top surface to form a recess. The edge portions are ...
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Resistive memory cell having a compact structure
Stmicroelectronics (rousset) Sas
January 11, 2018 - N°20180012935

The disclosure relates to a memory cell formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor, the memory cell comprising a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element, the gate being formed on ...
Semiconductor device and method of manufacturing the same
Renesas Electronics Corporation
January 11, 2018 - N°20180012901

An improvement is achieved in the reliability of a semiconductor device. In a memory cell region, a plurality of fins are provided which are portions of a semiconductor substrate extending in an x-direction along a main surface of the semiconductor substrate and spaced apart from each other in a y-direction orthogonal to the x-direction along the main surface of the ...
Semiconductor device
Renesas Electronics Corporation
January 11, 2018 - N°20180012891

A semiconductor device (1) according to an embodiment includes: a semiconductor substrate; a first well (15) formed on the semiconductor substrate; a second well (15) formed on the semiconductor substrate; first fins (11) formed in the first well; second fins (21) formed in the second well; and a first electrode (12a) connected to each of the first and second fins. The first well and the ...
Semiconductor device and manufacturing method thereof
Csmc Technologies Fab2 Co., Ltd.
January 11, 2018 - N°20180012890

A manufacturing method of a semiconductor device, comprising the following steps: providing a semiconductor substrate comprising a low-voltage device region and a high-voltage device region; forming first gate oxide layers in a non-gate region of the high-voltage device region and the low-voltage device region and a second gate oxide layer in a gate region of the high-voltage device region; the ...
Semiconductor structure and fabrication method thereof
Semiconductor Manufacturing International (beijing) Corporation
January 11, 2018 - N°20180012888

The present disclosure provides semiconductor structures and fabrication methods thereof. An exemplary fabrication method includes providing a plurality of fins on a semiconductor substrate; forming an anti-diffusion layer, containing anti-diffusion ions, in the fins; forming an anti-punch through layer, containing anti-punch through ions, in the fins, a top surface of the anti-punch through layer being below a top surface of ...
Soi wafers with buried dielectric layers to prevent cu diffusion
Globalfoundries Inc.
January 11, 2018 - N°20180012845

An soi semiconductor device includes a first wafer having an active semiconductor layer and a first oxide layer and a second wafer having a semiconductor substrate and a second oxide layer, the first oxide layer being bonded to the second oxide layer, and one of the first wafer and the second wafer includes a nitride layer. The nitride layer can ...
Semiconductor structures
Semiconductor Manufacturing International (shanghai) Corporation
January 11, 2018 - N°20180012842

A method is provided for fabricating a semiconductor structure. The method includes providing a semiconductor substrate; forming an initial metal layer; simultaneously forming a plurality of discrete first metal layers and openings by etching the initial metal layer; forming a plurality of sidewalls covering the side surface of the first metal layers; and forming a plurality of second metal layers ...
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Semiconductor Substrate Patent Applications
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Semiconductor structure with self-aligned wells and multiple channel materials
Globalfoudries Inc.
January 11, 2018 - N°20180012805

Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is disposed on a semiconductor substrate. A silicon region and silicon germanium region are disposed adjacent to each other on the strain relaxed buffer. An additional region of silicon or silicon germanium provides quantum well isolation.
Structure and formation method of semiconductor device structure
Taiwan Semiconductor Manufacturing Co., Ltd.
January 11, 2018 - N°20180012769

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure. The semiconductor device structure further includes a spacer element over a sidewall of the gate stack. The spacer element includes a ...
Tin oxide thin film spacers in semiconductor device manufacturing
Lam Research Corporation
January 11, 2018 - N°20180012759

Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e. G., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e. G., silicon or carbon). For example, 10-100 nm ...
Single ald cycle thickness control in multi-station substrate deposition systems
Lam Research Corporation
January 11, 2018 - N°20180010250

Disclosed are methods of depositing films of material on multiple semiconductor substrates in a multi-station processing chamber. The methods may include loading a first set of one or more substrates into the processing chamber at a first set of one or more process stations and depositing film material onto the first set of substrates by performing n cycles of film ...
Strain and pressure sensing device, microphone, method for manufacturing strain and pressure sensing device, and ...
Kabushiki Kaisha Toshiba
January 11, 2018 - N°20180009656

According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with ...
Thermal print head
Rohm Co., Ltd.
January 11, 2018 - N°20180009232

A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the ...
Solid-state imaging device and manufacturing method therefor
Canon Kabushiki Kaisha
January 04, 2018 - N°20180007300

A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (fd), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second ...
Self biased dual mode differential cmos tia for 400g fiber optic links
Inphi Corporation
January 04, 2018 - N°20180006617

A transimpedance amplifier (tia) device. The device includes a photodiode coupled to a differential tia with a first and second tia, which is followed by a level shifting/differential amplifier (ls/da). The photodiode is coupled between a first and a second input terminal of the first and second tias, respectively. The ls/da can be coupled to a first ...
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