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Semiconductor Material patents

      

This page is updated frequently with new Semiconductor Material-related patent applications.




 Electrode for photobattery patent thumbnailnew patent Electrode for photobattery
An electrode comprising an electrode material of the same type as electrode materials used in li-ion batteries and a dye is provided. The electrode may further comprise a semiconductor material.
Hydro-quÉbec


 Composition of, and  forming, a semiconductor structure with multiple insulator coatings patent thumbnailnew patent Composition of, and forming, a semiconductor structure with multiple insulator coatings
A semiconductor structure includes a nanocrystalline core comprising a first semiconductor material, and at least one nanocrystalline shell comprising a second, different, semiconductor material that at least partially surrounds the nanocrystalline core. The nanocrystalline core and the nanocrystalline shell(s) form a quantum dot.
Pacific Light Technologies Corp.


 Quantum dot image sensor patent thumbnailnew patent Quantum dot image sensor
A photodetector includes a first doped region disposed in a semiconductor material and a second doped region disposed in the semiconductor material. The second doped region is electrically coupled to the first doped region, and the second doped region is of an opposite majority charge carrier type as the first doped region.
Omnivision Technologies, Inc.


 Semiconductor device and  fabricating the same patent thumbnailnew patent Semiconductor device and fabricating the same
A semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer by implanting or doping an element semiconductor material into an interlayer insulating layer may be provided. The semiconductor device may include a gate spacer on a substrate, the gate spacer defining a trench, a gate electrode filling the trench, and an interlayer insulating layer on the substrate, which surrounds the gate spacer, and at least a portion of which includes germanium..
Samsung Electronics Co., Ltd.


 Optimized buffer layer for high mobility field-effect transistor patent thumbnailnew patent Optimized buffer layer for high mobility field-effect transistor
A stack along a z-axis for a high-electron-mobility field-effect transistor, comprises: a buffer layer comprising a first semiconductor material comprising a binary, ternary or quaternary nitride compound having a first bandgap, a barrier layer comprising a second semiconductor material comprising a binary, ternary or quaternary nitride compound and having a second bandgap, the second bandgap wider than the first bandgap, a heterojunction between the buffer and barrier layers and, a two-dimensional electron gas located in an xy plane perpendicular to the z-axis and in the vicinity of the heterojunction wherein: the buffer layer comprises a zone comprising fixed negative charges of density per unit volume higher than or equal to 1017 cm−3, the zone having a thickness smaller than or equal to 200 nm, the product of multiplication of the density per unit volume of fixed negative charges by the thickness of the zone between 1012 cm−2 and 3.1013 cm−2.. .
Commissariat A L'energie Atomique Et Aux Energies Alternatives


 Expitaxially regrown heterostructure nanowire lateral tunnel field effect transistor patent thumbnailnew patent Expitaxially regrown heterostructure nanowire lateral tunnel field effect transistor
After forming a buried nanowire segment surrounded by a gate structure located on a substrate, an epitaxial source region is grown on a first end of the buried nanowire segment while covering a second end of the buried nanowire segment and the gate structure followed by growing an epitaxial drain region on the second end of the buried nanowire segment while covering the epitaxial source region and the gate structure. The epitaxial source region includes a first semiconductor material and dopants of a first conductivity type, while the epitaxial drain region includes a first semiconductor material different from the first semiconductor material and dopants of a second conductivity type opposite the first conductivity type..
Globalfoundries Inc.


 Semiconductor integrated circuit device capable of reducing a leakage current patent thumbnailnew patent Semiconductor integrated circuit device capable of reducing a leakage current
A semiconductor integrated circuit device may include a semiconductor substrate, a source pattern, a drain pattern, a nano wire pattern and a gate. The source pattern may be formed on an upper surface of the semiconductor substrate.
Sk Hynix Inc.


 Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices patent thumbnailnew patent Methods for manufacturing ultrathin semiconductor channel three-dimensional memory devices
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack to the substrate.
Sandisk Technologies Inc.


 Ultrathin semiconductor channel three-dimensional memory devices patent thumbnailnew patent Ultrathin semiconductor channel three-dimensional memory devices
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack to the substrate.
Sandisk Technologies Inc.


 Method of manufacturing a semiconductor device having reduced on-state resistance and structure patent thumbnailnew patent Method of manufacturing a semiconductor device having reduced on-state resistance and structure
A semiconductor device includes a singulated region of semiconductor material having a first major surface and a second major surface opposite to the first major surface. In one embodiment, the second major surface includes a recessed surface portion bounded by opposing sidewall portions extending outward from the region of semiconductor material in cross-sectional view.
Semiconductor Components Industries, Llc


new patent

Methods for forming semiconductor devices

A method for forming a semiconductor device includes etching, in a masked etching process, through a layer stack located on a surface of a semiconductor substrate to expose the semiconductor substrate at unmasked regions of the layer stack. The method further includes etching, in a selective etching process, at least a first layer of the layer stack located adjacently to the semiconductor substrate.
Infineon Technologies Austria Ag

Semiconductor laser light source and fabrication method

A semiconductor laser light source includes a semiconductor substrate formed of a first conductivity type semiconductor material, a lower cladding layer formed of the first conductivity type semiconductor material on the semiconductor substrate, a waveguide layer on the lower cladding layer, and an upper cladding layer formed of a second conductivity type semiconductor material on the waveguide layer. The waveguide layer includes a core area and rib areas thinner than the core area on either side of the core area.
Fujitsu Limited

Optically-activated array utilizing photonic integrated circuits (pics)

A photonic integrated circuit. The photonic integrated circuit includes: a plurality of antenna elements, an element of the plurality of antenna elements having an electrical port and including: a first laser configured to produce laser light of a first wavelength; and a first radiative patch conditionally connected to the electrical port and connected, by an optical connection, to the laser, the first radiative patch including, as a major component, a semiconductor material configured to be conductive when illuminated by light having the first wavelength, and to be nonconductive when not illuminated, the first radiative patch being configured, when conductive, to convert an electric signal received at the electrical port to radiated electromagnetic waves, or to convert received electromagnetic waves to an electrical signal at the electrical port..
Raytheon Company

Light emitting devices with built-in chromaticity conversion and methods of manufacturing

Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission.
Micron Technology, Inc.

Ion implantation and annealing for thin-film crystalline solar cells

A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon.
Solexel, Inc.

Decoupling finfet capacitors

A semiconductor device including field-effect transistors (finfets) and fin capacitors are formed on a silicon substrate. The fin capacitors include silicon fins, one or more electrical conductors between the silicon fins, and insulating material between the silicon fins and the one or more electrical conductors.
Taiwan Semiconductor Manufacturing Company, Ltd.

Semiconductor device including dual-layer source/drain region

A semiconductor device includes a semiconductor substrate having a channel region interposed between a first active region and a second active region, and a gate structure formed on the channel region. A first dual-layer source/drain region is on the first active region and a second dual-layer source/drain region is on the second active region.
International Business Machines Corporation

Finfet semiconductor device with germanium diffusion over silicon fins

A method for manufacturing a semiconductor device is described that comprises providing a substrate, forming a plurality of fins having a first semiconductor material, replacing a first portion of at least one of the fins with a second semiconductor material, and distributing the second semiconductor material from the first portion to a second portion of the at least one of the fins.. .
Taiwan Semiconductor Manufacturing Company, Ltd.

Semiconductor device including dual-layer source/drain region

A semiconductor device includes a semiconductor substrate having a channel region interposed between a first active region and a second active region, and a gate structure formed on the channel region. A first dual-layer source/drain region is on the first active region and a second dual-layer source/drain region is on the second active region.
International Business Machines Corporation

Integrated circuit with heterogeneous cmos integration of strained silicon germanium and group iii-v semiconductor materials and method to fabricate same

A structure includes an off-axis si substrate with an overlying s-si1-xgex layer and a box between the off-axis si substrate and the s-si1-xgex layer. The structure further includes pfet fins formed in the s-si1-xgex layer and a trench formed through the s-si1-xgex layer, the box and partially into the off-axis si substrate.
International Business Machines Corporation

Laser irradiation apparatus and laser irradiation method

A laser irradiation apparatus may include a plasma generator, a laser unit configured to output a pulsed laser light beam, and a controller. The plasma generator may be configured to supply an atmospheric pressure plasma containing a dopant to a predetermined region on a semiconductor material.
Gigaphoton Inc.

Microwave ac conductivity of domain walls

Microwave ac conductivity may be improved or tuned in a material, for example, a dielectric or semiconductor material, by manipulating domain wall morphology in the material. Domain walls may be created, erased or reconfigured to control the ac conductivity, for example, for crafting circuit elements.
Ut-battelle, Llc

Edge emitting semiconductor laser system

A laser system includes an edge emitting semiconductor laser, and an optical fiber, wherein the laser emits one or more laser beams coupled into the optical fiber and the laser includes a semiconductor body including a waveguide region that includes first and second waveguide layers and an active layer arranged between the first and second waveguide layers and generates laser radiation, the waveguide region is arranged between first and second cladding layers disposed downstream of the waveguide region, a phase structure is formed in the semiconductor body, includes a cutout extending from a top side of the semiconductor body into the second cladding layer, at least one first intermediate layer composed of a semiconductor material different from the material of the second cladding layer is embedded therein, and the cutout extends from the top side of the semiconductor body at least partly into the first intermediate layer.. .
Osram Opto Semiconductors Gmbh

Photovoltaic cell having a coupled expanded metal article

A method comprises providing an expanded metal article having a plurality of first segments intersecting a plurality of second segments thereby forming a plurality of openings. The expanded metal article has a surface comprising a plurality of solder pads.
Merlin Solar Technologies, Inc.

Solar cell

Disclosed is a solar cell including a semiconductor substrate including a semiconductor material, a tunneling layer disposed over one surface of the semiconductor substrate, a first conductive area and a second conductive area disposed over the tunneling layer and having opposite conductive types, and an electrode including a first electrode electrically connected to the first conductive area and a second electrode electrically connected to the second conductive area. At least one of the first conductive area and the second conductive area is configured as a metal compound layer..
Lg Electronics Inc.

Semiconductor device

A semiconductor device is provided. The semiconductor device can be manufactured with a reduced cost.
Rohm Co., Ltd.

Thin film transistor array substrate and liquid crystal display device including the same

A thin-film transistor (tft) array substrate includes a transistor disposed on a base substrate and a storage capacitor electrically connected to the transistor. The transistor includes a gate electrode, an active layer electrically insulated from the gate electrode, the active layer including a semiconductor material, and a first electrode and a second electrode disposed to be spaced apart from each other on the active layer.
Samsung Display Co., Ltd.

Layered structures on thin substrates

A thin substrate has a layered structure on one surface, and can also have a layered structure on the other. Each layered structure can include a part of at least one patterned layer that, if patterned by photolithography, would frequently result in damage to the substrate due to fragility.
Palo Alto Research Center Incorporated

Method and system for a low profile, low inductance power switching module

A method and system for a power module device is provided. The device includes a base, a circuit board including a plurality of gated switches formed of a semiconductor material, and an electrical bus member configured to connect to a voltage source having a first polarity.
General Electric Company

Semiconductor laser resonator and semiconductor laser device including the same

A semiconductor laser resonator configured to generate a laser beam includes a gain medium layer including a semiconductor material and comprising at least one protrusion formed by at least one trench to protrude in an upper portion of the gain medium layer. In the semiconductor laser resonator, the at least one protrusion is configured to confine the laser beam as a standing wave in the at least one protrusion..
Samsung Electronics Co., Ltd.

Asymmetric iii-v mosfet on silicon substrate

A semiconductor structure containing a high mobility semiconductor channel material, i.e., a iii-v semiconductor material, and asymmetrical source/drain regions located on the sidewalls of the high mobility semiconductor channel material is provided. The asymmetrical source/drain regions can aid in improving performance of the resultant device.
International Business Machines Corporation

Heterojunction field-effect transistor

A process for fabricating a heterojunction field-effect transistor including a semiconductor structure made up of superposed layers, including: providing on a substrate layer (1) a buffer layer (2), a channel layer (3) and a barrier layer (4), the layers being made of materials having hexagonal crystal structures of the ga(1-p-q)al(p)in(q)n type; forming an opening in a dielectric masking layer (5) deposited on the barrier layer; growing by high-temperature epitaxy a semiconductor material (6, 6′) having a hexagonal crystal structure, namely ga(1-x′-y′)al(x′)in(y′)n, doped with germanium, on a growth zone defined by the opening formed in the masking layer; and depositing a source or drain contact electrode (15, 16) on the material thus deposited by epitaxy, and a gate electrode (13) in a location outside of the growth zone.. .
Ommic

Semiconductor-on-insulator lateral heterojunction bipolar transistor having epitaxially grown intrinsic base and deposited extrinsic base

After forming a trench extending through an insulator layer and an underlying top semiconductor portion that is comprised of a first semiconductor material and a dopant of a first conductivity type to define an emitter and a collector on opposite sides of the trench in the top semiconductor portion, an intrinsic base comprising a second semiconductor material having a bandgap less than a bandgap of the first semiconductor material and a dopant of a second conductivity type opposite the first conductivity type is formed in a lower portion the trench by selective epitaxial growth. The intrinsic base protrudes above the top semiconductor portion and is laterally surrounded by entire top semiconductor portion and a portion of the insulator layer.
International Business Machines Corporation

Hemt having heavily doped n-type regions and process of forming the same

A hemt made of nitride semiconductor materials and a process of forming the same are disclosed, where the hemt has n-type regions beneath the source and drain electrodes with remarkably increased carrier concentration. The hemt provides the n-type regions made of at least one of epitaxially grown zno layer and mgzno layer each doped with at least aluminum and gallium with density higher than 1×1020 cm−3.
Sumitomo Electric Industries, Ltd.

Finfet structure and fabricating the same

A method comprises recessing a substrate to form a fin enclosed by an isolation region, wherein the substrate is formed of a first semiconductor material, recessing the fin to form a trench over a lower portion of the fin, growing a second semiconductor material in the trench to form a middle portion of the fin through a first epitaxial process, forming a first carbon doped layer over the lower portion through a second epitaxial process, growing the first semiconductor material over the first carbon doped layer to form an upper portion of the fin through a third epitaxial process, forming a first source/drain region through a fourth epitaxial process, wherein a second carbon doped layer is formed underlying the first source/drain region and applying a thermal oxidation process to the middle portion of the fin to form an oxide outer layer.. .
Taiwan Semiconductor Manufacturing Company, Ltd.

Stacked nanowire devices formed using lateral aspect ratio trapping

A method for manufacturing a semiconductor device comprises depositing alternating layers of a plurality of first dielectric layers and a plurality of second dielectric layers on a substrate in a stacked configuration, forming one or more first openings in the stacked configuration to a depth penetrating below an upper surface of a bottom second dielectric layer of the plurality of second dielectric layers, forming one or more second openings in the stacked configuration to a depth corresponding to an upper surface of the substrate or below an upper surface of the substrate, removing the plurality of second dielectric layers from the stacked configuration to form a plurality of gaps, and epitaxially growing a semiconductor material from a seed layer in the one or more second openings to fill the one or more first and second openings and the plurality of gaps, wherein defects caused by a lattice mismatch between the epitaxially grown semiconductor material and a material of the substrate are contained at a bottom portion of the one or more second openings.. .
International Business Machines Corporation

Diode-based devices and methods for making the same

In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.. .
Taiwan Semiconductor Manufacturing Company, Ltd.

Memory device containing cobalt silicide control gate electrodes and making thereof

An alternating stack of insulating layers and sacrificial material layers can be formed over a substrate. Memory stack structures and a backside trench are formed through the alternating stack.
Sandisk Technologies Inc.

High-k spacer for extension-free cmos devices with high mobility channel materials

A field effect transistor device includes a gate structure formed over a channel region in a semiconductor material. An inner spacer is formed on sidewalls of the gate structure and over an extension region of the semiconductor material.
International Business Machines Corporation

Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction

A semiconductor device that includes at least one germanium containing fin structure having a length along a <100> direction and a sidewall orientated along the (100) plane. The semiconductor device also includes at least one germanium free fin structure having a length along a <100> direction and a sidewall orientated along the (100) plane.
International Business Machines Corporation

Arrays of memory cells and methods of forming an array of memory cells

An array of memory cells includes buried access lines having conductively doped semiconductor material. Pillars extend elevationally outward of and are spaced along the buried access lines.
Micron Technology, Inc.

Semiconductor image sensor structure having metal-filled trench contact

An image sensor structure includes a region of semiconductor material having a first major surface and a second major surface. A pixel structure is within the region of semiconductor material and includes a plurality of doped regions and a plurality of conductive structures.
Semiconductor Components Industries, Llc

Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction

A semiconductor device that includes at least one germanium containing fin structure having a length along a <100> direction and a sidewall orientated along the (100) plane. The semiconductor device also includes at least one germanium free fin structure having a length along a <100> direction and a sidewall orientated along the (100) plane.
International Business Machines Corporation

Field effect transistor device spacers

A method for fabricating a field effect transistor device comprises forming a fin on a substrate, forming a first dummy gate stack and a second dummy gate stack over the fin, forming spacers adjacent to the fin, the first dummy gate stack, and the second dummy gate stack, etching to remove portions of the fin and form a first cavity partially defined by the spacers, depositing an insulator material in the first cavity, patterning a mask over the first dummy gate stack and portions of the fin, etching to remove exposed portions of the insulator material, and epitaxially growing a first semiconductor material on exposed portions of the fin.. .
Globalfoundries, Inc.

Integrated electronic device with transceiving antenna and magnetic interconnection

An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna..
Stmicroelectronics S.r.l.

Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface.
Stc.unm

Method for manufacturing a semiconductor material including a semi-polar iii-nitride layer

Forming (3) a two-dimensional iii-nitride layer on the layer of coalesced iii-nitride crystals.. .

Tritium direct conversion semiconductor device

A device for producing electricity. The device comprises an indium gallium phosphide semiconductor material comprising a plurality of indium gallium phosphide material layers each layer having different dopant concentrations and doped with either n-type dopants or p-type dopants, a first terminal on a first surface of the semiconductor material, a beta particle source proximate the first surface for emitting beta particles that penetrate into the semiconductor material, and a second terminal on a second surface of the semiconductor material; the semiconductor material for producing current between the first and second terminals responsive to the beta particles penetrating into the semiconductor material..
City Labs, Inc.

Programmable devices with current-facilitated migration and fabrication methods

Programmable devices and fabrication methods thereof are presented. The programmable devices include, for instance, a first electrode and a second electrode electrically connected by a link portion.
Globalfoundries Inc.

Semiconductor nanocrystal particles and devices including the same

A semiconductor nanocrystal particle including: a core including a first semiconductor material; and a shell disposed on the core, wherein the shell includes a second semiconductor material, wherein the shell is free of cadmium, wherein the shell has at least two branches and at least one valley portion connecting the at least two branches, and wherein the first semiconductor material is different from the second semiconductor material.. .
Samsung Electronics Co., Ltd.

Encapsulated device of semiconductor material with reduced sensitivity to thermo-mechanical stresses

An encapsulated device of semiconductor material wherein a chip of semiconductor material is fixed to a base element of a packaging body through at least one pillar element having elasticity and deformability greater than the chip, for example a young's modulus lower than 300 mpa. In one example, four pillar elements are fixed in proximity of the corners of a fixing surface of the chip and operate as uncoupling structure, which prevents transfer of stresses and deformations of the base element to the chip..
Stmicroelectronics S.r.l.



Semiconductor Material topics:
  • Semiconductor
  • Semiconductor Material
  • Semiconductor Device
  • Transistors
  • Surfactant
  • Electric Conversion
  • Transparent Conductive Oxide
  • Semiconductor Substrate
  • Heating Devices
  • Semiconductor Devices
  • Organic Electroluminescence
  • Buffer Layer
  • Integrated Circuit
  • Crystallin
  • Electronic Device


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    This listing is a sample listing of patent applications related to Semiconductor Material for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Semiconductor Material with additional patents listed. Browse our RSS directory or Search for other possible listings.


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