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Semiconductor Material patents



      
           
This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Micromechanical detection structure for a mems acoustic transducer and corresponding manufacturing process

Micromechanical detection structure for a mems acoustic transducer and corresponding manufacturing process

Through-vias for wiring layers of semiconductor devices

Through-vias for wiring layers of semiconductor devices

Through-vias for wiring layers of semiconductor devices

Electronic assembly for mounting on electronic board

Date/App# patent app List of recent Semiconductor Material-related patents
10/23/14
20140315374
 Selective epitaxial growth of semiconductor materials with reduced defects patent thumbnailSelective epitaxial growth of semiconductor materials with reduced defects
A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls.
10/23/14
20140314254
 Micromechanical detection structure for a mems acoustic transducer and corresponding manufacturing process patent thumbnailMicromechanical detection structure for a mems acoustic transducer and corresponding manufacturing process
A micromechanical structure for a mems capacitive acoustic transducer, has: a substrate made of semiconductor material, having a front surface lying in a horizontal plane; a membrane, coupled to the substrate and designed to undergo deformation in the presence of incident acoustic-pressure waves; a fixed electrode, which is rigid with respect to the acoustic-pressure waves and is coupled to the substrate by means of an anchorage structure, in a suspended position facing the membrane to form a detection capacitor. The anchorage structure has at least one pillar element, which is at least in part distinct from the fixed electrode and supports the fixed electrode in a position parallel to the horizontal plane..
10/23/14
20140312502
 Through-vias for wiring layers of semiconductor devices patent thumbnailThrough-vias for wiring layers of semiconductor devices
Through-via structures and methods of their formation are disclosed. In one such method, a first etch through at least a first dielectric material of a wiring layer is performed such that a first hole outlining a collar structure for the through-via is formed.
10/23/14
20140312484
 Electronic assembly for mounting on electronic board patent thumbnailElectronic assembly for mounting on electronic board
An embodiment of an electronic assembly for mounting on an electronic board includes a plurality of electric contact regions exposed on a mounting surface of the electronic board. The electronic assembly includes a chip of semiconductor material in which at least one electronic component is integrated, at least one support element including a first main surface and a second main surface opposite to the first main surface, the chip being enclosed by the at least one support element, a heat dissipation plate thermally coupled to said chip to dissipate the heat produced by it, exposed on the first main surface of the support element, a plurality of contact elements, each electrically coupled to a respective electric terminal of the electronic component integrated in the chip, exposed on the same first main surface of which is exposed to the dissipation plate.
10/23/14
20140312463
 Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain patent thumbnailSemiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain
Methods of fabricating semiconductor devices or structures include forming structures of a semiconductor material overlying a layer of a compliant material, subsequently changing the viscosity of the compliant material to relax the semiconductor material structures, and utilizing the relaxed semiconductor material structures as a seed layer in forming a continuous layer of relaxed semiconductor material. In some embodiments, the layer of semiconductor material may comprise a iii-v type semiconductor material, such as, for example, indium gallium nitride.
10/23/14
20140312420
 Finfet devices containing merged epitaxial fin-containing contact regions patent thumbnailFinfet devices containing merged epitaxial fin-containing contact regions
A plurality of semiconductor fins are formed which extend from a semiconductor material portion that is present atop an insulator layer of a semiconductor-on-insulator substrate. A gate structure and adjacent gate spacers are formed that straddle each semiconductor fin.
10/23/14
20140312419
 Finfet devices containing merged epitaxial fin-containing contact regions patent thumbnailFinfet devices containing merged epitaxial fin-containing contact regions
A plurality of semiconductor fins are formed which extend from a semiconductor material portion that is present atop an insulator layer of a semiconductor-on-insulator substrate. A gate structure and adjacent gate spacers are formed that straddle each semiconductor fin.
10/23/14
20140312346
 Semiconductor device and manufacturing method thereof patent thumbnailSemiconductor device and manufacturing method thereof
An object is to provide a semiconductor device with a novel structure. A semiconductor device includes a first transistor, which includes a channel formation region provided in a substrate including a semiconductor material, impurity regions, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode, and a second transistor, which includes an oxide semiconductor layer over the substrate including the semiconductor material, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode.
10/23/14
20140312317
 Organic semiconductor material and thin-film transistor patent thumbnailOrganic semiconductor material and thin-film transistor
Wherein r and s each independently represent a positive integer of 1 to 20; n represents a positive integer of 2 to 10000; x1, x2 and x3 each independently represent o, s, se, te, nr, rcr, rsir, rger or rsnr; y1 and y2 each independently represent h, f, cl, cf3, haloalkyl, cn, r, or, sr, coor or cor; and z1, z2, z3 and z4 each independently represent h, f, cl, cf3, haloalkyl, cn, r, or, sr, coor or cor, wherein r represents alkyl group.. .
10/23/14
20140312300
 Semiconductor nanocrystals and compositions and devices including same patent thumbnailSemiconductor nanocrystals and compositions and devices including same
A semiconductor nanocrystal including a core comprising a first semiconductor material comprising at least three chemical elements and a shell disposed over at least a portion of the core, the shell comprising a second semiconductor material, wherein the semiconductor nanocrystal is capable of emitting light with an improved photoluminescence quantum efficiency. Also disclosed are populations of semiconductor nanocrystals, compositions and devices including a semiconductor nanocrystal capable of emitting light with an improved photoluminescence quantum efficiency.
10/23/14
20140312239
Microelectronic displacement damage dose detector
A device is described that includes sensors that are sensitive to displacement damage, and can be configured to display a characteristic damage curve. The sensors, or diodes, can be made of one or more semiconductor materials that are sensitive to displacement damage, and can be operated in dark illumination conditions.
10/16/14
20140308793
Varactor diode, electrical device and method for manufacturing same
An electrical device includes a semiconductor material. The semiconductor material includes a first region of the semiconductor material having a first conductivity type, a second region of the semiconductor material having a second conductivity type complementary to the first conductivity type and an intermediate region of the semiconductor material between the first region and the second region.
10/16/14
20140308790
Methods for manufacturing devices with source/drain structures
In a method, a gate structure is formed over a substrate, and source/drain (s/d) features are formed in the substrate and interposed by the gate structure. At least one of the s/d features is formed by forming a first semiconductor material including physically discontinuous portions, forming a second semiconductor material over the first semiconductor material, and forming a third semiconductor material over the second semiconductor material.
10/16/14
20140308782
Self-limiting selective epitaxy process for preventing merger of semiconductor fins
A self-limiting selective epitaxy process can be employed on a plurality of semiconductor fins such that the sizes of raised active semiconductor regions formed by the selective epitaxy process are limited to dimensions determined by the sizes of the semiconductor fins. Specifically, the self-limiting selective epitaxy process limits growth of the semiconductor material along directions that are perpendicular to crystallographic facets formed during the selective epitaxy process.
10/16/14
20140307511
Non-volatile memory cell with self aligned floating and erase gates, and method of making same
A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends substantially along a sidewall of the trench and a second portion that extends substantially along the surface of the substrate.
10/16/14
20140306327
Semiconductor device and method of manufacturing thereof
A semiconductor device includes a device carrier and a semiconductor chip attached to the device carrier. Further, the semiconductor device includes a lid having a recess.
10/16/14
20140306323
Semiconductor constructions
Some embodiments include semiconductor constructions having semiconductor material patterned into two mesas spaced from one another by at least one dummy projection. The dummy projection has a width along a cross-section of x and the mesas have widths along the cross-section of at least 3x.
10/16/14
20140306320
Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters
Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and subsequently changing the temperature of the layer of semiconductor material. The another material may be selected to exhibit a coefficient of thermal expansion such that, as the temperature of the layer of semiconductor material is changed, a controlled and/or selected lattice parameter is imparted to or retained in the layer of semiconductor material.
10/09/14
20140303043
Reversible reaction sensors and assemblies
A reversible reaction sensor provides for detecting medical, biologic or explosive airborne compounds. The sensor may be formed in semiconductor material and is activated by radiation from sources to provide sensing of particular airborne compounds optically detectable by detectors, and reversed by other radiation from a source (or removal of activating radiation) to take away such airborne compounds from the sensor.
10/09/14
20140302658
Transistor with improved sigma-shaped embedded stressor and method of formation
A method and structure of an embedded stressor in a semiconductor transistor device having a sigma-shaped channel sidewall and a vertical isolation sidewall. The embedded stressor structure is made by a first etch to form a recess in a substrate having a gate and first and second spacers.
10/09/14
20140302653
Finlike structures and methods of making same
Semiconductor materials, particularly iii-v materials used to form, e.g., a finlike structure can suffer structural damage during chemical mechanical polishing steps. This damage can be reduced or eliminated by oxidizing the damaged surface of the material and then etching away the oxidized material.
10/09/14
20140302650
Charge storage apparatus and methods
Methods of forming multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, an opening is formed in a tier of semiconductor material and a tier of dielectric.
10/09/14
20140302649
Semiconductor field-effect transistor, memory cell and memory device
Semiconductor device formed by a first conductive strip of semiconductor material; a control gate region of semiconductor material, facing a channel portion of the first conductive strip, and an insulation region arranged between the first conductive strip and the control gate region. The first conductive strip includes a conduction line having a first conductivity type and a control line having a second conductivity type, arranged adjacent and in electrical contact with each other, and the conduction line forms the channel portion, a first conduction portion and a second conduction portion arranged on opposite sides of the channel portion..
10/09/14
20140301126
Memory arrays and methods of forming electrical contacts
Some embodiments include methods of forming electrical contacts. A row of semiconductor material projections may be formed, with the semiconductor material projections containing repeating components of an array, and with a terminal semiconductor projection of the row comprising a contact location.
10/09/14
20140299968
Semiconductor devices and fabrication methods
A method of making a semiconductor device comprises : providing a semiconductor wafer having a semiconductor layer; forming a first mask layer over the semiconductor layer; forming a second mask layer over the first mask layer; annealing the second mask layer to form islands; etching through the first mask layer and the semiconductor layer using the islands as a mask to form an array of pillars; and growing semiconductor material between the pillars and then over the tops of the pillars.. .
10/09/14
20140299885
Substrate structures and semiconductor devices employing the same
A substrate structure includes a substrate, a nucleation layer on the substrate and including a group iii-v compound semiconductor material having a lattice constant that is different from that of the substrate by less than 1%, and a buffer layer on the nucleation layer and including first and second layers, wherein the first and second layers include group iii-v compound semiconductor materials having lattice constants that are greater than that of the nucleation layer by 4% or more.. .
10/09/14
20140299882
Integrated fin and strap structure for an access transistor of a trench capacitor
At least one dielectric pad layer is formed on a semiconductor-on-insulator (soi) substrate. A deep trench is formed in the soi substrate, and a combination of an outer electrode, a node dielectric, and an inner electrode are formed such that the top surface of the inner electrode is recessed below the top surface of a buried insulator layer of the soi substrate.
10/09/14
20140299871
Organic field effect transistor
The present invention provides an electronic component or device comprising a gate electrode, a source electrode and a drain electrode, wherein said component or device further comprising an organic semiconducting (osc) material that is provided between the source and drain electrode, wherein the osc material comprises (a) a polymer represented by formula: (i), and (b) a compound of formula (ii). High quality ofets can be fabricated by the choice of a semiconductor material, which is comprised of a polymer represented by formula i and (b) a compound of formula ii..
10/09/14
20140299585
Laser cladding method
In a laser cladding method, a laser beam is emitted from a semiconductor laser to melt alloy powder for laser cladding on the surface of a hydraulic support column. The semiconductor laser is a laser functioning with semiconductor material as gain medium and lighting by means of semiconductor material transition among energy bands.
10/02/14
20140295606
Method for producing a device comprising cavities formed between a suspended element resting on insulating pads semi-buried in a substrate and this substrate
A method for producing a device including plural cavities defined between a substrate in at least one given semiconductor material and a membrane resting on a top of insulating posts projecting from the substrate, the method allowing a height of the cavity or cavities to be adapted independently of a height of the insulating posts and allowing cavities of different heights to be formed.. .
10/02/14
20140293724
Systems and methods of non-volatile memory sensing including selective/differential threshold voltage features
Systems and methods are disclosed for providing selective threshold voltage characteristics via use of mos transistors having differential threshold voltages. In one exemplary embodiment, there is provided a metal oxide semiconductor device comprising a substrate of semiconductor material having a source region, a drain region and a channel region therebetween, an insulating layer over the channel region, and a gate portion of the insulating layer.
10/02/14
20140291850
Method for manufacturing electronic devices
An embodiment for manufacturing electronic devices is proposed. The embodiment includes the following phases: a) forming a plurality of chips in a semiconductor material wafer including a main surface; each chip includes respective integrated electronic components and respective contact pads facing the main surface; said contact pads are electrically coupled to the integrated electronic components; b) attaching at least one conductive ribbon to at least one contact pad of each chip; c) covering the main surface of the semiconductor material wafer and the at least one conductive ribbon with a layer of plastic material; d) lapping an exposed surface of the layer of plastic material to remove a portion of the plastic material layer at least to uncover portions of the at least one conductive ribbon, and e) sectioning the semiconductor material wafer to separate the chips..
10/02/14
20140291810
Methods for growing iii-v materials on a non iii-v material substrate
The present invention relates to a method for manufacturing semiconductor materials comprising epitaxial growing of group iii-v materials, for example gallium arsenide (gaas), on for example a non iii-v group material like silicon (si) substrates (wafers), and especially to pre-processing steps providing a location stabilisation of dislocation faults in a surface layer of the non iii-v material wafer in an orientation relative to an epitaxial material growing direction during growing of the iii-v materials, wherein the location stabilised dislocation fault orientations provides a barrier against threading dislocations (stacking of faults) from being formed in the growing direction of the iii-v materials during the epitaxial growth process.. .
10/02/14
20140291809
Semiconductor substrate and a method of manufacturing the same
The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 mev from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×1012 cm−3.. .
10/02/14
20140291794
Microchannel avalanche photodiode (variants)
The invention is directed to an avalanche photodiode containing a substrate and semiconductor layers with various electro-physical properties having common interfaces both between themselves and with the substrate. The avalanche photodiode may be characterized by the presence in the device of at least one matrix consisting of separate solid-state areas with enhanced conductivity surrounded by semiconductor material with the same type of conductivity.
10/02/14
20140291624
Organic light emitting device display and manufacturing method thereof
Provided is an organic light emitting display including a pixel circuit unit prepared over a substrate and comprising a plurality of thin film transistors (tfts), and an organic light emitting device or diode (oled) electrically connected to the pixel circuit unit. The pixel circuit unit and the oled are connected through a repair unit comprising a semiconductor material, in order to facilitate easy repair..
10/02/14
20140291602
Oxide memory resistor including semiconductor nanoparticles
This invention relates to memory resistors, arrays of memory resistors and a method of making memory resistors. In particular, this invention relates to memory resistors having an on state and an off state, comprising: (a) a first electrode; (b) a second electrode; (c) a dielectric layer disposed between the first and second electrodes; wherein the dielectric layer comprises nanoparticles of semiconductor material, and wherein in the on state nanoparticles form at least one conductive filament encapsulated by the dielectric layer, thereby providing a conductive pathway between the first electrode and the second electrode..
10/02/14
20140291481
Enhanced photon detection device with biased deep trench isolation
A photon detection device includes a photodiode having a planar junction disposed in a first region of semiconductor material. A deep trench isolation (dti) structure is disposed in the semiconductor material.
10/02/14
20140291152
Microreactor and method for loading a liquid
A microreactor includes: a substrate (2; 102; 202) made of semiconductor material; a plurality of wells (5; 105; 205) separated by walls (6; 106; 206) in the substrate (2; 102; 202); a dielectric structure (7; 107; 207a, 207b) coating at least the top of the walls (6; 106; 206); a cap (3; 103; 203), bonded to the substrate (2; 102; 202) and defining a chamber (10; 110; 210) above the wells (5; 105; 205); and a biasing structure (2, 8, 13; 102, 108, 113; 202, 208a, 208b, 213), configured for setting up a voltage (vb) between the substrate (2; 102; 202) and the chamber (10; 110; 210).. .
10/02/14
20140290857
Substrate processing apparatus
In a method for forming a stacked substrate of a mos (metal oxide semiconductor) structure including an oxide film serving as a gate insulating film formed on a semiconductor material layer having a film or substrate shape; and a conductive film serving as a gate electrode formed on the oxide film, a polysilane film on the semiconductor material layer is formed by coating a polysilane solution on a surface of a substrate to which the semiconductor material layer is exposed. A film containing metal ions is formed on the polysilane film by coating a metal salt solution thereon, and the polysilane film and the film containing metal ions are respectively modified into a polysiloxane film and a film containing fine metal particles to form the stacked substrate..
09/25/14
20140287656
Method for polishing a semiconductor material wafer
A method for polishing at least one semiconductor wafer while supplying a polishing agent includes performing a first simultaneous double-side polishing of the front side and the back side of the at least one semiconductor wafer with first upper and lower polishing pads, edge-notch polishing the surface of the at least one semiconductor wafer, performing a second simultaneous double-side polishing of the front side and the back side of the at least on semiconductor wafer with second upper and lower polishing pads, where the upper and lower polishing pads for the first simultaneous double-side polishing are harder and less compressible than the upper and lower polishing pads for the second simultaneous double-side polishing and performing single-side polishing of the front side of the at least one semiconductor wafer.. .
09/25/14
20140284816
Through silicon via wafer, contacts and design structures
Disclosed herein are through silicon vias (tsvs) and contacts formed on a semiconductor material, methods of manufacturing, and design structures. The method includes forming a contact hole in a dielectric material formed on a substrate.
09/25/14
20140284758
Self-aligned bipolar junction transistors
Device structures, fabrication methods, and design structures for a bipolar junction transistor. An intrinsic base is formed on the substrate, a terminal is formed on the intrinsic base, and an extrinsic base is formed that is arranged in juxtaposition with the intrinsic base on the substrate.
09/25/14
20140284731
Semiconductor device
A semiconductor device includes a substrate that is made of a semiconductor material and has a main surface formed with a recess. The semiconductor device also includes a wiring layer formed on the substrate, an electronic element housed in the recess, and a sealing resin covering at least a part of the electronic element..
09/25/14
20140284727
Integrated circuit on corrugated substrate
By forming mosfets on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production.
09/25/14
20140284723
Finfets with different fin height and epi height setting
An integrated circuit structure includes a first semiconductor strip, first isolation regions on opposite sides of the first semiconductor strip, and a first epitaxy strip overlapping the first semiconductor strip. A top portion of the first epitaxy strip is over a first top surface of the first isolation regions.
09/25/14
20140284721
Finfet device formation
A method includes patterning a fin on a semiconductor substrate, depositing a local trench isolation (lti) layer on the semiconductor substrate, patterning a gate stack over a channel region of the fin and over a portion of the lti layer, depositing a first capping layer over exposed portions of the lti layer, performing an etching process to remove oxide material from exposed portions of the fin, and epitaxially growing a semiconductor material from exposed portions of the fin to define active regions.. .
09/25/14
20140284669
Optoelectronic integrated device including a photodetector and a mosfet transistor, and manufacturing process thereof
An optoelectronic integrated device includes a body made of semiconductor material, which is delimited by a front surface and includes a substrate having a first type of conductivity, an epitaxial region, which has the first type of conductivity and forms the front surface, and a ring region having a second type of conductivity, which extends into the epitaxial region from the front surface, and delimiting an internal region. The optoelectronic integrated device moreover includes a mosfet including at least one body region having the second type of conductivity, which contacts the ring region and extends at least in part into the internal region from the front surface.
09/25/14
20140284538
Memory cells having storage elements that share material layers with steering elements and methods of forming the same
A memory cell is provided that includes a steering element, a metal-insulator-metal stack coupled in series with the steering element, and a conductor above the metal-insulator-metal stack. The steering element includes a diode having an n-region and a p-region.
09/25/14
20140284451
Reducing localized high electric fields in photoconductive wide bandgap semiconductors
Methods, systems, and devices are disclosed for implementing a high voltage variable resistor. In one aspect, an optical transconductance variable resistor includes a photoconductive wide bandgap semiconductor material (pwbsm) substrate, whose conduction response to changes in amplitude of incident radiation that is substantially linear throughout a non-saturation region thereof, whereby the material is operable in non-avalanche mode as a variable resistor, and first and second electrodes in contact with the material so that: a first triple junction boundary region is formed between the pwbsm substrate and the first electrode, and a second triple junction boundary region is formed between the pwbsm substrate and the second electrode, and the pwbsm substrate is located within an internal triple junction region formed between the first and second triple junction boundary regions..
09/25/14
20140283913
Molybdenum substrates for cigs photovoltaic devices
Photovoltaic (pv) devices and solution-based methods of making the same are described. The pv devices include a cigs-type absorber layer formed on a molybdenum substrate.
09/18/14
20140273519
Hydrogen-plasma process for surface preparation prior to insulator deposition on compound semiconductor materials
A method of making a semiconductor material by pretreating a semiconductor substrate having a native oxide on the substrate surface under vacuum with hydrogen plasma to remove and/or modify the native oxide. After plasma exposure, a high-k dielectric is deposited in-situ onto the substrate using atomic layer deposition.
09/18/14
20140273480
Method for producing a substrate provided with edge protection
The method for producing a substrate provided with protection of its edges has a first step which is providing a substrate having a semiconductor material base. The substrate has opposite first and second main surfaces connected by a lateral surface.
09/18/14
20140273412
Methods for wet clean of oxide layers over epitaxial layers
Methods for an oxide layer over an epitaxial layer. In an embodiment, a method includes forming an epitaxial layer of semiconductor material over a semiconductor substrate; forming an oxide layer over the epitaxial layer; applying a solution including an oxidizer to the oxide layer; and cleaning the oxide layer with a cleaning solution.
09/18/14
20140273398
Methods for forming semiconductor materials in sti trenches
A method includes annealing a silicon region in an environment including hydrogen (h2) and hydrogen chloride (hcl) as process gases. After the step of annealing, a semiconductor region is grown from a surface of the silicon region..
09/18/14
20140273390
Bipolar junction transistors, memory arrays, and methods of forming bipolar junction transistors and memory arrays
Some embodiments include methods of forming bjts. A first type doped region is formed within semiconductor material.
09/18/14
20140273380
Finfets with regrown source/drain and methods for forming the same
A method includes etching a semiconductor substrate to form a recess in the semiconductor substrate, and reacting a surface layer of the semiconductor substrate to generate a reacted layer. The surface layer of the semiconductor substrate is in the recess.
09/18/14
20140273378
Methods of fabricating integrated circuit device with fin transistors having different threshold voltages
Methods of fabricating integrated circuit device with fin transistors having different threshold voltages are provided. The methods may include forming first and second semiconductor fins including first and second semiconductor materials, respectively, and covering at least one among the first and second semiconductor fins with a mask.
09/18/14
20140273360
Faceted semiconductor nanowire
Selective epitaxy of a semiconductor material is performed on a semiconductor fin to form a semiconductor nanowire. Surfaces of the semiconductor nanowire include facets that are non-horizontal and non-vertical.
09/18/14
20140273358
Circuit structures, memory circuitry, and methods
A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material.
09/18/14
20140273342
Vth control method of multiple active layer metal oxide semiconductor tft
The present invention generally relates to tfts and methods for fabricating tfts. When multiple layers are used for the semiconductor material in a tft, a negative vth shift may result.
09/18/14
20140273340
High productivity combinatorial screening for stable metal oxide tfts
Methods for hpc techniques are applied to the processing of site-isolated regions (sir) on a substrate to form at least a portion of a tft device used in display applications. The processing may be applied to at least one of gate electrode deposition, gate electrode patterning, gate dielectric deposition, gate dielectric patterning, metal-based semiconductor material (e.g.
09/18/14
20140273186
Method and apparatus for sequencing molecules
The invention comprises a polymer sequencing chip. In one embodiment, an open nano channel is used in the surface of a semiconductor material or glass as a conduit for the polymer and the resulting monomers released from the polymer.


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Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

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