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Semiconductor Material patents

      

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 Manufacturing  thin film transistor and thin film transistor , array substrate patent thumbnailnew patent Manufacturing thin film transistor and thin film transistor , array substrate
The present disclosure pertains to the technical field of display, which relates to a manufacturing method of a thin film transistor and a thin film transistor, and an array substrate. The manufacturing method of a thin film transistor comprises: forming, above a substrate, patterns comprising different surface energies; coating, above said substrate, a composite solution containing organic semiconductor material and polymer insulating material, and forming a composite film layer; patterning said composite film layer according to the patterns with different surface energies above said substrate, preserving said composite film layer corresponding to the pattern areas with relatively high surface energies; layering said patterned composite film layer by means of an organic solvent steam treatment method; forming two separate metal electrodes at two opposite sides of said patterned composite film layer..
Ordos Yuansheng Optoelectronics Co., Ltd.


 High quantum efficiency photodetector patent thumbnailnew patent High quantum efficiency photodetector
A photodetector including a photoelectric conversion structure made of a semiconductor material and, on a light-receiving surface of the conversion structure, a stack of first and second diffractive elements, the second element being above the first element, wherein: the first element includes at least one pad made of a material having an optical index n1, laterally surrounded with a region made of a material having an optical index n2 different from n1; the second element includes at least one pad made of a material having an optical index n3, laterally surrounded with a region made of a material having an optical index n4 different from n3; the pads of the first and second elements are substantially vertically aligned; and optical index differences n1−n2 and n3−n4 have opposite signs.. .
Stmicroelectronics Sa


 Field effect transistor with elevated active regions and methods of manufacturing the same patent thumbnailnew patent Field effect transistor with elevated active regions and methods of manufacturing the same
A field effect transistor having a higher breakdown voltage can be provided by forming a contiguous dielectric material layer over gate stacks, forming via cavities laterally spaced from the gate stacks, selectively depositing a single crystalline semiconductor material, and converting upper portions of the deposited single crystalline semiconductor material into elevated source/drain regions. Lower portions of the selectively deposited single crystalline semiconductor material in the via cavities can have a doping of a lesser concentration, thereby effectively increasing the distance between two steep junctions at edges of a source region and a drain region.
Sandisk Technologies, Inc.


 Method for processing a semiconductor layer,  processing a silicon substrate, and  processing a silicon layer patent thumbnailnew patent Method for processing a semiconductor layer, processing a silicon substrate, and processing a silicon layer
According to various embodiments, a method for processing a semiconductor layer may include: generating an etch plasma in a plasma chamber of a remote plasma source, wherein the plasma chamber of the remote plasma source is coupled to a processing chamber for processing the semiconductor layer; introducing the etch plasma into the processing chamber to remove a native oxide layer from a surface of the semiconductor layer and at most a negligible amount of semiconductor material of the semiconductor layer; and, subsequently, depositing a dielectric layer directly on the surface of the semiconductor layer.. .
Infineon Technologies Ag


 Waveguide structure patent thumbnailnew patent Waveguide structure
A method comprising: providing a core comprising a layer of electro-optic dielectric material, a first layer of semiconductor material provided below the electro-optic material and a second layer of the semiconductor material provided above the electro-optic material, and electrodes, configured for applying voltages. The electro-optic dielectric material has a pockels tensor containing at least one non-vanishing element rij where i≠j, and the electrodes comprise a first set of electrodes provided substantially in direct contact with the electro-optic dielectric material, and a second set of electrodes comprising at least an electrode provided substantially in direct contact with the first layer and at least an electrode substantially in direct contact with the second layer, wherein the sets of electrodes are configurable to apply in the electro-optic material, at least a substantially horizontal electrical field and at least a substantially vertical electrical field that are orientated substantially perpendicular relative to each other..
International Business Machines Corporation


 Plasmonic and photonic wavelength separation filters patent thumbnailnew patent Plasmonic and photonic wavelength separation filters
Plasmonic and photonic wavelength separation structures are provided for guiding plasmonic wave signals and electromagnetic signals, respectively. A separation structure includes an input waveguide configured to guide a first wave signal, an output waveguide configured to guide a second wave signal; and a resonator structure that includes a closed loop pathway and is configured to receive a portion of the first wave signal from the input waveguide by coupling and to provide the second wave signal to the output waveguide based on the portion of the first wave signal by coupling.
Infineon Technologies Austria Ag


 Device for propagating light and  fabricating a device patent thumbnailnew patent Device for propagating light and fabricating a device
A device for propagating light is described, comprising: a substrate having a semiconductor material, an insulating layer, wherein the insulating layer is arranged on the substrate, a recess reaching through the insulating layer and into the substrate, wherein the recess is at least partially filled with a filler material, and a waveguide arranged in or on the filler material.. .
International Business Machines Corporation


 Integrated electronic device for detecting ultraviolet radiation patent thumbnailnew patent Integrated electronic device for detecting ultraviolet radiation
An integrated electronic device for detecting the composition of ultraviolet radiation includes a cathode region formed by a semiconductor material with a first type of conductivity. A first anode region and a second anode region are laterally staggered with respect to one another and are set in contact with the cathode region.
Stmicroelectronics S.r.l.


 Semiconductor based analyte sensors and methods patent thumbnailnew patent Semiconductor based analyte sensors and methods
An analyte sensor is provided that comprises a substrate which includes a semiconductor material. Embodiments may include a core of a conductive material, and a cladding of a semiconductor material, in which the cladding may form at least a portion of a conducting path for a working electrode of the analyte sensor.
Ascensia Diabetes Care Holdings Ag


 Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, and organic semiconductor film for non-light-emitting organic semiconductor device patent thumbnailOrganic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, and organic semiconductor film for non-light-emitting organic semiconductor device
Provided are an organic transistor containing a compound represented by the following formula, results in high carrier mobility when being used in a semiconductor active layer of the organic transistor, and exhibits high solubility in an organic solvent, in a semiconductor active layer. X is o, s, or se; p and q are 0 to 2; r1 to r10, ra, and rb are hydrogen, halogen, or -l-r; one of r1 to r10, ra, and rb is -l-r; l is a specific divalent linking group; and r is an alkyl group, a cyano group, etc..
Fujifilm Corporation


Solid-state radiation transducer devices having at least partially transparent buried-contact elements, and associated systems and methods

Solid-state radiation transducer (ssrt) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An ssrt device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material.
Micron Technology, Inc.

Thin film transistor substrate having high reliability metal oxide semiconductor material

The present disclosure relates to a thin film transistor substrate having a high reliability oxide semiconductor material including a metal oxide semiconductor material. A thin film transistor substrate includes a substrate, a gate electrode disposed on the substrate, a semiconductor layer including an oxide semiconductor material combining one or more of indium, gallium and zinc, oxygen, and a doping material.
Industry-academic Cooperation Foundation, Yonsei University

Method of growing an epitaxial substrate and forming a semiconductor device on the epitaxial substrate

A process of forming an epitaxial substrate for a high electron mobility transistor (hemt) is disclosed. The process includes a sequential growth of a buffer layer, a barrier layer, and a cap layer, where those layers are made of nitride semiconductor materials.
Sumitomo Electric Device Innovations, Inc.

Formation of high quality fin in 3d structure by way of two-step implantation

The present disclosure discloses a method of fabricating a semiconductor device. A fin structure is formed over a substrate.
Taiwan Semiconductor Manufacturing Company., Ltd.

Contact structure for thin film semiconductor

A method is described for forming a circuit that comprises forming a layer of semiconductor material on the substrate and an interlayer conductor contacting the layer. The layer can be a thin film layer.
Macronix International Co., Ltd.

Structure and finfet device

A semiconductor device includes a first fin structure extending from a semiconductor substrate. A second fin structure is disposed over the first fin structure.
Taiwan Semiconductor Manufacturing Company, Ltd.

Semiconductor device assembly with heat transfer structure formed from semiconductor material

Semiconductor device assemblies with heat transfer structures formed from semiconductor materials are disclosed herein. In one embodiment, a semiconductor device assembly can include a thermal transfer structure formed from a semiconductor substrate.
Micron Technology, Inc.

Solvent-based oxidation on germanium and iii-v compound semiconductor materials

A method to provide an isolation feature over a semiconductor structure is disclosed. The method includes forming a fin structure over a semiconductor substrate, forming an oxide layer over the fin structure, wherein forming the oxide layer includes performing a wet chemical oxidation process on the fin structure with a solvent mixture, forming a dielectric layer over the oxide layer, and forming at least one isolation feature over the semiconductor structure..
Taiwan Semiconductor Manufacturing Company, Ltd.

Methods for manufacturing semiconductor devices

A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.. .
Infineon Technologies Dresden Gmbh

Apparatus and methods including source gates

Apparatus and methods are disclosed, such as an apparatus that includes a string of charge storage devices associated with a pillar (e.g., of semiconductor material), a source gate device, and a source select device coupled between the source gate device and the string. Additional apparatus and methods are described..
Micron Technology, Inc.

Semiconductor device and display device

An aim of the present invention is to reduce manufacturing costs and lower the electrical resistance of composite metal electrodes while lowering the contact resistance of the composite metal electrodes with respect to an organic semiconductor film. A tft (semiconductor device) of the present invention includes an organic semiconductor film formed from an organic semiconductor material, and a source electrode and a drain electrode that are composite metal electrodes that contact the organic semiconductor film.
Sharp Kabushiki Kaisha

Method of forming organic semiconductor film and organic semiconductor film forming device

Provided is a method of forming an organic semiconductor film which uses a shielding member for covering a solution, including: obtaining a state in which a solution that is in contact with the shielding member and contains an organic semiconductor material and a solvent is present, between the substrate and the shielding member positioned parallel to and separated from the substrate, in a predetermined position on the substrate placed on a stage; and moving the stage and the shielding member relative to each other in a predetermined direction. In this manner, an organic semiconductor film having a large area and excellent crystallinity is formed in a desired position on the substrate..
Fujifilm Corporation

Semiconductor light-emitting device

A semiconductor light-emitting device includes a substrate, an led chip, a control element, a conductive layer and an insulating layer. The substrate, made of a semiconductor material, has an obverse surface and a reverse surface spaced apart from each other in the thickness direction of the substrate.
Rohm Co., Ltd.

Integrated high side gate driver structure and circuit for driving high side power transistors

The present invention relates to an integrated high side gate driver structure for driving a power transistor. The high side gate driver structure comprises a semiconductor substrate comprising a first polarity semiconductor material in which a first well diffusion comprising a second polarity semiconductor material is formed.
Merus Audio Aps

Recessed contact to semiconductor nanowires

A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire..
Sol Voltaics Ab

Processing a semiconductor wafer

A semiconductor wafer processing system for processing a semiconductor wafer is presented. The semiconductor wafer processing system comprises: a trench production apparatus configured to produce trenches in the semiconductor wafer, the trenches being arranged next to each other along a first lateral direction (x); a trench filling apparatus configured to epitaxially fill the trenches with a doped semiconductor material; and a controller operatively coupled to at least one of the trench production apparatus and the trench filling apparatus, wherein the controller is configured to control at least one of the trench production apparatus and the trench filling apparatus in dependence of a parameter, the parameter being indicative of at least one of a variation of dopant concentrations of the doped semiconductor material along the first lateral direction (x) that is to be expected when carrying out the epitaxially filling and a deviation of an expected average of the dopant concentrations from a predetermined nominal value..
Infineon Technologies Ag

Semiconductor structure containing low-resistance source and drain contacts

Semiconductor structures having a source contact and a drain contact that exhibit reduced contact resistance and methods of forming the same are disclosed. In one embodiment of the present application, the reduced contact resistance is provided by forming a layer of a dipole metal or metal-insulator-semiconductor (mis) oxide between an epitaxial semiconductor material (providing the source region and the drain region of the device) and an overlying metal semiconductor alloy.
International Business Machines Corporation

Semiconductor device and transistor

This disclosure provides a negative capacitance gate stack structure with a variable positive capacitor to implement a hysteresis free negative capacitance field effect transistors (ncfets) with improved voltage gain. The gate stack structure provides an effective ferroelectric negative capacitor by using the combination of a ferroelectric negative capacitor and the variable positive capacitor with semiconductor material (such as polysilicon), resulting in the effective ferroelectric negative capacitor's being varied with an applied gate voltage.
National Taiwan University

Electromagnetic shield and associated methods

Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material, a terminal coupled to the diffusion region, and a field plate coupled to the terminal and extending from the terminal over the diffusion region to shield the diffusion region.
Micron Technology, Inc.

Systems and methods for laser splitting and device layer transfer

Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (mems), or optoelectronic devices, from a thicker donor wafer using laser irradiation.. .
Solexel, Inc.

Semiconductor devices and methods of manufacture thereof

A method of manufacturing a semiconductor device may include: forming an opening in an insulating layer to expose a portion of a major surface of a substrate, the substrate comprising a first semiconductor material; forming a protrusion in the opening using a first epitaxial growth process, the protrusion comprising a first portion disposed in the opening and a second portion extending out of the opening, the protrusion comprising a second semiconductor material different from the first semiconductor material; and forming the second semiconductor material on sidewalls of the second portion of the protrusion using a second epitaxial growth process different from the first epitaxial growth process.. .
Taiwan Semiconductor Manufacturing Company, Ltd.

Method and structure for forming a dense array of single crystalline semiconductor nanocrystals

A dense array of semiconductor single crystalline semiconductor nanocrystals is provided in the present application by forming an amorphous semiconductor material layer surrounding a plurality of patterned nanostructures comprised of a single crystalline semiconductor material portion. A thermal anneal, i.e., (solid phase epitaxy), is then performed to crystallize a portion of the amorphous semiconductor material layer that is in contact with each single crystalline semiconductor material portion and to provide a plurality of spaced apart single crystalline nanocrystals on a surface of an insulator.
International Business Machines Corporation

Semiconductor device with integrated mirror and producing a semiconductor device with integrated mirror

The semiconductor device comprises a substrate (1) of semiconductor material, a dielectric layer (2) above the substrate, a waveguide (3) arranged in the dielectric layer, and a mirror region (4) arranged on a surface of a mirror support (5) integrated on the substrate. A mirror is thus formed facing the waveguide.
Ams Ag

Composition of, and forming, a semiconductor structure with multiple insulator coatings

Fabricating a semiconductor structure including forming a nanocrystalline core from a first semiconductor material, forming a nanocrystalline shell from a second, different, semiconductor material that at least partially surrounds the nanocrystalline core, wherein the nanocrystalline core and the nanocrystalline shell form a quantum dot. Fabrication further involves forming an insulator layer encapsulating the quantum dot to create a coated quantum dot, and forming an additional insulator layer on the coated quantum..

Process for manufacturing a microelectromechanical interaction system for a storage medium

A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity and a top surface; forming a first interaction region having a second type of conductivity, opposite to the first type of conductivity, in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity, so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.. .
Stmicroelectronics S.r.l.

An integrated circuit adapted for mobile communication and related mobile computing device

An integrated circuit (400) adapted for mobile communication is disclosed. The circuit comprises a first device layer formed of a first semiconductor material and having at least a first circuit portion (402); and a second device layer formed of a second semiconductor material different to the first semiconductor material and having at least a second circuit portion (404), wherein the first and second device layers are integrally formed, and the first circuit portion is electrically coupled to the second circuit portion to enable the mobile communication using first and second wireless communication protocols.
Nanyang Technological University

Iii-v layers for n-type and p-type mos source-drain contacts

Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. In some example embodiments, the techniques can be used to implement the contacts of mos transistors of a cmos device, where an intermediate iii-v semiconductor material layer is provided between the p-type and n-type source/drain regions and their respective contact metals to significantly reduce contact resistance.
Intel Corporation

Select device for memory cell applications

The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device..
Micron Technology, Inc.

Thin film transistor and making same

A thin film transistor includes a substrate, a gate electrode formed on the substrate, an electrically insulating layer formed on the substrate and covering the gate electrode, a channel layer made of semiconductor material and formed on the electrically insulating layer, an etch stop pattern formed on the channel layer and defining a first through hole and a second through hole; and a source electrode and a drain electrode formed on the etch stop pattern. The source electrode extends into the first through hole to electrically couple to the channel layer.
Hon Hai Precision Industry Co., Ltd.

Three dimensional memory device with hybrid source electrode for wafer warpage reduction

The metallic material content of a contact via structure for a three-dimensional memory device can be reduced by employing a vertical stack of a doped semiconductor material portion and a metallic fill material portion. A backside contact via can be filled with an outer metallic layer, a lower conductive material portion, an inner metallic layer, and an upper conductive material portion to form a contact via structure such that one of the lower and upper conductive material portions is a doped semiconductor material portion and the other is a metallic fill material portion.
Sandisk Technologies Inc.

Dual material finfet on single substrate

A semiconductor device and a method for fabricating the device are provided. The semiconductor device has a substrate having a first device region and a second device region.
International Business Machines Corporation

Integrated tensile strained silicon nfet and compressive strained silicon-germanium pfet implemented in finfet technology

A tensile strained silicon layer is patterned to form a first group of fins in a first substrate area and a second group of fins in a second substrate area. The second group of fins is covered with a tensile strained material, and an anneal is performed to relax the tensile strained silicon semiconductor material in the second group of fins and produce relaxed silicon semiconductor fins in the second area.
Stmicroelectronics, Inc.

Methods and systems for dopant activation using microwave radiation

A semiconductor structure includes a substrate, a source/drain (s/d) junction, and an s/d contact. The s/d junction is associated with the substrate and includes a trench-defining wall, a semiconductor layer, and a semiconductor material.
Taiwan Semiconductor Manufacturing Company Limited

Selective dopant junction for a group iii-v semiconductor device

An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer.
International Business Machines Corporation

Conversion film for converting ionizing radiation, radiation detector

A conversion film is disclosed for converting ionizing radiation into light and for producing charge carriers via the produced light. The conversion film includes a conversion layer having a plurality of scintillator particles embedded into a binder, wherein the binder contains at least one first organic semiconductor material.
Siemens Aktiengesellschaft

Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, and organic semiconductor film for non-light-emitting organic semiconductor device

Provided are an organic transistor having high carrier mobility that contains a compound represented by formula (1-1) or (1-2) in a semiconductor active layer; a compound; an organic semiconductor material for a non-light-emitting organic semiconductor device; a material for an organic transistor; a coating solution for a non-light-emitting organic semiconductor device; and an organic semiconductor film for a non-light-emitting organic semiconductor device (x1 represents s, o, se, or nr9; x2 represents s, o, or se; each of r1 to r9 represents a hydrogen atom or a substituent; at least one of r1, r2, r3, r4, r5, r6, r7, r8, and r9 represents -l-r; each of r9 to r17 represents a hydrogen atom or a substituent; at least one of r9, r10, r11, r12, r13, r14, r15, r16, and r17 represents -l-r; l represents a specific divalent linking group; and r represents an alkyl group, a cyano group, a vinyl group, an ethynyl group, an oxyethylene group, an oligo-oxyethylene group, a siloxane group, an oligosiloxane group, or a trialkylsilyl group).. .
Fujifilm Corporation

Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, and organic semiconductor film for non-light-emitting organic semiconductor device

Provided are an organic transistor which contains a compound having a repeating unit represented by any of the following formulae in a semiconductor active layer and has high carrier mobility; a compound; an organic semiconductor material for a non-light-emitting organic semiconductor device; an organic semiconductor material; a coating solution for a non-light-emitting organic semiconductor device; and an organic semiconductor film for a non-light-emitting organic semiconductor device (w represents an oxygen atom, a sulfur atom, nr1, or c(r2)2; r1 represents a hydrogen atom, an alkyl group, an alkenyl group, an alkynyl group, an aryl group, or a heteroaryl group; r2 represents a cyano group, an acyl group, a (per)fluoroalkyl group, or a (per)fluoroaryl group; cy represents an aromatic ring or a heterocyclic aromatic ring that may have a substituent; and each of r3 and r4 represents a hydrogen atom or a monovalent substituent).. .
Fujifilm Corporation

Quantum detection element with low noise and manufacturing such a photodetection element

According to one aspect, the invention relates to an element for quantum photodetection of an incident radiation in a spectral band centred around a central wavelength λ0, having a front surface intended for receiving said radiation, and including: a stack of layers of semiconductor material forming a pn or pin junction and including at least one layer made of an absorbent semiconductor material having a cut-off wavelength λ0>λ0, the stack of layers of semiconductor material forming a resonant optical cavity; and a structure for coupling the incident radiation with the optical cavity such as to form a resonance at the central wavelength λ0 allowing the absorption of more than 80% in the layer of absorbent semiconductor material at said central wavelength, and an absence of resonance at the radiative wavelength λrad, wherein the radiative wavelength λrad is the wavelength for which, at operating temperature, the radiative recombination rate is the highest.. .
Office National D'etudes Et De Recherches Aérospa Tiales - Onera

Fin field effect transistor including a strained epitaxial semiconductor shell

A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces.
International Business Machines Corporation

Semiconductor device

A semiconductor device includes a first pattern on a first active region, a second pattern on a second active region, and a third pattern on a third active region. The first pattern is spaced from the second pattern by a first interval corresponding to the width of a first recess between the first and second active regions.

Application of super lattice films on insulator to lateral bipolar transistors

A lateral bipolar junction transistor including a base region on a dielectric substrate layer. The base region includes a layered stack of alternating material layers of a first lattice dimension semiconductor material and a second lattice dimension semiconductor material.
International Business Machines Corporation

Tunneling field effect transistor (tfet) having a semiconductor fin structure

A tunneling field effect transistor is formed from a fin of semiconductor material on a support substrate. The fin of semiconductor material includes a source region, a drain region and a channel region between the source region and drain region.
Stmicroelectronics, Inc.

Structure having group iii-v, ge and sige fins on insulator

A method provides a first substrate supporting an insulator layer having trenches formed therein; filling the trenches using an epitaxial growth process with at least semiconductor material; planarizing tops of the filled trenches; forming a first layer of dielectric material on a resulting planarized surface; inverting the first substrate wafer to place the first layer of dielectric material in contact with a second layer of dielectric material on a second substrate; bonding the first substrate to the second substrate through the first and second layers of dielectric material to form a common layer of dielectric material; and removing the first substrate and a first portion of the filled trenches to leave a second portion of the filled trenches disposed upon the common dielectric layer. The removed first portion of the filled trenches contains dislocation defects.
International Business Machines Corporation

Fets and methods of forming fets

An embodiment is a method including forming a first fin and a second fin on a substrate, the first fin and the second fin each including a first crystalline semiconductor material on a substrate and a second crystalline semiconductor material above the first crystalline semiconductor material. Converting the first crystalline semiconductor material in the second fin to a dielectric material, wherein after the converting step, at least a portion of the first crystalline semiconductor material in the first fin remains unconverted.
Taiwan Semiconductor Manufacturing Company, Ltd.

Fin field effect transistor including a strained epitaxial semiconductor shell

A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces.
International Business Machines Corporation

Graphoepitaxy directed self-assembly process for semiconductor fin formation

Guiding pattern portions are formed on a surface of a lithographic material stack that is disposed on a surface of a semiconductor substrate. A copolymer layer is then formed between each neighboring pair of guiding pattern portions and thereafter a directed self-assembly process is performed that causes phase separation of the various polymeric domains of the copolymer layer.
International Business Machines Corporation

Structure and method to form iii-v, ge and sige fins on insulator

A method provides a first substrate supporting an insulator layer having trenches formed therein; filling the trenches using an epitaxial growth process with at least semiconductor material; planarizing tops of the filled trenches; forming a first layer of dielectric material on a resulting planarized surface; inverting the first substrate wafer to place the first layer of dielectric material in contact with a second layer of dielectric material on a second substrate; bonding the first substrate to the second substrate through the first and second layers of dielectric material to form a common layer of dielectric material; and removing the first substrate and a first portion of the filled trenches to leave a second portion of the filled trenches disposed upon the common dielectric layer. The removed first portion of the filled trenches contains dislocation defects.
International Business Machines Corporation

Techniques for fabricating reduced-line-edge-roughness trenches for aspect ratio trapping

The present invention provides art techniques with reduced ler. In one aspect, a method of art with reduced ler is provided which includes the steps of: providing a silicon layer separated from a substrate by a dielectric layer; patterning one or more art lines in the silicon layer selective to the dielectric layer; contacting the silicon layer with an inert gas at a temperature, pressure and for a duration sufficient to cause re-distribution of silicon along sidewalls of the art lines patterned in the silicon layer; using the resulting smoothened, patterned silicon layer to pattern art trenches in the dielectric layer; and epitaxially growing a semiconductor material up from the substrate at the bottom of each of the art trenches, to form fins in the art trenches..
International Business Machines Corporation



Semiconductor Material topics:
  • Semiconductor
  • Semiconductor Material
  • Semiconductor Device
  • Transistors
  • Surfactant
  • Electric Conversion
  • Transparent Conductive Oxide
  • Semiconductor Substrate
  • Heating Devices
  • Semiconductor Devices
  • Organic Electroluminescence
  • Buffer Layer
  • Integrated Circuit
  • Crystallin
  • Electronic Device


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