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Semiconductor Material patents

      

This page is updated frequently with new Semiconductor Material-related patent applications.




 Monolithic nanophotonic device on a semiconductor substrate patent thumbnailnew patent Monolithic nanophotonic device on a semiconductor substrate
A photonic light generating device is provided on a portion of a first semiconductor material. The photonic light generating device includes a second semiconductor material that has a different lattice constant than the lattice constant of the first semiconductor material and that is capable of generating and emitting light.
International Business Machines Corporation


 Electronic device and manufacturing method thereof patent thumbnailnew patent Electronic device and manufacturing method thereof
A electronic device includes: a control electrode 11 formed on a base substrate 10; an insulation layer 21 adapted to cover the control electrode 11 and formed of an organic insulation material; an active layer 12 formed on the insulation layer 21, formed of an organic semiconductor material, and subjected to patterning; and a first electrode 13a and a second electrode 13b formed on the active layer 12, in which a chemical composition of a surface of a region a (21a) that is a region of the insulation layer 21 not formed with the active layer 12 differs from a chemical composition of a region b (21b) that is a region of the insulation layer 21 located under the active layer 12.. .
Sony Corporation


 Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device,  manufacturing organic transistor,  manufacturing organic semiconductor film, organic semiconductor film for non-light-emitting organic semiconductor device, and  synthesizing organic semiconductor material patent thumbnailnew patent Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, manufacturing organic transistor, manufacturing organic semiconductor film, organic semiconductor film for non-light-emitting organic semiconductor device, and synthesizing organic semiconductor material
(x represents an oxygen, sulfur, selenium, or tellurium atom or nr5; y and z each represents cr6, an oxygen, sulfur, selenium, or nitrogen atom, or nr7; a ring containing y and z is an aromatic heterocycle; any one of r1 and r2 and the aromatic heterocycle containing y and z or any one of r3 and r4 and a benzene ring may be bonded to each other through a specific divalent linking group; r1, r2, and r5 to r8 each represent a hydrogen atom, an alkyl group, an alkenyl group, an alkynyl group, an aryl group, or a heteroaryl group; r3 and r4 each represent an alkyl group, an alkenyl group, an alkynyl group, an aryl group, or heteroaryl group; and each of m and n is an integer of 0 to 2.). .

 Fin structure of semiconductor device patent thumbnailnew patent Fin structure of semiconductor device
The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising an upper portion comprising a first semiconductor material having a first lattice constant, wherein the upper portion comprises a first substantially vertical portion having a first width and a second substantially vertical portion having a second width less than the first width over the first substantially vertical portion; and a lower portion comprising a second semiconductor material having a second lattice constant less than the first lattice constant, wherein a top surface of the lower portion has a third width less than the first width; and a gate structure covering the second substantially vertical portion..
Taiwan Semiconductor Manufacturing Company, Ltd.


 Isolated global shutter pixel storage structure patent thumbnailnew patent Isolated global shutter pixel storage structure
An imaging system includes a pixel array of pixel cells with each one of the pixel cells including a photodiode disposed in a semiconductor material, a global shutter gate transistor, disposed in the semiconductor material and coupled to the photodiode, a storage transistor disposed in the semiconductor material, an optical isolation structure disposed in the semiconductor material to isolate a sidewall of the storage transistor from stray light and stray charge. The optical isolation structure also includes a deep trench isolation structure that is filled with tungsten and a p+ passivation formed over an interior sidewall of the deep trench optical isolation structure.
Omnivision Technologies, Inc.


 Emission source and  forming the same patent thumbnailEmission source and forming the same
In various embodiments, an emission source may be provided. The emission source may also include a gain medium including a halide semiconductor material.
Nanyang Technological University


 Coating solution for non-light-emitting organic semiconductor device, organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor,  manufacturing organic transistor, and  manufacturing organic semiconductor film patent thumbnailCoating solution for non-light-emitting organic semiconductor device, organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, manufacturing organic transistor, and manufacturing organic semiconductor film
(in formula (2), r11 and r12 each independently represent a hydrogen atom, an alkyl group, an alkenyl group, an alkynyl group, or an alkoxy group and may have a substituent, and an aromatic portion in formula (2) may be substituted with a halogen atom.). .

 Structured silicon-based thermal emitter patent thumbnailStructured silicon-based thermal emitter
An optical radiation source produced from a disordered semiconductor material, such as black silicon, is provided. The optical radiation source includes a semiconductor substrate, a disordered semiconductor structure etched in the semiconductor substrate and a heating element disposed proximal to the disordered semiconductor structure and configured to heat the disordered semiconductor structure to a temperature at which the disordered semiconductor structure emits thermal infrared radiation..
Si-ware Systems


 Dual mode iii-v superlattice avalanche photodiode patent thumbnailDual mode iii-v superlattice avalanche photodiode
In one aspect, an avalanche photodiode, includes an absorber, a first superlattice structure directly connected to the absorber and configured to multiply holes and a second superlattice structure directly connected to the first superlattice structure and configured to multiply electrons. The first and second superlattice structures include iii-v semiconductor material.
Raytheon Company


 Finfet structure patent thumbnailFinfet structure
A finfet device includes a substrate and a fin structure having a semiconductor material layer over the substrate and recessed regions on side walls of the fin structure. The recessed regions have openings facing away from the fin structure.
Semiconductor Manufacturing International (shanghai) Corporation


Structure to enable titanium contact liner on pfet source/drain regions

A semiconductor structure is provided that includes non-metal semiconductor alloy containing contact structures for field effect transistors (fets), particularly p-type fets. Notably, each non-metal semiconductor alloy containing contact structure includes a highly doped epitaxial semiconductor material directly contacting a topmost surface of a source/drain region of the fet, a titanium liner located on the highly doped epitaxial semiconductor material, a diffusion barrier liner located on the titanium liner, and a contact metal portion located on the diffusion barrier liner..
International Business Machines Corporation

Method and structure of forming controllable unmerged epitaxial material

A method of forming a semiconductor device that includes forming a plurality of semiconductor pillars. A dielectric spacer is formed between at least one set of adjacent semiconductor pillars.
Globalfoundries Inc.

Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives

A method comprises providing a handle substrate having a front surface and a back surface; providing a layer of flexible semiconductor material having a front surface and a back surface and an at least partially sacrificial backing layer stack on the back surface of the layer of flexible semiconductor material; bonding the front surface of the layer of flexible semiconductor material to the front surface of the handle substrate; removing at least a portion of the at least partially sacrificial backing layer stack from the back surface of the layer of flexible semiconductor material; opening outgassing paths through the layer of flexible semiconductor material; and processing the layer of flexible semiconductor material.. .
International Business Machines Corporation

Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives

A method comprises providing a handle substrate having a front surface and a back surface; providing a layer of flexible semiconductor material having a front surface and a back surface and an at least partially sacrificial backing layer stack on the back surface of the layer of flexible semiconductor material; bonding the front surface of the layer of flexible semiconductor material to the front surface of the handle substrate; removing at least a portion of the at least partially sacrificial backing layer stack from the back surface of the layer of flexible semiconductor material; opening outgassing paths through the layer of flexible semiconductor material; and processing the layer of flexible semiconductor material.. .
International Business Machines Corporation

Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesives

A method comprises providing a handle substrate having a front surface and a back surface; providing a layer of flexible semiconductor material having a front surface and a back surface and an at least partially sacrificial backing layer stack on the back surface of the layer of flexible semiconductor material; bonding the front surface of the layer of flexible semiconductor material to the front surface of the handle substrate; removing at least a portion of the at least partially sacrificial backing layer stack from the back surface of the layer of flexible semiconductor material; opening outgassing paths through the layer of flexible semiconductor material; and processing the layer of flexible semiconductor material.. .
International Business Machines Corporation

Semiconductor assemblies with flexible substrates

Embodiments of semiconductor assemblies, and related integrated circuit devices and techniques, are disclosed herein. In some embodiments, a semiconductor assembly may include a flexible substrate, a polycrystalline semiconductor material, and a polycrystalline dielectric disposed between and adjacent to the flexible substrate and the polycrystalline semiconductor material.
Intel Corporation

Type iii hetrojunction - broken gap hj

A semiconductor junction may include a first layer and a second layer. The first layer may include a first semiconductor material and the second layer may be deposited on the first layer and may include a second material.
The University Of North Carolina At Charlotte

Transfer apparatus and laser annealing apparatus

A transfer apparatus includes a supporting member, a free electron excitation device and a detection device; the free electrons excitation device is configured to excite semiconductor material of an object to be transferred to generate free electrons, and the detection device is configured to detect whether material of a surface of the transferred object in contact with the support surface of the supporting member is conductive under excitation by the free electron excitation device. A laser annealing apparatus comprising the transfer apparatus is further provided..
Boe Technology Group Co., Ltd.

Producing a mono-crystalline sheet of semiconductor material

A method for producing a mono-crystalline sheet includes providing at least two aperture elements forming a gap in between; providing a molten alloy including silicon in the gap; providing a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; providing a silicon nucleation crystal in the vicinity of the molten alloy; and bringing in contact said silicon nucleation crystal and the molten alloy. A device for producing a mono-crystalline sheet includes at least two aperture elements at a predetermined distance from each other, thereby forming a gap, and being adapted to be heated for holding a molten alloy including silicon by surface tension in the gap between the aperture elements; a precursor gas supply supplies a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; and a positioning device for holding and moving a nucleation crystal in the vicinity of the molten alloy..
International Business Machines Corporation

Ferroelectric nanocomposite based dielectric inks for reconfigurable rf and microwave applications

A novel ferroelectric ink comprising multiphase barium strontium titanate (bst) in a polymer composite is described. The ink can be employed using direct-ink writing techniques to print high dielectric constant, low loss, and electrostatically-tunable dielectrics on substrates.
University Of Massachusetts

Display devices

The present invention pertains to a process for the manufacture of a display device, said process comprising the following steps: (1) providing a front-sheet electrode, (2) providing a back-sheet electrode, and (3) interposing between the front-sheet electrode and the back-sheet electrode one or more layers consisting of at least one organic semiconductor material, wherein said front-sheet electrode is an assembly comprising one or more multilayer assemblies obtainable by: (i) providing at least one layer (l1) consisting of a composition [composition (c1)] comprising, preferably consisting of at least one thermoplastic polymer [polymer (t1)], said layer (l1) having two opposite surfaces; (ii) treating at least one surface of the layer (l1) with a radio-frequency glow discharge process in the presence of an etching gas medium; (iii) applying by electroless deposition a layer consisting of at least one metal compound (m1) [layer (l2)] onto each treated surface of the layer (l1) provided in step (ii). The present invention also pertains to the display device provided by said process and to uses of said display devices in organic electronic devices..
Solvay Specialty Polymers Italy S.p.a.

Thermoelectric device

A thermoelectric device for transferring heat from a heat source to a heat sink. The device includes a first thermoelectric leg pair having a first leg including an n-type semiconductor material and a second leg including a p-type semiconductor material, wherein the first leg and the second leg are electrically coupled in series; a second thermoelectric leg pair has a third leg including an n-type semiconductor material and a fourth leg including a p-type semiconductor material, wherein the third leg and the fourth leg are electrically coupled in series; a first contact placed between the first leg and the fourth leg and a second contact placed between the second leg and the third leg.
International Business Machines Corporation

Nanocrystalline quantum dot heterostructure

A semiconductor structure includes a nanocrystalline core comprising a first semiconductor material having a first bandgap, and a nanocrystalline shell comprising a second semiconductor material different than the first semiconductor material at least partially surrounding the nanocrystalline core, the second semiconductor material having a second bandgap greater than the first bandgap.. .
Pacific Light Technologies Corp.

Method of making photovoltaic cell

A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer.
The Board Of Regents Of The University Of Texas System

Integrated light emitting device, integrated sensor device, and manufacturing method

The present disclosure relates to an integrated light emitting device. The integrated light emitting device comprises a substrate of semiconductor material, a light emitting unit integrated into the semiconductor material, and at least one cavity formed into the semiconductor material between the substrate and the light emitting unit.
Infineon Technologies Dresden Gmbh

Photoresistors on silicon-on-insulator substrate and photodetectors incorporating same

A photoresistor comprises a silicon-on-insulator substrate (101) comprising a device layer (4). In an example embodiment and mode at least two non-contiguous first highly conductive regions (2, 3) of semiconductor material are formed on a surface of the device layer, and at least one active region (1) of a high resistivity semiconductor material of a same conductivity type as the first highly conductive regions are formed to propagate through a whole thickness of the device layer and to electrically contact the at least two non-contiguous first highly conductive regions..
Luna Innovations, Inc.

Finfet having highly doped source and drain regions

A method of forming a semiconductor device that includes forming an in-situ doped semiconductor material on a semiconductor substrate, and forming fin structures from the in-situ doped semiconductor material. A sacrificial channel portion of the fin structures may be removed, wherein a source region and a drain region portion of the fin structures of the in-situ doped semiconductor material remain.
International Business Machines Corporation

Implementing a hybrid finfet device and nanowire device utilizing selective sgoi

A silicon-on-insulator substrate which includes a semiconductor substrate, a buried oxide layer, and a semiconductor layer is provided. A hard mask layer is formed over a first region of the silicon-on-insulator substrate.
International Business Machines Corporation

Structure and method to prevent epi short between trenches in finfet edram

After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure.
International Business Machines Corporation

Sandwich epi channel for device enhancement

The present disclosure relates to a transistor device having a channel region comprising a sandwich film stack with a plurality of different layers that improve device performance, and an associated apparatus. In some embodiments, the transistor device has a source region and a drain region disposed within a semiconductor substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.

Method of forming fin structure of semiconductor device

A method of forming a fin structure of a semiconductor device, such as a fin field effect transistor (finfet) is provided. In an embodiment, trenches are formed in a substrate, and a liner is formed along sidewalls of the trenches, wherein a region between adjacent trenches define a fin.
Taiwan Semiconductor Manufacturing Company, Ltd.

Reducing autodoping of iii-v semiconductors by atomic layer epitaxy (ale)

In one aspect, a method for forming a doped iii-v semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group iii or at least one group v element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either i) at least one group v element if the first monolayer comprises at least one group iii element, or ii) at least one group iii element if the first monolayer comprises at least one group v element, wherein a dopant is selectively introduced only during formation of the second monolayer, and wherein steps (a) and (b) are performed using atomic layer epitaxy. Doped iii-v semiconductor materials are also provided..
International Business Machines Corporation

Radiation detector and reducing the amount of trapped charge carriers in a radiation detector

A semiconductor based photon counting detector comprising a substrate (11) of semiconductor material; a detector bias voltage supply (12) for applying a detector bias voltage over the substrate, each time during a data acquisition period (t1); a readout arrangement (13) for repetitively reading out data indicative of charges freed in, and transported through, the substrate (11) in response to photons being absorbed, each time during a readout period (t2) following a data acquisition period, wherein the data contain number of charge pulses of photons being absorbed; an external light source (15) for exposing the substrate for light to enable trapped charge carriers to escape from defect levels in the substrate; and a control device (14) operatively connected to the detector bias voltage supply, the readout arrangement, and the external light source. The control device (14) is configured to control the detector bias voltage supply to switch off the detector bias voltage over the substrate and the external light source (15) to switch on the light, thus exposing the substrate (11) for light to enable trapped charge carriers to escape from defect levels in the substrate, concurrently during at least some of said readout periods..
Xcounter Ab

Uniform core-shell tio2 coated upconversion nanoparticles and use thereof

An upconversion nanoparticle (ucn) coated with a layer of semiconductor material is disclosed. The ucn core acts as a nanotransducer to convert near infrared (nir) to visible and/or ultraviolet (uv) light while the semiconductor shell serves as a photocatalyst.
National University Of Singapore

Power amplifier modules including related systems, devices, and methods

One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (rf) signal and tantalum nitride terminated through wafer via. The power amplifier includes a heterojunction bipolar transistor and a p-type field effect transistor, in which a semiconductor portion of the p-type field effect transistor corresponds to a channel includes the same type of semiconductor material as a collector layer of the heterojunction bipolar transistor.
Skyworks Solutions, Inc.

Carbazole derivative, light-emitting element material and organic semiconductor material

An object is to provide a novel carbazole derivative that has an excellent carrier-transport property and can be suitably used for a transport layer or as a host material of a light-emitting element. Another object is to provide an organic semiconductor material and a light-emitting element material each using the carbazole derivative.
Semiconductor Energy Laboratory Co., Ltd.

Ohmic contact of thin film solar cell

A chalcogen-resistant material including at least one of a conductive elongated nanostructure layer and a high work function material layer is deposited on a transition metal layer on a substrate. A semiconductor chalcogenide material layer is deposited over the chalcogen-resistant material.
International Business Machines Corporation

Novel fin structure of finfet

A fin structure disposed over a substrate and a method of forming a fin structure are disclosed. The fin structure includes a mesa, a channel disposed over the mesa, and a convex-shaped feature disposed between the channel and the mesa.
Taiwan Semiconductor Manufacturing Company, Ltd.

Diffused tip extension transistor

A method including forming an opening in a junction region of a fin on and extending from a substrate; introducing a doped semiconductor material in the opening; and thermal processing the doped semiconductor material. A method including forming a gate electrode on a fin extending from a substrate; forming openings in the fin adjacent opposite sides of the gate electrode; introducing a doped semiconductor material in the openings; and thermally processing the doped semiconductor material sufficient to induce the diffusion of a dopant in the doped semiconductor material.
Intel Corporation

Method of forming a transistor and structure therefor

In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor.
Semiconductor Components Industries, Llc

Finfet devices

Finfet devices and processes to prevent fin or gate collapse (e.g., flopover) in finfet devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material.
International Business Machines Corporation

Contact formation to 3d monolithic stacked finfets

A first gate structure straddles one end of a staircase fin stack that contains a first semiconductor material fin, an insulator fin, and a second semiconductor material fin, a second gate structure straddles a portion of the staircase fin stack, a third gate structure straddles another end of the staircase fin stack, and a fourth gate structure straddles a portion of only the first semiconductor fin. A first contact structure is between the first and second gate structures, a second contact structure is between the second and third gate structures, and a third contact structure is between the third and fourth gate structures.
International Business Machines Corporation

Structure with emedded efs3 and finfet device

The present disclosure relates to an integrated chip having a finfet device and an embedded flash memory device, and a method of formation. In some embodiments, the integrated chip has a logic region and a memory region that is laterally separated from the logic region.
Taiwan Semiconductor Manufacturing Co., Ltd.

Power amplifier modules with power amplifier and transmission line and related systems, devices, and methods

One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (rf) signal and an rf transmission line electrically coupled to an output of the power amplifier. The power amplifier includes a heterojunction bipolar transistor and a p-type field effect transistor, in which a semiconductor portion of the p-type field effect transistor corresponds to a channel includes the same type of semiconductor material as a collector layer of the heterojunction bipolar transistor.
Skyworks Solutions, Inc.

Formation of strained fins in a finfet device

In an aspect of the present invention, a field-effect transistor (fet) structure is formed. The fet structure comprises a plurality of fins formed on a semiconductor substrate, wherein the plurality of fins includes a set of fins that include a base portion that is comprised of relaxed silicon-germanium (sige) and an upper portion that is comprised of semiconductor material.
International Business Machines Corporation

Finfet devices

Finfet devices and processes to prevent fin or gate collapse (e.g., flopover) in finfet devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material.
International Business Machines Corporation

Finfet devices

Finfet devices and processes to prevent fin or gate collapse (e.g., flopover) in finfet devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material.
International Business Machines Corporation

Radioisotope power source embedded in electronic devices

An electronic device is proposed. The electronic device comprises: at least one electronic component formed in a chip of semiconductor material; at least one radioisotope power source unit comprising a radioactive material.
Redcat Devices Srl

Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory

Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to implement circuits configured to compensate for parameter variations in layers of memory by adjusting access signals during memory operations. In some embodiments, memory cells are based on third dimensional memory technology.
Unity Semiconductor Corporation

Semiconductor area optimization

Systems, apparatuses, and methods for reducing the area of a semiconductor structure. A spacing violation may be detected for a gap width used to separate first and second regions of a layer of semiconductor material.
Advanced Micro Devices, Inc.

Method for improving solar energy conversion efficiency of semiconductor metal oxide photocatalysis using h2/n2 mixed gas plasma treatment

Disclosed is a method for improving solar energy conversion efficiency of a metal oxide semiconductor photocatalyst, which includes rapidly performing hydrogenation and nitrogenation of a metal oxide semiconductor material through an h2/n2 mixed gas plasma treatment in a single process at room temperature, so as to enhance photocatalytic energy conversion efficiency. Specifically, disclosed is a treatment technique in which a plasma ball formed by controlling a mixing ratio of hydrogen gas to nitrogen gas in a range of 1:1 to 1:3 contacts with a surface of a metal oxide material, such that a great amount of oxygen vacancy and nitrogen elements are introduced in the surface of the metal oxide material to improve electron-hole pairs transfer ability thereof and decrease a size of the band-gap.
Korea Advanced Institute Of Science And Technology



Semiconductor Material topics:
  • Semiconductor
  • Semiconductor Material
  • Semiconductor Device
  • Transistors
  • Surfactant
  • Electric Conversion
  • Transparent Conductive Oxide
  • Semiconductor Substrate
  • Heating Devices
  • Semiconductor Devices
  • Organic Electroluminescence
  • Buffer Layer
  • Integrated Circuit
  • Crystallin
  • Electronic Device


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