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This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Method for forming an interfacial layer on a semiconductor using hydrogen plasma

Method for forming an interfacial layer on a semiconductor using hydrogen plasma

Method of strain and defect control in thin semiconductor films

Method of strain and defect control in thin semiconductor films

Method of strain and defect control in thin semiconductor films

Integrated circuit comprising an isolating trench and corresponding method

Date/App# patent app List of recent Semiconductor Material-related patents
11/20/14
20140343870
 Determination of acceptor and donor dopant concentrations patent thumbnailDetermination of acceptor and donor dopant concentrations
The concentrations of three acceptor and donor dopants of a semiconductor sample are determined by solving a system of three equations. A first equation is obtained by measuring the free charge carrier concentration of the sample at low temperature, and in then confronting these measurements with a mathematical model suitable for these temperatures.
11/20/14
20140342575
 Method for forming an interfacial layer on a semiconductor using hydrogen plasma patent thumbnailMethod for forming an interfacial layer on a semiconductor using hydrogen plasma
Techniques include a method of forming an interfacial passivation layer between a first semiconductor material (such as germanium) and a high-k gate dielectric. Such techniques include using a hydrogen-based plasma formed using a slotted-plane antenna plasma processing system.
11/20/14
20140342533
 Method of strain and defect control in thin semiconductor films patent thumbnailMethod of strain and defect control in thin semiconductor films
A method of managing strain and preventing defect formation in semiconductor materials is described. In structures featuring two or more semiconductor materials with different lattice constants, buffer layers may be used to form deposition surfaces that result in defect-free semiconductor devices.
11/20/14
20140342524
 Integrated circuit comprising an isolating trench and corresponding method patent thumbnailIntegrated circuit comprising an isolating trench and corresponding method
An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench comprising an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the active area and the encapsulation layer comprising nitrogen or carbon.. .
11/20/14
20140342522
 Reducing variation by using combination epitaxy growth patent thumbnailReducing variation by using combination epitaxy growth
A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (e/g) ratio of process gases used in the first growth stage; and performing a second growth stage with a second e/g ratio of process gases used in the second growth stage different from the first e/g ratio..
11/20/14
20140342494
 Ohmic n-contact formed at low temperature in inverted metamorphic multijunction solar cells patent thumbnailOhmic n-contact formed at low temperature in inverted metamorphic multijunction solar cells
A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° c. Or less and having a contact resistance of less than 5×10−4 ohms-cm2..
11/20/14
20140342493
 Radiation detector having a bandgap engineered absorber patent thumbnailRadiation detector having a bandgap engineered absorber
A radiation detector is provided that includes a photodiode having a radiation absorber with a graded multilayer structure. Each layer of the absorber is formed from a semiconductor material, such as hgcdte.
11/20/14
20140342486
 Elemental semiconductor material contact for gan-based light emitting diodes patent thumbnailElemental semiconductor material contact for gan-based light emitting diodes
A vertical stack including a p-doped gan portion, a multi-quantum-well, and an n-doped gan portion is formed on an insulator substrate. The p-doped gan portion may be formed above, or below, the multi-quantum-well.
11/20/14
20140342485
 Elemental semiconductor material contact for high indium content ingan light emitting diodes patent thumbnailElemental semiconductor material contact for high indium content ingan light emitting diodes
A vertical stack including a p-doped gan portion, a multi-quantum-well including indium gallium nitride layers, and an n-doped transparent conductive material portion is formed on an insulator substrate. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a surface of the p-doped gan portion.
11/20/14
20140342254
 Photo-catalytic systems for production of hydrogen patent thumbnailPhoto-catalytic systems for production of hydrogen
A system for splitting water and producing hydrogen for later use as an energy source may include the use of a photoactive material including pccn and plasmonic nanoparticles. A method for producing the pccn may include a semiconductor nanocrystal synthesis and an exchange of organic capping agents with inorganic capping agents.
11/20/14
20140340963
Apparatus and methods including source gates
Apparatus and methods are disclosed, such as an apparatus that includes a string of charge storage devices associated with a pillar (e.g., of semiconductor material), a source gate device, and a source select device coupled between the source gate device and the string. Additional apparatus and methods are described..
11/20/14
20140339706
Integrated circuit package with an interposer formed from a reusable carrier substrate
An integrated circuit package includes an interposer and an integrated circuit die. The interposer is formed from a layer of semiconductor material that is separated from a bulk portion of a semiconductor substrate, and the integrated circuit die is coupled to the interposer.
11/20/14
20140339677
Hybrid plasma-semiconductor transistors, logic devices and arrays
A hybrid plasma semiconductor device has a thin and flexible semiconductor base layer. An emitter region is diffused into the base layer forming a pn-junction.
11/20/14
20140339631
Innovative approach of 4f2 driver formation for high-density rram and mram
Some embodiments of the present disclosure relate to a memory array comprising memory cells having vertical gate-all-around (gaa) selection transistors. In some embodiments, the memory array has a source region disposed within an upper surface of a semiconductor body, and a semiconductor pillar of semiconductor material extending outward from the upper surface of the semiconductor body and having a channel region and an overlying drain region.
11/20/14
20140339624
Charge-retaining transistor, array of memory cells, and methods of forming a charge-retaining transistor
A charge-retaining transistor includes a control gate and an inter-gate dielectric alongside the control gate. A charge-storage node of the transistor includes first semiconductor material alongside the inter-gate dielectric.
11/20/14
20140339621
Methods for forming a string of memory cells and apparatuses having a vertical string of memory cells including metal
Methods for forming a string of memory cells and apparatuses having a vertical string of memory cells are disclosed. One such string of memory cells can be formed at least partially in a stack of materials comprising a plurality of alternating levels of control gate material and insulator material.
11/20/14
20140339611
Stacked semiconductor nanowires with tunnel spacers
A structure is provided that includes at least one multilayered stacked semiconductor material structure located on a semiconductor substrate and at least one sacrificial gate material structure straddles a portion of the at least one multilayered stacked semiconductor structure. The at least one multilayered stacked semiconductor material structure includes alternating layers of sacrificial semiconductor material and semiconductor nanowire template material.
11/20/14
20140339591
Optoelectronic semiconductor chip and method of production thereof
An optoelectronic semiconductor chip includes a semiconductor layer stack including a nitride compound semiconductor material on a carrier substrate, wherein the semiconductor layer stack includes an active layer that emits an electromagnetic radiation, the semiconductor layer stack being arranged between a layer of a first conductivity and a layer of a second conductivity, the layer of the first conductivity is adjacent a front of the semiconductor layer stack, the layer of the first conductivity electrically connects to a first electrical connection layer covering at least a portion of a back of the semiconductor layer stack, and the layer of the second conductivity type electrically connects to a second electrical connection layer arranged at the back.. .
11/20/14
20140339577
Optoelectronic semiconductor chip
An optoelectronic semiconductor chip includes a multiplicity of active regions, arranged at a distance from one another, and a reflective layer arranged at an underside of the multiplicity of active regions, wherein at least one of the active regions has a main extension direction, one of the active regions has a core region formed with a first semiconductor material, the active region has an active layer, covering the core region at least in directions transversely with respect to the main extension direction of the active region, the active region has a cover layer formed with a second semiconductor material and covers the active layer at least in directions transversely with respect to the main extension direction of the active region, and the reflective layer reflects electromagnetic radiation generated during operation in the active layer.. .
11/20/14
20140339507
Stacked semiconductor nanowires with tunnel spacers
A structure is provided that includes at least one multilayered stacked semiconductor material structure located on a semiconductor substrate and at least one sacrificial gate material structure straddles a portion of the at least one multilayered stacked semiconductor structure. The at least one multilayered stacked semiconductor material structure includes alternating layers of sacrificial semiconductor material and semiconductor nanowire template material.
11/20/14
20140339503
Elemental semiconductor material contact for gan-based light emitting diodes
A vertical stack including a p-doped gan portion, a multi-quantum-well, and an n-doped gan portion is formed on an insulator substrate. The p-doped gan portion may be formed above, or below, the multi-quantum-well.
11/20/14
20140339502
Elemental semiconductor material contact for high indium content ingan light emitting diodes
A vertical stack including a p-doped gan portion, a multi-quantum-well including indium gallium nitride layers, and an n-doped transparent conductive material portion is formed on an insulator substrate. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a surface of the p-doped gan portion.
11/20/14
20140339498
Radiation-emitting semiconductor chip
A radiation-emitting semiconductor chip includes a semiconductor body with a semiconductor layer sequence, wherein the semiconductor body with the semiconductor layer sequence extends in a vertical direction between a first major face and a second major face; the semiconductor layer sequence includes an active region that generates radiation, a first region of a first conduction type and a second region of a second conduction type differing from the first conduction type; the first region extends in a vertical direction between the first major face and the active region; the second region extends in a vertical direction between the second major face and the active region; at least one layer of the active region is based on an arsenide compound semiconductor material; and relative to its respective extent in the vertical direction, the first region or the second region is based in a proportion of at least half on a phosphide compound semiconductor material.. .
11/20/14
20140338728
Patterned organic semiconductor layers
A method of patterning organic semiconductor layers is disclosed. In one aspect, a method for forming a patterned organic semiconductor layer on a substrate includes providing a plurality of first electrodes on a substrate.
11/13/14
20140332903
Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same
A structure has at least one field effect transistor having a gate stack disposed between raised source drain structures that are adjacent to the gate stack. The gate stack and raised source drain structures are disposed on a surface of a semiconductor material.
11/13/14
20140332892
Stringer-free gate electrode for a suspended semiconductor fin
At least one semiconductor fin is formed over an insulator layer. Portions of the insulator layer are etched from underneath the at least one semiconductor fin.
11/13/14
20140332890
Stringer-free gate electrode for a suspended semiconductor fin
At least one semiconductor fin is formed over an insulator layer. Portions of the insulator layer are etched from underneath the at least one semiconductor fin.
11/13/14
20140332854
Stress release structures for metal electrodes of semiconductor devices
This invention teaches stress release metal electrodes for gate, drain and source in a field effect transistor and stress release metal electrodes for emitter, base and collector in a bipolar transistor. Due to the large difference in the thermal expansion coefficients between semiconductor materials and metal electrodes, significant strain and stresses can be induced in the devices during the fabrication and operation.
11/13/14
20140332838
Light emitting devices having light coupling layers with recessed electrodes
A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer.
11/13/14
20140332809
Semiconductor device
With a combination of a transistor including an oxide semiconductor material and a transistor including a semiconductor material other than an oxide semiconductor, a semiconductor device with a novel structure in which data can be retained for a long time and does not have a limitation on the number of writing can be obtained. When a connection electrode for connecting the transistor including a semiconductor material other than an oxide semiconductor to the transistor including an oxide semiconductor material is smaller than an electrode of the transistor including a semiconductor material other than an oxide semiconductor that is connected to the connection electrode, the semiconductor device with a novel structure can be highly integrated and the storage capacity per unit area can be increased..
11/13/14
20140332806
Semiconductor device
One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit.
11/13/14
20140332805
Semiconductor device
A semiconductor device having a novel structure is provided. The semiconductor device includes a first p-type transistor, a second n-type transistor, a third transistor, and a fourth transistor.
11/13/14
20140332802
Semiconductor device
In a semiconductor device which conducts multilevel writing operation and a driving method thereof, a signal line for controlling on/off of a writing transistor for conducting a writing operation on a memory cell using a transistor including an oxide semiconductor layer is disposed along a bit line, and a multilevel writing operation is conducted with use of, also in a writing operation, a voltage which is applied to a capacitor at a reading operation. Because an oxide semiconductor material that is a wide gap semiconductor capable of sufficiently reducing off-state current of a transistor is used, data can be held for a long period..
11/13/14
20140332756
Nitride semiconductor light-emitting device and method of manufacturing the same
A nitride semiconductor light-emitting device is formed of an n-type nitride semiconductor layer, a trigger layer, a v-pit expanding layer, a light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The light-emitting layer has a v-pit formed therein.
11/06/14
20140329380
Formation of semiconductor structures with variable gate lengths
A plurality of doped sacrificial semiconductor material portions of a first width and a plurality of doped sacrificial semiconductor material portions of a second width, which is different from the first width, are provided on a sacrificial gate dielectric material. Exposed portions of the sacrificial dielectric material are removed.
11/06/14
20140329370
Layer transfer of silicon onto iii-nitride material for heterogenous integration
An integrated silicon and iii-n semiconductor device may be formed by growing iii-n semiconductor material on a first silicon substrate having a first orientation. A second silicon substrate with a second, different, orientation has a release layer between a silicon device film and a carrier wafer.
11/06/14
20140328106
Semiconductor memory device
The memory capacity of a dram is enhanced. A semiconductor memory device includes a driver circuit including part of a single crystal semiconductor substrate, a multilayer wiring layer provided over the driver circuit, and a memory cell array layer provided over the multilayer wiring layer.
11/06/14
20140327361
High colour quality luminaire
A colour tunable lighting module is described which includes at least three solid state lighting emitters (such as light emitting diodes) and at least two wavelength converting elements (such as phosphors). The three solid state lighting emitters are formed of the same semiconductor material system and the light generated by them has dominant wavelengths in the blue-green-orange range of the optical spectrum.
11/06/14
20140327106
Bipolar junction transistors with self-aligned terminals
Device structures, fabrication methods, and design structures for a bipolar junction transistor. A semiconductor material layer is formed on a substrate and a mask layer is formed on the semiconductor material layer.
11/06/14
20140327043
High electron mobility transistor and method of manufacturing the same
Provided are a high electron mobility transistor (hemt) and a method of manufacturing the hemt. The hemt includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2deg) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2deg; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode..
11/06/14
20140327012
Hemt transistors consisting of (iii-b)-n wide bandgap semiconductors comprising boron
An electronic hemt transistor structure comprises a heterojunction formed from a first layer, called a buffer layer, of a first wide bandgap semiconductor material, and a second layer of a second wide bandgap semiconductor material, with a bandgap width eg2 larger than that eg1 of the first material, and a two-dimensional electron gas flowing in a channel confined in the first layer under the interface of the heterojunction. The first layer furthermore comprises a layer of a bgan material under the channel, with an average boron concentration of at least 0.1%, improving the electrical performance of the transistor.
11/06/14
20140326999
Semiconductor device
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode.
11/06/14
20140326943
Semiconductor device for electron emission in a vacuum
A semiconductor device for electron emission in a vacuum comprises a stack of two or more semi-conductor layers of n and p type according to sequence n/(p)/n forming a juxtaposition of two head-to-tail np junctions, in materials belonging to the iii-n family, two adjacent layers forming an interface. The semiconductor materials of the layers of the stack close to the vacuum, where the electrons reach a high energy, have a band gap eg>c/2, where c is the electron affinity of the semiconductor material, the p-type semiconductor layer being obtained partially or completely, by doping impurities of acceptor type or by piezoelectric effect to exhibit a negative fixed charge in any interface between the layers, a positive bias potential applied to the stack supplying, to a fraction of electrons circulating in the stack, the energy needed for emission in the vacuum by an emissive zone of an output layer..
11/06/14
20140326752
Dispensing vessel having a self-supporting secondary container for use in a printing apparatus for depositing a liquid composition on a backplane
A dispensing vessel for holding a supply of a liquid includes an outer can and corresponding lid conjoinable to the outer can in an air-tight manner is improved by the provision of a separate self-supporting secondary inner container removably receivable within the outer can. The container is fabricated of a material that is non-reactive with a liquid composition containing an organic semiconductor material, such as a polytetrafluoroethylene material or stainless steel..
11/06/14
20140326333
Liquid replenishment system for a printing apparatus for depositing a liquid composition on a backplane including a dispensing vessel having a self-supporting secondary container
A liquid replenishment system includes a dispensing vessel for holding a supply of a liquid that has an outer can and corresponding lid conjoinable to the outer can in an air-tight manner. The dispensing vessel is improved by the provision of a separate self-supporting secondary inner container removably receivable within the outer can.
11/06/14
20140326299
Solar cell with an intermediate band comprising non-stressed quantum dots
An intermediate band solar cell is provided. The intermediate band material of the intermediate band solar cell consists of a collection of quantum dots of a semiconductor material that are immersed in a volume of a second semiconductor material.
11/06/14
20140326288
Semiconductor element, thermoelectric module, method for producing a tubular thermoelectric module and motor vehicle
A semiconductor element for a thermoelectric module has opposite ends and is made of an n-doped or p-doped semiconductor material and at least one foreign material. The foreign material is mixed with the semiconductor material and forms a fraction of 25 to 75 vol % of the semiconductor element.
10/30/14
20140322901
Semiconductor nanocrystals, method for preparing, and products
A method for preparing semiconductor nanocrystals includes adding a non-protonated surface modification agent to semiconductor nanocrystal cores in a liquid medium to form a mixture; adding one or more precursors for forming a shell including a semiconductor material to the mixture under conditions for forming the shell over at least a portion of an outer surface of the cores, and adding an acid ligand to the mixture after addition of at least a portion of the one or more precursors. Semiconductor nanocrystals, other methods of making semiconductor nanocrystals, compositions and products including semiconductor nanocrystals are also disclosed..
10/30/14
20140322870
Sram cell with different crystal orientation than associated logic
An integrated circuit containing logic transistors and an array of sram cells in which the logic transistors are formed in semiconductor material with one crystal orientation and the sram cells are formed in a second semiconductor layer with another crystal orientation. A process of forming an integrated circuit containing logic transistors and an array of sram cells in which the logic transistors are formed in a top semiconductor layer with one crystal orientation and the sram cells are formed in an epitaxial semiconductor layer with another crystal orientation.
10/30/14
20140322838
Semiconductor optoelectronic device and the method of manufacturing the same
A semiconductor optoelectronic device comprises an operating substrate; a semiconductor epitaxial stack unit disposed on the operating substrate comprising a first semiconductor material layer having a first electrical conductivity disposed on the operating substrate and a second semiconductor material layer having a second electrical conductivity disposed on the first semiconductor material layer; a transparent conductive layer disposed on the second semiconductor material layer, wherein the transparent conductive layer comprises a first surface, a directly contacting part disposed on the first surface and directly contacting with the second semiconductor material layer, a second surface substantially parallel with the first surface, and a directly contacting corresponding part disposed on the second surface corresponding to the directly contacting part; and a first electrode disposed on the operating substrate and electrically connected with the semiconductor epitaxial stack by the transparent conductive layer, wherein the first electrode is connected with the transparent conductive layer by an area excluding the directly contacting part and the directly contacting corresponding part.. .
10/30/14
20140320107
Dc/dc converter, power supply circuit, and semiconductor device
Provided is a dc-dc converter with improved power conversion efficiency. A transistor which is incorporated in the dc-dc converter and functions as a switching element for controlling output power includes, in its channel formation region, a semiconductor material having a wide band gap and significantly small off current compared with silicon.
10/30/14
20140319677
Submount for electronic, optoelectronic, optical, or photonic components
One or more metal contacts are formed in a recessed area on a top surface of a submount; a pickup tool of a die bonder engages protruding peripheral regions of the submount so as not to damage the metal contacts or metal bumps in the recessed region. A semiconductor optical submount includes non-contiguous dielectric layers between metal contacts and the semiconductor material to reduce parasitic capacitance..
10/30/14
20140319536
Solid state lighting devices with cellular arrays and associated methods of manufacturing
Solid state lighting (“ssl”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface.
10/30/14
20140319518
Semiconductor device and driving method thereof
A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node..
10/30/14
20140319509
Organic photoelectric conversion element, and solar cell and optical sensor array each using same
An organic photoelectric conversion element which sequentially comprises a transparent first electrode, a photoelectric conversion layer that contains a p-type organic semiconductor material and an n-type organic semiconductor material, and a second electrode in this order on a transparent substrate.. .
10/30/14
20140319465
Photodetection device
The invention relates to a photodetector for infrared light radiation having a given wavelength (λ), including a stack of layers consisting of: a continuous layer (11) of a partially absorbent semiconductor material, which constitutes the photodetection area; a spacer layer (12) of a material that is transparent to said wavelength and has an index ne; and a structured metal mirror (13), the distance (g) between the top of said mirror and the semiconductor layer being less than (λ)/ne and the mirror surface having a profile corresponding to the periodic repetition, according to period (p), of a basic pattern defined by the alternating series of raised surfaces (131, 132) and slots (133, 134) having the widths (l1, l2) and (l3, l4), respectively, the widths (l1) to (l4) being such that none are equal to zero, and that the sum thereof is equal to p and at least l1≠l2 or l3≠l4.. .
10/30/14
20140318623
Photovoltaic semiconductor materials based on alloys of tin sulfide, and methods of production
Photovoltaic thin-film materials comprising crystalline tin sulfide alloys of the general formula sn1-x(r)xs, where r is selected from magnesium, calcium and strontium, as well as methods of producing the same, are disclosed.. .
10/30/14
20140318593
Nanoparticle compact materials for thermoelectric application
A thermoelectric composite and a thermoelectric device and a method of making the thermoelectric composite. The thermoelectric composite is a semiconductor material formed from mechanically-alloyed powders of elemental constituents of the semiconductor material to produce nano-particles of the semiconductor material, and compacted to have at least a bifurcated grain structure.
10/23/14
20140315374
Selective epitaxial growth of semiconductor materials with reduced defects
A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls.
10/23/14
20140314254
Micromechanical detection structure for a mems acoustic transducer and corresponding manufacturing process
A micromechanical structure for a mems capacitive acoustic transducer, has: a substrate made of semiconductor material, having a front surface lying in a horizontal plane; a membrane, coupled to the substrate and designed to undergo deformation in the presence of incident acoustic-pressure waves; a fixed electrode, which is rigid with respect to the acoustic-pressure waves and is coupled to the substrate by means of an anchorage structure, in a suspended position facing the membrane to form a detection capacitor. The anchorage structure has at least one pillar element, which is at least in part distinct from the fixed electrode and supports the fixed electrode in a position parallel to the horizontal plane..
10/23/14
20140312502
Through-vias for wiring layers of semiconductor devices
Through-via structures and methods of their formation are disclosed. In one such method, a first etch through at least a first dielectric material of a wiring layer is performed such that a first hole outlining a collar structure for the through-via is formed.
10/23/14
20140312484
Electronic assembly for mounting on electronic board
An embodiment of an electronic assembly for mounting on an electronic board includes a plurality of electric contact regions exposed on a mounting surface of the electronic board. The electronic assembly includes a chip of semiconductor material in which at least one electronic component is integrated, at least one support element including a first main surface and a second main surface opposite to the first main surface, the chip being enclosed by the at least one support element, a heat dissipation plate thermally coupled to said chip to dissipate the heat produced by it, exposed on the first main surface of the support element, a plurality of contact elements, each electrically coupled to a respective electric terminal of the electronic component integrated in the chip, exposed on the same first main surface of which is exposed to the dissipation plate.
10/23/14
20140312463
Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain
Methods of fabricating semiconductor devices or structures include forming structures of a semiconductor material overlying a layer of a compliant material, subsequently changing the viscosity of the compliant material to relax the semiconductor material structures, and utilizing the relaxed semiconductor material structures as a seed layer in forming a continuous layer of relaxed semiconductor material. In some embodiments, the layer of semiconductor material may comprise a iii-v type semiconductor material, such as, for example, indium gallium nitride.
10/23/14
20140312420
Finfet devices containing merged epitaxial fin-containing contact regions
A plurality of semiconductor fins are formed which extend from a semiconductor material portion that is present atop an insulator layer of a semiconductor-on-insulator substrate. A gate structure and adjacent gate spacers are formed that straddle each semiconductor fin.
10/23/14
20140312419
Finfet devices containing merged epitaxial fin-containing contact regions
A plurality of semiconductor fins are formed which extend from a semiconductor material portion that is present atop an insulator layer of a semiconductor-on-insulator substrate. A gate structure and adjacent gate spacers are formed that straddle each semiconductor fin.
10/23/14
20140312346
Semiconductor device and manufacturing method thereof
An object is to provide a semiconductor device with a novel structure. A semiconductor device includes a first transistor, which includes a channel formation region provided in a substrate including a semiconductor material, impurity regions, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode, and a second transistor, which includes an oxide semiconductor layer over the substrate including the semiconductor material, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode.
10/23/14
20140312317
Organic semiconductor material and thin-film transistor
Wherein r and s each independently represent a positive integer of 1 to 20; n represents a positive integer of 2 to 10000; x1, x2 and x3 each independently represent o, s, se, te, nr, rcr, rsir, rger or rsnr; y1 and y2 each independently represent h, f, cl, cf3, haloalkyl, cn, r, or, sr, coor or cor; and z1, z2, z3 and z4 each independently represent h, f, cl, cf3, haloalkyl, cn, r, or, sr, coor or cor, wherein r represents alkyl group.. .
10/23/14
20140312300
Semiconductor nanocrystals and compositions and devices including same
A semiconductor nanocrystal including a core comprising a first semiconductor material comprising at least three chemical elements and a shell disposed over at least a portion of the core, the shell comprising a second semiconductor material, wherein the semiconductor nanocrystal is capable of emitting light with an improved photoluminescence quantum efficiency. Also disclosed are populations of semiconductor nanocrystals, compositions and devices including a semiconductor nanocrystal capable of emitting light with an improved photoluminescence quantum efficiency.
10/23/14
20140312239
Microelectronic displacement damage dose detector
A device is described that includes sensors that are sensitive to displacement damage, and can be configured to display a characteristic damage curve. The sensors, or diodes, can be made of one or more semiconductor materials that are sensitive to displacement damage, and can be operated in dark illumination conditions.
10/16/14
20140308793
Varactor diode, electrical device and method for manufacturing same
An electrical device includes a semiconductor material. The semiconductor material includes a first region of the semiconductor material having a first conductivity type, a second region of the semiconductor material having a second conductivity type complementary to the first conductivity type and an intermediate region of the semiconductor material between the first region and the second region.
10/16/14
20140308790
Methods for manufacturing devices with source/drain structures
In a method, a gate structure is formed over a substrate, and source/drain (s/d) features are formed in the substrate and interposed by the gate structure. At least one of the s/d features is formed by forming a first semiconductor material including physically discontinuous portions, forming a second semiconductor material over the first semiconductor material, and forming a third semiconductor material over the second semiconductor material.
10/16/14
20140308782
Self-limiting selective epitaxy process for preventing merger of semiconductor fins
A self-limiting selective epitaxy process can be employed on a plurality of semiconductor fins such that the sizes of raised active semiconductor regions formed by the selective epitaxy process are limited to dimensions determined by the sizes of the semiconductor fins. Specifically, the self-limiting selective epitaxy process limits growth of the semiconductor material along directions that are perpendicular to crystallographic facets formed during the selective epitaxy process.


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Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

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