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Semiconductor Material patents



      
           
This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Intrinsic channel planar field effect transistors having multiple threshold voltages

International Business Machines

Intrinsic channel planar field effect transistors having multiple threshold voltages

Intrinsic channel planar field effect transistors having multiple threshold voltages

Semiconductor Manufacturing International (beijing)

Semiconductor device and manufacturing method thereof

Date/App# patent app List of recent Semiconductor Material-related patents
01/22/15
20150024566
 Finlike structures and methods of making same patent thumbnailnew patent Finlike structures and methods of making same
Semiconductor materials, particularly iii-v materials used to form, e.g., a finlike structure can suffer structural damage during chemical mechanical polishing steps. This damage can be reduced or eliminated by oxidizing the damaged surface of the material and then etching away the oxidized material.
Taiwan Semiconductor Manufacturing Company, Ltd.
01/22/15
20150022251
 Nonvolatile latch circuit and logic circuit, and semiconductor device using the same patent thumbnailnew patent Nonvolatile latch circuit and logic circuit, and semiconductor device using the same
To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion for holding data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element.
Semiconductor Energy Laboratory Co., Ltd.
01/22/15
20150021788
 Multi-function and shielded 3d interconnects patent thumbnailnew patent Multi-function and shielded 3d interconnects
A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices.
Tessera, Inc.
01/22/15
20150021754
 Semiconductor device and  forming thermal lid for balancing  warpage and thermal management patent thumbnailnew patent Semiconductor device and forming thermal lid for balancing warpage and thermal management
A semiconductor device has a first semiconductor die and an encapsulant deposited over the first semiconductor die. An interconnect structure is formed over the first semiconductor die and encapsulant.
Stats Chippac, Ltd.
01/22/15
20150021739
 Protection device and related fabrication methods patent thumbnailnew patent Protection device and related fabrication methods
Protection device structures and related fabrication methods are provided. An exemplary semiconductor protection device includes a base region of semiconductor material having a first conductivity type, an emitter region within the base region having the opposite conductivity type, and a collector region of semiconductor material having the second conductivity type, wherein at least a portion of the base region resides between the emitter region and the collector region.
01/22/15
20150021712
 Highly conformal extension doping in advanced multi-gate devices patent thumbnailnew patent Highly conformal extension doping in advanced multi-gate devices
The present disclosure provides in various aspects methods of forming a semiconductor device, methods for forming a semiconductor device structure, a semiconductor device and a semiconductor device structure. In some illustrative embodiments herein, a gate structure is formed over a non-planar surface portion of a semiconductor material provided on a surface of a substrate.
Globalfoundries Inc.
01/22/15
20150021707
 Electromagnetic shield and associated methods patent thumbnailnew patent Electromagnetic shield and associated methods
Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material, a terminal coupled to the diffusion region, and a field plate coupled to the terminal and extending from the terminal over the diffusion region to shield the diffusion region.
Micron Technology, Inc.
01/22/15
20150021699
 Fin field effect transistors having multiple threshold voltages patent thumbnailnew patent Fin field effect transistors having multiple threshold voltages
A high dielectric constant (high-k) gate dielectric layer is formed on semiconductor fins including one or more semiconductor materials. A patterned diffusion barrier metallic nitride layer is formed to overlie at least one channel, while not overlying at least another channel.
International Business Machines Corporation
01/22/15
20150021698
 Intrinsic channel planar field effect transistors having multiple threshold voltages patent thumbnailnew patent Intrinsic channel planar field effect transistors having multiple threshold voltages
Intrinsic channels one or more intrinsic semiconductor materials are provided in a semiconductor substrate. A high dielectric constant (high-k) gate dielectric layer is formed on the intrinsic channels.
International Business Machines Corporation
01/22/15
20150021687
 Semiconductor structure and  forming the semiconductor structure with deep trench isolation structures patent thumbnailnew patent Semiconductor structure and forming the semiconductor structure with deep trench isolation structures
The density of a transistor array is increased by forming one or more deep trench isolation structures in a semiconductor material. The deep trench isolation structures laterally surround the transistors in the array.
Texas Instruments Incorporated
01/22/15
20150021669
new patent

Semiconductor device and manufacturing method thereof


A non-planar jfet device having a thin fin structure is provided. A fin is formed projecting upwardly from or through a top surface of a substrate, where the fin has a first semiconductor layer portion formed from a first semiconductor material of a first conductivity type.
Semiconductor Manufacturing International (beijing) Corporation
01/22/15
20150021636
new patent

Optoelectronic semiconductor chip


An optoelectronic semiconductor chip includes a number active regions that are arranged at a distance from each other and a substrate that is arranged on an underside of the active regions. One of the active regions has a main extension direction.
Osram Opto Semiconductors Gmbh
01/22/15
20150021625
new patent

Semiconductor fin isolation by a well trapping fin portion


A bulk semiconductor substrate including a first semiconductor material is provided. A well trapping layer including a second semiconductor material and a dopant is formed on a top surface of the bulk semiconductor substrate.
International Business Machines Corporation
01/22/15
20150021624
new patent

Lift-off of epitaxial layers from silicon carbide or compound semiconductor substrates


A method to remove epitaxial semiconductor layers from a substrate by growing an epitaxial sacrificial layer on the substrate where the sacrificial layer is a transition metal nitride (tmn) or a tmn ternary compound, growing one or more epitaxial device layers on the sacrificial layer, and separating the device layers from the substrate by etching the sacrificial layer to completely remove the sacrificial layer without damaging or consuming the substrate or any device layer. Also disclosed are the related semiconductor materials made by this method..
01/22/15
20150021609
new patent

Semiconductor apparatus with multiple tiers, and methods


Apparatus and methods are disclosed, including an apparatus that includes a number of tiers of a first semiconductor material, each tier including at least one access line of at least one memory cell and at least one source, channel and/or drain of at least one peripheral transistor, such as one used in an access line decoder circuit or a data line multiplexing circuit. The apparatus can also include a number of pillars of a second semiconductor material extending through the tiers of the first semiconductor material, each pillar including either a source, channel and/or drain of at least one of the memory cells, or a gate of at least one of the peripheral transistors.
Micron Technology, Inc.
01/22/15
20150021550
new patent

Semiconductor structure having nanocrystalline core and nanocrystalline shell pairing with compositional transition layer


Semiconductor structures having a nanocrystalline core and nanocrystalline shell pairing compositional transition layers are described. In an example, a semiconductor structure includes a nanocrystalline core composed of a first semiconductor material.
01/22/15
20150020864
new patent

Method for manufacturing a photovoltaic module with two etching steps p2 and p3 and corresponding photovoltaic module


The invention relates to a method for manufacturing a photovoltaic module comprising a plurality of solar cells in a thin-layer structure, in which the following are consecutively formed: an electrode on the rear surface (41), a photovoltaic layer (46) obtained by depositing a layer (42) of precursors and by annealing such as to convert the precursors into a semiconductor material, and another semiconductor layer (43) in order to create a pn junction with the photovoltaic layer (46); characterised in that the layer (42) is deposited in a localised manner, such as to leave free at least one area (410) of the electrode on the rear surface (41) placed between two adjacent cells, wherein the annealing step modifies said area (410) which has higher resistivity than the rest of the electrode on the rear surface (41), such as to provide electric insulation between two adjacent cells.. .
Commissariat A L'energie Atomique Et Aux Energies Alternatives
01/15/15
20150017766

Electronic device and manufacturing semiconductor device


There is provided an electronic device including at least a first electrode, a second electrode disposed to be spaced apart from the first electrode, and an active layer disposed over the second electrode from above the first electrode and formed of an organic semiconductor material. A charge injection layer is formed between the first electrode and the active layer and between the second electrode and the active layer, and the charge injection layer is formed of an organic material having an increased electric conductivity when the charge injection layer is oxidized..
Sony Corporation
01/15/15
20150017433

Composite plasmonic nanostructure for enhanced extinction of electromagnetic waves


The present disclosure explores and fabricates coupled plasmonic nanoparticles of gold (au), silver (ag), or aluminum (al) onto nanorods or nanowires of zinc telluride (znte), silicon (si), germanium (ge), or other semiconductor materials. Full-wave simulation is performed to obtain an optimum design for maximum light absorption.
The University Of North Carolina At Charlotte
01/15/15
20150014816

Doped semiconductor films and processing


A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration..
Asm Ip Holding B.v.
01/15/15
20150014798

Assembly for a mems environmental sensor device having improved resistance, and corresponding manufacturing process


Described herein is an assembly for a mems sensor device, which envisages: a first body made of semiconductor material, integrating a micromechanical detection structure at a first main face thereof; a cap element, set stacked on the first main face of the first body, above the micromechanical detection structure; and an adhesion structure set between the first body and the cap element, defining a gap in a position corresponding to the micromechanical detection structure. At least one first opening is defined through the adhesion structure in fluidic communication with the gap..
Stmicroelectronics International N.v.
01/15/15
20150014773

Partial fin on oxide for improved electrical isolation of raised active regions


A semiconductor fin suspended above a top surface of a semiconductor layer and supported by a gate structure is formed. An insulator layer is formed between the top surface of the semiconductor layer and the gate structure.
International Business Machines Corporation
01/15/15
20150014730

Light-emitting diode


The invention relates to a light-emitting diode comprising a body (1) which consists at least partly of a semiconductor material. The body (1) has an active layer (2), in which light can be generated, and at least one exit face (3) from which the light that is generated in the active layer (2) can exit.
Limo Patentverwallungs Gmbh & Co. Kg
01/15/15
20150014633

Tunnel field-effect transistors with a gate-swing broken-gap heterostructure


Device structures, fabrication methods, and design structures for tunnel field-effect transistors. A drain comprised of a first semiconductor material having a first band gap and a source comprised of a second semiconductor material having a second band gap are formed.
International Business Machines Corporation
01/08/15
20150011078

Mask for forming semiconductor pattern, patterning system with the same, and fabricating semiconductor device using the same


A mask for forming a semiconductor pattern includes a first body portion provided with a first through hole for injecting a semiconductor material and a second body portion provided with a second through hole for exhausting a gas. As the result of the gas suction through the second through hole, the semiconductor material may be crystallized to form a semiconductor pattern on a base substrate.
Samsung Display Co., Ltd.
01/08/15
20150011068

Finfet device having a channel defined in a diamond-like shape semiconductor structure


The present disclosure provides a finfet device. The finfet device comprises a semiconductor substrate of a first semiconductor material; a fin structure of the first semiconductor material overlying the semiconductor substrate, wherein the fin structure has a top surface of a first crystal plane orientation; a diamond-like shape structure of a second semiconductor material disposed over the top surface of the fin structure, wherein the diamond-like shape structure has at least one surface of a second crystal plane orientation; a gate structure disposed over the diamond-like shape structure, wherein the gate structure separates a source region and a drain region; and a channel region defined in the diamond-like shape structure between the source and drain regions..
Taiwan Semiconductor Manufacturing Company, Ltd.
01/08/15
20150011058

Method of manufacturing hemts with an integrated schottky diode


An embodiment of a transistor device includes a compound semiconductor material on a semiconductor carrier and a source region and a drain region spaced apart from each other in the compound semiconductor material with a channel region interposed between the source and drain regions. A schottky diode is integrated with the semiconductor carrier, and contacts extend from the source and drain regions through the compound semiconductor material.
Infineon Technologies Austria
01/08/15
20150008562

Pnp bipolar junction transistor fabrication using selective epitaxy


Lateral pnp bipolar junction transistors and design structures for a lateral pnp bipolar junction transistor. An emitter and a collector of the lateral pnp bipolar junction transistor are comprised of p-type semiconductor material that is formed by a selective epitaxial growth process.
International Business Machines Corporation
01/08/15
20150008558

Self-aligned bipolar junction transistors


Device structures and design structures for a bipolar junction transistor. An intrinsic base is formed on the substrate, a terminal is formed on the intrinsic base, and an extrinsic base is formed that is arranged in juxtaposition with the intrinsic base on the substrate.
International Business Machines Corporation
01/08/15
20150008520

Dual channel hybrid semiconductor-on-insulator semiconductor devices


Trenches are formed through a top semiconductor layer and a buried insulator layer of a semiconductor-on-insulator (soi) substrate. A selective epitaxy is performed to form bulk semiconductor portions filling the trenches and in epitaxial alignment with the semiconductor material of a handle substrate.
Stmicroelectronics, Inc.
01/08/15
20150008487

Junction field-effect transistor with raised source and drain regions formed by selective epitaxy


Junction field-effect transistors and design structures for a junction field-effect transistor. A source and a drain of the junction field-effect transistor are comprised of a semiconductor material grown by selective epitaxy and in direct contact with a top surface of a semiconductor layer.
International Business Machines Corporation
01/08/15
20150008483

Fin structure of semiconductor device


The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material having the first lattice constant; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and a pair of notches extending into opposite sides of the middle portion; and an isolation structure surrounding the fin structure, wherein a top surface of the isolation structure is higher than a top surface of the pair of notches..
Taiwan Semiconductor Manufacturing Company, Ltd.
01/08/15
20150008409

Organic light-emitting device, display apparatus, image information-processing apparatus, and image-forming apparatus


Provided is an organic light-emitting device having high efficiency and capable of being driven at a low voltage. An organic light-emitting device includes an anode, a cathode, and an organic compound layer including at least an emission layer between the anode and the cathode.
Canon Kabushiki Kaisha
01/08/15
20150007866

Method for manufacturing a photovoltaic module with two etching steps p1 and p3 and corresponding photovoltaic module


The invention relates to a method for manufacturing a photovoltaic module comprising plurality of solar cells in a thin-layer structure, in which the following are formed consecutively in the structure: an electrode on the rear surface (41), a photovoltaic layer (43) obtained by depositing components including metal precursors and at least one element taken from se and s and by annealing such as to convert said components into a semiconductor material, and another semiconductor layer (44) in order to create a pn junction with the photovoltaic layer (43); characterised in that the metal precursors form, on the electrode on the rear surface (41), a continuous layer, while said at least one element forms a layer having at least one break making it possible, at the end of the annealing step, to leave an area (430) of the layer of metal precursors in the metal state at said break.. .
Commissariat A L'energie Atomique Et Aux Energies Alternatives
01/01/15
20150004765

Carbon-doped cap for a raised active semiconductor region


After formation of a disposable gate structure, a raised active semiconductor region includes a vertical stack, from bottom to top, of an electrical-dopant-doped semiconductor material portion and a carbon-doped semiconductor material portion. A planarization dielectric layer is deposited over the raised active semiconductor region, and the disposable gate structure is replaced with a replacement gate structure.
International Business Machines Corporation
01/01/15
20150004764

Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate


Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatuses and a select transistor coupled to the memory cell string. In at least one of such apparatuses, the select transistor can include a body region including a monocrystalline semiconductor material.
Micron Technology, Inc.
01/01/15
20150004729

Light emitting devices with built-in chromaticity conversion and methods of manufacturing


Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one embodiment, a method for manufacturing a light emitting device includes forming a first semiconductor material, an active region, and a second semiconductor material on a substrate material in sequence, the active region being configured to produce a first emission.
Micron Technology, Inc.
01/01/15
20150001651

Mems device having a suspended diaphragm and manufacturing process thereof


A mems device wherein a die of semiconductor material has a first face and a second face. A diaphragm is formed in or on the die and faces the first surface.
Stmicroelectronics S.r.i.
01/01/15
20150001645

Mems device incorporating a fluidic path, and manufacturing process thereof


A mems device wherein a die of semiconductor material has a first face and a second face. A membrane is formed in or on the die and faces the first surface.
Stmicroelectronics International N.v.
01/01/15
20150001622

Thin body switch transistor


An integrated recessed thin body field effect transistor (fet) and methods of manufacture are disclosed. The method includes recessing a portion of a semiconductor material.
International Business Machines Corporation
01/01/15
20150001587

Methods of forming group iii-v semiconductor materials on group iv substrates and the resulting substrate structures


One method disclosed herein includes forming a patterned mask layer above a surface of a semiconductor substrate, performing at least one etching process through the patterned mask layer to define a plurality of intersecting ridges that define a ridged surface in the substrate, and forming a group iii-v material on the ridged surface of the substrate. An illustrative device disclosed herein includes a group iv substrate having a ridged surface comprised of a plurality of intersecting ridges and a group iii-v material layer positioned on the ridged surface of the group iv substrate..
Globalfoundres Inc.
01/01/15
20150001581

Semiconductor light receiving element and light receiver


An apd in which a first undoped semiconductor region and a second undoped semiconductor region having different semiconductor materials and arranged on an insulating film configure a photo-absorption layer and a multiplying layer, respectively, is employed, whereby crystalline of an interface between the photo-absorption layer and the multiplying layer becomes favorable, and a dark current caused by crystal defects can be decreased. Accordingly, light-receiving sensitivity of an avalanche photodiode can be improved.
Hitachi, Ltd.
01/01/15
20150001535

P-type semiconductor material and semiconductor device


An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (mooy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide.
Semiconductor Energy Laboratory Co., Ltd.
01/01/15
20150001469

Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures


Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials..
Taiwan Semiconductor Manufacturing Company, Ltd.
01/01/15
20150001467

Semiconductor device having superlattice thin film laminated by semiconductor layer and insulator layer


Disclosed herein is a semiconductor device, including: a substrate; and a superlattice thin film formed on the substrate, wherein the superlattice thin film is configured such that insulator layers and semiconductor layers are alternately laminated on the substrate. The superlattice thin film is characterized in that, since it is formed by the lamination of a semiconductor layer and an insulator layer, the semiconductor layer and insulator layer constituting the superlattice thin film may be composed of a crystalline material, an amorphous material or a mixture thereof, and thus various kinds of materials for solving the mismatch in lattice constant between conventional superlattices made of different kinds of semiconductor materials can be used without limitations..
Research & Business Foundation Sungkyunkwan University
01/01/15
20150000730

Method for the low-temperature production of radial-junction semiconductor nanostructures, radial junction device, and solar cell including radial-junction nanostructures


A method for the low-temperature production of radial electronic junction semiconductor nanostructures on a substrate, includes: a) forming on the substrate, metal aggregates capable of electronically doping a first semiconductor material; b) growing, in the vapor phase, doped semiconductor nanowires in the presence of one or more non-dopant precursor gases of the first semiconductor material, the substrate being heated to a temperature at which the metal aggregates are in the liquid phase, the growth of the doped semiconductor nanowires in the vapor phase being catalyzed by the metal aggregates; c) rendering the residual metal aggregates inactive; and d) the chemical vapor deposition, in the presence of one or more precursor gases and a dopant gas, of at least one thin film of a second semiconductor material so as to form at least one radial electronic junction nanostructure between the nanowire and the at least one doped thin film.. .
Centre National De La Recherche Scientifique
01/01/15
20150000376

Sensor component for a gas and/or liquid sensor, production a sensor component for a gas and/or liquid sensor, and detecting at least one material in a gaseous and/or liquid medium


A sensor component is described for a gas and/or liquid sensor having a substrate having at least one first printed conductor and a second printed conductor, which are fashioned such that a voltage can be applied, and having at least one sensitive semiconductor material, additionally including at least one trench a contact segment of the first printed conductor and a contact segment of the second printed conductor being situated on two inner side surfaces at a distance from one another, and the at least one sensitive semiconductor material being filled into the at least one trench in the form of at least one particle, grain, and/or crystal, at least between the first contact segment of the first printed conductor and the first contact segment of the second printed conductor. Also described is a production method for a sensor component for a gas and/or liquid sensor.
Robert Bosch Gmbh
12/25/14
20140377943

Four terminal transistor fabrication


Producing a transistor includes providing a substrate including in order a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer. A gate including a reentrant profile is formed from an electrically conductive material layer stack provided on the first electrically insulating material layer in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate.
12/25/14
20140377925

Selective laser anneal on semiconductor material


A method of forming a semiconductor device including providing a substrate having a first region of a first semiconductor material and a second region of a second semiconductor material and forming a first gate structure in a first region of the semiconductor material and a second gate structure in a second region of the substrate. A first source region and a first drain region is implanted in the first region of the substrate.
International Business Machines Corporation
12/25/14
20140377924

Strained finfet with an electrically isolated channel


A fin structure includes an optional doped well, a disposable single crystalline semiconductor material portion, and a top semiconductor portion formed on a substrate. A disposable gate structure straddling the fin structure is formed, and end portions of the fin structure are removed to form end cavities.
International Business Machines Corporation
12/25/14
20140377923

Method to form finfet/trigate devices on bulk semiconductor wafers


A method for fabricating a finfet device having an insulating layer that insulates the fin from a substrate is described. The insulating layer can prevent leakage current that would otherwise flow through bulk semiconductor material in the substrate.
International Business Machines Corporation
12/25/14
20140377918

Overlapped iii-v finfet with doped semiconductor extensions


A semiconductor structure that includes a semiconductor fin comprising an iii-v compound semiconductor material. A functional gate structure straddles a portion of the semiconductor fin.
International Business Machines Corporation
12/25/14
20140376962

Image forming apparatus


An image forming apparatus includes an image carrier configured to carry thereon a developer image, an endless belt configured to be rotated while contacting the image carrier, a first cleaning roller having an outer surface made of semiconductor material and configured to electrically remove attachments attached on the endless belt, and a backup roller made of metal and arranged to oppose the first cleaning roller with the endless belt being interposed therebetween. The endless belt has a nip portion at which both the backup roller and the first cleaning roller contact the endless belt while opposing each other, and the first cleaning roller contacts the endless belt at a more upstream side than the nip portion in a moving direction of the endless belt..
Brother Kogyo Kabushiki Kaisha
12/25/14
20140374824

Mosfet with integrated schottky diode


Aspects of the present disclosure describe a schottky structure with two trenches formed in a semiconductor material. The trenches are spaced apart from each other by a mesa.
Alpha & Omega Semiconductor Incorporated
12/25/14
20140374806

Four terminal transistor


A transistor includes a substrate, a first electrically conductive material layer positioned on the substrate, and a first electrically insulating material layer is positioned on the first electrically conductive material layer. A gate includes a second electrically conductive material and a reentrant profile in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate.
12/25/14
20140374800

Overlapped iii-v finfet with doped semiconductor extensions


A semiconductor structure that includes a semiconductor fin comprising an iii-v compound semiconductor material. A functional gate structure straddles a portion of the semiconductor fin.
International Business Machines Corporation
12/25/14
20140374797

Semiconductor device and fabricating the same


A semiconductor device includes a substrate, a compound semiconductor layer, and first and second semiconductor patterns. The substrate includes first and second regions.
12/25/14
20140374796

Semiconductor structure with aspect ratio trapping capabilities


A semiconductor structure includes a first semiconductor region. The first semiconductor region includes a first semiconductor layer composed of a group iv semiconductor material having a top surface and a back surface.
International Business Machines Corporation
12/25/14
20140374762

Circuit including four terminal transistor


An electrical circuit includes a substrate and a plurality of transistors. The plurality of transistors includes a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer.
12/25/14
20140374708

Electroluminescent organic double gate transistor


An organic electroluminescent transistor is described. The organic electroluminescent transistor has a first and a second dielectric layer, a first and a second control electrode and an assembly having a source electrode, a drain electrode and an ambipolar channel.
12/25/14
20140373919

Photovoltaic cell and manufacturing process


A photovoltaic cell including a semiconductor substrate of a first conductivity type provided with a main surface, a first layer made from amorphous semiconductor material of first conductivity type in contact with the main surface of the substrate, a first electric contact formed on the first amorphous layer, a second layer of amorphous semiconductor material of a second conductivity type in contact with the main surface of the substrate, a second electric contact formed on the second amorphous layer and an electrically insulating layer, a cell wherein the electrically insulating layer is formed completely on the first amorphous layer and the first and second contacts extend on the electrically insulating layer.. .
Commissariat À L'energie Atomique Et Aux Energies Alternatives
12/25/14
20140373917

Photovoltaic devices and making


In one aspect of the present invention, a photovoltaic device is provided. The photovoltaic device includes a transparent layer; a first porous layer disposed on the transparent layer, wherein the first porous layer comprises a plurality of pores extending through a thickness of the first porous layer; a first semiconductor material disposed in the plurality of pores to form a patterned first semiconductor layer; and a second semiconductor layer disposed on the first porous layer and the patterned first semiconductor layer, wherein the patterned first semiconductor layer is substantially transparent.
First Solar, Inc.
12/18/14
20140370786

Method for the double-side polishing of a semiconductor wafer


A method of simultaneous double-side polishing of at least one semiconductor material wafer includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate having a front and rear side. The at least one wafer is polished between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent.
Siltronic Ag
12/18/14
20140370690

Quantum dots made using phosphine


A process is disclosed for producing quantum dots (qds) by reacting one or more core semiconductor precursors with phosphine in the presence of a molecular cluster compound. The core semiconductor precursor(s) provides elements that are incorporated into the qd core semiconductor material.
Nanoco Technologies, Ltd.
12/18/14
20140370683

T-shaped compound semiconductor lateral bipolar transistor on semiconductor-on-insulator


A base region extends upward from a recessed semiconductor surface of a semiconductor material portion present on an insulator. The base region includes a vertical stack of, an extrinsic base region and an intrinsic base region.
International Business Machines Corporation
12/18/14
20140370668

Method of making a transitor


The invention relates to a method for manufacturing a transistor comprising the preparation of a stack of layers of the semiconductor on insulator type comprising at least one substrate on which an insulating layer and an initial semiconductor layer are successively disposed. The method includes the formation of at least one oxide pad extending from a top face of the insulating layer, the formation of an additional layer made from semiconductor material covering the oxide pad and intended to form a channel for the transistor, the formation of a gate stack above the oxide pad, and the formation of a source and drain on either side of the gate stack..
Stmicroelectronics (crolles 2) Sas
12/18/14
20140370651

Method of manufacturing semiconductor device


A semiconductor device includes a substrate made of a semiconductor material, an n-type semiconductor layer arranged on a portion of one principal surface of the substrate, and a p-type semiconductor layer arranged on a portion of the one principal surface of the substrate, the portion not provided with the n-type semiconductor layer. The n-type semiconductor layer includes a portion located right above the p-type semiconductor layer..
Sanyo Electric Co., Ltd.
12/18/14
20140370423

Extreme ultraviolet (euv) radiation pellicle formation method


An extreme ultraviolet (euv) photolithography pellicle with at least 70% transmissivity to euv can be formed from a layer of semiconductor material applied to a substrate. The bottom surface of the layer can be exposed by forming support structure(s) from the substrate.
International Business Machines Corporation
12/18/14
20140370381

Secondary battery


A secondary battery includes: a negative electrode; a positive electrode containing a p-type semiconductor material; and an isolation layer configured to isolate the negative electrode from the positive electrode and including a hole transmission member. The isolation layer is layered by being applied to at least one of the negative electrode and the positive electrode.
Greenful New Energy Co., Ltd.
12/18/14
20140369107

Structures for resistance random access memory and methods of forming the same


Memory cells and methods of forming the same and devices including the same. The memory cells have first and second electrodes.
Micron Technology, Inc.
12/18/14
20140368123

Light-emitting metal-oxide-semiconductor devices and associated systems, devices, and methods


Various embodiments of solid state transducer (“sst”) devices are disclosed. In several embodiments, a light emitter device includes a metal-oxide-semiconductor (mos) capacitor, an active region operably coupled to the mos capacitor, and a bulk semiconductor material operably coupled to the active region.
Micron Technology, Inc.


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Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

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