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Semiconductor Material patents



      
           
This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Semiconductor device and method of manufacturing the same

Infineon Technologies Austria Ag

Semiconductor device and method of manufacturing the same

Source/drain junction formation

Taiwan Semiconductor Manufacturing

Source/drain junction formation

Source/drain junction formation

International Business Machines

Electrically isolated sige fin formation by local oxidation

Date/App# patent app List of recent Semiconductor Material-related patents
04/23/15
20150112081
 Naphthobisthiadiazole derivative patent thumbnailnew patent Naphthobisthiadiazole derivative
A naphthobisthiadiazole derivative is represented by formula 1. In formula 1, z is selected from a hydrogen atom, a boronic acid group, a boronic acid ester group, a trifluoroborate salt group and a triolborate salt group, and at least one z is a boronic acid group, a boronic acid ester group, a trifluoroborate salt group or a triolborate salt group.
Sankyo Kasei Co., Ltd.
04/23/15
20150111372
 Phosphorus and arsenic doping of semiconductor materials patent thumbnailnew patent Phosphorus and arsenic doping of semiconductor materials
Provided are methods for preparing a doped silicon material. The methods include contacting a surface of a silicon material with a dopant solution comprising a dopant-containing compound selected from a phosphorus-containing compound and an arsenic-containing compound, to form a layer of dopant material on the surface; and diffusing the dopant into the silicon material, thereby forming the doped silicon material, wherein the doped silicon material has a sheet resistance (rs) of less than or equal to 2,000 Ω/sq..
Sematech, Inc.
04/23/15
20150111369
 Semiconductor buffer structure, semiconductor device including the semiconductor buffer structure, and  manufacturing the semiconductor device using the semiconductor buffer structure patent thumbnailnew patent Semiconductor buffer structure, semiconductor device including the semiconductor buffer structure, and manufacturing the semiconductor device using the semiconductor buffer structure
A semiconductor buffer structure includes a silicon substrate, a nucleation layer formed on the silicon substrate, and a buffer layer formed on the nucleation layer. The buffer layer includes a first layer formed of a nitride semiconductor material having a uniform composition rate, a second layer formed of the same material as the nucleation layer on the first layer, and a third layer formed of the same material with the same composition ratio as the first layer on the second layer..
04/23/15
20150111359
 Source/drain junction formation patent thumbnailnew patent Source/drain junction formation
An embodiment method of forming a source/drain region for a transistor includes forming a recess in a substrate, epitaxially growing a semiconductor material in the recess, amorphizing the semiconductor material, and doping the semiconductor material to form a source/drain region. In an embodiment, the doping utilizes either phosphorus or boron as the dopant.
Taiwan Semiconductor Manufacturing Company, Ltd.
04/23/15
20150111347
 Electronic device structure with a semiconductor ledge layer for surface passivation patent thumbnailnew patent Electronic device structure with a semiconductor ledge layer for surface passivation
Electronic device structures including semiconductor ledge layers for surface passivation and methods of manufacturing the same are disclosed. In one embodiment, the electronic device includes a number of semiconductor layers of a desired semiconductor material having alternating doping types.
Cree, Inc.
04/23/15
20150108851
 Photovoltaic systems with shaped high frequency electric pulses patent thumbnailnew patent Photovoltaic systems with shaped high frequency electric pulses
At least one photovoltaic (pv) cell comprising a semiconductor material having p-n junctions formed therein, and configured to generate a pv output voltage in response to light; and a pulse generator coupled to receive a pv output voltage and generate electric output pulses therefrom, and apply such pulses to the pv cell.. .
Ultrasolar Technology, Inc.
04/23/15
20150108617
 Method for chemically passivating a surface of a product made of a iii-v semiconductor material and the product obtained by such a method patent thumbnailnew patent Method for chemically passivating a surface of a product made of a iii-v semiconductor material and the product obtained by such a method
A method for chemically passivating a surface of a product made of a iii-v semiconductor material in which a) a p(n) polymer film is formed by deposition in a solvent comprising liquid ammonia. The film is formed by deposition, without electrochemical assistance, in the solvent, in the presence of an oxidizing chemical additive comprising phosphorous and generating electrical charge carriers in said surface..
Ecole Polytechnique
04/23/15
20150108616
 Multi-height multi-composition semiconductor fins patent thumbnailnew patent Multi-height multi-composition semiconductor fins
A dielectric material layer is formed on a semiconductor-on-insulator (soi) substrate including a top semiconductor layer containing a first semiconductor material. An opening is formed within the dielectric material layer, and a trench is formed in the top semiconductor layer within the area of the opening by an etch.
International Business Machines Corporation
04/23/15
20150108573
 Semiconductor device including vertically spaced semiconductor channel structures and related methods patent thumbnailnew patent Semiconductor device including vertically spaced semiconductor channel structures and related methods
A method for making a semiconductor device may include forming, on a substrate, at least one stack of alternating first and second semiconductor layers. The first semiconductor layer may comprise a first semiconductor material and the second semiconductor layer may comprise a second semiconductor material.
Stmicroelectronics, Inc.
04/23/15
20150108572
 Electrically isolated sige fin formation by local oxidation patent thumbnailnew patent Electrically isolated sige fin formation by local oxidation
A silicon germanium alloy layer is formed on a semiconductor material layer by epitaxy. An oxygen impermeable layer is formed on the silicon germanium alloy layer.
International Business Machines Corporation
04/23/15
20150108544
new patent

Fin spacer protected source and drain regions in finfets


An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin.
Taiwan Semiconductor Manufacturing Company, Ltd.
04/23/15
20150108500
new patent

Semiconductor device and manufacturing the same


A semiconductor device comprises a semiconductor body of a first semiconductor material, wherein at least a part of the semiconductor body constitutes a drift zone of a first conductivity type. The semiconductor device further comprises a channel layer structure comprising a semiconductor heterojunction between first and second semiconductor layers electrically coupled to the drift zone.
Infineon Technologies Austria Ag
04/23/15
20150108495
new patent

Gallium nitride devices with discontinuously graded transition layer


The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer.
International Rectifier Corporation
04/23/15
20150108430
new patent

Transistor channel


A transistor device includes a substrate having a first region and a second region, a first semiconductor layer of a first semiconductor material having a first portion over the first region and a second portion over the second region, the first portion being separated from the second portion, a second semiconductor layer of a second semiconductor material over the second portion of the first semiconductor layer, a first transistor of a first conductivity type, the first transistor disposed within the first region and having a first set of source/drain regions formed in the first semiconductor layer, and a second transistor of a second conductivity type, the second transistor disposed within the second region and having a second set of source/drain regions formed in the second semiconductor layer. The second conductivity type is different than the second conductivity type, and the second semiconductor material is different from the first semiconductor material..
Taiwan Semiconductor Manufacturing Company, Ltd.
04/23/15
20150108427
new patent

Growth of cubic crystalline phase strucure on silicon substrates and devices comprising the cubic crystalline phase structure


A semiconductor device is disclosed. The semiconductor device includes a substrate comprising a groove.
Stc. Unm
04/23/15
20150107673
new patent

Coating liquid for forming sulfide semiconductor, sulfide semiconductor thin film, and thin film solar cell


The present invention aims to provide a sulfide semiconductor-forming coating liquid capable of easily forming a sulfide semiconductor having a large area, the sulfide semiconductor being useful as a semiconductor material for photoelectric conversion materials. The present invention also aims to provide a sulfide semiconductor thin film produced using the sulfide semiconductor-forming coating liquid; and a thin film solar cell.
Sekisui Chemical Co., Ltd.
04/23/15
20150107668
new patent

Solar cell


Disclosed is a solar cell that comprises a substrate made of a semiconductor material, a first amorphous semiconductor layer placed on one region of the substrate and being of one conductivity type, a substantially intrinsic i-type amorphous semiconductor layer provided to extend from another region of the substrate over onto the first amorphous semiconductor layer, a second amorphous semiconductor layer provided on the i-type amorphous semiconductor layer and being of another conductivity type, a first crystalline semiconductor layer placed between the first amorphous semiconductor layer and the i-type amorphous semiconductor layer and being of the one conductivity type, a second crystalline semiconductor layer placed between the first crystalline semiconductor layer and the i-type amorphous semiconductor layer and being of the other conductivity type, and a third amorphous semiconductor layer placed between the second crystalline semiconductor layer and the i-type amorphous semiconductor layer and being of the other conductivity type.. .
Sanyo Electric Co., Ltd.
04/23/15
20150107644
new patent

Photovoltaic (pv) efficiency using high frequency electric pulses


A system can include at least one solar cell comprising a semiconductor material having p-n junctions formed therein; and a pulse generator electrically coupled to the solar cell and configured to apply electric pulses to dynamically alter a band gap of the semiconductor material as photons are received by the semiconductor material.. .
Ultrasolar Technology, Inc.
04/16/15
20150104920

Semiconductor device and related fabrication methods


Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a collector region of semiconductor material having a first conductivity type, a base region of semiconductor material within the collector region, the base region having a second conductivity type opposite the first conductivity type, and a doped region of semiconductor material having the second conductivity type, wherein the doped region is electrically connected to the base region and the collector region resides between the base region and the doped region.
04/16/15
20150102471

Semiconductor-on-insulator structure and fabricating the same


Methods for forming a layer of semiconductor material are provided. A substrate is provided.
Taiwan Semiconductor Manufacturing Company Limited
04/16/15
20150102466

Semiconductor-on-insulator structure and fabricating the same


Methods for forming a layer of semiconductor material and a semiconductor-on-insulator structure are provided. A substrate including one or more devices or features formed therein is provided.
Taiwan Semiconductor Manufacturing Company Limited
04/16/15
20150102454

Forming fins of different materials on the same substrate


A semiconductor substrate may be formed by providing an providing a semiconductor-on-insulator (soi) substrate including a base semiconductor layer, a buried insulator layer above the base semiconductor layer, and a soi layer comprising a first semiconductor material above the buried insulator layer; forming an isolation region in the soi layer isolating a first portion of the soi layer from a second portion of the soi layer; removing the second portion of the soi layer to expose a portion of the buried insulator layer; forming a hole in the exposed portion of the buried insulator layer to expose a portion of the base semiconductor layer; and forming a semiconductor layer made of a second semiconductor material on the exposed portion of the base semiconductor layer, so that the replacement semiconductor layer covers the exposed region of the buried insulator layer.. .
International Business Machines Corporation
04/16/15
20150102428

Merged fin finfet with (100) sidewall surfaces and making same


A merged fin finfet and method of fabrication. The finfet includes: two or more single-crystal semiconductor fins on a top surface of an insulating layer on semiconductor substrate, each fin of the two or more fins having a central region between and abutting first and second end regions and opposite sides, top surfaces and sidewalls of the two or more fins are (100) surfaces and the longitudinal axes of the two or more fins aligned with a [100] direction; a gate dielectric layer on each fin of the two or more fins; an electrically conductive gate over the gate dielectric layer over the central region of each fin of the of two or more fins; and a merged source/drain comprising an a continuous layer of epitaxial semiconductor material on ends of each fin of the two or more fins, the ends on a same side of the conductive gate..
International Business Machines Corporation
04/16/15
20150102412

Semiconductor-on-insulator (soi) device and related methods for making same using non-oxidizing thermal treatment


A method for making a semiconductor device may include forming, on a first semiconductor layer of a semiconductor-on-insulator (soi) wafer, a second semiconductor layer comprising a second semiconductor material different than a first semiconductor material of the first semiconductor layer. The method may further include performing a thermal treatment in a non-oxidizing atmosphere to diffuse the second semiconductor material into the first semiconductor layer, and removing the second semiconductor layer..
Stmicroelectronics, Inc.
04/16/15
20150102411

Finfet with buried insulator layer and forming


A fin structure suitable for a finfet and having a buried insulator layer is disclosed. In an exemplary embodiment, a semiconductor device comprises a substrate with a first semiconductor material and having a fin structure formed thereupon.
Taiwan Semiconductor Manufacturing Company, Ltd.
04/16/15
20150101663

Organic photovoltaic device produced from an electrochemical depositing nanofibrilar poly(3,4-ethylenedioxythiophene) (pedot) hole extraction layer in organic solar cells


An electrochemical method for producing a hole extraction layer in a solar cell based on organic semiconductor materials. Conjugated polymers are used to build a hole extraction layer and a photoactive layer.
New York University
04/16/15
20150101659

Hetero-contact solar cell and the production thereof


A hetero-contact solar cell has a front side provided for an incidence of solar radiation. The solar cell has an absorber of a crystalline semiconductor material of a first conductivity type, an amorphous semiconductor layer of the first conductivity type doped more highly than the absorber and an electrically conductive, transparent front side conduction layer provided on the amorphous semiconductor layer.
Roth & Rau Ag
04/09/15
20150099334

Method of making a cmos semiconductor device using a stressed silicon-on-insulator (soi) wafer


A method for forming a complementary metal oxide semiconductor (cmos) semiconductor device includes providing a stressed silicon-on-insulator (ssoi) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region.
Stmicroelectronics, Inc.
04/09/15
20150097298

Semiconductor substrate assembly


A semiconductor substrate assembly includes a semiconductor material layer, a first isolation layer, a second isolation layer, a first conductive pillar, and a second conductive pillar. The semiconductor material layer has a first surface and a second surface opposite to the first surface.
Industrial Technology Research Institute
04/09/15
20150097297

Semiconductor article having a zig-zag guard ring


A semiconductor article which includes a semiconductor base portion including a semiconductor material; a back end of the line (beol) wiring portion on the semiconductor base portion and comprising a plurality of wiring layers having metallic wiring and insulating material, said beol wiring portion excluding a semiconductor material; and a guard ring in the beol wiring portion and surrounding a structure in the semiconductor chip, the guard ring having a zig-zag configuration.. .
International Business Machines Corporation
04/09/15
20150097270

Finfet with relaxed silicon-germanium fins


A method of forming a semiconductor structure includes forming a first fin in a p-fet device region of a semiconductor substrate and a second fin in an n-fet device region of the semiconductor substrate substantially parallel to the first fin. The first fin and the second fin each comprise a strained semiconductor material.
International Business Machines Corporation
04/09/15
20150097239

Passivation structure of fin field effect transistor


A finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower fin portion comprising a first semiconductor material having a first lattice constant; an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant; a middle fin portion comprising a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant; and a passivation structure surrounding the fin structure comprising a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material; an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material; and a middle passivation portion surrounding the middle fin portion comprising a third oxynitride of the third semiconductor material.. .
Taiwan Semiconductor Manufacturing Company, Ltd.
04/09/15
20150097196

Integrated device including silicon and iii-nitride semiconductor devices


A semiconductor device that includes one semiconductor device formed in one semiconductor material and a second semiconductor device formed in another semiconductor material on a common substrate, and a method of fabricating the semiconductor device.. .
International Rectifier Corporation
04/09/15
20150097182

Display device and fabricating the same


A disclosed display device includes a first oxide semiconductor layer and an oxide semiconductor connection wire both formed from an oxide semiconductor material layer over a substrate. The oxide semiconductor connection wire is integrally connected to the first oxide semiconductor layer and has a lower sheet resistance than the first oxide semiconductor layer.
Lg Display Co., Ltd.
04/02/15
20150094436

Copolymer, organic semiconductor material, organic electrical device, and photovoltaic module


A copolymer containing a repeating unit having a dioxopyrrole condensed ring skeleton and a repeating unit having a dithieno condensed ring skeleton and also having a specific substituent is provided.. .
Mitsubishi Chemical Corporation
04/02/15
20150093904

Arrays of long nanostructures in semiconductor materials and methods thereof


An array of nanowires and method thereof. The array of nanowires includes a plurality of nanowires.
Alphabet Energy, Inc.
04/02/15
20150093862

Interface treatment of semiconductor surfaces with high density low energy plasma


An electron beam plasma source is used in a soft plasma surface treatment of semiconductor surfaces containing ge or group iii-v compound semiconductor materials.. .
Applied Mateirals, Inc.
04/02/15
20150093850

Practical producing an aerogel composite continuous thin film thermoelectric semiconductor material


A method is disclosed of constructing a composite material structure, comprised of an aerogel precursor foundation, which is then overlaid throughout its interior with an even and continuous thin layer film of doped thermoelectric semiconductor such that electrical current is transmitted as a quantum surface phenomena, while the cross-section for thermal conductivity is kept low, with the aerogel itself dissipating that thermal conductivity. In one preferred embodiment this is achieved using a modified successive ionic layer adsorption and reaction in the liquid phase..
04/02/15
20150093067

Oxide capacitor elecro-optical phase shifter


An electro-optical phase shifter to be located in an optical waveguide may include a rib of a semiconductor material extending along a length of the optical waveguide and a control structure configured to modify a concentration of carriers in the rib according to a control voltage present between first and second control terminals of the phase shifter. The control structure may include a conductive layer covering a portion of the rib and electrically connected to a first of the control terminals.
Stmicroelectronics Sa
04/02/15
20150091136

Zener diode haviing a polysilicon layer for improved reverse surge capability and decreased leakage current


A semiconductor device such as a zener diode includes a first semiconductor material of a first conductivity type and a second semiconductor material of a second conductivity type in contact with the first semiconductor material to form a junction therebetween. A first oxide layer is disposed over a portion of the second semiconductor material such that a remaining portion of the second semiconductor material is exposed.
Vishay General Semiconductor Llc
04/02/15
20150091061

Passivation technique for wide bandgap semiconductor devices


A method of protecting a semiconductor structure from water and a semiconductor structure formed by the method. The semiconductor structure includes a wide-bandgap semiconductor material in which at least one semiconductor device is formed.
Massachusetts Institute Of Technology
04/02/15
20150091023

Semiconductor device and manufacturing


A diode comprising a reduced surface field effect trench structure, the reduced surface field effect trench structure comprising at least two trenches formed in a substrate and separated from one another by a joining region of the substrate, the joining region comprising an electrical contact and a layer of p-doped semiconductor material.. .
Nxp B.v.
04/02/15
20150090975

Phthalocyanine nano-size structures, and electronic elements using said nano-size structures


There is provided an organic semiconductor material with which it is possible to manufacture an electronic element by a wet process which is low cost. Furthermore, the object is to provide an organic semiconductor electronic element which is hardly broken, light in weight and inexpensive, and has high characteristic.
Dic Corporation
04/02/15
20150090942

Crystals of semiconductor material having a tuned band gap energy and preparation thereof


The present invention provides a semiconductor crystal comprising a semiconductor material having a tuned band gap energy, and methods for preparation thereof. More particularly, the invention provides a semiconductor crystal comprising a semiconductor material and amino acid molecules, peptides, or a combination thereof, incorporated within the crystal lattice, wherein the amino acid molecules, peptides, or combination thereof tune the band gap energy of the semiconductor material..
Technion Research And Development Foundation Ltd.
04/02/15
20150090324

Multi-junction solar cell devices


A photovoltaic cell structure for manufacturing a photovoltaic device. The photovoltaic cell structure includes a substrate including a surface region.
Stion Corporation
03/26/15
20150087140

Film forming method, film forming device, and film forming system


A film forming method according to an embodiment includes: (a) a step of supplying a first precursor gas of a semiconductor material into a processing vessel in which a processing target substrate is disposed, the first precursor gas being adsorbed onto the processing target substrate during the step; (b) a step of supplying a second precursor gas of a dopant material into the processing vessel, the second precursor gas being adsorbed onto the processing target substrate during the step; and (c) a step of generating the plasma of a reaction gas in the processing vessel, a plasma treatment being performed during the step so as to modify a layer adsorbed onto the processing target substrate.. .
Tokyo Electron Limited
03/26/15
20150087090

Monitor test key of epi profile


A method and apparatus for estimating a height of an epitaxially grown semiconductor material in other semiconductor devices. The method includes epitaxially growing first, second, and third portions of semiconductor material on a first semiconductor device, measuring a height of the third portion of semiconductor material and a height of the first or second portion of semiconductor material, measuring a first saturation current through the first and second portions of semiconductor material, measuring a second saturation current through the first and third portions of semiconductor material, and preparing a model of the first saturation current relative to the height of the first or second portion of semiconductor material and the second saturation current relative to an average of the height of the first and third portions of semiconductor material.
Taiwan Semiconductor Manufacturing Company, Ltd.
03/26/15
20150084153

Schottky device and manufacture


A schottky device includes a plurality of mesa structures where one or more of the mesa structures includes a doped region having a multi-concentration dopant profile. In accordance with an embodiment, the schottky device is formed from a semiconductor material of a first conductivity type.
Semiconductor Components Industries, Llc
03/26/15
20150084120

Charge-compensation semiconductor device


An active area of a semiconductor body includes a first charge-compensation structure having spaced apart n-type pillar regions, and an n-type first field-stop region of a semiconductor material in ohmic contact with a drain metallization and the n-type pillar regions and having a doping charge per area higher than a breakdown charge per area of the semiconductor material. A punch-through area of the semiconductor body includes a p-type semiconductor region in ohmic contact with a source metallization, a floating p-type body region and an n-type second field-stop region.
Infineon Technologies Austria Ag
03/26/15
20150084096

Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels


A faceted intrinsic buffer semiconductor material is deposited on sidewalls of a source trench and a drain trench by selective epitaxy. A facet adjoins each edge at which an outer sidewall of a gate spacer adjoins a sidewall of the source trench or the drain trench.
International Business Machines Corporation
03/26/15
20150084095

Method for producing a transistor


The invention concerns a method for producing a transistor. The gate of the transistor is produced after having produced source and drain electrodes of the transistor.
Commissariat A L'energie Atomique Et Aux Ene Alt
03/26/15
20150084091

Tunnel field-effect transistors with a gate-swing broken-gap heterostructure


Device structures, fabrication methods, and design structures for tunnel field-effect transistors. A drain comprised of a first semiconductor material having a first band gap and a source comprised of a second semiconductor material having a second band gap are formed.
International Business Machines Corporation
03/26/15
20150084074

Gallium nitride material and device deposition on graphene terminated wafer and forming the same


A method of forming an epitaxial semiconductor material that includes forming a graphene layer on a semiconductor and carbon containing substrate and depositing a metal containing monolayer on the graphene layer. An epitaxial layer of a gallium containing material is formed on the metal containing monolayer.
International Business Machines Corporation
03/26/15
20150083969

Nanocrystal particles and processes for synthesizing the same


A nanocrystal particle including at least one semiconductor material and at least one halogen element, the nanocrystal particle including: a core comprising a first semiconductor nanocrystal; and a shell surrounding the core and comprising a crystalline or amorphous material, wherein the halogen element is present as being doped therein or as a metal halide. .
Samsung Electronics Co., Ltd.
03/26/15
20150083036

Gallium nitride material and device deposition on graphene terminated wafer and forming the same


A method of forming an epitaxial semiconductor material that includes forming a graphene layer on a semiconductor and carbon containing substrate and depositing a metal containing monolayer on the graphene layer. An epitaxial layer of a gallium containing material is formed on the metal containing monolayer.
International Business Machines Corporation
03/19/15
20150080654

Endoscope


An endoscope (1) includes a first beam path (3) formed at least at a distal end (2), and an image recording chip (5), which captures the first beam path (3). The endoscope includes a shutter apparatus (7) having a shutter element (8) composed of a semiconductor material, which is formed in the first beam path (3).
SchÖlly Fiberoptic Gmbh
03/19/15
20150079803

Method of forming strain-relaxed buffer layers


Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top.
Applied Materials, Inc.
03/19/15
20150079766

Optimized fabricating patterns of iii-v semiconductor material on a semiconductor substrate


With r being determined to be greater than tan(θ).. .
03/19/15
20150079765

High aspect ratio memory hole channel contact formation


A method of fabricating a semiconductor device, such as a three-dimensional monolithic nand memory string, includes etching a select gate electrode over a first gate insulating layer over a substrate to form an opening, forming a second gate insulating layer over the sidewalls of the opening, forming a sacrificial spacer layer over the second gate insulating layer on the sidewalls of the opening, and etching the first gate insulating layer over the bottom surface of the opening to expose the substrate, removing the sacrificial spacer layer to expose the second gate insulating layer over the sidewalls of the opening, and forming a protrusion comprising a semiconductor material within the opening and contacting the substrate, wherein the second gate insulating layer is located between the select gate electrode and first and second side surfaces of the protrusion.. .
Sandisk Technologies, Inc.
03/19/15
20150079751

Fin field effect transistor with merged metal semiconductor alloy regions


Raised active regions having faceted semiconductor surfaces are formed on semiconductor fins by selective epitaxy such that the raised active regions are not merged among one another, but are proximal to one another by a distance less than a thickness of a metal semiconductor alloy region to be subsequently formed. A contiguous metal semiconductor alloy region is formed by depositing and reacting a metallic material with the semiconductor material of raised active regions.
International Business Machines Corporation
03/19/15
20150079750

Tilt implantation for forming finfets


Methods for fabrication of fin devices for an integrated circuit are provided. Fin structures are formed in a semiconductor material, where the fin structures include sidewalls and tops.
Taiwan Semiconductor Manufacturing Company Limited
03/19/15
20150079733

Three-dimensional system-in-a-package


A microelectronic assembly can include first, second and third stacked substantially planar elements, e.g., of dielectric or semiconductor material, and which may have a cte of less than 10 ppm/° c. The assembly may be a microelectronic package and may incorporate active semiconductor devices in one, two or more of the first, second or third elements to function cooperatively as a system-in-a-package.
Tessera, Inc.
03/19/15
20150079725

Method and apparatus providing multi-step deposition of thin film layer


A multi-stage method and apparatus for vaporizing and depositing a tellurium containing semiconductor material on a substrate.. .
First Solar, Inc.
03/19/15
20150079717

Apparatus and methods for fabricating solar cells


A method for fabricating a solar cell generally comprises delivering a solar cell substructure to a chamber. Electromagnetic radiation is generated using a wave generating device that is coupled to the chamber such that the wave generating device is positioned proximate to the solar cell substructure.
Tsmc Solar Ltd.
03/19/15
20150078703

Hybrid optical apparatuses including optical waveguides


Described are embodiments of hybrid optical apparatuses including anti-resonant optical waveguides, and methods for making such apparatuses and systems. In one embodiment, a hybrid optical apparatus may include a first semiconductor region including an active region of one or more layers of semiconductor materials and a second semiconductor region coupled with the first semiconductor region.
03/19/15
20150076677

Cte matched interposer and making


The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side.
Silex Microsystems Ab
03/19/15
20150076651

Thermocouple, thermopile, infrared ray sensor and manufacturing infrared ray sensor


An infrared ray sensor includes a thermopile. The thermopile includes a first semiconductor material part and a second semiconductor material part, the first semiconductor material part and the second semiconductor material part are laminated, and a dielectric film is provided between the first semiconductor material part and the second semiconductor material part..
Ricoh Company, Ltd.
03/19/15
20150076607

Fin field effect transistor with merged metal semiconductor alloy regions


Raised active regions having faceted semiconductor surfaces are formed on semiconductor fins by selective epitaxy such that the raised active regions are not merged among one another, but are proximal to one another by a distance less than a thickness of a metal semiconductor alloy region to be subsequently formed. A contiguous metal semiconductor alloy region is formed by depositing and reacting a metallic material with the semiconductor material of raised active regions.
International Business Machines Corporation
03/19/15
20150076604

Field effect transistor including a recessed and regrown channel


At least one doped semiconductor material region is formed over a crystalline insulator layer. A disposable gate structure and a planarization dielectric layer laterally surrounding the disposable gate structure are formed over the at least one doped semiconductor material region.
International Business Machines Corporation
03/19/15
20150076586

Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device


A memory film layer is formed in a memory opening through an alternating stack of first material layers and second material layers. A sacrificial material layer is deposited on the memory film layer.
Sandisk Technologies, Inc.
03/19/15
20150076507

Epitaxy substrate, producing an epitaxy substrate and optoelectronic semiconductor chip comprising an epitaxy substrate


An epitaxy substrate (11, 12, 13) for a nitride compound semiconductor material is specified, which has a nucleation layer (2) directly on a substrate (1) wherein the nucleation layer (2) has at least one first layer (21) composed of alon with a column structure. A method for producing an epitaxy substrate and an optoelectronic semiconductor chip comprising an epitaxy substrate are furthermore specified..
Osram Opto Semiconductors Gmbh
03/19/15
20150076449

Semiconductor device and manufacturing method thereof


A semiconductor device includes a superlattice buffer layer formed on a substrate. An upper buffer layer is formed on the superlattice buffer layer.
Fujitsu Limited


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Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

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