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This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Photodetectors and photovoltaics based on semiconductor nanocrystals

Invisage Technologies

Photodetectors and photovoltaics based on semiconductor nanocrystals

Memory arrays and methods of forming memory cells

Micron Technology

Memory arrays and methods of forming memory cells

Date/App# patent app List of recent Semiconductor Material-related patents
05/28/15
20150146507
 Submount-integrated photodetector for monitoring a laser for a heat-assisted magnetic recording head patent thumbnailnew patent Submount-integrated photodetector for monitoring a laser for a heat-assisted magnetic recording head
In a heat-assisted magnetic recording hard disk drive, a laser module includes a submount-integrated photodetector configured to receive optical energy from a laser by way of a head slider. The submount may be formed of a semiconductor material such as a crystalline silicon material, and the photodetector may be a photodiode that is integrally formed with the submount.
Hgst Netherlands B.v.
05/28/15
20150145065
 Finfet isolation by selective cyclic etch patent thumbnailnew patent Finfet isolation by selective cyclic etch
Etching interleaved structures of semiconductor material forming fins of finfets and local isolation material interposed between the fins is performed alternately and cyclically by alternating etchants cyclically such as by alternating gases during reactive ion etching. Etchants are preferably alternated when one of the semiconductor material and the local isolation material protrudes above the other by a predetermined distance.
International Business Machines Corporation
05/28/15
20150145044
 Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor constructions patent thumbnailnew patent Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor constructions
The invention includes floating body transistor constructions containing u-shaped semiconductor material slices. The u-shapes have a pair of prongs joined to a central portion.
Micron Technology, Inc.
05/28/15
20150145042
 Transistors having multiple lateral channel dimensions patent thumbnailnew patent Transistors having multiple lateral channel dimensions
Fin field effect transistors or semiconductor nanowire field effect transistors having different lateral channel dimensions can be formed by providing multiple disposable gate structures, removing one type of disposable gate structures while masking at least another type of disposable gate structures, thinning physically exposed semiconductor material portions by oxidation and an oxide etch, repeatedly performing the thinning process for any additional type of disposable gate structures, and filling gate cavities with replacement gate structures. Field effect transistors having different lateral channel dimensions can provide different threshold voltages and other device characteristics to provide a variety of field effect transistors on a same semiconductor substrate..
International Business Machines Corporation
05/28/15
20150145008
 Fin capacitor employing sidewall image transfer patent thumbnailnew patent Fin capacitor employing sidewall image transfer
Spacer structures are formed around an array of disposable mandrel structures and above a doped semiconductor material portion. A sidewall image transfer process is employed to pattern an upper portion of the doped semiconductor material portion into an array of doped semiconductor fins.
International Business Machines Corporation
05/28/15
20150144999
 Structure and  finfet device with buried sige oxide patent thumbnailnew patent Structure and finfet device with buried sige oxide
The present disclosure provides a semiconductor device that includes a substrate of a first semiconductor material; a fin feature having a first portion, a second portion and a third portion stacked on the substrate; an isolation feature formed on the substrate and disposed on sides of the fin feature; semiconductor oxide features including a second semiconductor material, disposed on recessed sidewalls of the second portion, defining dented voids overlying the semiconductor oxide features and underlying the third portion; and a gate stack disposed on the fin feature and the isolation feature. The gate stack includes a gate dielectric layer extended into and filling in the dented voids.
Taiwan Semiconductor Manufacturing Company, Ltd.
05/28/15
20150144998
 Fin structure of semiconductor device patent thumbnailnew patent Fin structure of semiconductor device
A fin structure of a semiconductor device, such as a fin field effect transistor (finfet), and a method of manufacture, is provided. In an embodiment, trenches are formed in a substrate, and a liner is formed along sidewalls of the trenches, wherein a region between adjacent trenches define a fin.
Taiwan Semiconductor Manufacturing Company, Ltd.
05/28/15
20150144958
 Methods of forming semiconductor structures including iii-v semiconductor material using substrates comprising molybdenum, and structures formed by such methods patent thumbnailnew patent Methods of forming semiconductor structures including iii-v semiconductor material using substrates comprising molybdenum, and structures formed by such methods
Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of iii-v semiconductor material, such as gan, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of gan bonded to the molybdenum nitride..
Soitec
05/28/15
20150144879
 Photodetectors and photovoltaics based on semiconductor nanocrystals patent thumbnailnew patent Photodetectors and photovoltaics based on semiconductor nanocrystals
A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals.
Invisage Technologies, Inc.
05/28/15
20150144873
 Nanostructure semiconductor light emitting device patent thumbnailnew patent Nanostructure semiconductor light emitting device
A nanostructure semiconductor light emitting device includes a plurality of light emitting nanostructures, each of which including a nanocore formed of a first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore, a contact electrode disposed on a surface of the second conductivity-type semiconductor layer and formed of a transparent conductive material, a first light transmissive portion filling space between the plurality of light emitting nanostructures and formed of a material having a first refractive index, and a second light transmissive portion disposed on an upper surface of the first light transmissive portion to cover the plurality of light emitting nanostructures and formed of a material having a second refractive index higher than the first refractive index.. .
05/28/15
20150144864
new patent

Memory arrays and methods of forming memory cells


Some embodiments include methods of forming memory cells. A stack includes ovonic material over an electrically conductive region.
Micron Technology, Inc.
05/28/15
20150144845
new patent

Solvent or solvent composition for organic transistor production


The solvent or solvent composition for organic transistor production according to the present invention is a solvent or solvent composition for organic semiconductor material dissolution, including a solvent a represented by the following formula (a). In the formula (a), r1 to r4 are the same or different, and represent a c1-2 alkyl group.
05/28/15
20150143817
new patent

Method and system for magnetic semiconductor solid state cooling


Cryogenic electronics based upon semiconductive devices, superconductive devices, or a combination of the two present opportunities for a wide variety of novel, fast, and low power devices. However, such cryogenic electronics require cooling which is typically achieved through fluid refrigerants such as liquid nitrogen or liquid helium.
The Royal Institution For The Advancement Of Learning.mcgill University
05/21/15
20150142342

Method and device for sensing isotropic stress and providing a compensation for the piezo-hall effect


A method determines isotropic stress by means of a hall element which includes a plate-shaped area made of a doped semiconductor material and comprises four contacts contacting the plate-shaped area and forming corners of a quadrangle, two neighboring corners of the quadrangle defining an edge thereof. At least one van der pauw transresistance value in at least one van der pauw measurement set-up of the hall element is determined, wherein the four contacts of the hall element form contact pairs, a contact pair comprising two contacts defining neighbouring corners of the quadrangle.
Melexis Technologies Nv
05/21/15
20150140834

Al2o3 surface nucleation preparation with remote oxygen plasma


Methods and apparatus for processing using a plasma source for the treatment of semiconductor surfaces are disclosed. The apparatus includes an outer vacuum chamber enclosing a substrate support, a plasma source (either a direct plasma or a remote plasma), and an optional showerhead.
Intermolecular Inc.
05/21/15
20150140803

Methods of forming semiconductor structures


Methods of forming semiconductor structures that include bodies of a semiconductor material disposed between rails of a dielectric material are disclosed. Such methods may include filling a plurality of trenches in a substrate with a dielectric material and removing portions of the substrate between the dielectric material to form a plurality of openings.
Micron Technology, Inc.
05/21/15
20150140795

Method for producing semiconductor thin films on foreign substrates


The invention relates to a method by means of which the average single crystal size, in particular the diameter of the single crystals, in a semiconductor thin film applied to a foreign substrate can be increased by an order of magnitude with respect to prior methods. The method is characterized in that a thin semiconductor film is applied to the foreign substrate in a first step.
05/21/15
20150140771

Method for fabricating a bipolar transistor having self-aligned emitter contact


A method of producing a semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first insulation region, and a vertical bipolar transistor having a first vertical portion of a collector made of monocrystalline semiconductor material of a second conductivity type and disposed in an opening of the first insulation region, a second insulation region lying partly on the first vertical portion of the collector and partly on the first insulation region and having an opening in the region of the collector, in which opening a second vertical portion of the collector made of monocrystalline material is disposed, the portion including an inner region of the second conductivity type, a base made of monocrystalline semiconductor material of the first conductivity type, a base connection region surrounding the base in the lateral direction, a t-shaped emitter made of semiconductor material of the second conductivity type and overlapping the base connection region, wherein the base connection region, aside from a seeding layer adjacent the substrate or a metallization layer adjacent a base contact, consists of a semiconductor material which differs in its chemical composition from the semiconductor material of the collector, the base and the emitter and in which the majority charge carriers of the first conductivity type have greater mobility compared thereto.. .
Ihp Gmbh - Innovations For High Performance Microelectronics/leibniz-institut Fur Innovative M
05/21/15
20150140767

Process for manufacturing devices for power applications in integrated circuits


A mos transistor for power applications is formed in a substrate of semiconductor material by a method integrated in a process for manufacturing integrated circuits which uses an sti technique for forming insulating regions. The method includes the phases of forming an insulating element on a top surface of the substrate and forming a control electrode on a free surface of the insulating element.
Stmicroelectronics S.r.l.
05/21/15
20150140758

Method for fabricating finfet on germanium or group iii-v semiconductor substrate


The present invention provides a method for fabricating a finfet on a germanium or group iii-v semiconductor substrate. The process flow of the method mainly includes: forming a pattern structure for a source, a drain and a fine bar connecting the source and the drain; forming an oxide isolation layer; forming a gate structure, a source and a drain structure; and forming metal contacts and metal interconnections.
Peking University
05/21/15
20150140742

Methods of forming gated devices


Some embodiments include methods of forming gated devices. An upper region of a semiconductor material is patterned into a plurality of walls that extend primarily along a first direction.
Micron Technology, Inc.
05/21/15
20150139256

Method and system for hybrid integration of a tunable laser


A cable television transmitter includes a substrate including a silicon material, control electronics disposed in the substrate, and a gain medium coupled to the substrate. The gain medium includes a compound semiconductor material.
Skorpios Technologies, Inc.
05/21/15
20150137316

Semiconductor device including a resistor and the formation thereof


A semiconductor structure includes a substrate and a resistor provided over the substrate. The resistor includes a first material layer, a second material layer, a first contact structure and a second contact structure.
Globalfoundries Inc.
05/21/15
20150137245

Replacement metal gate finfet


A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a hardmask layer arranged partially over the channel region of the fin, a gate stack arranged over the hardmask layer and over the channel region of the fin, a metallic alloy layer arranged on a first portion of the hardmask layer, the metallic alloy layer arranged adjacent to the gate stack, and a first spacer arranged adjacent to the gate stack and over the metallic alloy layer.. .
International Business Machines Corporation
05/21/15
20150137244

Replacement metal gate finfet


A field effect transistor device includes a fin including a semiconductor material arranged on an insulator layer, the fin including a channel region, a hardmask layer arranged partially over the channel region of the fin, a gate stack arranged over the hardmask layer and over the channel region of the fin, a metallic alloy layer arranged on a first portion of the hardmask layer, the metallic alloy layer arranged adjacent to the gate stack, and a first spacer arranged adjacent to the gate stack and over the metallic alloy layer.. .
International Business Machines Corporation
05/21/15
20150137226

Semiconductor device and producing a semiconductor device


A semiconductor device includes a semiconductor substrate having first regions of a first conductivity type and body regions of the first conductivity type, which are arranged in a manner adjoining the first region and overlap the latter in each case on a side of the first region which faces a first surface of the semiconductor substrate, and having a multiplicity of drift zone regions arranged between the first regions and composed of a semiconductor material of a second conductivity type, which is different than the first conductivity type. The first regions and the drift zone regions are arranged alternately and form a superjunction structure.
Infineon Technologies Ag
05/21/15
20150137214

Methods of forming semiconductor structures including bodies of semiconductor material


Semiconductor structures that include bodies of a semiconductor material spaced apart from an underlying substrate. The bodies may be physically separated from the substrate by at least one of a dielectric material, an open volume and a conductive material.
Micron Technology, Inc.
05/21/15
20150137199

Solid-state imaging device


A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line..
Panasonic Intellectual Property Management Co., Ltd.
05/21/15
20150137184

Semiconductor device and manufacturing a semiconductor device


A method of manufacturing a semiconductor device includes laminating and forming an electron transit layer, an electron supplying layer, an etching stop layer, and a p-type film on a substrate sequentially, the p-type film being formed of a nitride semiconductor material that includes al doped with an impurity element that attains p-type, the etching stop layer being formed of a material that includes gan, removing the p-type film in an area except an area where a gate electrode is to be formed, by dry etching to form a p-type layer in the area where the gate electrode is to be formed, the dry etching being conducted while plasma emission in the dry etching is observed, the dry etching being stopped after the dry etching is started and plasma emission originating from al is not observed, and forming the gate electrode on the p-type layer.. .
Transphorm Japan, Inc.
05/21/15
20150137182

Semiconductor device having v-shaped region


Among other things, a semiconductor device or transistor and a method for forming the semiconductor device are provided for herein. The semiconductor device comprises one or more v-shaped recesses in which stressed monocrystalline semiconductor material, such as silicon germanium, is grown, to form at least one of a source or a drain of the semiconductor device.
Taiwan Semiconductor Manufacturing Company Limited
05/21/15
20150137139

Semiconductor device and fabricating a semiconductor device


A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials.
Infineon Technologies Austria Ag
05/21/15
20150136909

Virtual aerodynamic surface systems


A method of generating a pressure wave proximate an airflow surface and altering airflow to promote a localized lowering of skin friction over the airflow surface is described herein. A series of pressure waves may be configured to create a virtual riblet to control turbulent vortices in a boundary layer adjacent to the airflow surface creating a virtual riblet.
Rohr, Inc.
05/21/15
20150136229

Composite particle, composite particle dispersion, and photovoltaic device


A composite particle including a core member including a rare earth ion which shows an upconversion effect and a retaining material which retains the rare earth ion, and a semiconductor member covering a part or all of the surface of the core member, wherein the retaining material includes a semiconductor material having a band gap greater than energy difference necessary for a second step excitation in the rare earth ion to occur, or an insulating material, and the semiconductor member includes a semiconductor material having a band gap smaller than the energy difference between a first excited state and a ground state of the rare earth ion.. .
Toyota Jidosha Kabushiki Kaisha
05/14/15
20150132923

Process for fabricating a heterostructure limiting the formation of defects


The invention relates to a process for fabricating a heterostructure comprising at least one thin layer and a carrier substrate made of a semiconductor, the process comprising: bonding a first substrate made of a single-crystal first material, the first substrate comprising a superficial layer made of a polycrystalline second material, to a second substrate so that a bonding interface is created between the polycrystalline layer and the second substrate; removing from the free surface of one of the substrates, called the donor substrate, a thickness thereof so that only a thin layer is preserved; generating a layer of amorphous semiconductor material between the first substrate and the bonding interface by amorphization of the layer of polycrystalline material; and crystallizing the layer of amorphous semiconductor material, the newly crystallized layer having the same orientation as the adjacent first substrate.. .
05/14/15
20150132920

Fin structure for a finfet device


A fin structure for a fin field effect transistor (finfet) device is provided. The device includes a substrate, a first semiconductor material disposed on the substrate, a shallow trench isolation (sti) region disposed over the substrate and formed on opposing sides of the first semiconductor material, and a second semiconductor material forming a first fin and a second fin disposed on the sti region, the first fin spaced apart from the second fin by a width of the first semiconductor material.
05/14/15
20150132907

Techniques for ion implantation of non-planar field effect transistors


A method of forming a fin field effect transistor (finfet) device includes forming a fin structure on a substrate, the substrate comprising a semiconductor material and forming a replacement gate cavity comprising an exposed portion of the fin structure and a sidewall portion adjacent the exposed portion, wherein the exposed portion of the fin structure defines a channel region. The method further includes performing at least one implant into the exposed portion of the fin structure..
05/14/15
20150132901

Semiconductor device and fabricating the same


The present disclosure provides a semiconductor device. The semiconductor device includes a substrate having a gate region, source and drain (s/d) regions separated by the gate region and a first fin structure in a gate region in the n-fet region.
05/14/15
20150130017

Semiconductor device and making the device


An embodiment of the present disclosure is directed to a semiconductor device. The semiconductor devise comprises a substrate.
05/14/15
20150129999

Method of wafer-scale integration of semiconductor devices and semiconductor device


The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit..
05/14/15
20150129962

Methods of forming replacement gate structures and fins on finfet devices and the resulting devices


One method disclosed includes, among other things, removing a sacrificial gate structure to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to define a fin structure in a layer of semiconductor material using a patterned hard mask exposed within the replacement gate cavity as an etch mask and forming a replacement gate structure in the replacement gate cavity around at least a portion of the fin structure.. .
05/14/15
20150129934

Methods of forming substantially self-aligned isolation regions on finfet semiconductor devices and the resulting devices


One method disclosed includes performing a selective etching process through a gate cavity to selectively remove a portion of a first semiconductor material relative to a second layer of a second semiconductor material and a substrate so as to thereby define a space between the second semiconducting material and the substrate, filling substantially all of the space with an insulating material so as to thereby define a substantially self-aligned channel isolation region positioned under at least what will become the channel region of the finfet device.. .
05/14/15
20150129926

Semiconductor device and manufacturing method thereof


A field effect transistor is provided. The field effect transistor includes a semiconductor region formed on a substrate, wherein the semiconductor region comprises an undoped channel region, a source region including a first dopant type, and a drain region including a second dopant type, and wherein the channel region is formed of a group iii-v compound semiconductor material.
05/14/15
20150129870

Tft driving backplane and manufacturing the same


The embodiments of the present disclosure discloses a tft driving backplane and method of manufacturing the same, which includes the steps of: forming non-transparent gate electrodes on a transparent insulating substrate, blanketing a gate insulating film on the substrate; forming a patterned photoconductive semiconductor layer on the gate insulating film including a superposing region and over-range regions; converting the over-range regions into conductors to be a source region and a drain region; forming a patterned protection layer to cover the photoconductive semiconductor layer and provided with a pixel electrode contacting hole to expose the drain region; forming a pixel electrode coupled with the drain region; and forming an insulating layer covering the protection layer and exposing a part of the pixel electrode. The source region, drain region and channel can be formed in one step by converting photoconductive semiconductor material partially, such that the manufacturing process is simplified..
05/14/15
20150129752

Polysilicon photodetector, methods and applications


A silicon photonic photodetector structure, a method for fabricating the silicon photonic photodetector structure and a method for operating a silicon photonic photodetector device that results from the photonic photodetector structure each use a strip waveguide optically coupled with a polysilicon material photodetector layer that may be contiguous with a semiconductor material slab to which is located and formed a pair of electrical contacts separated by the polysilicon material photodetector layer. Alternatively, the pair of electrical contacts may be located and formed upon separated locations of the polysilicon photodetector layer.
05/07/15
20150126019

Method for fabricating active matrix substrate and fabricating display device


A gate line is formed on a pixel region, and a plurality of wiring layers are formed on a frame region. Next, a gate insulating layer and a semiconductor material layer are formed to cover the wiring layers and the gate line.
Sharp Kabushiki Kaisha
05/07/15
20150126010

Band engineered semiconductor device and manufacturing thereof


The disclosure is related to a band engineered semiconductor device comprising a substrate and a protruding structure that is formed in a recess in the substrate. The protruding structure extends above the recess and has a buried portion and an extended portion.
Imec
05/07/15
20150126009

U-shaped semiconductor structure


A method for forming a u-shaped semiconductor device includes growing a u-shaped semiconductor material along sidewalls and bottoms of trenches, which are formed in a crystalline layer. The u-shaped semiconductor material is anchored, and the crystalline layer is removed.
International Business Machines Corporation
05/07/15
20150126008

Methods of forming stressed multilayer finfet devices with alternative channel materials


Disclosed are methods and devices that involve formation of alternating layers of different semiconductor materials in the channel region of finfet devices. The methods involve forming such alternating layers of different semiconductor materials in a cavity formed above the substrate fin and thereafter forming a gate structure around the fin using gate first or gate last techniques..
Globalfoundries Inc.
05/07/15
20150126003

Method for the formation of fin structures for finfet devices


A soi substrate layer formed of a silicon semiconductor material includes adjacent first and second regions. A portion of the silicon substrate layer in the second region is removed such that the second region retains a bottom portion made of the silicon semiconductor material.
Stmicroelectronics, Inc.
05/07/15
20150125979

Light emitting diode and fabricating the same


A light emitting diode and a method for fabricating the same are provided. The light emitting diode includes: a transparent substrate; a semiconductor material layer formed on the top surface of a substrate with an active layer generating light; and a fluorescent layer formed on the back surface of the substrate with controlled varied thicknesses.
05/07/15
20150125976

Selective sidewall growth of semiconductor material


A method of producing a bulk semiconductor material comprises the steps of providing a base comprising a substantially planar substrate having a plurality of etched nano/micro-structures located thereon, each structure having an etched, substantially planar sidewall, wherein the plane of each said etched sidewall is arranged at an oblique angle to the substrate, and selectively growing the bulk semiconductor material onto the etched sidewall of each nano/micro-structure using an epitaxial growth process. A layered semiconductor device may be grown onto the bulk semiconductor material..
Nanogan Limited
05/07/15
20150124355

Recording head with piezoelectric contact sensor


Example embodiments include an apparatus that has a piezoelectric contact sensor. The piezoelectric contact sensor includes a semiconductor device having a semiconductor material that defines a channel through which current can flow.
Seagate Technology Llc
05/07/15
20150123245

Bipolar junction transistors with self-aligned terminals


Device structures, design structures, and fabrication methods for a bipolar junction transistor. A first layer comprised of a first semiconductor material and a second layer comprised of a second semiconductor material are disposed on a substrate containing a first terminal of the bipolar junction transistor.
International Business Machines Corporation
05/07/15
20150123240

Semiconductor device and forming shallow p-n junction with sealed trench termination


A semiconductor device has a substrate including a semiconductor material of a first conductivity type. A first layer including a semiconductor material of a second conductivity type is formed in the substrate with a boundary between the first layer and the semiconductor material of the first conductivity type as a p-n junction.
05/07/15
20150123205

Field effect transistor including a regrown contoured channel


At least one doped semiconductor material region is formed over a crystalline insulator layer. A disposable gate structure and a planarization dielectric layer laterally surrounding the disposable gate structure are formed over the at least one doped semiconductor material region.
International Business Machines Corporation
05/07/15
20150123201

Strained semiconductor device and making the same


In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or soi layer). The gate electrode is electrically insulated from the semiconductor body.
Infineon Technologies Ag
05/07/15
20150123188

Methods and apparatuses having strings of memory cells including a metal source


Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of memory cells comprises forming a metal silicide source material over a substrate.
Micron Technology, Inc.
05/07/15
20150123185

Methods for isolating portions of a loop of pitch-multiplied material and related structures


Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop.
Micron Technology, Inc.
05/07/15
20150123172

Big-small pixel scheme for image sensors


An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode, a plurality of photodiodes, a shared floating diffusion region, a first transfer gate, and a second transfer gate. The first photodiode is disposed in a semiconductor material.
Omnivision Technologies, Inc.
05/07/15
20150123170

Hemt-compatible lateral rectifier structure


The present disclosure relates to a high electron mobility transistor compatible power lateral field-effect rectifier (l-fer) device. In some embodiments, the rectifier device has an electron supply layer located over a layer of semiconductor material at a position between an anode terminal and a cathode terminal.
Taiwan Semiconductor Manufacturing Co., Ltd.
05/07/15
20150123166

Methods of forming finfet devices with alternative channel materials


Are methods and devices that involve formation of alternating layers of different semiconductor materials in the channel region of finfet devices. The methods and devices disclosed herein involve forming a doped silicon substrate fin and thereafter forming a layer of silicon/germanium around the substrate fin.
Globalfoundries Inc.
05/07/15
20150123111

Pixel structure and fabrication method thereof


A fabrication method of a pixel structure includes the following steps. A first metal layer is patterned to form a source electrode and a drain electrode.
Au Optronics Corporation
05/07/15
20150122639

Chemically passivated zinc oxide photoelectrode for photoelectrochemical water splitting


A chemically passivated photoelectrode, having a conductive substrate, a layer of conductive oxide, preferably zinc oxide (zno), over the conductive substrate, and an ultrathin layer of a chemically inert semiconductor material coating the conductive oxide layer, is disclosed. The ultrathin layer of chemically inert semiconductor material, which may be less than 5 nm thick, increases the efficiency of water splitting through passivation of surface charge traps and chemical stability in harsh environments, as opposed to being photoactive.
Brookhaven Science Associates, Llc
05/07/15
20150122533

Method for forming metal circuit, liquid trigger material for forming metal circuit and metal circuit structure


A metal circuit structure, a method for forming a metal circuit and a liquid trigger material for forming a metal circuit are provided. The metal circuit structure includes a substrate, a first trigger layer and a first metal circuit layer.
Industrial Technology Research Institute
05/07/15
20150122329

Silicon heterojunction photovoltaic device with non-crystalline wide band gap emitter


A photovoltaic device including a single junction solar cell provided by an absorption layer of a type iv semiconductor material having a first conductivity, and an emitter layer of a type iii-v semiconductor material having a second conductivity, wherein the type iii-v semiconductor material is non-crystalline and has a thickness that is no greater than 50 nm.. .
International Business Machines Corporation
05/07/15
20150122303

Thermoelectric conversion material using substrate having nanostructure, and producing same


The present invention provides a thermoelectric conversion material having a low thermal conductivity and having an improved figure of merit, and a method for producing it. The thermoelectric conversion material has, as formed on a substrate having a nano-level microporous nanostructure, a thermoelectric semiconductor layer prepared by forming a thermoelectric semiconductor material into a film, wherein the substrate is a block copolymer substrate formed of a block copolymer that comprises a polymethyl methacrylate unit and a polyhedral oligomeric silsesquioxane-containing polymethacrylate unit, and the thermoelectric semiconductor material is a p-type bismuth telluride or an n-type bismuth telluride.
Lintec Corporation
04/30/15
20150119263

Carbon nanotube biosensors and related methods


Disclosed are devices that comprise a protein, such as an antibody, placed into electronic communication with a semiconductor material, such as a carbon nanotube. The devices are useful in assessing the presence or concentration of analytes contacted to the devices, including the presence of markers for prostate cancer and lyme disease..
Fox Chase Cancer Center
04/30/15
20150118777

Nano-structure semiconductor light emitting device


A method of manufacturing a light emitting device having a plurality of nano-light emitting structures is provided. The method comprises depositing a first conductivity-type semiconductor material on a substrate to form a base layer.
04/30/15
20150116710

Particle detector and producing such a detector


The invention relates to a particle detector including a substrate made of a semiconductor material, in which at least one through-cavity is formed, defined by an input section and an output section, wherein the input section thereof is to be connected to an airflow source, the substrate supporting: an optical means including at least one laser source, and at least one waveguide connected to the at least one laser source and leading into the vicinity of the output section of the cavity; and a photodetector located near the output section of the cavity and offset relative to the optical axis of the optical means.. .
Commissariat A L'energie Atomique Et Aux Energies Alternatives
04/30/15
20150115399

Bipolar junction transistors with self-aligned terminals


Device structures, fabrication methods, and design structures for a bipolar junction transistor. A semiconductor material layer is formed on a substrate and a mask layer is formed on the semiconductor material layer.
International Business Machines Corporation
04/30/15
20150115378

Method for manufacturing a die assembly having a small thickness and die assembly relating thereto


A method for manufacturing a die assembly, including the steps of: bonding a first wafer of semiconductor material to a second wafer, the second wafer including a respective semiconductor body having a respective initial thickness and forming an integrated electronic circuit; and subsequently reducing the initial thickness of the semiconductor body of the second wafer; and subsequently bonding the second wafer to a third wafer, the third wafer forming a micro-electromechanical sensing structure.. .
Stmicroelectronics S.r.l.
04/30/15
20150115370

Semiconductor device providing enhanced fin isolation and related methods


A method for making a semiconductor device may include forming a first semiconductor layer on a substrate comprising a first semiconductor material, forming a second semiconductor layer on the first semiconductor layer comprising a second semiconductor material, and forming mask regions on the second semiconductor layer and etching through the first and second semiconductor layers to define a plurality of spaced apart pillars on the substrate. The method may further include forming an oxide layer laterally surrounding the pillars and mask regions, and removing the mask regions and forming inner spacers on laterally adjacent corresponding oxide layer portions atop each pillar.
Stmicroelectronics, Inc.
04/30/15
20150115369

Co-integration of elemental semiconductor devices and compound semiconductor devices


First and second template epitaxial semiconductor material portions including different semiconductor materials are formed within a dielectric template material layer on a single crystalline substrate. Heteroepitaxy is performed to form first and second epitaxial semiconductor portions on the first and second template epitaxial semiconductor material portions, respectively.
International Business Machnes Corporation
04/30/15
20150115328

Method of forming a semiconductor structure


A semiconductor structure comprises a first layer. The first layer comprises a first iii-v semiconductor material.
Taiwan Semiconductor Manufacturing Company, Ltd.
04/30/15
20150115325

Spacer supported lateral channel fet


A semiconductor device includes a semiconductor material and trenches extending into the semiconductor material from a first main surface of the semiconductor material to form mesas of semiconductor material between the trenches. The device also includes a field plate in the trenches, a body region in the mesas, a source region in contact with the body region in the mesas, and a gate electrode on the first main surface of the semiconductor material and defining a lateral channel region in each of the body regions under the gate electrodes.
Infineon Technologies Austria Ag


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Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

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