Popular terms

[SEARCH]

Semiconductor Material topics
Semiconductor
Semiconductor Material
Semiconductor Device
Transistors
Surfactant
Electric Conversion
Transparent Conductive Oxide
Semiconductor Substrate
Heating Devices
Semiconductor Devices
Organic Electroluminescence
Buffer Layer
Integrated Circuit
Crystallin
Electronic Device

Follow us on Twitter
twitter icon@FreshPatents

Web & Computing
Cloud Computing
Ecommerce
Search patents
Smartphone patents
Social Media patents
Video patents
Website patents
Web Server
Android patents
Copyright patents
Database patents
Programming patents
Wearable Computing
Webcam patents

Web Companies
Apple patents
Google patents
Adobe patents
Ebay patents
Oracle patents
Yahoo patents

[SEARCH]

Semiconductor Material patents



      
           
This page is updated frequently with new Semiconductor Material-related patent applications. Subscribe to the Semiconductor Material RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Material RSS RSS


Photoelectric conversion element, imaging device, and optical sensor

Photoelectric conversion element, imaging device, and optical sensor

Apparatus and method for harvesting energy in an electronic device

Qualcomm

Apparatus and method for harvesting energy in an electronic device

Apparatus and method for harvesting energy in an electronic device

Solaero Technologies Corp.

Inverted metamorphic multijunction solar cells having a permanent supporting substrate


Date/App# patent app List of recent Semiconductor Material-related patents
07/23/15
20150207103 
 Light-emitting device patent thumbnailLight-emitting device
Organic semiconductor layers comprise between a first electrode and a photoelectric converting layer a light extraction improving layer that contains at least silver or gold in part as a component, partially reflects light, and has transparency. The light extraction improving layer is in contact with or is inserted into a functional layer containing, for example, an organic semiconductor material, an oxide, a fluoride, or an inorganic compound having strong acceptor properties or strong donor properties with an ionization potential of 5.5 ev or higher, within the organic semiconductor layers..
Pioneer Corporation


07/23/15
20150207087 
 Photoelectric conversion element, imaging device, and optical sensor patent thumbnailPhotoelectric conversion element, imaging device, and optical sensor
The photoelectric conversion element is formed by providing an organic photoelectric conversion portion including two or more types of organic semiconductor materials having different spectral sensitivities between the first and the second electrodes. Wavelength sensitivity characteristics of the photoelectric conversion element change according to a voltage (bias voltage) applied between the first and the second electrodes.

07/23/15
20150207053 
 Apparatus and  harvesting energy in an electronic device patent thumbnailApparatus and harvesting energy in an electronic device
An apparatus, a method, and a computer program product are provided. The apparatus may be an electronic component.
Qualcomm Incorporated


07/23/15
20150207013 
 Inverted metamorphic multijunction solar cells having a permanent supporting substrate patent thumbnailInverted metamorphic multijunction solar cells having a permanent supporting substrate
The present disclosure provides a method of manufacturing a solar cell that includes providing a semiconductor growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell; applying a metal contact layer over said sequence of layers; affixing the adhesive polyimide surface of a permanent supporting substrate directly over said metal contact layer and permanently bonding it thereto by a thermocompressive technique; and removing the semiconductor growth substrate.. .
Solaero Technologies Corp.


07/23/15
20150206982 
 Thin film transistor for a display device, display device and  manufacturing a display device patent thumbnailThin film transistor for a display device, display device and manufacturing a display device
A thin film transistor for a display device is disclosed. In one aspect, the thin film transistor includes a gate electrode formed over a substrate and including a first conductive pattern and a plurality of second conductive patterns.
Samsung Display Co., Ltd.


07/23/15
20150206972 
 Method of making a cmos semiconductor device using a stressed silicon-on-insulator (soi) wafer patent thumbnailMethod of making a cmos semiconductor device using a stressed silicon-on-insulator (soi) wafer
A method for forming a complementary metal oxide semiconductor (cmos) semiconductor device includes providing a stressed silicon-on-insulator (ssoi) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region.
Stmicroelectronics, Inc.


07/23/15
20150206886 
 Methods of forming memory arrays and semiconductor constructions patent thumbnailMethods of forming memory arrays and semiconductor constructions
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second semiconductor material is epitaxially grown over the first semiconductor material.
Micron Technology, Inc.


07/23/15
20150206884 
 Dynamic random access memory cell with self-aligned strap patent thumbnailDynamic random access memory cell with self-aligned strap
After formation of trench capacitors and source and drain regions and gate structures for access transistors, a dielectric spacer is formed on a first sidewall of each source region, while a second sidewall of each source region and sidewalls of drain regions are physically exposed. Each dielectric spacer can be employed as an etch mask during removal of trench top dielectric portions to form strap cavities for forming strap structures.
International Business Machines Corporation


07/23/15
20150206876 
 Fin field effect transistors having heteroepitaxial channels patent thumbnailFin field effect transistors having heteroepitaxial channels
Disposable gate structures are formed over semiconductor material portions, and source and drain regions can be formed in the semiconductor material portions. After formation of a planarization dielectric layer, one type of disposable gate structure can be removed selective to at least another type of disposable gate structure employing a patterned hard dielectric mask layer.
International Business Machines Corporation


07/23/15
20150206875 
 Finfet semiconductor device with germanium diffusion over silicon fins patent thumbnailFinfet semiconductor device with germanium diffusion over silicon fins
A method for manufacturing a semiconductor device is described that comprises providing a substrate, forming a plurality of fins having a first semiconductor material, replacing a first portion of at least one of the fins with a second semiconductor material, and distributing the second semiconductor material from the first portion to a second portion of the at least one of the fins.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


07/23/15
20150206765 

Mechanical compression-based the reduction of defects in semiconductors


A high pressure-directed engineering method enables reduced defect semiconductor materials that are unattainable by other chemical and physical methods. Experimental results show that hydraulic pressures as low as 0.5 gpa can eliminate stacking faults and significantly reduce point defects, leading to improved materials quality in semiconductors, such as gan..
Sandia Corporation


07/23/15
20150206750 

Method for making contact between a semiconductor material and a contact layer


A method for making contact between (i) a semiconductor material having silicon carbide and (ii) a contact layer having nickel oxide includes applying the contact layer to the semiconductor material, and treating at least an interface between the contact layer and the semiconductor material at an elevated temperature. An ohmic contact between the contact layer and the semiconductor material has an improved long-term stability due to an improved adhesion of the nickel to the silicon carbide.
Robert Bosch Gmbh


07/23/15
20150206749 

Diamond semiconductor system and method


Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer..

07/16/15
20150200657 

Nonvolatile latch circuit and logic circuit, and semiconductor device using the same


To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion configured to hold data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element.
Semiconductor Energy Laboratory Co., Ltd.


07/16/15
20150200301 

Pulsed laser anneal process for transistors with partial melt of a raised source-drain


A non-planar transistor including partially melted raised semiconductor source/drains disposed on opposite ends of a semiconductor fin with the gate stack disposed there between. The raised semiconductor source/drains comprise a super-activated dopant region above a melt depth and an activated dopant region below the melt depth.
Intel Corporation


07/16/15
20150200291 

Fin end spacer for preventing merger of raised active regions


After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins.
International Business Machines Corporation


07/16/15
20150200278 

Method of making split-gate memory cell with substrate stressor region


A memory device, and method of make same, having a substrate of semiconductor material of a first conductivity type, first and second spaced-apart regions in the substrate of a second conductivity type, with a channel region in the substrate therebetween, a conductive floating gate over and insulated from the substrate, wherein the floating gate is disposed at least partially over the first region and a first portion of the channel region, a conductive second gate laterally adjacent to and insulated from the floating gate, wherein the second gate is disposed at least partially over and insulated from a second portion of the channel region, and a stressor region of embedded silicon carbide formed in the substrate underneath the second gate.. .
Silicon Storage Technology, Inc.


07/16/15
20150200277 

Nonvolatile memory device using semiconductor nanocrystals and forming same


A method of forming a field effect transistor includes forming a source region and a drain region in a semiconductor material, forming a channel region between the source region and the drain region, forming an insulating layer over the channel region, forming a floating gate layer of electrically conducting material over the insulating layer, forming a layer of an insulating material over the floating gate layer, and forming a gate electrode overlying the layer of insulating material.. .
International Business Machines Corporation


07/16/15
20150200276 

Local thinning of semiconductor fins


After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins.
International Business Machines Corporation


07/16/15
20150200262 

Recessed contact to semiconductor nanowires


A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire..
Sol Voltaics Ab


07/16/15
20150200247 

Bipolar semiconductor device and manufacturing thereof


A power semiconductor device has a semiconductor body having a first surface and a second surface that runs substantially parallel to the first surface. A first metallization is arranged on the first surface.
Infineon Technologies Ag


07/16/15
20150200098 

Low resistivity ohmic contact


Embodiments of a low resistivity ohmic contact are disclosed. In some embodiments, a method of fabricating a low resistivity ohmic contact includes providing a semiconductor material layer and intentionally roughening the semiconductor material layer to create a characteristic surface roughness.
Phononic Devices, Inc.


07/16/15
20150198750 

Highly dispersive optical element with binary transmissibility


The current application is directed to a new, highly dispersive optical element that is characterized by binary transmissibility. Various alternative implementations of the new optical element (“noe”) are fashioned from semiconductor materials, including binary iii-v and ii-vi semiconductor materials.
Chromx, Llc.


07/09/15
20150194577 

Cadmium-free quantum dot nanoparticles


Quantum dot semiconductor nanoparticle compositions that incorporate ions such as zinc, aluminum, calcium, or magnesium into the quantum dot core have been found to be more stable to ostwald ripening. A core-shell quantum dot may have a core of a semiconductor material that includes indium, magnesium, and phosphorus ions.
Nanoco Technologies Ltd.


07/09/15
20150194562 

Silicon heterojunction photovoltaic device with wide band gap emitter


A photovoltaic device including a single junction solar cell provided by an absorption layer of a type iv semiconductor material having a first conductivity, and an emitter layer of a type iii-v semiconductor material having a second conductivity, wherein the type iii-v semiconductor material has a thickness that is no greater than 50 nm.. .
International Business Machines Corporation


07/09/15
20150194560 

Stressed semiconductor detector with piezoelectrical component


A semiconductor detector device comprising: a detector element comprising at least one active detector layer of piezoelectric semiconductor material; a stress inducing element arranged to act in use on the detector element to generate therein a predetermined pattern of stress, and consequently a predetermined electrical field via the piezoelectric effect. A method of fabrication and of operation of a semiconductor detector device embodying these principles are also described..
Kromek Limited


07/09/15
20150194533 

Semiconductor device


An object of the present invention is to provide a semiconductor device in which stored data can be held even when power is not supplied for a certain time. Another object is to increase the degree of integration of a semiconductor device and to increase the storage capacity per unit area.
Semiconductor Energy Laboratory Co., Ltd.


07/09/15
20150194526 

Method for manufacturing semiconductor device with recess, epitaxial growth and diffuson


A semiconductor device including a gate electrode disposed on a semiconductor substrate and source/drain regions disposed at both sides of the gate electrode, the source/drain regions being formed by implanting impurities. The source/drain regions include an epitaxial layer formed by epitaxially growing a semiconductor material having a different lattice constant from that of the semiconductor substrate in a recessed position at a side of the gate electrode, and a diffusion layer disposed in a surface layer of the semiconductor substrate..
Sony Corporation


07/09/15
20150194513 

Semiconductor device and method


A semiconductor device includes a first compound semiconductor material including a first doping concentration and a second compound semiconductor material on the first compound semiconductor material, the second compound semiconductor material including a different material than the first compound semiconductor material. The semiconductor device further includes a control electrode and at least one buried semiconductor material region including a second doping concentration different from the first doping concentration.
Infineon Technologies Austria Ag


07/09/15
20150194426 

Systems and methods for fabricating finfets with different threshold voltages


Systems and methods are provided for fabricating semiconductor device structures on a substrate. A first fin structure is formed on a substrate.
Taiwan Semiconductor Manufacturing Company Limited


07/09/15
20150194203 

Storing memory with negative differential resistance material


A memory cell includes a transistor with a first source/drain terminal spaced apart from a second source/drain terminal with a semiconductor material; a gate terminal located proximate the semiconductor material such that an increase in a gate terminal voltage increases a conductivity of the semiconductor material; and the first source/drain terminal being connected in series to a negative differential resistance material.. .
Hewlett-packard Development Company, L.p.


07/09/15
20150192533 

Method of modeling concentration of reducible mobile ionic dopant in semiconductor device simulator


Various embodiments provide systems, computer program products and computer implemented methods. In some embodiments, a system includes a computer-implemented method of determining a dopant concentration in a semiconductor material proximate a metal interface, including determining an electric potential within the semiconductor material at a first voltage range using a known dopant concentration, wherein the dopant is a mobile ion dopant, determining a concentration of a reduced dopant in the semiconductor material, calculating a new expected average dopant concentration for the dopant, calculating a new average dopant concentration for the dopant using the equation with a first damping parameter having a value that is determined by a change in electric potential at a node point in the semiconductor material and determining whether ionic convergence has occurred by determining whether expected dopant concentration deviates from an average concentration by less than a threshold value..
International Business Machines Corporation


07/02/15
20150189761 

Method for depositing and curing nanoparticle-based ink


A method for forming a conductive pattern on a substrate deposits, onto a surface of the substrate, a nanoparticle ink that comprises nanoparticles of a conductive or semiconductor material, at least one low boiling point solvent, and from 0.1 weight % to 50 weight % of a high boiling point solvent. The method forms a partially wet patterned substrate by drying the deposited nanoparticle ink to a wetness range between about 3 weight % and 8 weight % solvent.
Intrinsiq Materials, Inc.


07/02/15
20150188280 

Metal-insulator-metal waveguide for nano-lasers and optical amplifiers


A metal-insulator-metal (mim) waveguide structure for nano-lasers or optical amplifiers is described. The structure comprises a substrate on which are supported first and second metal layers which form electrical contacts for the waveguide.

07/02/15
20150187990 

Light-emitting diode and fabrication method thereof


A light-emitting diode includes a substrate; a light-emitting epitaxial layer, laminated by semiconductor material layers and formed over the substrate; a first current spreading layer over the light-emitting epitaxial layer; an adhesive layer with alternating second current spreading layers and first metal barrier layers over the first current spreading layer, including three structure layers; a second metal barrier layer over the adhesive layer with alternating second current spreading layers and metal barrier layers; and a metal electrode layer over the second metal barrier layer.. .
Xiamen Sanan Optoelectronics Technology Co., Ltd.


07/02/15
20150187944 

Semiconductor liner of semiconductor device


The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion, an upper portion, and a middle portion between the lower portion and upper portion, wherein the fin structure comprises a first semiconductor material having a first lattice constant; a pair of notches extending into opposite sides of the middle portion; and a semiconductor liner adjoining the lower portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant..
Taiwan Semiconductor Manufacturing Company, Ltd.


07/02/15
20150187912 

Integrated electronic device with edge-termination structure and manufacturing method thereof


An embodiment of an integrated electronic device formed in a semiconductor body delimited by a lateral surface, which includes: a substrate made of a first semiconductor material; a first epitaxial region made of a second semiconductor material, which overlies the substrate and defines a first surface; a second epitaxial region made of a third semiconductor material, which overlies the first surface and is in contact with the first epitaxial region, the third semiconductor material having a bandgap narrower than the bandgap of the second semiconductor material; an active area, extending within the second epitaxial region and housing at least one elementary electronic component; and an edge structure, arranged between the active area and the lateral surface, and including a dielectric region arranged laterally with respect to the second epitaxial region, which overlies the first surface and is in contact with the first epitaxial region.. .
Stmicroelectronics S.r.l.


07/02/15
20150187889 

Surface-controlled semiconductor nano-devices, methods and applications


Semiconductor structures and semiconductor devices may include: (1) an n-type compound semiconductor material having a surface fermi level pinned to a conduction band of the n-type compound semiconductor material; (2) a p-type compound semiconductor material having a surface fermi level pinned to a valence band of the p-type compound semiconductor material; and/or (3) an i-type compound semiconductor materials having a surface fermi level pinned within a band gap of the i-type compound semiconductor material. Semiconductor structures and semiconductor devices in accordance with the foregoing n-type, p-type and i-type compound semiconductor materials provide the semiconductor structures and semiconductor devices with enhanced performance..
University Of Rochester


07/02/15
20150187884 

Method and system for transient voltage suppression


A transient voltage suppression (tvs) device includes a first layer of wide band gap semiconductor material formed of a first conductivity type material, a second layer of wide band gap semiconductor material formed of a second conductivity type material over at least a portion of the first layer and comprising an ion implanted material structure between 0.1 micrometers (μm) and 22.0 μm thick, the second layer operating using punch-through physics, and a third layer of wide band gap semiconductor material formed of the first conductivity type material over at least a portion of the second layer.. .
General Electric Company


07/02/15
20150187880 

Semiconductor structure with compositionally-graded transition layer


The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer.
International Rectifier Corporation


07/02/15
20150187875 

Semiconductor body with a buried material layer and method


One aspect includes a method for forming a buried material layer in a semiconductor body, including providing a semiconductor body having a first side and having a plurality of first trenches extending from the first surface into the semiconductor body. Each of the plurality of first trenches has a bottom and has at least one sidewall and the plurality of first trenches is separated from one another by semiconductor mesa regions.
Infineon Technologies Austria Ag


07/02/15
20150187863 

Integrated circuits including a resistance element and gate-last techniques for forming the integrated circuits


Integrated circuits with a resistance element and gate-last techniques for forming the integrated circuits are provided. An exemplary technique includes providing a semiconductor substrate that includes a shallow trench isolation (sti) structure disposed therein.
Globalfoundries Singapore Pte. Ltd.


07/02/15
20150187773 

High mobility transistors


An integrated circuit containing an n-channel finfet and a p-channel finfet has a dielectric layer over a silicon substrate. The fins of the finfets have semiconductor materials with higher mobilities than silicon.
Texas Instruments Incorporated


07/02/15
20150187573 

P-type metal oxide semiconductor material and fabricating the same


In(1−3)ga(1−b)zn(1+a+b)o4, wherein 0≦a≦0.1, 0≦b≦0.1, and 0<a+b≦0.16. In particular, the p-type metal oxide semiconductor material has a hole carrier concentration of between 1×1011 cm−3 and 5×1018 cm−3..

07/02/15
20150187470 

Multi-sided optical waveguide-fed photoconductive switches


A photoconductive switch and optical transconductance varistor having a photoconductive region e.g. A wide bandgap semiconductor material substrate between opposing electrodes.

07/02/15
20150184279 

Apparatus and methods for manufacturing thin-film solar cells


Improved methods and apparatus for forming thin-film layers of semiconductor material absorber layers on a substrate web. According to the present teachings, a semiconductor layer may be formed in a multi-zone process whereby various layers are deposited sequentially onto a moving substrate web..
Hanergy Hi-tech Power (hk) Limited


07/02/15
20150184074 

Blue emitting semiconductor nanocrystals and compositions and devices including same


A semiconductor nanocrystal capable of emitting blue light upon excitation. Also disclosed are devices, populations of semiconductor nanocrystals, and compositions including a semiconductor nanocrystal capable of emitting blue light upon excitation.
Qd Vision, Inc.


07/02/15
20150183631 

Semiconductor device having a micro-mechanical structure


According to an embodiment of a semiconductor device, the semiconductor device includes a micro-mechanical structure and a semiconductor material arranged over the micro-mechanical structure. A side surface of the semiconductor material includes a first region and a second region.
Infineon Technologies Ag


06/25/15
20150180425 

Temperature stabilized circuitry


This disclosure relates to temperature stabilization of at least a portion of an amplifier, such as a logarithmic amplifier, and/or a band gap reference circuit. In one aspect, one or more stages of an amplifier, a heater, and a temperature sensor are included in a semiconductor material and surrounded by thermally insulating sidewalls..
Analog Devices Technology


06/25/15
20150179954 

Substituted terrylene and quaterrylene derivates and use as semiconductors thereof


Disclosed are terrylene and quaterrylene derivates of general formula (i) and the use thereof as organic semiconductor materials.. .
Max-planck-gesellschaft Zur Foerderung Der Wissenschaften E.v.


06/25/15
20150179904 

Micro-led array with filters


An integrated led device is provided. The led device includes a substrate.
University College Cork, National University Of Ireland


06/25/15
20150179784 

Semiconductor device having schottky junction between substrate and drain electrode


A semiconductor device includes a semiconductor substrate that is made of a semiconductor material with a wider band gap than silicon, a field effect transistor, including a front surface element structure, provided on a front surface of the substrate, and a drain electrode having surface contact with the substrate so as to form a schottky junction between the semiconductor substrate and the drain electrode.. .
Fuji Electric Co., Ltd.


06/25/15
20150179778 

Soi lateral bipolar transistors having surrounding extrinsic base portions


Lateral soi bipolar transistor structures are provided including an intrinsic base semiconductor material portion in which all surfaces of the intrinsic base not forming an interface with either a collector semiconductor material portion or an emitter semiconductor material portion, contain an extrinsic base semiconductor material portion. Each extrinsic base semiconductor material portion is of the same conductivity type as that of the intrinsic base semiconductor material portion, yet each extrinsic base semiconductor material portion has a higher dopant concentration than the intrinsic base semiconductor material portion.
International Business Machines Corporation


06/25/15
20150179768 

Fin structure of semiconductor device


The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising an upper portion comprising a first semiconductor material having a first lattice constant, wherein the upper portion comprises a first substantially vertical portion having a first width and a second substantially vertical portion having a second width less than the first width over the first substantially vertical portion; and a lower portion comprising a second semiconductor material having a second lattice constant less than the first lattice constant, wherein a top surface of the lower portion has a third width less than the first width; and a gate structure covering the second substantially vertical portion..
Taiwan Semiconductor Manufacturing Company, Ltd.


06/25/15
20150179767 

Method of making a finfet device


A method for fabricating a fin field-effect transistor (finfet) device includes forming a first dielectric layer over a substrate and then etching the first dielectric layer and the substrate to form a first fin and a second fin. A second dielectric layer is formed along sidewalls of the first fin and the second fin.
Taiwan Semiconductor Manufacturing Company, Ltd.


06/25/15
20150179749 

Non-volatile memory cell with self aligned floating and erase gates, and making same


A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends substantially along a sidewall of the trench and a second portion that extends substantially along the surface of the substrate.
Silicon Storage Technology, Inc


06/25/15
20150179742 

Active regions with compatible dielectric layers


A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material.

06/25/15
20150179739 

Integration of ge-containing fins and compound semiconductor fins


A stack of a germanium-containing layer and a dielectric cap layer is formed on an insulator layer. The stack is patterned to form germanium-containing semiconductor fins and germanium-containing mandrel structures with dielectric cap structures thereupon.
International Business Machines Corporation


06/25/15
20150179664 

Heterogeneous semiconductor material integration techniques


Techniques are disclosed for heteroepitaxial growth of a layer of lattice-mismatched semiconductor material on an initial substrate, and transfer of a defect-free portion of that layer to a handle wafer or other suitable substrate for integration. In accordance with some embodiments, transfer may result in the presence of island-like oxide structures on the handle wafer/substrate, each having a defect-free island of the lattice-mismatched semiconductor material embedded within its upper surface.

06/25/15
20150179639 

Semiconductor structures including fluidic microchannels for cooling and related methods


Semiconductor structures are fabricated that include a semiconductor material bonded to a substrate with a layer of dielectric material between the semiconductor material and the substrate. At least one fluidic microchannel extends in a lateral direction through the layer of dielectric material between the semiconductor material and the substrate.
Soitec


06/25/15
20150179599 

Die substrate assembly and method


A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals.. .
Nxp B.v.


06/25/15
20150179500 

Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region


A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions.
Intermolecular, Inc.


06/25/15
20150179397 

Microscopy support structures


Electron microscope support structures and methods of making and using same. The support structures are generally constructed using semiconductor materials and semiconductor manufacturing processes.
Protochips, Inc.


06/25/15
20150175410 

Process for manufacturing a micromechanical structure having a buried area provided with a filter


A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity..
Stmicroelectronics S.r.l.


06/18/15
20150171304 

Thermoelectric elements including of axially dependent material properties


Disclosed herein are a thermoelectric device produced by a method utilizing consolidation techniques and a method of producing a thermoelectric device. The method can include layering a first powdered conductor in a die, layering a first powdered semiconductor material on the first powdered conductor layer, layering a second powdered conductor in the die, and consolidating each of the layers..
Evident Technologies


06/18/15
20150171301 

Thermoelectric device


A thermoelectric device for transferring heat from a heat source to a heat sink includes at least one thermoelectric leg pair having a first leg including an n-type semiconductor material and a second leg including a p-type semiconductor material. The first leg and the second leg are electrically coupled in series.
International Business Machines Corporation


06/18/15
20150171264 

Light emitting devices having light coupling layers


A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling layer is disposed adjacent to one of the first layer and the second layer.
Kabushiki Kaisha Toshiba


06/18/15
20150171259 

Method for fabricating a photodetector


Fabrication of a photodetector is performed on a substrate comprising a first portion successively provided with a first semiconductor film, an electrically insulating layer, a second semiconductor film, and a protection layer. The substrate also comprises a second portion not comprising the second semiconductor film.
Commissariat À L'energie Atomique Et Aux Energies Alternatives


06/18/15
20150171206 

Epitaxially growing iii-v contact plugs for mosfets


A metal-oxide-semiconductor field-effect transistor (mosfet) includes a source/drain region comprising a first iii-v compound semiconductor material, and a contact plug over and connected to the source/drain region. The contact plug includes a second iii-v compound semiconductor material..
Taiwan Semiconductor Manufacturing Company, Ltd.


06/18/15
20150171110 

Method for manufacturing a semiconductor on insulator structure having low electrical losses


A manufacturing process for a semiconductor-on-insulator structure having reduced electrical losses and which includes a support substrate made of silicon, an oxide layer and a thin layer of semiconductor material, and a polycrystalline silicon layer interleaved between the support substrate and the oxide layer. The process includes a treatment capable of conferring high resistivity to the support substrate prior to formation of the polycrystalline silicon layer, and then conducting at least one long thermal stabilization on the structure at a temperature not exceeding 950° c.
Soitec


06/18/15
20150171024 

Semiconductor device and reducing warpage using a silicon to encapsulant ratio


A semiconductor device has a substrate including a base substrate material and a plurality of conductive vias formed partially though the substrate. A plurality of semiconductor die including a base semiconductor material is disposed over the substrate.
Stats Chippac, Ltd.


06/18/15
20150171023 

Formation of alpha particle shields in chip packaging


A structure fabrication method. An integrated circuit that includes n chip electric pads is bonded to a top side of an interposing shield that includes n electric conductors.
International Business Machines Corporation


06/18/15
20150170930 

Polishing of small composite semiconductor materials


A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness.
Taiwan Semiconductor Manufacturing Company, Ltd.


06/18/15
20150168303 

Methods for inspecting semiconductor wafers


Methods and systems are presented for analysing semiconductor materials as they progress along a production line, using photoluminescence images acquired using line-scanning techniques. The photoluminescence images can be analysed to obtain spatially resolved information on one or more properties of said material, such as lateral charge carrier transport, defects and the presence of cracks.
Bt Imaging Pty Ltd.


06/18/15
20150166561 

Organic thin film transistor, organic semiconductor thin film, and organic semiconductor material


An organic thin film transistor having a semiconductor active layer containing a compound represented by the formula (1) has a high carrier mobility and a small change in the threshold voltage after repeated operation. R1 to r10 represent h or a substituent, provided that at least one of r1 to r4 and r6 to r9 represents a substituent represented by -l-r, l represents a specific divalent linking group, and r represents an alkyl group, an oligooxyethylene group, an oligosiloxane group, or a trialkylsilyl group..
Fujifilm Corporation


06/18/15
20150166560 

Organic thin film transistor, organic semiconductor thin film, and organic semiconductor material


An organic thin film transistor having a semiconductor active layer containing a compound represented by the formula (1) has a high carrier mobility and a small change in the threshold voltage after repeated operation. R1 to r10 represent h or a substituent, provided that any two adjacent members among r1 to r4 and r6 to r9 are bonded to each other to form a substituted or unsubstituted benzene ring..
Fujifilm Corporation


06/18/15
20150166327 

Micro-electromechanical semiconductor component


The micro-electromechanical semiconductor component is provided with a semiconductor substrate (4, 5), a reversibly deformable bending element (8a) made of semiconductor material, and at least one transistor that is sensitive to mechanical stresses, said transistor being designed as an integrated component in the bending element (8a). The transistor is arranged in an implanted active region pan (78a) that is made of a semiconductor material of a first conducting type and is introduced in the bending element (8a).
Elmos Semiconductor Ag


06/11/15
20150162666 

Coupled multiband antennas


An antenna includes at least two radiating arm structures made of or limited by a conductor, superconductor or semiconductor material. The two arms are coupled through a region on first and second superconducting arms such that the combined structure forms a small antenna with broadband behavior, multiband behavior or a combination thereof.
Fractus, S.a.


06/11/15
20150162546 

Semiconductor materials prepared from bridged bithiazole compolyers


The compounds, oligomers and polymers of formula of formula (1) are suitable for use in electronic devices such as organic field effect transistors.. .

06/11/15
20150162513 

Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods


Solid-state transducers (“ssts”) and vertical high voltage ssts having buried contacts are disclosed herein. An sst die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure.
Micron Technology, Inc.


06/11/15
20150162485 

Ohmic n-contact formed at low temperature in inverted metamorphic multijunction solar cells


A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° c. Or less and having a contact resistance of less than 5×10−4 ohms-cm2..
Emcore Solar Power, Inc.


06/11/15
20150162476 

Systems for efficient photon upconversion


Described herein are materials and systems for efficient upconversion of photons. The materials may be disposed in a system comprising two semiconductor materials with an interface therebetween, the interface comprising a valence and/or conduction band offset between the semiconducting materials of about −0.5 ev to about 0.5 ev, including 0, wherein one of the semiconductor materials is a material with discrete energy states and the other is a material with a graded composition and/or controlled band gap.
University Of Delaware


06/11/15
20150162447 

Finfet having superlattice stressor


A fin field effect transistor (finfet) device is provided. The finfet includes a superlattice layer and a strained layer.
Taiwan Semiconductor Manufacturing Company, Ltd.


06/11/15
20150162446 

Cmos devices with stressed channel regions, and methods for fabricating the same


Complementary metal-oxide-semiconductor (cmos) devices with stressed channel regions are provided. Each cmos device comprises an field effect transistor (fet) having a channel region located in a semiconductor device structure, which has a top surface oriented along one of a first set of equivalent crystal planes and one or more additional surfaces oriented along a second, different set of equivalent crystal planes.
International Business Machines Corporation


06/11/15
20150162439 

Semiconductor device including a transistor having a low doped drift region and the formation thereof


An illustrative semiconductor device disclosed herein includes a semiconductor substrate. The semiconductor substrate includes a first semiconductor material.
Global Foundries Inc.


06/11/15
20150162434 

Method for the formation of a finfet device having partially dielectric isolated fin structure


A semiconductor material is patterned to define elongated fins insulated from an underlying substrate. A polysilicon semiconductor material is deposited over and in between the elongated fins, and is patterned to define elongated gates extending to perpendicularly cross over the elongated fins at a transistor channel.
Stmicroelectronics, Inc.


06/11/15
20150162433 

Method for the formation of a finfet device with epitaxially grown source-drain regions having a reduced leakage path


Elongated fins of a first semiconductor material are insulated from and formed over an underlying substrate layer (of either soi or bulk type). Elongated gates of a second semiconductor material are then formed to cross over the elongated fins at channel regions, and the gate side walls are covered by sidewall spacers.
Stmicroelectronics, Inc.


06/11/15
20150162414 

Sandwich silicidation for fully silicided gate formation


When forming field effect transistors, a common problem is the formation of a schottky barrier at the interface between a metal thin film in the gate electrode and a semiconductor material, typically polysilicon, formed thereupon. Fully silicided gates are known in the state of the art which may overcome this problem.
Globalfoundries Inc.


06/11/15
20150162366 

Sensor package with cooling feature and making same


A sensor device includes a first substrate of semiconductor material having opposing first and second surfaces, photodetectors configured to receive light impinging on the first surface, and first contact pads each exposed at both the first and second surfaces and electrically coupled to at least one of the photodetectors. A second substrate comprises opposing first and second surfaces, electrical circuits, a second contact pads each disposed at the first surface of the second substrate and electrically coupled to at least one of the electrical circuits, and a plurality of cooling channels formed as first trenches extending into the second surface of the second substrate but not reaching the first surface of the second substrate.
Optiz, Inc.


06/11/15
20150162287 

Electronic device


An electronic device includes multiple semiconductor chips in a single housing. Such semiconductor chips may comprise different semiconductor materials, for example they may comprise gan.
Infineon Technologies Austria Ag


06/11/15
20150162248 

Method for the formation of dielectric isolated fin structures for use, for example, in finfet devices


On a substrate formed of a first semiconductor material, a first overlying layer formed of a second semiconductor material is deposited. A second overlying layer formed of a third semiconductor material is deposited over the first overlying layer.
Stmicroelectronics, Inc.


06/11/15
20150162216 

Tunable composite interposer


A composite interposer can include a substrate element and a support element. The substrate element can have first and second opposite surfaces defining a thickness of 200 microns or less, and can have a plurality of contacts exposed at the first surface and electrically conductive structure extending through the thickness.
Invensas Corporation




Popular terms: [SEARCH]

Semiconductor Material topics: Semiconductor, Semiconductor Material, Semiconductor Device, Transistors, Surfactant, Electric Conversion, Transparent Conductive Oxide, Semiconductor Substrate, Heating Devices, Semiconductor Devices, Organic Electroluminescence, Buffer Layer, Integrated Circuit, Crystallin, Electronic Device

Follow us on Twitter
twitter icon@FreshPatents

###

This listing is a sample listing of patent applications related to Semiconductor Material for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Semiconductor Material with additional patents listed. Browse our RSS directory or Search for other possible listings.


1.3852

6270

2 - 1 - 108