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Semiconductor Devices

Semiconductor Devices-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Semiconductor devices with integrated schotky diodes and methods of fabrication
Nxp Usa, Inc.
October 12, 2017 - N°20170294531

An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a schottky metal layer disposed over the substrate adjacent the gate electrode. The schottky metal layer includes a schottky contact electrically coupled to the channel which provides a schottky ...
Semiconductor devices with enhanced deterministic doping and related methods
Atomera Incorporated
October 12, 2017 - N°20170294514

A method for making a semiconductor device may include forming a plurality of stacked groups of layers on a semiconductor substrate, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include ...
Light emitting diode module, display panel having the same and method of manufacturing the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294479

In some examples, a semiconductor device may comprise a semiconductor chip including a plurality of pixels, each pixel formed of a plurality of sub-pixels, such as a red sub-pixel, green sub-pixel and blue sub-pixel. Each sub-pixel may comprise a light emitting diode. A first signal line may connect to signal terminals of a first group sub-pixels (e. G., arranged in ...
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Semiconductor devices and methods of fabricating the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294439

Semiconductor devices and method of manufacturing the same are provided. The devices may include a substrate including a first impurity region and second impurity regions spaced apart from the first impurity region and a conductive line. The conductive line may extend in a first direction and may be electrically connected to the first impurity region. The devices may also include ...
Semiconductor devices and methods of fabricating the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294437

A semiconductor device includes a substrate with an nmosfet region and a pmosfet region, a first active pattern on the nmosfet region, a second active pattern on the pmosfet region, a dummy pattern between the nmosfet and pmosfet regions, and device isolation patterns on the substrate that fill trenches between the first active pattern, the second active pattern, and the ...
Semiconductor device having multiple gate pads
Vishay-siliconix
October 12, 2017 - N°20170294432

Disclosed are semiconductor devices that include additional gate pads, and methods of fabricating and testing such devices. A device may include a first gate pad, a second gate pad, and a third gate pad. The first gate pad is connected to a gate including a gate oxide layer. The second and third gate pads are part of an electro-static discharge (...
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Semiconductor Devices Patent Applications
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  • 1069+ full patent PDF documents of Semiconductor Devices-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
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Semiconductor devices including active fins and methods of manufacturing the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294355

Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the ...
Semiconductor devices
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294337

Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation ...
Semiconductor device
Renesas Electronics Corporation
October 05, 2017 - N°20170288653

There is a problem in related-art semiconductor devices that the chip size of a semiconductor device having an active miller clamp function cannot be reduced. According to one embodiment, a semiconductor device is configured to, when a power device is turned on or off, monitor a gate voltage vg of the power device, set a predetermined range within a transition ...
Micro-size devices formed by etch of sacrificial epitaxial layers
X Development Llc
October 05, 2017 - N°20170288087

Embodiments regard micro-size devices formed by etch of sacrificial epitaxial layers. An embodiment of a method includes forming a plurality of epitaxial layers on a sapphire crystal, wherein the epitaxial layers include a buffer layer on the sapphire crystal, a sacrificial layer above the buffer layer, and one or more device layers above the sacrificial layer; etching to singulate the ...
Semiconductor devices with germanium-rich active layers and doped transition layers
Intel Corporation
October 05, 2017 - N°20170288019

Semiconductor device stacks and devices made there from having ge-rich device layers. A ge-rich device layer is disposed above a substrate, with a p-type doped ge etch suppression layer (e. G., p-type sige) disposed there between to suppress etch of the ge-rich device layer during removal of a sacrificial semiconductor layer richer in si than the device layer. Rates of ...
Via structures including etch-delay structures and semiconductor devices having via plugs
Samsung Electronics Co., Ltd.
October 05, 2017 - N°20170287967

A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper ...
Semiconductor memory devices
Samsung Electronics Co., Ltd.
October 05, 2017 - N°20170287928

Semiconductor devices are provided. Semiconductor devices may include a stack structure including word lines stacked on a substrate, first vertical pillars and second vertical pillars that extend through the stack structure, a first string select line overlapping the first vertical pillars in a plan view, and a second string select line overlapping the second vertical pillars in the plan view ...
Semiconductor Devices Patent Pack
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Semiconductor Devices Patent Applications
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  • 1069+ full patent PDF documents of Semiconductor Devices-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
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Stacked die ground shield
Microchip Technology Incorporated
October 05, 2017 - N°20170287850

The present disclosure relates to semiconductor devices. Embodiments of the teachings thereof may include processes for manufacturing of semiconductor devices and the devices themselves. For example, some embodiments may include an integrated circuit package comprising: a lead frame; a first die mounted on the lead frame in flip-chip fashion, with a frontside of the first die connected to the lead ...
Combined source and base contact for a field effect transistor
Microchip Technology Incorporated
October 05, 2017 - N°20170287835

The present disclosure relates to semiconductor devices. The teachings thereof may be embodied in metal oxide semiconductor field effect transistors (mosfet) and methods for their manufacture. Some embodiments may include: depositing a base within an epitaxial layer; implanting a source implant extending into the base, wherein the epitaxial layer, the base, and the source implant form a continuous plane surface; ...
Contact expose etch stop
Microchip Technology Incorporated
October 05, 2017 - N°20170287834

The present disclosure relates to semiconductor devices and the teachings thereof may be embodied in metal oxide semiconductor field effect transistors (mosfet). Some embodiments may include a power mosfet with transistor cells, each cell comprising a source and a drain region; a first dielectric layer disposed atop the transistor cells; a silicon rich oxide layer on the first dielectric layer; ...
Extra gate device for nanosheet
International Business Machines Corporation
October 05, 2017 - N°20170287788

A method for forming semiconductor devices includes forming a highly doped region. A stack of alternating layers is formed on the substrate. The stack is patterned to form nanosheet structures. A dummy gate structure is formed over and between the nanosheet structures. An interlevel dielectric layer is formed. The dummy gate structures are removed. Sg regions are blocked, and top ...
Gripper for semiconductor devices
International Business Machines Corporation
October 05, 2017 - N°20170287766

A wafer transfer system can include a wafer gripper for picking and placing semiconductor devices. In an embodiment, the wafer gripper can include a first portion, a second portion and a laminate between the first and second portion. In one embodiment, the first portion can comprise glass or tempered glass, where the first portion having at least one vacuum hole ...
Semiconductor devices, and semiconductor systems
Sk Hynix Inc.
October 05, 2017 - N°20170286218

A write parity signal generation circuit, semiconductor device and semiconductor system may be provided. The write parity signal generation circuit may be configured to generate a pre-parity signal from a write data signal and a read data signal, and generate a write parity signal from the pre-parity signal and a syndrome signal.
Vacuum laminating apparatus and method for manufacturing semiconductor apparatus
Shin-etsu Chemical Co., Ltd.
October 05, 2017 - N°20170282527

Manufacturing a semiconductor apparatus includes preparing a support-base attached encapsulant including a thermosetting resin layer stacked as an encapsulant on a support base, coating a semiconductor-device mounting surface of a substrate on which semiconductor devices are mounted, or a semiconductor-device forming surface of a wafer on which semiconductor devices are formed with the thermosetting resin layer of the support-base attached ...
Semiconductor devices, finfet devices with optimized strained-sourece-drain recess profiles and methods of forming the same
Taiwan Semiconductor Manufacturing Co., Ltd.
September 28, 2017 - N°20170278972

Semiconductor devices, finfet devices with optimized strained-source-drain recess profiles and methods of forming the same are provided. One of the semiconductor devices includes a substrate, a gate stack over the substrate and a strained layer in a recess of the substrate and aside the gate stack. Besides, a ratio of a depth at the greatest width of the recess to ...
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