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Semiconductor Device patents



      
           
This page is updated frequently with new Semiconductor Device-related patent applications. Subscribe to the Semiconductor Device RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Device RSS RSS


Method for forming semiconductor device

Semiconductor device and method for manufacturing the same

Semiconductor device having complementary bit line pair

Date/App# patent app List of recent Semiconductor Device-related patents
08/28/14
20140242894
 Polishing pad and method for producing same patent thumbnailnew patent Polishing pad and method for producing same
Provided are: a polishing pad which is capable of alleviating a scratch problem that occurs when a conventional hard (dry) polishing pad is used, and which is excellent in polishing rate and polishing uniformity and is usable not only for primary polishing but also for finish polishing; and a method for producing the polishing pad. The polishing pad is for polishing a semiconductor device and includes a polishing layer having a polyurethane-polyurea resin molded body containing cells of a substantially spherical shape.
08/28/14
20140242815
 Method of manufacturing semiconductor device patent thumbnailnew patent Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device according to the present invention includes the steps of (b) forming, on a back face of a dummy substrate and back faces of a plurality of semiconductor substrates, inorganic films having such thicknesses as to be resistant to a temperature of a thermal oxidizing treatment or a heat treatment and to sufficiently decrease an amount of oxidation or reducing gaseous species to reach the back faces of the dummy substrate and the plurality of semiconductor substrates, (c) disposing the dummy substrate and the plurality of semiconductor substrates in a lamination with surfaces turned in the same direction at an interval from each other, and (d) carrying out a thermal oxidizing treatment or post annealing over the surfaces of the semiconductor substrates in an oxidation gas atmosphere or a reducing gas atmosphere after the steps (b) and (c).. .
08/28/14
20140242809
 Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium patent thumbnailnew patent Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device is disclosed. The method includes forming a film containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times.
08/28/14
20140242808
 Semiconductor device manufacturing method and substrate processing system patent thumbnailnew patent Semiconductor device manufacturing method and substrate processing system
A semiconductor device manufacturing method includes forming a first high-k insulating film on a processing target object; performing a crystallization heat-treatment process on the first high-k insulating film at a temperature equal to or higher than about 650° c. For a time less than about 60 seconds; and forming, on the first high-k insulating film, a second high-k insulating film containing a metal element having an ionic radius smaller than that of a metal element of the first high-k insulating film and having a relative permittivity higher than that of the first high-k insulating film..
08/28/14
20140242800
 Methods of forming layer patterns of a semiconductor device patent thumbnailnew patent Methods of forming layer patterns of a semiconductor device
A method of manufacturing a layer pattern of a semiconductor device, the method including forming an anti-reflective coating (arc) layer on an etching object layer such that the arc layer includes a polymer having an imide group; forming a photoresist pattern on the arc layer; wet etching portions of the arc layer exposed by the photoresist pattern to form an arc layer pattern; and etching the etching object layer using the photoresist pattern as an etch mask to form the layer pattern.. .
08/28/14
20140242799
 Pattern formation method and method for manufacturing semiconductor device patent thumbnailnew patent Pattern formation method and method for manufacturing semiconductor device
According to one embodiment, a pattern formation method includes forming a first mask layer including a first and a second concave pattern on a first surface of a substrate. The method can include providing a protection film in the first concave pattern.
08/28/14
20140242796
 Method of manufacturing semiconductor device patent thumbnailnew patent Method of manufacturing semiconductor device
To improve a semiconductor device having a nonvolatile memory. A first misfet, a second misfet, and a memory cell are formed, and a stopper film made of a silicon oxide film is formed thereover.
08/28/14
20140242793
 Pattern forming method and method of manufacturing semiconductor device patent thumbnailnew patent Pattern forming method and method of manufacturing semiconductor device
According to one embodiment, a core material is ejected onto an object using an inkjet method to form a core pattern on the object, a mask pattern is formed on the object so as to embed the core pattern, and the core pattern which is embedded in the mask pattern is removed.. .
08/28/14
20140242792
 Method for forming semiconductor device patent thumbnailnew patent Method for forming semiconductor device
A method for forming a semiconductor device is provided, which may include: providing an interlayer dielectric layer, a metal layer formed on the interlayer dielectric layer, an etch stop layer formed on the metal layer, and a first opening extending through the etch stop layer and the metal layer, wherein the interlayer dielectric layer is exposed from the first opening; forming a protecting layer on the sidewall of the first opening to cover the metal layer; after forming the protecting layer, forming a second opening by etching a portion of the interlayer dielectric layer; and forming an isolating layer by filling up the second opening, wherein the isolating layer includes an air gap. The semiconductor device is more stable in performance..
08/28/14
20140242790
 Method of manufacturing semiconductor device patent thumbnailnew patent Method of manufacturing semiconductor device
A metal-containing film capable of adjusting a work function is formed. A first source containing a first metal element and a halogen element and a second source containing a second metal element different from the first metal element and an amino group are alternately supplied onto a substrate having a high-k dielectric film to form a composite metal nitride film on the high-k dielectric film..
08/28/14
20140242789
new patent Semiconductor device manufacturing method
A semiconductor device manufacturing method includes forming a dielectric film on a semiconductor substrate; performing a heat treatment on the dielectric film; forming an electrode on a first region of the dielectric film; irradiating an ionized gas cluster to a second region of the dielectric film where the electrode is not formed; and removing the second region of the dielectric film where the ionized gas cluster is irradiated by a wet etching after the irradiating of the ionized gas cluster.. .
08/28/14
20140242788
new patent Method of forming a high quality interfacial layer for a semiconductor device by performing a low temperature ald process
One illustrative method disclosed herein includes performing an atomic layer deposition (ald) process at a temperature of less than 400° c. To deposit a layer of silicon dioxide on a germanium-containing region of semiconductor material and forming a gate structure of a transistor device above the layer of silicon dioxide..
08/28/14
20140242787
new patent Photosensitive resin composition and method for producing semiconductor device
Disclosed is a photosensitive resin composition which exhibits positive or negative photosensitivity and is used as a mask in an ion implantation step, the photosensitive resin composition including, as a resin, (a) a polysiloxane. The photosensitive resin composition of the present invention has high heat resistance and is capable of controlling a pattern shape, and also has excellent ion implantation mask performance, thus enabling application to a low-cost high-temperature ion implantation process..
08/28/14
20140242782
new patent Methods of transferring semiconductor elements and manufacturing semiconductor devices
The present disclosure relates to a method of transferring semiconductor elements from a non-flexible substrate to a flexible substrate. The present disclosure also relates to a method of manufacturing a flexible semiconductor device based on the method of transferring semiconductor elements.
08/28/14
20140242779
new patent Semiconductor device manufacturing method and manufacturing apparatus
According to one embodiment, a semiconductor device manufacturing method includes: bonding a first wafer and a second wafer to each other, to form a stack; rubbing a film attached with a fill material in a thin-film shape into a gap located between a bevel of the first wafer and a bevel of the second wafer, to fill the gap with the fill material; and thinning the first wafer.. .
08/28/14
20140242777
new patent Method for bonding semiconductor devices
A method of attaching first and second semiconductor devices to one another includes applying plating gel over a surface of a first semiconductor device, positioning bonding regions of a second semiconductor device in contact with the plating gel on corresponding bonding regions on the first semiconductor device, and reacting at least some the plating gel to bond the second semiconductor device to the first semiconductor device.. .
08/28/14
20140242775
new patent Method of fabricating finfets
The disclosure relates to a method of fabricating a semiconductor device including forming a patterned hardmask layer over a substrate comprising a major surface. The method further includes forming a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (esc) temperature between about 90° c.
08/28/14
20140242772
new patent Method for fabricating semiconductor device
A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a iv group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer..
08/28/14
20140242771
new patent Method for manufacturing a semiconductor device
A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes a transient voltage suppression structure that includes at least two diodes and a zener diode. In accordance with embodiments, a semiconductor material is provided that includes an epitaxial layer.
08/28/14
20140242769
new patent Method of manufacturing a super-junciton semiconductor device
A method of manufacturing a super-junction semiconductor device is disclosed that allows forming a high concentration layer with high precision and improves the trade-off relationship between the eoff and the dv/dt using a trench embedding method. The method comprises a step of forming a parallel pn layer using a trench embedding method and a step of forming a proton irradiated layer in the upper region of the pn layer.
08/28/14
20140242768
new patent Reducing wafer distortion through a high cte layer
Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides.
08/28/14
20140242767
new patent Method of manufacturing a semiconductor device
After forming a first film over the main surface of a semiconductor substrate, the first film is patterned, thereby forming a control gate electrode for a non-volatile memory, a dummy gate electrode, and a first film pattern. Subsequently, a memory gate electrode for the non-volatile memory adjacent to the control gate electrode is formed.
08/28/14
20140242766
new patent Method for manufacturing semiconductor device and semiconductor device
A manufacturing method includes forming a fin-shaped silicon layer on a silicon substrate, forming a first insulating film around the fin-shaped silicon layer, and forming a pillar-shaped silicon layer on the fin-shaped silicon layer; forming diffusion layers in an upper portion of the pillar-shaped silicon layer, an upper portion of the fin-shaped silicon layer, and a lower portion of the pillar-shaped silicon layer; forming a gate insulating film, a polysilicon gate electrode, and a polysilicon gate wiring; forming a silicide in an upper portion of the diffusion layer in the upper portion of the fin-shaped silicon layer; depositing an interlayer insulating film, exposing the polysilicon gate electrode and the polysilicon gate wiring, etching the polysilicon gate electrode and the polysilicon gate wiring, and then depositing a metal to form a metal gate electrode and a metal gate wiring; and forming a contact.. .
08/28/14
20140242760
new patent Semiconductor radio frequency switch with body contact
The present disclosure relates to a radio frequency (rf) switch that includes multiple body-contacted field effect transistor (fet) elements coupled in series. The fet elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die.
08/28/14
20140242759
new patent Reducing wafer distortion through a high cte layer
Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides.
08/28/14
20140242756
new patent Method for preparing semiconductor devices applied in flip chip technology
A method for preparing semiconductor devices in a flip chip process comprises forming deep grooves surrounding each of the semiconductor chips; depositing a first plastic package material to form a first plastic package layer covering front surface of the semiconductor wafer and filling the deep grooves; depositing a metal layer at back surface of the semiconductor wafer after grinding; grinding an outermost portion of the metal layer thus forming a ring area located at back surface around edge of the semiconductor wafer not covered by the metal layer; cutting the first plastic package layer, the semiconductor wafer, the metal layer and the first plastic package material filled in the deep grooves along a straight line formed by two ends of each of the deep grooves filled with the first plastic package material; and picking up the semiconductor devices and mounting on a substrate without flipping the semiconductor devices.. .
08/28/14
20140242749
new patent Method for manufacturing semiconductor device
Electrical characteristics of transistors using an oxide semiconductor are greatly varied in a substrate, between substrates, and between lots, and the electrical characteristics are changed due to heat, bias, light, or the like in some cases. In view of the above, a semiconductor device using an oxide semiconductor with high reliability and small variation in electrical characteristics is manufactured.
08/28/14
20140242734
new patent Leadframe, semiconductor device, and method of manufacturing the same
A method of manufacturing a semiconductor device includes mounting at least one of a first semiconductor chip and a second semiconductor chip over a die pad of a leadframe, and inspecting a mounting position of at least one of the first semiconductor chip and the second semiconductor chip, wherein the leadframe includes first mark formed to the die pad, for indicating a first mounting region for the first semiconductor chip, and second mark formed to the die pad, for indicating a second mounting region for the second semiconductor chip, the first mark is different from the second mark, in at least either one of size and geometry, wherein, in the inspecting a mounting position of at least one of the first semiconductor chip and the second semiconductor chip, a mounting position of the first semiconductor chip is inspected when the first semiconductor chip is mounted.. .
08/28/14
20140242733
new patent Reflective mask, method of monitoring the same, and method of manufacturing semiconductor device
According to one embodiment, provided is a reflective mask having a substrate, a reflection layer that reflects euv light formed above the substrate, and an absorption layer that absorbs the euv light formed above the reflection layer. The reflective mask further includes a monitor pattern monitoring an attachment amount of contamination attached during exposure..
08/28/14
20140242526
new patent Positive tone organic solvent developed chemically amplified resist
Provided is a method for developing positive-tone chemically amplified resists with an organic developer solvent having at least one polyhydric alcohol, such as ethylene glycol and/or glycerol, alone or in combination with an additional organic solvent, such as isopropyl alcohol, and/or water. The organic solvent developed positive tone resists described herein are useful for lithography pattern forming processes; for producing semiconductor devices, such as integrated circuits (ic); and for applications where basic solvents are not suitable, such as the fabrication of chips patterned with arrays of biomolecules or deprotection applications that do not require the presence of acid moieties..
08/28/14
20140242499
new patent Light-reflective photomask and mask blank for euv exposure, and manufacturing method of semiconductor device
According to one embodiment, a light-reflective photomask including a circuit pattern area, and an outside area positioned outside the circuit pattern area includes a substrate, a low-reflectivity layer provided in both the circuit pattern area, and the outside area, formed on the substrate, including at least a conductive layer, and comprising a first reflectivity for deep ultraviolet light, a multilayer reflection layer provided in the circuit pattern area, and formed on the low-reflectivity layer, and a light-absorber provided in the circuit pattern area, formed on the multilayer reflection layer, including a circuit pattern, and comprising a second reflectivity for deep ultraviolet light. The first reflectivity is lower than or equal to the second reflectivity..
08/28/14
20140241660
new patent Optical closed loop microresonator and thyristor memory device
A monolithic semiconductor device that includes a waveguide structure optically coupled to an optical resonator. The optical resonator is adapted to process light at a predetermined wavelength.
08/28/14
20140241487
new patent Semiconductor device, driver circuit, and display device
To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel.
08/28/14
20140241475
new patent Semiconductor device and signal processing method thereof
A semiconductor device includes a one-segment tuner i/f that is connected to a one-segment tuner, a tuner i/f that is connected to a digital terrestrial tuner, a decoder that selectively decodes a first broadcast signal supplied from the one-segment tuner i/f and a second broadcast signal supplied from the tuner i/f, a general purpose processor that is provided separately from the decoder and decodes the first broadcast signal, and a switch unit that, based on signal intensity of the second broadcast wave, switches the decoding by the decoder between the first broadcast signal and the second broadcast signal while the general purpose processor is decoding the first broadcast signal. The one-segment tuner i/f, the tuner i/f, the decoder, the general purpose processor, and the switch unit are integrated on one chip..
08/28/14
20140241103
new patent Semiconductor device having cal latency function
A method for accessing a semiconductor device having a memory array, the method includes receiving a mode register command to set a command latency value in a mode register, receiving a chip select signal, activating a command receiver in response to the chip select signal, receiving, with the command receiver, an access command with a first latency from the chip select signal equal to the command latency value, accessing the memory array in response to the access command, and deactivating the command receiver with a second latency from the chip select signal equal to a deactivation latency value.. .
08/28/14
20140241088
new patent Semiconductor device having complementary bit line pair
Disclosed herein is a semiconductor device comprising complementary pair of bit lines, memory cells connected to the bit lines, dummy cells having the same structure as the memory cells, a differential sense amplifier, an equalizing circuit equalizing potentials of the bit lines, and a control circuit. The memory cells are disconnected from the bit lines and the dummy cells are connected to the bit lines, and subsequently the bit lines are equalized by the equalizing circuit.
08/28/14
20140241073
new patent Semiconductor device
Disclosed herein is an apparatus that includes: a first terminal configured to receive a serial write data signal that includes at least four bits transferred in series with each other; a second terminal configured to receive a data strobe signal; a control circuit configured to produce a plurality of internal data strobe signals in response to the data strobe signal; and a serial-to-parallel conversion circuit configured to respond to the data strobe and internal data strobe signals to convert the serial write data signal into a parallel write data signal that includes at least four bits produced in parallel to each other.. .
08/28/14
20140241054
new patent Semiconductor device and electronic device
To provide a semiconductor device with such a new structure that the effect of variation in transistor characteristics can be reduced to achieve less variation in the output voltage of a memory cell. A memory cell includes a source follower (common drain) transistor for reading data held in a gate.
08/28/14
20140241051
new patent Semiconductor device and its manufacturing method
In a semiconductor device including a memory cell array formed of memory cells using a storage element by a variable resistor and a select transistor, a buffer cell is arranged between a sense amplifier and the memory cell array and between a word driver and the memory cell array. The resistive storage element in the memory cell is connected to a bit-line via a contact formed above the resistive storage element.
08/28/14
20140241046
new patent Semiconductor memory devices with a power supply
A semiconductor device includes a virtual power supplier, a driving signal generator and a load driver. The virtual power supplier boosts a driving voltage to generate a virtual voltage.
08/28/14
20140241038
new patent Semiconductor device and method of controlling semiconductor device
A memory cell is included which has a selection transistor and a variable resistance device connected to a bit line through the selection transistor. The variable resistance device includes a first electrode which has a first metal material and is connected to the selection transistor, a second electrode which has a second metal material different from the first metal material, and an insulating film which is provided between the first electrode and the second electrode, has a third metal material different from the first metal material and the second metal material, and has oxygen.
08/28/14
20140241024
new patent Multi channel semiconductor memory device and semiconductor device including the same
Disclosed is a semiconductor memory device that includes a plurality of channel memories mounted within a package and is capable of minimizing or reducing the number of through-silicon vias. With the semiconductor memory device, a row command or a row address on two or more channels is applied through a shared bus.
08/28/14
20140240705
new patent Semiconductor device, reticle method for checking position misalignment and method for manufacturing position misalignment checking mark
According to one embodiment, there is provided a semiconductor device including a circuit area in which an integrated circuit is formed, a position misalignment checking mark of which a contrasting density is detected under polarized illumination and is not detectable under non-polarized illumination, and a peripheral pattern that is disposed on a periphery of the position misalignment checking mark and has a contrasting density that is not detectable under the polarized illumination.. .
08/28/14
20140240683
new patent Focus position adjusting apparatus, reticle, focus position adjusting program, and method of manufacturing semiconductor device
According to one embodiment, a step difference estimation unit, an assist pattern generation unit, and a spherical aberration conversion unit are installed. The step difference estimation unit estimates step difference of a processing layer.
08/28/14
20140240634
new patent Semiconductor device
A semiconductor device capable of maintaining data even after instantaneous power reduction or interruption. The semiconductor device includes first to sixth transistors.
08/28/14
20140240633
new patent Semiconductor device
A semiconductor device capable of maintaining data during instantaneous power reduction or interruption. The semiconductor device includes first to sixth transistors.
08/28/14
20140240369
new patent Semiconductor device and display apparatus
A semiconductor device includes a p-substrate, a digital circuit unit, and an analogy circuit unit. The digital circuit unit includes a deep n-well, a first p-type semiconductor element, a first n-type semiconductor element, and a p-well.
08/28/14
20140240365
new patent Semiconductor device controlling source driver and display device including the semiconductor device the same
A semiconductor device includes: a transmitter transforming n data into first serial data and transmitting the first serial data through a first transmission line and transforming m data into second serial data and transmitting the second serial data through a second transmission line, where n and m are natural numbers at least one of which is greater than 1; a first driver integrated circuit (ic) group including n driver ics; and a second driver ic group including m driver ics, wherein each of the n driver ics receives the first serial data through the first transmission line and is driven by part of the first serial data, each of the m driver ics receives the second serial data through the second transmission line and is driven by part of the second serial data, and each of the n data and the m data includes identification information about a driver ic.. .
08/28/14
20140240038
new patent Reference voltage generation circuit
Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated.
08/28/14
20140240036
new patent Semiconductor device
Disclosed is a semiconductor device that includes an n-channel mos transistor and a control voltage generation circuit. The n-channel mos transistor controls the supply of a power supply voltage obtained by stepping down a dc voltage.
08/28/14
20140240015
new patent Semiconductor device
A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage..
08/28/14
20140239996
new patent Test apparatus having a probe card and connector mechanism
A test apparatus for testing a semiconductor device includes a circuit board having a contact pattern on one side and an opening therethrough, and a probe card supporting a probe needle array. The probe needle array is insertable into the opening of the circuit board and is configured to probe a device under test.
08/28/14
20140239989
new patent Semiconductor device having circuitry for detecting abnormalities in a power supply wiring network
A semiconductor device is capable of detecting a power supply voltage abnormality without degrading the performance of internal circuits. The semiconductor device includes a plurality of power supply inspection circuits and a result storage register.
08/28/14
20140239988
new patent Semiconductor device which can detect abnormality
A semiconductor device includes: a drive circuit; a standby circuit; and a detection circuit. The drive circuit turns on an output transistor connected to a load based on an active input signal.
08/28/14
20140239831
new patent Semiconductor device and power supply device
A power supply topology is used in which a transistor is provided on the side of an output node of a rectifying circuit. An inductor is provided on the side of a reference node, a resistor is inserted between the transistor and the inductor, and one end of the resistor is coupled to a ground power supply voltage of a pfc circuit.
08/28/14
20140239741
new patent Thermal model
A method for controlling the temperature of a first semiconductor device on an inverter module of a drive configured to drive an electrical machine is disclosed. The method comprises calculating at least one harmonic component of at least one power loss of at least the first semiconductor device; using the at least one harmonic component of the at least one power loss of the at least the first semiconductor device to calculate a temperature of the first semiconductor device; and if the calculated temperature of the first semiconductor device does not meet a predetermined temperature condition, issuing a command to control the operation of the drive such that the temperature of the first semiconductor device is changed to meet the predetermined temperature condition..
08/28/14
20140239714
new patent Electrical control system
There is provided a semiconductor device including a power compensation circuit in an apparatus in order to notify of a power supply disconnection failure that a user of the apparatus may not recognize. The power compensation circuit includes a rectifier circuit and a detection circuit.
08/28/14
20140239511
new patent Semiconductor construct and manufacturing method thereof as well as semiconductor device and manufacturing method thereof
A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring.
08/28/14
20140239509
new patent Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with tsv
A semiconductor device has a core semiconductor device with a through silicon via (tsv). The core semiconductor device includes a plurality of stacked semiconductor die and semiconductor component.
08/28/14
20140239508
new patent Semiconductor device and method for manufacturing semiconductor device
A semiconductor device includes a semiconductor substrate. A through hole extends through the semiconductor substrate.
08/28/14
20140239506
new patent Semiconductor device and manufacturing method thereof
To provide a semiconductor device comprising a first layer that is provided on a semiconductor substrate and includes a first wiring pattern planarized by cmp and a plurality of first dummy patterns made of a same material as the first wiring pattern and a second layer that is provided above the semiconductor substrate and includes a second wiring pattern planarized by cmp and a plurality of second dummy patterns made of a same material as the second wiring pattern. A central axis of each of the second dummy patterns coincides with that of a corresponding one of the first dummy patterns in a direction perpendicular to the semiconductor substrate..
08/28/14
20140239499
new patent Semiconductor device and method for production of semiconductor device
A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto.. .
08/28/14
20140239497
new patent Packaged semiconductor device
A packaged semiconductor device includes a substrate including a first major surface, a second major surface, first vias running between the first major surface and the second major surface, first contact pads contacting the first vias at the first major surface, second contact pads contacting the first vias at the second major surface, and an opening between the first major surface and the second major surface. A first integrated circuit (ic) die is positioned in the opening in the substrate.
08/28/14
20140239496
new patent Semiconductor device and method of forming micro-vias partially through insulating material over bump interconnect conductive layer for stress relief
A semiconductor device has a semiconductor die and first insulating layer formed over the semiconductor die. A plurality of first micro-vias can be formed in the first insulating layer.
08/28/14
20140239495
new patent Semiconductor device and method of forming a vertical interconnect structure for 3-d fo-wlcsp
A semiconductor device is made by forming a first conductive layer over a carrier. The first conductive layer has a first area electrically isolated from a second area of the first conductive layer.
08/28/14
20140239493
new patent Semiconductor chip and semiconductor device
Provided is a semiconductor chip that is flip-chip mounted where an inner chip pad array and an outer chip pad array, which are arranged on an inner side and an outer side of io cells in a staggered manner, are arranged to be spaced away from each other by a predetermined gap or greater. The predetermined gap represents a gap where one via can be arranged between an inner substrate pad array and an outer substrate pad array on a substrate which faces and is connected to the inner chip pad array and the outer chip pad array.
08/28/14
20140239489
new patent Semiconductor device
A semiconductor device includes a semiconductor chip, multiple terminals arranged in a first direction, a resin portion sealing the semiconductor chip and the terminals. The terminals are projected from a side surface of the resin portion in a second direction, and include at least one subject terminal having a first portion and a second portion.
08/28/14
20140239484
new patent Method for forming sintered silver coating film, baking apparatus, and semiconductor device
In a method for forming a sintered silver coating film, for use as a heat spreader, on a semiconductor substrate or a semiconductor package, a coating film of an ink or paste containing silver nanoparticles is formed on one surface of the semiconductor substrate or the substrate package. Further, the coating film is sintered by heating the coating film under an atmosphere of a humidity of 30% to 50% rh (30° c.) by a ventilation oven..
08/28/14
20140239478
new patent Semiconductor device and method for fabricating the same
A semiconductor device includes a first semiconductor chip at least partially overlapping a second semiconductor chip. The first semiconductor chip is coupled to a substrate and has a first width, and the second semiconductor chip has a second width.
08/28/14
20140239476
new patent Semiconductor device with integral heat sink
A packaged semiconductor device has opposing first and second main surfaces and a sidewall connecting the first and second main surfaces. A semiconductor die is embedded in the package and has a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package.
08/28/14
20140239468
new patent Semiconductor device
An object is to provide a semiconductor device having a plate electrode adapted to a plurality of chips, capable of being produced at low cost, and having high heat cycle property. A semiconductor device according to the present invention includes a plurality of semiconductor chips formed on a substrate, and a plate electrode connecting electrodes of the plurality of semiconductor chips.
08/28/14
20140239467
new patent Semiconductor device
A semiconductor device includes a lead frame, a semiconductor chip soldered to the lead frame, and a metal bar. The metal bar is arranged inside a solder layer so as to extend along one side of the semiconductor chip.
08/28/14
20140239460
new patent Semiconductor device having an insulating layer structure and method of manufacturing the same
In a semiconductor device having an insulating layer structure and method of manufacturing the same, a substrate including a first region and a second region may be provided. A first pattern structure may be formed on the first region of the substrate.
08/28/14
20140239455
new patent Semiconductor device and semiconductor wafer
In a ring region, a first outer ring is provided outside a seal ring, and a second outer ring is provided outside the first outer ring. This can prevent a crack from reaching even the seal ring that exists in the ring region, for example, when a scribe region located outside the ring region is cut off by a dicing blade..
08/28/14
20140239454
new patent Wafer edge protection
A semiconductor device and a method for forming a device are presented. A wafer substrate having first and second regions is provided.
08/28/14
20140239451
new patent Semiconductor devices including a lateral bipolar structure and fabrication methods
A semiconductor device includes an emitter region, a collector region and a base region. The emitter region is implanted in a semiconductor substrate.
08/28/14
20140239445
new patent Semiconductor device and method of manufacturing the same
A semiconductor device has a resistor area and wiring area selectively disposed on a semiconductor substrate. In this semiconductor device, a second interlayer insulating film is formed above the semiconductor substrate, and a thin-film resistor is disposed on the second interlayer insulating film in the resistor area.
08/28/14
20140239441
new patent Semiconductor device and method of manufacturing the same
A semiconductor device, includes: a first semiconductor layer having a first conductivity type; a pair of first electrodes arranged to be separated from each other in the first semiconductor layer; a second electrode provided on the first semiconductor layer between the pair of first electrodes with a dielectric film in between; and a pair of connection sections electrically connected to the pair of first electrodes, wherein one or both of the pair of first electrodes are divided into a first region and a second region, the first region and the second region being connected by a bridge section.. .
08/28/14
20140239438
new patent Semiconductor device
A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips.
08/28/14
20140239437
new patent Semiconductor device
According to one embodiment, the semiconductor device with element isolation by dti has a layer of the first electroconductive type formed on a substrate. The semiconductor layer of the second electroconductive type is formed on the embedding layer.
08/28/14
20140239425
new patent Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a semiconductor chip having a first main surface, a second main surface opposite to the first main surface, a side surface arranged between the first main surface and the second main surface, and a magnetic storage device, a first magnetic shield overlaying on the first main surface, a second magnetic shield overlaying on the second main surface, and a third magnetic shield overlaying on the side surface. The first and second magnetic shields are mechanically connected via the third magnetic shield..
08/28/14
20140239421
new patent Surface charge mitigation layer for mems sensors
A semiconductor device includes a substrate. At least one transducer is provided on the substrate.
08/28/14
20140239419
new patent Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device is provided. A silicon substrate is provided, and a gate insulating layer is formed on the silicon substrate.
08/28/14
20140239417
new patent Semiconductor device having electrode and manufacturing method thereof
The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with an electrode. An exemplary structure for a semiconductor device comprises a semiconductor substrate; an electrode over the semiconductor substrate, wherein the electrode comprises a trench in an upper portion of the electrode; and a dielectric feature in the trench..
08/28/14
20140239416
new patent Semiconductor device
A semiconductor device includes a source/drain feature in a substrate. The source/drain feature has an upper portion and a lower portion, the upper portion having a lower concentration of ge than the lower portion.
08/28/14
20140239407
new patent Replacement metal gate transistor with controlled threshold voltage
A method and structure for a semiconductor device includes a semiconductor substrate and an n-channel transistor and a p-channel transistor provided on the semiconductor substrate. Each of the n-channel transistor and the p-channel transistor has a gate dielectric film on the semiconductor substrate, and a gate electrode is formed on the gate dielectric.
08/28/14
20140239406
new patent Semiconductor device
A pmis region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nmis region is provided between the boundary and a second peripheral edge.
08/28/14
20140239405
new patent Semiconductor device and fabricating method thereof
A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness.
08/28/14
20140239403
new patent Semiconductor device
A semiconductor device includes a first gate formed on a substrate, the first gate having a square shape. A first junction and a second junction are formed in the substrate at two opposite sides of the first gate.
08/28/14
20140239399
new patent Semiconductor device having compressively strained channel region and method of making same
A semiconductor device and method making it utilize a three-dimensional channel region comprising a core of a first semiconductor material and an epitaxial covering of a second semiconductor material. The first and second semiconductor materials have respectively different lattice constants, thereby to create a strain in the epitaxial covering.
08/28/14
20140239398
new patent U-shaped semiconductor structure
A method for forming a u-shaped semiconductor device includes forming trenches in a crystalline layer and epitaxially growing a u-shaped semiconductor material along sidewalls and bottoms of the trenches. The u-shaped semiconductor material is anchored, and the crystalline layer is removed.
08/28/14
20140239395
new patent Contact resistance reduction in finfets
A method for forming contacts in a semiconductor device includes forming a plurality of substantially parallel semiconductor fins on a dielectric layer of a substrate having a gate structure formed transversely to a longitudinal axis of the fins. The fins are merged by epitaxially growing a crystalline material between the fins.
08/28/14
20140239394
new patent U-shaped semiconductor structure
A method for forming a u-shaped semiconductor device includes forming trenches in a crystalline layer and epitaxially growing a u-shaped semiconductor material along sidewalls and bottoms of the trenches. The u-shaped semiconductor material is anchored, and the crystalline layer is removed.
08/28/14
20140239392
new patent Semiconductor device and manufacturing method of semiconductor device
A technique for improving characteristics of a semiconductor device (dmosfet) is provided. A semiconductor device is configured so as to include: an n-type source layer (102) disposed on an upper portion of a first surface side of an sic substrate (106); a p body layer (103) which surrounds the source layer and has a channel region; an n−-type drift layer (107) which is in contact with the p body layer (103); a gate electrode (116) which is disposed on an upper portion of the channel region via a gate insulating film; and a first p+ layer (109) which is disposed in the p body layer (103), extends to a portion below the n+ source layer (102), and serves as a buried semiconductor region having an impurity concentration higher than that of the p body layer (103).
08/28/14
20140239384
new patent Semiconductor device having vertical surrounding gate transistor structure, method for manufacturing the same, and data processing system
A semiconductor device is provided which includes: semiconductor pillars which include impurity diffused layers, each semiconductor pillar having a width which allows full depletion of a semiconductor forming each semiconductor pillar, the impurity diffused layers being electrically connected to each other; and a common gate section which covers side faces of the pillars.. .
08/28/14
20140239378
new patent Semiconductor device and method of manufacturing the same
In an monos-type memory cell with a split gate structure, short circuit between a selection gate electrode and a memory gate electrode is prevented, and reliability of a semiconductor device is improved. In a monos memory having a selection gate electrode and a memory gate electrode that are adjacent to each other and that extend in a first direction, an upper surface of the selection gate electrode in a region except for a shunt portion at an end portion of the selection gate electrode in the first direction is covered with a cap insulating film.
08/28/14
20140239377
new patent Manufacturing method of semiconductor device, and semiconductor device
To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left.
08/28/14
20140239368
new patent Semiconductor storage device and method of manufacturing the same
A semiconductor device including a first isolation region dividing a semiconductor substrate into first regions; memory cells each including a tunnel insulating film, a charge storing layer, an interelectrode insulating film, and a control gate electrode above the first region; a second isolation region dividing the substrate into second regions in a peripheral circuit region; and a peripheral circuit transistor including a gate insulating film and a gate electrode above the second region. The first isolation region includes a first trench, a first element isolation insulating film filled in a bottom portion of the first trench, and a first gap formed between the first element isolation insulating film and the interelectrode insulating film.
08/28/14
20140239367
new patent Semiconductor device and a manufacturing method thereof
The performances of a semiconductor device are improved. The semiconductor device has a first control gate electrode and a second control gate electrode spaced along the gate length direction, a first cap insulation film formed over the first control gate electrode, and a second cap insulation film formed over the second control gate electrode.
08/28/14
20140239360
new patent Semiconductor device and a method of manufacturing the same, and solid-state image pickup device using the same
A semiconductor device, including: a gate electrode formed on a semiconductor substrate through a gate insulating film; an extension region formed in the semiconductor substrate on a source side of the gate electrode; a source region formed in the semiconductor substrate on the source side of the gate electrode through the extension region; an ldd region formed in the semiconductor substrate on a drain side of the gate electrode; and a drain region formed in the semiconductor substrate on the drain side of the gate electrode through the ldd region; wherein the extension region is formed at a higher concentration than that of the ldd region so as to be shallower than the ldd region.. .
08/28/14
20140239359
new patent Semiconductor device
A gate electrode (4) and a source electrode (5) of a semiconductor chip (3) are connected to a gate terminal (7) and a source terminal (9), respectively, via electric conductors (11a and 11b). A portion of the gate terminal (7) which portion is joined to the electric conductor (11a) is close to the gate electrode (4), and a portion of the source terminal (9) which portion is joined to the electric conductor (11b) is close to the source electrode (5)..
08/28/14
20140239358
new patent Nonplanar device with thinned lower body portion and method of fabrication
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface.
08/28/14
20140239356
new patent Semiconductor device
A semiconductor device concerning an embodiment is provided with a semiconductor layer, an impurity-doped layer selectively formed on the semiconductor layer, and a drain electrode formed on the impurity-doped layer. The semiconductor device is further provided with a source electrode which is formed and isolated from the drain electrode, and a gate electrode which is formed between the source electrode and the drain electrode.
08/28/14
20140239350
new patent Semiconductor device containing hemt and misfet and method of forming the same
A semiconductor structure with a misfet and a hemt region includes a first iii-v compound layer. A second iii-v compound layer is disposed on the first iii-v compound layer and is different from the first iii-v compound layer in composition.
08/28/14
20140239349
new patent Drain pad having a reduced termination electric field
In an exemplary implementation, a semiconductor device includes a drain pad on a semiconductor substrate, the drain pad being coupled to a plurality of drain fingers. The semiconductor device further includes a source pad on the semiconductor substrate, the source pad being coupled to a plurality of source fingers.
08/28/14
20140239348
new patent Methods, devices, and systems related to forming semiconductor power devices with a handle substrate
Methods of manufacturing device assemblies, as well as associated semiconductor assemblies, devices, systems are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a semiconductor device assembly that includes a handle substrate, a semiconductor structure having a first side and a second side opposite the first side, and an intermediary material between the semiconductor structure and the handle substrate.
08/28/14
20140239346
new patent Mishfet and schottky device integration
A semiconductor device includes a substrate comprising a heterostructure configured to support formation of a channel during operation, first and second dielectric layers supported by the substrate, the second dielectric layer being disposed between the first dielectric layer and the substrate, a gate supported by the substrate, disposed in a first opening in the first dielectric layer, and to which a bias voltage is applied during operation to control current flow through the channel, the second dielectric layer being disposed between the gate and the substrate, and an electrode supported by the substrate, disposed in a second opening in the first and second dielectric layers, and configured to establish a schottky junction with the substrate.. .
08/28/14
20140239344
new patent Power semiconductor device and method of fabricating the same
There is provided a power semiconductor device, including a first conductive type drift layer; a second conductive type body layer formed on the drift layer, a second conductive type collector layer formed below the drift layer; a first gate formed by penetrating through the body layer and a portion of the drift layer, a first conductive type emitter layer formed in the body layer and formed to be spaced apart from the first gate, a second gate covering upper portions of the body layer and the emitter layer and formed as a flat type gate on the first gate, and a segregation stop layer formed between contact surfaces of the first and second gates with the body layer, the emitter layer, and the drift layer.. .
08/28/14
20140239313
new patent Light-emitting semiconductor device using group iii nitrogen compound
A method of producing a light-emitting semiconductor device of a group iii nitride compound includes forming a buffer layer on a sapphire substrate, forming a si-doped n+-layer with supplying silane, the n+-layer satisfying formula (alx3ga1-x3)y3in1-y3n, wherein 0≦x3≦1, 0≦y3≦1 and 0≦x3+y3≦1, forming an emission layer of a group iii nitride compound semiconductor satisfying formula alx1gay1in1-x1-y1n, where 0≦x1≦1, 0≦y1≦1, and 0≦x1+y1≦1, on the n+-layer, and forming a p-layer of a p-type conduction on the emission layer, the p-layer including aluminum gallium nitride satisfying formula alx2ga1-x2n, wherein 0≦x2≦1.. .
08/28/14
20140239311
new patent Semiconductor device
A semiconductor device includes a buffer layer, a channel layer and a barrier layer formed over a substrate, a trench penetrating through the barrier layer to reach the middle of the channel layer, and a gate electrode disposed inside the trench via a gate insulating film. The channel layer contains n-type impurities, and a region of the channel layer positioned on a buffer layer side has an n-type impurity concentration larger than a region of the channel layer positioned on a barrier layer side, and the buffer layer is made of nitride semiconductor having a band gap wider than that of the channel layer.
08/28/14
20140239310
new patent Growth substrate, nitride semiconductor device and method of manufacturing the same
Disclosed is a method of manufacturing a light emitting device. More particularly, disclosed are a growth substrate, a nitride semiconductor device and a method of manufacturing a light emitting device.
08/28/14
20140239309
new patent Heterostructure power transistor with alsin passivation layer
A heterostructure semiconductor device includes a first active layer and a second active layer disposed on the first active layer. A two-dimensional electron gas layer is formed between the first and second active layers.
08/28/14
20140239303
new patent Semiconductor devices including wisx and methods of fabrication
Some embodiments include a semiconductor device having a stack structure including a plurality of alternating tiers of dielectric material and poly-silicon formed on a substrate. Such a semiconductor device may further include at least one opening having a high aspect ratio and extending into the stack structure to a level adjacent the substrate, a first poly-silicon channel formed in a lower portion of the opening adjacent the substrate, a second poly-silicon channel formed in an upper portion of the opening, and wsix material disposed between the first poly-silicon channel and the second poly-silicon channel in the opening.
08/28/14
20140239302
new patent Semiconductor device and method for manufacturing the same
An object is to realize a hermetically sealed package which ensures long-term airtightness inside the package by sealing using a substrate, or a sealing structure for reducing destruction caused by pressure from the outside. A frame of a semiconductor material is provided over a first substrate, which is bonded to a second substrate having a semiconductor element so that the semiconductor element is located inside the frame between the first substrate and the second substrate.
08/28/14
20140239299
new patent Semiconductor device, power circuit, and manufacturing method of semiconductor device
The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second conductive layer in a region which is not overlapped with the first conductive layer over the oxide semiconductor layer; an insulating layer which covers the oxide semiconductor layer and the second conductive layer; and a third conductive layer in a region including at least a region which is not overlapped with the first conductive layer or the second conductive layer over the insulating layer.. .
08/28/14
20140239298
new patent Semiconductor device and method for manufacturing semiconductor device
A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed.
08/28/14
20140239297
new patent Semiconductor device and method of manufacturing the same
It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air.
08/28/14
20140239296
new patent Semiconductor device and method for manufacturing the same
A transistor or the like having high field-effect mobility is provided. A transistor or the like having stable electrical characteristics is provided.
08/28/14
20140239294
new patent Semiconductor device
A semiconductor device that includes an oxide semiconductor and is suitable for a power device having an ability to allow large current to flow therein. The semiconductor device includes: a first electrode having an opening and a second electrode provided in the opening of the first electrode and separated from the first electrode, over the semiconductor layer; a gate insulating layer over the first electrode, the second electrode, and the semiconductor layer; and a ring-shaped gate electrode over the gate insulating layer.
08/28/14
20140239293
new patent Semiconductor device
Disclosed is a semiconductor device including two oxide semiconductor layers, where one of the oxide semiconductor layers has an n-doped region while the other of the oxide semiconductor layers is substantially i-type. The semiconductor device includes the two oxide semiconductor layers sandwiched between a pair of oxide layers which have a common element included in any of the two oxide semiconductor layers.
08/28/14
20140239289
new patent Semiconductor device and method for manufacturing the same
In general, according to one embodiment, a semiconductor device includes a first electrode, an oxide semiconductor film, an insulating film, a first protective film, second and third electrodes. The oxide semiconductor film is provided on the first electrode.
08/28/14
20140239267
new patent Thin film semiconductor device, organic light-emitting display apparatus, and method of manufacturing the thin film semiconductor device
An apparatus and a method of manufacturing a thin film semiconductor device having a thin film transistor with improved electrical properties in organic light-emitting display apparatus are described.. .
08/28/14
20140239182
new patent Inspecting device and inspecting method
An inspecting device inspects an inspecting target that is a semiconductor device or a photo device. The inspecting device includes: a stage for holding an inspecting target; a femtosecond laser for emitting pulsed light; a galvano mirror for obliquely irradiating the inspecting target with the pulsed light, while changing an optical path of the pulsed light, to scan the inspecting target with the pulsed light; and a detection part for detecting an electromagnetic wave emitted non-coaxially with the pulsed light from the inspecting target in accordance with the illumination with the pulsed light..


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