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Semiconductor Device patents

      

This page is updated frequently with new Semiconductor Device-related patent applications.




new patent Semiconductor device, lighting device, and vehicle
A novel semiconductor device is provided. The semiconductor device includes a first resistor and a second resistor.
Semiconductor Energy Laboratory Co., Ltd.


new patent Semiconductor device and system
An sci can perform transmission only or reception only, however, it is necessary to reset the sci when transmission and reception is switched to transmission only or to reception only. A semiconductor device includes an interface circuit which performs a sequential communication of transmit or receive according to a synchronous clock.
Renesas Electronics Corporation


new patent Method for driving semiconductor device
A novel pll is provided. An oscillator circuit includes first to n-th inverters, and first and second circuits.
Semiconductor Energy Laboratory Co., Ltd.


new patent Semiconductor device and controlling the semiconductor device
A semiconductor device includes: a clock synchronizing circuit that operates in synchronization with a clock; an enable signal generating circuit that generates an enable signal in an operation period during which the clock synchronizing circuit is operated; and a clock supplying circuit that supplies a clock to the clock synchronizing circuit or stop the supply of the clock according to the enable signal when a clock frequency is equal to or lower than a predetermined frequency, and supply a clock to the clock synchronizing circuit, irrespective of the enable signal, when the clock frequency is higher than the predetermined frequency.. .
Fujitsu Limited


new patent Semiconductor device and electric power control apparatus
A driver ic includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense mos that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area.
Renesas Electronics Corporation


new patent Semiconductor device
A signal indicating temperature of an igbt chip, after input into an overheat detection terminal, is simultaneously input into a first comparator for protection operation and a second comparator for precaution. At a normal time when the chip temperature is low, a first transistor connected to an alarm signal output terminal via a resistor and a second transistor connected to the alarm signal output terminal via a zener diode are turned off, and the alarm signal output terminal whose voltage is pulled up by an external pull-up circuit is set to high level voltage.
Fuji Electric Co., Ltd.


new patent Semiconductor device, battery monitoring device, and voltage detection battery cell
The present disclosure provides a semiconductor device including: plural first switches, each provided so as to correspond to one of plural battery cells connected in series, each first switch including one end connected to a corresponding battery cell and another end connected to one electrode of a corresponding charge storage section of plural charge storage sections, each of the charge storage sections being provided so as to correspond to one of the plural battery cells, and another electrode of each charge storage section being connected to a fixed potential; plural second switches, each provided so as to correspond to one of the plural first switches, each second switch including one end connected to the other end of the corresponding first switch; and processing section connected to each other end of the plural second switches, that processes voltages supplied via the second switches.. .
Lapis Semiconductor Co., Ltd.


new patent Organic transistor, compound, organic semiconductor material for non-light-emitting organic semiconductor device, material for organic transistor, coating solution for non-light-emitting organic semiconductor device, manufacturing organic transistor, manufacturing organic semiconductor film, organic semiconductor film for non-light-emitting organic semiconductor device, and synthesizing organic semiconductor material
(x represents an oxygen, sulfur, selenium, or tellurium atom or nr5; y and z each represents cr6, an oxygen, sulfur, selenium, or nitrogen atom, or nr7; a ring containing y and z is an aromatic heterocycle; any one of r1 and r2 and the aromatic heterocycle containing y and z or any one of r3 and r4 and a benzene ring may be bonded to each other through a specific divalent linking group; r1, r2, and r5 to r8 each represent a hydrogen atom, an alkyl group, an alkenyl group, an alkynyl group, an aryl group, or a heteroaryl group; r3 and r4 each represent an alkyl group, an alkenyl group, an alkynyl group, an aryl group, or heteroaryl group; and each of m and n is an integer of 0 to 2.). .

new patent Heat-curable epoxy resin composition for optical semiconductor element encapsulation and optical semiconductor device using same
(b) a curing accelerator.. .

new patent Semiconductor device for a system for measuring the temperature, and manufacturing method thereof
A semiconductor device for a system for measuring temperature, which includes a first uv detector and a second uv detector. The first and second uv detectors generate a first current and a second current, respectively, as a function of the irradiance in the ultraviolet band.
Stmicroelectronics S.r.l.


new patent

Semiconductor device

For enhancing a reverse-recovery immunity of a diode element, a semiconductor device includes a first conductivity-type drift layer, a second conductivity-type anode region provided in an upper portion of the drift layer, an insulating film provided on the drift layer, an anode electrode having an ohmic contact portion ohmically contacted to the anode region through a contact hole penetrating the insulating film, and a schottky electrode schottky-contacted to a peripheral portion of the anode region.. .
Fuji Electric Co., Ltd.

new patent

Semiconductor device

A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Method for fabricating a flash memory

A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a dielectric stack is formed on the substrate, in which the dielectric stack includes a first silicon oxide layer and a first silicon nitride layer.
United Microelectronics Corp.

new patent

Semiconductor device and manufacturing the same

The electrical characteristics of a transistor including an oxide semiconductor layer are varied by influence of an insulating film in contact with the oxide semiconductor layer, that is, by an interface state between the oxide semiconductor layer and the insulating film. A first oxide semiconductor layer s1, a second oxide semiconductor layer s2, and a third oxide semiconductor layer s3 are sequentially stacked, so that the oxide semiconductor layer through which carriers flow is separated from the gate insulating film containing silicon.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device, manufacturing the same, and electronic device

A semiconductor device with reduced parasitic capacitance is provided. A stack is formed on an insulating layer, the stack comprising a first oxide insulating layer, an oxide semiconductor layer over the first oxide insulating layer, and a second oxide insulating layer on the oxide semiconductor layer; a gate electrode layer and a gate insulating layer are formed on the second oxide insulating layer; a first low-resistance region is formed by adding a first ion to the second oxide semiconductor layer using the gate electrode layer as a mask; a sidewall insulating layer is formed on an outer side of the gate electrode layer; a second conductive layer is formed over the gate electrode layer, the sidewall insulating layer, and the second insulating layer; and an alloyed region in the second oxide semiconductor layer is formed by performing heat treatment..
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device and manufacturing same

A semiconductor device includes a thin film transistor (100), the thin film transistor (100) including: a substrate (1); a gate electrode (3) provided on the substrate (1); a gate dielectric layer (5) formed on the gate electrode (3); an island-shaped oxide semiconductor layer (7) formed on the gate dielectric layer (5); a protective layer (9) provided so as to cover an upper face (7u) and an entire side face (7e) of the oxide semiconductor layer (7), the protective layer (9) having a single opening (9p) through which the upper face (7u) of the oxide semiconductor layer (7) is only partially exposed; and a source electrode (11) and a drain electrode (13) which are in contact with the oxide semiconductor layer (7) within the single opening (9p).. .
Sharp Kabushiki Kaisha

new patent

Methods of fabricating semiconductor devices

Methods of forming a semiconductor device may include forming a fin-type active pattern that extends in a first direction on a substrate, the fin-type active pattern including a lower pattern on the substrate and an upper pattern on the lower pattern. A field insulating layer is formed on the substrate, the sidewalls of the fin-type active pattern, and a portion upper pattern protruding further away from the substrate than a top surface of the field insulating layer.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and fabricating the same

A semiconductor device is provided. A fin is disposed on a substrate.

new patent

Semiconductor device and manufacturing the semiconductor device

A semiconductor device provided herein includes: a fourth region of a p-type being in contact with a lower end of the gate trench; a termination trench provided in the front surface in a range outside the second region; a lower end p-type region of the p-type being in contact with a lower end of the termination trench; a lateral p-type region of the p-type being in contact with a lateral surface of the termination trench on an outer circumferential side, connected to the lower end p-type region, and exposed on the front surface; and a plurality of guard ring regions provided on the outer circumferential side with respect to the lateral p-type region and exposed on the front surface.. .
Denso Corporation

new patent

Semiconductor device

A semiconductor device includes a first conductivity type region provided to at least one of a second conductivity type column region and a second conductivity type layer located on the second conductivity type column region. The first conductivity type region has a non-depletion layer region when a voltage between a first electrode and a second electrode is 0v.
Denso Corporation

new patent

Semiconductor device with multiple carrier channels

A semiconductor device includes a layered structure forming multiple carrier channels including at least one n-type channel formed in a first layer made of a first material and at least one p-type channel formed in a second layer made of a second material and a set of electrodes for providing and controlling carrier charge in the carrier channels. The first material is different than the second material, and the first and the second materials are selected such that the n-type channel and the p-type channel have comparable switching frequency and current capability..
Mitsubishi Electric Research Laboratories, Inc.

new patent

Semiconductor device with multiple-functional barrier layer

A semiconductor device includes a semiconductor structure forming a carrier channel, a barrier layer arranged in proximity with the semiconductor structure, and a set of electrodes for providing and controlling carrier charge in the carrier channel. The barrier layer is at least partially doped by impurities having a conductivity type opposite to a conductivity type of the carrier channel.
Mitsubishi Electric Research Laboratories, Inc.

new patent

Semiconductor device and manufacturing the same

A semiconductor device includes: a drift layer of a first conductivity type, implementing a main semiconductor layer; a base region of a second conductivity type provided on an top surface side of the drift layer; a first main electrode region of the first conductivity type provided in an upper part of the base region, having an impurity concentration higher than the main semiconductor layer; a gate electrode buried in a trench penetrating the first main electrode region and the base region through a gate insulating film; a gate screening semiconductor layer of the second conductivity type, being buried under a bottom of the trench; an intermediate semiconductor layer of the first conductivity type sandwiched between the base region and the gate screening semiconductor layer; and a second main electrode region of the second conductivity type provided on a bottom surface side of the drift layer.. .
Fuji Electric Co., Ltd.

new patent

Semiconductor device

A semiconductor device is provided comprising a semiconductor substrate of a first conductivity type and a dummy trench portion having a main body portion and one or more branch portions, the main body portion formed in a front surface of the semiconductor substrate and extending in a predetermined extending direction, the branch portions extending from the main body portion in directions different from the extending direction. The semiconductor substrate has an emitter region of first conductivity type and a base region of a second conductivity type which are provided sequentially from the front surface side of the semiconductor substrate, and the dummy trench portion has a dummy trench which penetrates the emitter region and the base region from the front surface of the semiconductor substrate, and a dummy insulating portion which is provided within the dummy trench..
Fuji Electric Co., Ltd.

new patent

Semiconductor device

An improvement is achieved in the reliability of a semiconductor device having an igbt. In an active cell region, in a portion of a semiconductor substrate which is interposed between first and second trenches in which first and second trench gate electrodes are embedded, an n+-type emitter region, a p-type body region located thereunder, and a first n-type hole barrier region located thereunder are formed.
Renesas Electronics Corporation

new patent

Desaturable semiconductor device with transistor cells and auxiliary cells

A semiconductor device includes transistor cells that connect a first load electrode with a drift structure forming first pn junctions with body zones when a gate voltage applied to a gate electrode exceeds a first threshold voltage. First auxiliary cells in a vertical projection of and electrically connected with the first load electrode are configured to inject charge carriers into the drift structure at least in a forward biased mode of the first pn junctions.
Infineon Technologies Ag

new patent

Semiconductor device, manufacturing semiconductor device, and forming oxide film

One embodiment of the present invention is a semiconductor device at least including an oxide semiconductor film, a gate insulating film in contact with the oxide semiconductor film, and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film therebetween. The oxide semiconductor film has a spin density lower than 9.3×1016 spins/cm3 and a carrier density lower than 1×1015/cm3.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device

A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Fin structure of semiconductor device

The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising an upper portion comprising a first semiconductor material having a first lattice constant, wherein the upper portion comprises a first substantially vertical portion having a first width and a second substantially vertical portion having a second width less than the first width over the first substantially vertical portion; and a lower portion comprising a second semiconductor material having a second lattice constant less than the first lattice constant, wherein a top surface of the lower portion has a third width less than the first width; and a gate structure covering the second substantially vertical portion..
Taiwan Semiconductor Manufacturing Company, Ltd.

new patent

Semiconductor device and fabricating the same

The semiconductor device includes a first wire pattern formed on a substrate and spaced apart from the substrate, the first wire pattern extending in a first direction. A gate electrode surrounds a circumference of the first wire pattern and extends in a second direction.
Samsung Electronics Co., Ltd.

new patent

Spacer formation with straight sidewall

Disclosed herein is a semiconductor device comprising a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the gate, and a spacer disposed proximate to the second dielectric.
Cypress Semiconductor Corporation

new patent

Field-plate structures for semiconductor devices

Field-plate structures are disclosed for electrical field management in semiconductor devices. A field-plate semiconductor structure includes a semiconductor substrate, a source ohmic contact, a drain ohmic contact, and a gate contact disposed over a gate region between the source ohmic contact and the drain ohmic contact, and a source field plate connected to the source ohmic contact.
Cambridge Electronics, Inc.

new patent

Semiconductor device and manufacturing semiconductor device

A semiconductor device includes an n-type silicon carbide substrate, an n-type silicon carbide layer formed on the n-type silicon carbide substrate, a p-type region selectively formed in a surface layer of the n-type silicon carbide layer, an n-type source region formed in the p-type region, a p contact region formed in the p-type region, a gate insulating film formed on a portion of a region from the n-type source region, through the p-type region, to the n-type silicon carbide layer, a gate electrode formed on the gate insulating film, an interlayer insulating film covering the gate electrode, and a first source electrode electrically connected to a surface of the p contact region and the n-type source region. An end of the interlayer insulating film covering the gate electrode has a slope of a predetermined angle..
Fuji Electric Co., Ltd.

new patent

Semiconductor device and a forming a semiconductor device

A method for forming a semiconductor device includes forming at least one graphene layer on a surface of a semiconductor substrate. The method further includes forming a silicon carbide layer on the at least one graphene layer..
Infineon Technologies Ag

new patent

Split-gate devices

A semiconductor device includes a substrate having a source region and a drain region implanted with a second dopant by a second ion implantation. The substrate includes a first well region implanted with a first dopant by a first ion implantation and a second well region blocked from the first ion implantation forming a native section.
Broadcom Corporation

new patent

Semiconductor device and manufacturing the same

A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the soi substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed.

new patent

Semiconductor device having a fin

Provided is a semiconductor device. The semiconductor device includes a fin disposed on a substrate along a first direction.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device

A semiconductor device including a semiconductor substrate of a first conductivity type, a plurality of base regions of a second conductivity type formed on a first principal surface of the semiconductor substrate via a semiconductor layer of the first conductivity type, and a plurality of source regions of the first conductivity type formed in the base regions. Each base region, in a top-down view from an angle perpendicular to the first principle surface, is of a polygonal shape.
Fuji Electric Co., Ltd.

new patent

Semiconductor device

A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first jte region is set to 4.4×1017 cm−3 or higher and 6×1017 cm−3 or lower and an impurity concentration in a second jte region is set to 2×1017 cm−3 or lower in a case of a schottky diode, and an impurity concentration in the first jte region is set to 6×1017 cm−3 or higher and 8×107 cm−3 or lower and an impurity concentration in the second jte region is set to 2×1017 cm−3 or lower in a case of a junction barrier schottky diode..
Hitachi Power Semiconductor Device, Ltd.

new patent

Method for manufacturing semiconductor device

A method of manufacturing a semiconductor device includes forming a lower metal layer, forming an interfacial oxide film on the lower metal layer, providing a metal precursor on the interfacial oxide film at a first pressure to adsorb the metal precursor into the interfacial oxide film, performing a first purge process at a second pressure to remove the unadsorbed metal precursor, the second pressure lower than the first pressure, providing an oxidizing gas at the first pressure to react with the adsorbed metal precursor, performing a second purge process at the second pressure to remove the unreacted oxidizing gas and form a dielectric film, and forming an upper metal layer on the dielectric film.. .
Samsung Electronics Co., Ltd.

new patent

Semiconductor package, semiconductor device manufacturing method, and solid-state imaging device

A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.. .
Sony Corporation

new patent

Semiconductor device

A semiconductor device including a capacitor having an increased charge capacity without decreasing an aperture ratio is provided. The semiconductor device includes a transistor including a light-transmitting semiconductor film, a capacitor in which a dielectric film is provided between a pair of electrodes, and a pixel electrode electrically connected to the transistor.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device

A semiconductor device that is suitable for miniaturization is provided. The semiconductor device has a plurality of different transistors, active layers of the plurality of transistors are each an oxide semiconductor, and in the plurality of transistors, field-effect mobility of a transistor whose channel length is maximum and field-effect mobility of a transistor whose channel length is minimum are substantially constant.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Soi-based semiconductor device with dynamic threshold voltage

A semiconductor device includes a semiconductor substrate, an insulating layer on a top surface of the substrate, and a first semiconductor transistor on the insulating layer, the transistor including an active region with a source region, a drain region, a channel region between the source and drain regions and a gate structure over the channel region, the gate structure extending beyond the transistor to an adjacent area. An outer well is included in the substrate, an inner well of an opposite type as the outer well situated within the outer well and under the active region and adjacent area, and a contact for the inner well in the adjacent area, the contact surrounding the gate structure.
Globalfoundries Inc.

new patent

Semiconductor device

An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device

Provided is a semiconductor device having improved performance. Over a semiconductor substrate, a dummy control gate electrode is formed via a first insulating film.
Renesas Electronics Corporation

new patent

Semiconductor device and manufacturing semiconductor device

A semiconductor device having a high degree of freedom of layout has a first part ar1, in which a plurality of p-type wells pw and n-type wells nw are alternately arranged to be adjacent to each other along an x-axis direction. A common power feeding region (arp2) for the plurality of wells pw is arranged on one side so as to interpose the ar1 in a y-axis direction, and a common power feeding region (arn2) for the plurality of wells nw is arranged on the other side.
Renesas Electronics Corporation

new patent

Semiconductor device including capacitor and manufacturing the same

A method for manufacturing a semiconductor device may include forming contact pads spaced apart from each other in a first direction on a substrate and between first insulating patterns; forming first holes between the first insulating patterns and having bottom ends adjacent top surfaces of the contact pads; forming second holes between second insulating patterns and overlapping with partial portions of the first holes in a second direction perpendicular to the first direction; and forming a bottom electrode layer including first portions to cover the bottom ends of the first holes and sidewalls of the second holes. In forming the first and second holes, the first and second holes are formed simultaneously..
Samsung Electronics Co., Ltd.

new patent

Semiconductor devices including device isolation structures and methods of manufacturing the same

A method of manufacturing a semiconductor device includes forming a plurality of recess regions on an upper surface of a substrate, forming a first oxide layer in the recess regions, forming a polysilicon layer on the first oxide layer, forming a second oxide layer by oxidizing the polysilicon layer, and forming a gap-fill layer on the second oxide layer to fill the recess regions, wherein at least a portion of the polysilicon layer remains between the first oxide layer and the second oxide layer after forming the second oxide layer.. .
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and manufacturing the same

A semiconductor device and a method for manufacturing the same is described. The semiconductor device includes a substrate, a first capacitor and a second capacitor.
Advanced Semiconductor Engineering, Inc.

new patent

Semiconductor device with a switchable and a non-switchable diode region

A semiconductor device includes at least one igbt cell region, at least one switchable free-wheeling diode region, and at least one non-switchable free-wheeling diode region integrated in the same semiconductor substrate as the at least one igbt cell region and the at least one switchable free-wheeling diode region.. .
Infineon Technologies Ag

new patent

Semiconductor device

In order to reduce electric field concentration in a semiconductor device including a main transistor section and a sense transistor section, the semiconductor device is provided, the semiconductor device including a semiconductor substrate of a first conductivity type, a main transistor section in an active region on the semiconductor substrate, and a sense transistor section outside the active region on the semiconductor substrate, wherein the active region is provided with a main well region of a second conductivity type, and wherein the sense transistor section has a sense gate trench section formed extending from the outside of the active region to the main well region on the front surface of the semiconductor substrate.. .
Fuji Electric Co., Ltd.

new patent

Silicon carbide semiconductor device and manufacturing the same

The first base regions have an impurity concentration of 4×1017 cm−3 or higher. The p-type region 33 is designed to have a lower impurity concentration than the first base regions 10 and higher than the p-type regions 31, 32.

new patent

Semiconductor device comprising a clamping structure

semiconductor device with a semiconductor body that includes a clamping structure including a pn junction diode and a schottky junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the pn junction diode is greater than 100 v and a breakdown voltage of the schottky junction diode is greater than 10 v..
Infineon Technologies Austria Ag

new patent

Electronic circuit

A semiconductor device includes a mosfet including a pn junction diode. A unipolar device is connected in parallel to the mosfet and has two terminals.
Rohm Co., Ltd.

new patent

Semiconductor device and manufacture

An integrated fan out package on package architecture is utilized along with a reference via in order to provide a reference voltage that extends through the info-pop architecture. If desired, the reference via may be exposed and then connected to a shield coating that can be used to shield the info-pop architecture.
Taiwan Semiconductor Manufacturing Company, Ltd.

new patent

Semiconductor device

A semiconductor device includes a first circuit board having a first chip and a second chip mounted on a first base, the second chip having a greater height from the first base than that of the first chip; and a second circuit board having a third chip and a fourth chip mounted on a second base, the fourth chip having a greater height from the second base than that of the third chip, the second circuit board being disposed overlapping with the first base such that the second base faces the first chip, and the second base not contacting the second chip.. .
Fujitsu Limited

new patent

Semiconductor device and method

Disclosed herein is a semiconductor device that includes a semiconductor die and a substrate including a first surface and a second surface. The substrate includes a conductive circuit and an insulative material over the conductive circuit.
Chip Solutions, Llc

new patent

Semiconductor device and semiconductor device fabrication method

A semiconductor device includes a plurality of semiconductor units each including a laminated substrate formed by laminating an insulating board and a circuit board and a semiconductor element joined to the circuit board using a joining material which irreversibly makes a phase transition into a solid-phase state. In addition, the semiconductor device may include a base plate to which each of the plurality of semiconductor units is joined using solder and a connection unit which electrically connects the plurality of semiconductor units in parallel..
Fuji Electric Co., Ltd.

new patent

Using an interconnect bump to traverse through a passivation layer of a semiconductor die

A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers.
Qorvo Us, Inc.

new patent

Method of producing a semiconductor device with through-substrate via covered by a solder ball

A semiconductor substrate is provided with a through-substrate via comprising a metallization and an opening. A solder ball is placed on the opening.
Ams Ag

new patent

Method for manufacturing semiconductor device, semiconductor manufacturing apparatus, and wafer lift pin-hole cleaning jig

To shorten a maintenance time of a semiconductor manufacturing apparatus and to improve productivity of a semiconductor manufacturing line. A semiconductor wafer is processed by the semiconductor manufacturing apparatus in which reaction product in the inside of a wafer lift pin hole was removed using a cleaning jig having a return on its tip part..
Renesas Electronics Corporation

new patent

Semiconductor device

The present disclosure provides a technique for improving the reliability of a semiconductor device where spreading of cracking that occurs at the time of dicing to a seal ring can be restricted even in a semiconductor device with a low-k film used as an interlayer insulating film. Vias are formed in each layer on a dicing region side.
Renesas Electronics Corporation

new patent

Semiconductor device and semiconductor system

A semiconductor device is provided. The semiconductor device includes a seal ring and a noise-absorbing circuit.
Taiwan Semiconductor Manufacturing Co., Ltd

new patent

Semiconductor device and forming emi shielding layer with conductive material around semiconductor die

A semiconductor device has a plurality of first semiconductor die mounted over an interface layer formed over a temporary carrier. An encapsulant is deposited over the first die and carrier.
Stats Chippac Pte. Ltd.

new patent

Tungsten alloys in semiconductor devices

Conducting alloys comprising cobalt, tungsten, and boron and conducting alloys comprising nickel, tungsten, and boron are described. These alloys can, for example, be used to form metal interconnects, can be used as liner layers for traditional copper or copper alloy interconnects, and can act as capping layers.
Intel Corporation

new patent

Wiring board with embedded component and integrated stiffener and making the same

A wiring board with embedded component and integrated stiffener is characterized in that an embedded semiconductor device, a first routing circuitry, an encapsulant and an array of vertical connecting elements are integrated as an electronic component disposed within a through opening of a stiffener, and a second routing circuitry is disposed beyond the through opening of the stiffener and extends over the stiffener. The mechanical robustness of the stiffener can prevent the wiring board from warping.
Bridge Semiconductor Corporation

new patent

Semiconductor device having structure for improving voltage drop and device including the same

A semiconductor device includes a semiconductor substrate and a plurality of metal layers above the semiconductor substrate. A first of the metal layers includes a plurality of first power rails which extend in a first direction and provide a first voltage, a plurality of second power rails which extend in the first direction and provide a second voltage, and a first conductor which is integral with one end of each of the first power rails and extends in a second direction.
Samsung Electronics Co., Ltd.

new patent

Method of manufacturing semiconductor device and semiconductor device

Pretreatment is carried out in a first chamber. Then, a mixed gas of titanium tetrachloride and hydrogen is supplied into a second chamber.
Renesas Electronics Corporation

new patent

Interconnect structure for semiconductor devices

An interconnect and a method of forming an interconnect for a semiconductor device is provided. The interconnect is formed by treating an upper surface of a dielectric layer to create a high density layer.
Taiwan Semiconductor Manufacturing Company, Ltd.

new patent

Semiconductor device for electric power

Herein provided are: a ceramic board; a semiconductor element for electric power, on one surface of which an electrode is formed, and the other surface of which is bonded to the ceramic board; a lead terminal, one end side of which is bonded to the electrode, and the other end side of which is to be electrically connected to an outside thereof; and a sealing member by which the semiconductor element for electric power is sealed together with a part, in the lead terminal, bonded to the electrode; wherein, near an end in said one end side of the lead terminal, an inclined surface is formed which becomes farther from the circuit board as it becomes closer to the end.. .
Mitsubishi Electric Corporation

new patent

Interposers, semiconductor devices, manufacturing interposers, and manufacturing semiconductor devices

An interposer which can better prevent detachment of a conductive layer pattern due to thermal expansion and thermal contraction. The interposer includes a substrate having a through hole; an insulative resin layer formed on a surface of the substrate and including a conductive via; a wiring layer disposed on the substrate with the insulative resin layer interposed therebetween; an inorganic adhesive layer formed only on a side surface of the through hole; and a through electrode filled in a connection hole which is formed by the inorganic adhesive layer in the through hole so as to penetrate between both surfaces of the substrate, wherein the through electrode is electrically connected to the wiring layer via the conductive via, and a thermal expansion coefficient of the inorganic adhesive layer is larger than a thermal expansion coefficient of the substrate and smaller than a thermal expansion coefficient of the through electrode..
Toppan Printing Co., Ltd.

new patent

Semiconductor device

The semiconductor device includes a semiconductor element, and an electro-conductive first plate-like part electrically connected to a top-face-side electrode of the semiconductor element and including a first joint part projecting from a side face, and an electro-conductive second plate-like part including a second joint part projecting from a side face. A bottom face of the first joint part and a top face of the second joint part face one another, and are electrically connected via an electro-conductive bonding material.
Denso Corporation

new patent

Semiconductor device

A control terminal 14 of a semiconductor device has a recessed portion 14c. A resin case 15 is provided with a fixing member 152 engaging with and fixing a recessed portion 14c of a control terminal 14.
Fuji Electric Co., Ltd.

new patent

Semiconductor device

A semiconductor device includes a substrate, a thermal conduction layer on the substrate, a first wire pattern on the thermal conduction layer, a first semiconductor pattern a second semiconductor pattern, and a gate electrode between the first semiconductor pattern and the second semiconductor pattern. The gate electrode surrounds a periphery of the first wire pattern.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and method

Disclosed herein is a semiconductor device that includes a semiconductor die and a substrate having a first surface and a second surface. The semiconductor die is attached to the second surface.
Chip Solutions, Llc

new patent

Phosphonium compound, epoxy resin composition including the same and semiconductor device prepared using the same

A phosphonium compound, an epoxy resin composition including the same, a semiconductor device encapsulated with the same, and a method of encapsulating a semiconductor device, the phosphonium compound being represented by formula 1:. .
Samsung Sdi Co., Ltd.

new patent

Underfill material, laminated sheet and producing semiconductor device

An underfill material having sufficient curing reactivity, and capable of achieving a small change in viscosity and good electrical connection even when loaded with thermal history, a laminated sheet including the underfill material, and a method for manufacturing a semiconductor device. The underfill material has a melt viscosity at 150° c.
Nitto Denko Corporation

new patent

Semiconductor device

A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad..
Renesas Electronics Corporation

new patent

Silicon-germanium finfet device with controlled junction

Embodiments of the invention include a method for <something> and the resulting structure. A semiconductor device including a substrate, a silicon-germanium fin formed on the substrate, a dummy gate formed on the fin, and a first set of spacers formed on the exposed sidewalls of the dummy gate is provided.
International Business Machines Corporation

new patent

Semiconductor device and manufacturing the same

A semiconductor device includes a first fin-type pattern and a second fin-type pattern which protrude upwardly from an upper surface of a field insulating film and extend in a first direction. A gate structure intersects the first fin-type pattern and the second fin-type pattern.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and fabricating method thereof

A semiconductor device is provided. A substrate includes a first region and a second region.

new patent

Semiconductor device including at least one lateral igfet and at least one vertical igfet and corresponding manufacturing method

A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface, first trenches and second trenches extending from the first surface into the semiconductor body, at least one lateral igfet including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches, and at least one vertical igfet including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches. The first trenches extend from the first surface into the semiconductor body deeper than a channel zone of the lateral igfet and confine the channel zone..
Infineon Technologies Ag

new patent

Interconnect structure including middle of line (mol) metal layer local interconnect on etch stop layer

An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer having at least one semiconductor device embedded therein and an etch stop layer interposed between the first insulator layer and a second insulator layer.
Globalfoundries, Inc.

new patent

Method for cleaning via of interconnect structure of semiconductor device structure

A method for forming the semiconductor device structure is provided. The method includes forming a metal layer in a first dielectric layer over a substrate and forming an etch stop layer over the metal layer.
Taiwan Semiconductor Manufacturing Co., Ltd

new patent

Semiconductor device comprising an oxygen diffusion barrier and manufacturing method

An embodiment of a method of manufacturing a semiconductor device includes forming an oxygen diffusion barrier on a first surface of a czochralski or magnetic czochralski silicon substrate. A silicon layer is formed on the oxygen diffusion barrier.
Infineon Technologies Ag

new patent

Methods of manufacturing semiconductor devices including isolation layers

A method of manufacturing a semiconductor device comprising the steps of: forming a trench at an upper portion of a semiconductor substrate forming a preliminary filling insulation layer by coating a siloxane composition on the semiconductor substrate to fill the trench performing a low temperature curing process at a temperature in a range from about 50° c. To about 150° c.
Samsung Electronics Co., Ltd.

new patent

Releasable carrier and method

Disclosed herein is a releasable carrier that includes a supporting carrier, a carrier conductive layer, and a releasable tape located between the supporting carrier and the carrier conductive layer. The releasable tape attaches the supporting carrier to the carrier conductive layer.
Chip Solutions, Llc

new patent

Semiconductor device and method

Disclosed herein is a semiconductor device that includes a substrate having a conductive circuit and a first mold material encapsulating the conductive circuit, the first mold material configured to function as an electrical insulator. The semiconductor device further includes a semiconductor die encapsulated with the first mold material or a second mold material.
Chip Solutions, Llc

new patent

Semiconductor device and manufacture

A semiconductor device and method of manufacturing are presented in which features of reduced size are formed using an irradiated mask material. In an embodiment a mask material that has been irradiated with charged ions is utilized to focus a subsequent irradiation process.
National Taiwan University

new patent

Semiconductor device and semiconductor device manufacturing method

Protons are injected from a back surface side of a semiconductor substrate to repair both defects within the semiconductor substrate and also defects in a channel forming region on a front surface side of the semiconductor substrate. As a result, variation in gate threshold voltage is reduced and leak current when a reverse voltage is applied is reduced.
Fuji Electric Co., Ltd.

new patent

Semiconductor manufacturing apparatus and manufacturing semiconductor device

A semiconductor manufacturing apparatus according to an embodiment includes a container that stores a processing liquid for plating processing of a substrate. A holder can hold the substrate.
Kabushiki Kaisha Toshiba

new patent

Method for manufacturing semiconductor device

There are prepared a semiconductor substrate having a first main surface and a second main surface, and an adhesive tape having a third main surface and a fourth main surface, the first main surface having a maximum diameter of not less than 100 mm. The semiconductor substrate fixed to the third main surface of the adhesive tape is placed in an accommodation chamber.
Sumitomo Electric Industries, Ltd.

new patent

Method of manufacturing semiconductor device, substrate processing apparatus and recording medium

A method of manufacturing: a semiconductor device includes fanning an oxide film containing a metal element on a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor containing a metal element and a halogen group to the substrate; and supplying an oxidant to the substrate. In the act of supplying the oxidant, a catalyst is supplied to the substrate together with the oxidant.
Hitachi Kokusai Electric Inc.

new patent

Semiconductor devices and semiconductor systems including the same

A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output command signals and setting signals.
Sk Hynix Inc.





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