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Semiconductor Device patents



      
           
This page is updated frequently with new Semiconductor Device-related patent applications. Subscribe to the Semiconductor Device RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Device RSS RSS


Power semiconductor device

Mitsubishi Electric

Power semiconductor device

Solid-state imaging apparatus and semiconductor device

Renesas Electronics

Solid-state imaging apparatus and semiconductor device

Solid-state imaging apparatus and semiconductor device

Fujitsu Semiconductor Limited

Capacitor array, ad converter and semiconductor device


Date/App# patent app List of recent Semiconductor Device-related patents
08/20/15
20150237731 
 Electronic device patent thumbnailElectronic device
To improve electric characteristics of an electronic device. An electronic device includes a semiconductor device and a three-terminal capacitor mounted on the upper surface of a mounting substrate, the semiconductor device includes a power supply pad and a ground pad, the power supply pad and the ground pad are electrically connected with a power supply land and a ground land, respectively, and the power supply land and the ground land are allocated to a land line in an outermost periphery of the semiconductor device, then, the power supply land and the ground land are electrically connected to the three-terminal capacitor by wirings formed on the upper surface of the mounting substrate..
Renesas Electronics Corporation


08/20/15
20150237718 
 Power semiconductor device patent thumbnailPower semiconductor device
A circuit board having a power semiconductor element mounted thereon includes an insulating plate, a bonding pattern, a circuit pattern, and a pad plate. The insulating plate is made of aluminum nitride ceramic and has a first surface and a second surface opposite to the first surface.
Mitsubishi Electric Corporation


08/20/15
20150236712 
 Solid-state imaging apparatus and semiconductor device patent thumbnailSolid-state imaging apparatus and semiconductor device
The present invention provides a small-sized inexpensive solid-state imaging apparatus. A d/a converter included in a successive comparison type a/d converter of the solid-state imaging apparatus includes a multiplexer which selects any of reference voltages vr0 to vr16 and sets it as an analog reference signal when coarse a/d conversion is performed, and which selects reference voltages vr (n−1) to vr (n+2) of the reference voltages vr0 to vr16 when fine a/d conversion is performed, and a capacitor array which generates an analog reference signal, based on the reference voltages vr (n−1) to vr (n+2) when the fine a/d conversion is performed.
Renesas Electronics Corporation


08/20/15
20150236711 
 Capacitor array, ad converter and semiconductor device patent thumbnailCapacitor array, ad converter and semiconductor device
A capacitor array includes a plural capacitors provided separated at intervals from each other. A first wiring line is connected to the first electrode of each of the plurality of capacitors, and is provided so as to pass through the intervals between the plurality of capacitors.
Fujitsu Semiconductor Limited


08/20/15
20150236692 
 Driving signal generating circuit and power semiconductor device driving apparatus including the same patent thumbnailDriving signal generating circuit and power semiconductor device driving apparatus including the same
There are provided a driving signal generating circuit and a power semiconductor device driving apparatus including the same. The driving signal generating circuit for generating driving signals provided to first and second transistors driving a power semiconductor device includes: a first driving signal generating unit generating a first driving signal including a high level signal and a low level signal and providing the first driving signal to a gate of the first transistor; a detecting unit detecting a detection voltage depending on a current flowing in the power semiconductor device; a second driving signal generating unit generating a second driving signal in inverse proportion to the detection voltage; and a switching unit performing a switching operation depending on the first driving signal to transfer the second driving signal to a gate of the second transistor..
Samsung Electro-mechanics Co., Ltd.


08/20/15
20150236687 
 Semiconductor device and display device patent thumbnailSemiconductor device and display device
A semiconductor device is provided with an oxide semiconductor thin-film transistor (tft); a calibration electrode that is positioned so as to face an oxide semiconductor layer with an insulating layer therebetween, and, when viewed from the direction of the substrate normal line, overlaps at least part of a gate electrode with the oxide semiconductor layer interposed therebetween; and a calibration voltage setting circuit that determines the voltage to be applied to the calibration electrode. The calibration voltage setting circuit is provided with: a monitor tft that is configured using a second oxide semiconductor layer, which is substantially the same as the oxide semiconductor layer of the oxide semiconductor tft; a detection circuit that is configured so as to be able to measure the device characteristics of the monitor tft; and a voltage determination circuit that determines the voltage to be applied to the calibration electrode on the basis of the measured device characteristics..
Sharp Kabushiki Kaisha


08/20/15
20150236679 
 Semiconductor device and  controlling the same patent thumbnailSemiconductor device and controlling the same
A semiconductor device includes: a first signal generation section configured to generate an activation signal having a variable duty ratio; and a first processing section configured to perform intermittent operation, based on the activation signal.. .
Sony Corporation


08/20/15
20150236579 
 Current generation circuits and semiconductor devices including the same patent thumbnailCurrent generation circuits and semiconductor devices including the same
Semiconductor devices are provided. The semiconductor device may include a current generation circuit and an internal circuit.
Sk Hynix Inc.


08/20/15
20150236530 
 Semiconductor device for battery control and battery pack patent thumbnailSemiconductor device for battery control and battery pack
A semiconductor device for battery control includes a cpu, a first bus coupled to the cpu, a second bus not coupled to the cpu, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory.
Renesas Electronics Corporation


08/20/15
20150236500 
 Semiconductor device patent thumbnailSemiconductor device
A semiconductor device includes a rectifier coupled between a circuit ground and a terminal for coupling to an external circuit, a transistor-enhanced current path coupled to the rectifier, and a switching circuit coupled to the transistor-enhanced current path and coupled between the terminal and the circuit ground. The switching circuit is configured to turn off the transistor-enhanced current path during normal operation, and turn on the transistor-enhanced current path when an electrostatic discharge occurs at the terminal..
Macronix International Co., Ltd.


08/20/15
20150236270 

Organic semiconductor material


Compounds useful as organic semiconductor materials, and semiconductor devices containing such organic semiconductor materials are described.. .
E.t.c. S.r.l.


08/20/15
20150236170 

Semiconductor device


The performances of a semiconductor device are improved. Between a memory gate electrode and a p type well, and between a control gate electrode and the memory gate electrode of a split gate type nonvolatile memory, an insulation film having a charge accumulation layer therein is formed.
Renesas Electronics Corporation


08/20/15
20150236169 

Semiconductor device and manufacturing the same


Provided is a semiconductor device using a p-type oxide semiconductor layer and a method of manufacturing the same. The device includes the p-type oxide layer formed of at least one oxide selected from the group consisting of a copper(cu)-containing copper monoxide, a tin(sn)-containing tin monoxide, a copper tin oxide containing a cu—sn alloy, and a nickel tin oxide containing a ni—sn alloy.
Faculty Of Science And Technology New University Of Lisbon


08/20/15
20150236168 

Semiconductor device


A highly reliable semiconductor device the yield of which can be prevented from decreasing due to electrostatic discharge damage is provided. A semiconductor device is provided which includes a gate electrode layer, a first gate insulating layer over the gate electrode layer, a second gate insulating layer being over the first gate insulating layer and having a smaller thickness than the first gate insulating layer, an oxide semiconductor layer over the second gate insulating layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236167 

Semiconductor device and manufacturing the same


One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer..
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236166 

Semiconductor device and manufacturing method thereof


Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236165 

Semiconductor device


Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236164 

Semiconductor device structures and arrays of vertical transistor devices


A semiconductor device structure is disclosed. The semiconductor device structure includes a mesa extending above a substrate.
Micron Technology, Inc.


08/20/15
20150236162 

Oxide, semiconductor device, module, and electronic device


To provide a crystalline oxide semiconductor which can be used as a semiconductor of a transistor or the like. The crystalline oxide semiconductor is an oxide over a surface and includes a plurality of flat-plate-like in—ga—zn oxides.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236159 

Work function metal fill for replacement gate fin field effect transistor process


A method of forming a semiconductor device that includes forming a sacrificial gate structure on a channel portion of a fin structure, wherein the angle at the intersection of the sidewall of the sacrificial gate structure and an upper surface of the channel portion of the fin structure is obtuse. Epitaxial source and drain region structures are formed on a source region portion and a drain region portion of the fin structure.
International Business Machines Corporation


08/20/15
20150236158 

Method for fabricating semiconductor device, and semiconductor device made thereby


A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity.
United Microelectronics Corp.


08/20/15
20150236156 

Semiconductor device


A semiconductor device includes a misfet. The semiconductor device also includes a silicon nitride film 12 and a silicon nitride film 10 arranged on the silicon nitride film 12.
Renesas Electronics Corporation


08/20/15
20150236155 

Semiconductor device and formation thereof


A semiconductor device and method of forming the same are described. A semiconductor device includes an active area adjacent a gate structure.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236152 

Semiconductor device


A semiconductor device includes a pillar-shaped silicon layer. A sidewall having a laminated structure including an insulating film and silicon resides on an upper sidewall of the pillar-shaped silicon layer.
Unisantis Electronics Singapore Pte. Ltd.


08/20/15
20150236151 

Silicon carbide semiconductor devices, and methods for manufacturing thereof


A semiconductor device is presented. The device includes a semiconductor layer including silicon carbide, and having a first surface and a second surface.
General Electric Company


08/20/15
20150236150 

Semiconductor device and operating method thereof


Provided is a semiconductor device including a p-type substrate, a p-type first well region, an n-type second well region, a gate, n-type source and drain regions, a dummy gate and an n-type deep well region. The first well region is in the substrate.
United Microelectronics Corp.


08/20/15
20150236149 

Semiconductor device and manufacturing


A semiconductor device includes a gate structure, and a source region and a drain region on opposite sides of the gate structure. The source region comprises a first region of a first conductivity type, and a second region of a second conductivity type, the second conductivity type opposite to the first conductivity type.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236148 

Silicon carbide semiconductor device and manufacturing same


A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, a gate electrode, an interlayer insulating film, and a gate interconnection. The silicon carbide substrate includes: a first impurity region; a second impurity region provided on the first impurity region; and a third impurity region provided on the second impurity region so as to be separated from the first impurity region.
Sumitomo Electric Industries, Ltd.


08/20/15
20150236145 

Semiconductor structures and methods for multi-level band gap energy of nanowire transistors to improve drive current


A semiconductor device is provided having a channel formed from a nanowire with multi-level band gap energy. The semiconductor device comprises a nanowire structure formed between source and drain regions.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236143 

Semiconductor device and rc-igbt with zones directly adjoining a rear side electrode


A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state.
Infineon Technologies Ag


08/20/15
20150236142 

Semiconductor device with insert structure at a rear side and manufacturing


A cavity is formed in a first semiconductor layer that is formed on a semiconducting base layer. The cavity extends from a process surface of the first semiconductor layer to the base layer.
Infineon Technologies Ag


08/20/15
20150236138 

Semiconductor device and manufacturing the same


A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in s value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236135 

Method to improve reliability of replacement gate device


A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.. .
Globalfoundries Inc.


08/20/15
20150236134 

Method of manufacturing semiconductor device


A method of manufacturing a finfet semiconductor device is provided, wherein the semiconductor fins are formed in a parallel arrangement which intersects the gates arranged in parallel. The polycrystalline silicon layer is deposited and then converted into a single crystal silicon layer such that the single crystal silicon layer and the semiconductor fins are integrated in essence, i.e., the source/drain region in the semiconductor fins is raised and the top area of the semiconductor fins is extended.
Institute Of Microelectronics, Chinese Academy Of Sciences


08/20/15
20150236133 

Devices and methods of forming higher tunability finfet varactor


Devices and methods for forming semiconductor devices with wider finfets for higher tunability of the varactor are provided. One method includes, for instance: obtaining an intermediate semiconductor device; applying a spacer layer over the semiconductor device; etching the semiconductor device to remove at least a portion of the spacer layer to expose the plurality of mandrels; removing the mandrels; etching the semiconductor device to remove a portion of the dielectric layer; forming at least one fin; and removing the spacer layer and the dielectric layer.
Globalfoundries Inc.


08/20/15
20150236129 

Semiconductor device and manufacturing the same


An object is to reduce the number of photomasks used for manufacturing a transistor and manufacturing a display device to less than the conventional one. The display device is manufactured through, in total, three photolithography steps including one photolithography step which serves as both a step of forming a gate electrode and a step of forming an island-like semiconductor layer, one photolithography step of forming a contact hole after a planarization insulating layer is formed, and one photolithography step which serves as both a step of forming a source electrode and a drain electrode and a step of forming a pixel electrode..
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236127 

Silicon carbide semiconductor device and manufacturing the same


In a method of manufacturing a silicon carbide semiconductor device including a vertical switching element having a trench gate structure, with the use of a substrate having an off angle with respect to a (0001) plane or a (000-1) plane, a trench is formed from a surface of a source region to a depth reaching a drift layer through a base region so that a side wall surface of the trench faces a (11-20) plane or a (1-100) plane, and a gate oxide film is formed without performing sacrificial oxidation after formation of the trench.. .
Denso Corporation


08/20/15
20150236126 

Semiconductor device having vertical channel, resistive memory device including the same, and manufacturing the same


A semiconductor device, a resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device includes a pillar extending substantially perpendicular from a semiconductor substrate, the pillar including an inner portion and an outer portion surrounding the inner portion.
Sk Hynix Inc.


08/20/15
20150236125 

Semiconductor device and manufacturing method thereof


A method of manufacturing a semiconductor device is provided. The method includes forming a plurality of trenches in a semiconductor substrate, on opposite sides of a gate electrode of a p-type metal-oxide-semiconductor (pmos) disposed on the semiconductor substrate.
Semiconductor Manufacturing International (shanghai) Corporation


08/20/15
20150236121 

Semiconductor device and forming the same


A semiconductor device comprising a substrate, a channel layer over the substrate, an active layer over the channel layer and a laminate layer in contact with the active layer. The active layer has a band gap discontinuity with the channel layer..
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236119 

Silicon-carbide semiconductor device and manufacturing method thereof


A silicon-carbide semiconductor device that relaxes field intensity in a gate insulating film, and that has a low on-resistance. The silicon-carbide semiconductor device includes: an n-type silicon-carbide substrate; a drift layer formed on a topside of the n-type silicon-carbide substrate; a trench formed in the drift layer and that includes therein a gate insulating film and a gate electrode; a p-type high-concentration well region formed parallel to the trench with a spacing therefrom and that has a depth larger than that of the trench; and a p-type body region formed to have a depth that gradually increases when nearing from a position upward from the bottom end of the trench by approximately the thickness of the gate insulating film at the bottom of the trench toward the lower end of the p-type high-concentration well region..
Mitsubishi Electric Corporation


08/20/15
20150236115 

Low temperature spacer for advanced semiconductor devices


Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (bn) spacer on a gate stack, such as a gate stack of a planar fet or finfet. The boron nitride spacer is fabricated using atomic layer deposition (ald) and/or plasma enhanced atomic layer deposition (peald) techniques to produce a boron nitride spacer at relatively low temperatures that are conducive to devices made from materials such as silicon (si), silicon germanium (sige), germanium (ge), and/or iii-v compounds.
International Business Machines Corporation


08/20/15
20150236114 

Semiconductor device and formation thereof


A semiconductor device and method of formation are provided herein. A semiconductor device includes a barrier including carbon over a fin, the fin including a doped region.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236113 

Semiconductor device for compensating internal delay, methods thereof, and data processing system having the same


A method of manufacturing a field effect transistor using a gate last process includes providing the field effect transistor which includes a high-k dielectric formed between an elevated source and an elevated drain and surrounding a metal gate, and performing a chemical mechanical planarization (cmp) process on an upper surface of the elevated source, and in which a height of the metal gate becomes lower than a height of the elevated source according to the cmp process.. .
Samsung Electronics Co., Ltd.


08/20/15
20150236112 

Transistor, semiconductor device and manufacturing the same


A semiconductor device including a central region, side regions located in both sides of the central region, and conductive layers including a first barrier pattern formed in the central region, a material pattern formed in the first barrier pattern and having an etch selectivity with respect to the first barrier pattern, and a second barrier pattern formed in the material pattern; and insulating layers alternately stacked with the conductive layers.. .
Sk Hynix Inc.


08/20/15
20150236108 

Semiconductor device having stable gate structure and manufacturing the same


Disclosed are a semiconductor device having a stable gate structure, and a manufacturing method thereof, in which a gate structure is stabilized by additionally including a plurality of gate feet under a gate head in a width direction of the gate head so as to serve as supporters in a gate structure including a fine gate foot having a length of 0.2 μm or smaller, and the gate head having a predetermined size. Accordingly, it is possible to prevent the gate electrode of the semiconductor device from collapsing, and improve reliability of the semiconductor device during or after the process of the semiconductor device..
Electronics And Telecommunications Research Institute


08/20/15
20150236107 

Ultra high voltage semiconductor device with electrostatic discharge capabilities


A semiconductor device comprises a semiconductor substrate, a first layer over the semiconductor substrate, and a drain region in the first layer. The drain region comprises a drain rectangular portion having a first end and a second end, a first drain end portion contiguous with the drain rectangular portion and extending from the first end of the drain rectangular portion away from a center of the drain region, and a second drain end portion contiguous with the drain rectangular portion and extending from the second end of the drain rectangular portion away from the center of the drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236105 

Semiconductor device with vertical transistors having a surrounding gate and a work-function metal around an upper sidewall


A method of manufacturing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer, a first insulating film around the fin-shaped semiconductor layer, and a pillar-shaped semiconductor layer on the fin-shaped semiconductor layer. A second step forms a gate insulating film around the pillar-shaped semiconductor layer, a gate electrode around the gate insulating film, and a gate line.
Unisantis Electronics Singapore Pte. Ltd.


08/20/15
20150236104 

Semiconductor device


According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.. .
Kabushiki Kaisha Toshiba


08/20/15
20150236103 

Nitride-based semiconductor device and manufacturing the same


The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped alxga1-xn (0≦x<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type alyga1-yn (0<y≦1, x<y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7..
Kabushikikaisha Toshiba


08/20/15
20150236099 

Semiconductor device and manufacturing the same


A semiconductor device according to an embodiment includes: a semiconductor substrate; an n-type sic layer provided on one side of the semiconductor substrate; a p-type first sic region provided in the n-type sic layer; a metallic second sic region provided in the p-type first sic region, the second sic region containing at least one element selected from the group of mg, ca, sr, ba, sc, y, la, and lanthanoid; a gate electrode; a gate insulating film provided between the gate electrode and the n-type sic layer, the gate insulating film provided between the gate electrode and the first sic region; a first electrode provided on the second sic region; and a second electrode provided on a side of the semiconductor substrate opposite to the n-type sic layer.. .
Kabushiki Kaisha Toshiba


08/20/15
20150236098 

Semiconductor device and manufacturing the same


A semiconductor device according to an embodiment includes: a first electrode; a sic semiconductor layer including n-type semiconductor; and a second electrode including a sic metallic region made of metal in contact with the sic semiconductor layer, the sic metallic region provided on a side of the sic semiconductor layer opposite to the first electrode, the sic metallic region containing at least one element selected from the group of mg (magnesium), ca (calcium), sr (strontium), ba (barium), sc (scandium), y (yttrium), la (lanthanum), and lanthanoid (ce, pr, nd, pm, sm, eu, gd, tb, dy, ho, er, tm, yb, lu).. .
Kabushiki Kaisha Toshiba


08/20/15
20150236097 

Semiconductor device and manufacturing the same


A semiconductor device of an embodiment includes a p-type first diamond semiconductor layer, a p-type second diamond semiconductor layer disposed on the first diamond semiconductor layer, a plurality of n-type third diamond semiconductor layers disposed on the second diamond semiconductor layer, and a first electrode disposed on the second diamond semiconductor and the third diamond semiconductor layers. The p-type second diamond semiconductor layer has a p-type impurity concentration lower than a p-type impurity concentration of the first diamond semiconductor layer and has oxygen-terminated surfaces.
Kabushiki Kaisha Toshiba


08/20/15
20150236095 

Semiconductor device


A semiconductor device and a method of making the same. The device includes a semiconductor substrate having an algan layer on a gan layer.
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150236092 

Semiconductor structures and methods for multi-level work function and multi-valued channel doping of nanowire transistors to improve drive current


A semiconductor device with multi-level work function and multi-valued channel doping is provided. The semiconductor device comprises a nanowire structure and a gate region.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236091 

Porous insulation film, and a semiconductor device including such porous insulation film


The deposition rate of a porous insulation film is increased, and the film strength of the porous insulation film is improved. Two or more organic siloxane raw materials each having a cyclic sio structure as a main skeleton thereof, and having mutually different structures, are vaporized, and transported with a carrier gas to a reactor (chamber), and an oxidant gas including an oxygen atom is added thereto.
Renesas Electronics Corporation


08/20/15
20150236090 

Transistor with reducted parasitic


Parasitic thyristor action may be mitigated in semiconductor devices by placement of minority carrier traps, illustratively in the base(s) of bipolar transistors or the well of a cmos transistor pair. The minority carrier traps include adjacent n and p regions which may be connected by a conductor..
Nxp B.v.


08/20/15
20150236089 

Manufacturing semiconductor device and semiconductor device


A manufacturing method of a junction field effect transistor includes the steps of: (a) forming an n+-type source layer on a surface of an n−-type drift layer formed on an n+-type sic substrate; (b) forming a plurality of shallow trenches disposed at predetermined intervals by etching the surface of the n−-type drift layer with a silicon oxide film formed on the n−-type drift layer used as a mask; (c) forming an n-type counter dope layer by doping the n−-type drift layer below each of the shallow trenches with nitrogen by using a vertical ion implantation method; (d) forming a sidewall spacer on each sidewall of the silicon oxide film and the shallow trenches; and (e) forming a p-type gate layer by doping the n−-type drift layer below each of shallow trenches with aluminum by using the vertical ion implantation method.. .
Renesas Electronics Corporation


08/20/15
20150236088 

Semiconductor device


A semiconductor device is provided. On one main surface side of an n-type semiconductor substrate, a p-type diffusion region to serve as an anode of a diode is formed.
Mitsubishi Electric Corporation


08/20/15
20150236087 

Semiconductor devices including a guard ring and related semiconductor systems


Semiconductor devices are provided. The semiconductor devices may include a substrate and a transistor on the substrate.
Samsung Electronics Co., Ltd.


08/20/15
20150236086 

Semiconductor structures and methods for multi-level work function


A semiconductor structure is provided comprising a vertical channel structure extending from a substrate and formed as a channel between a source region and a drain region. The semiconductor structure further comprises a metal gate that surrounds a portion of the vertical channel structure.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236084 

Semiconductor devices having hybrid capacitors and methods for fabricating the same


A semiconductor device includes a plurality of capacitors disposed on a substrate and a support pattern supporting upper portions and lower portions of the capacitors. Each of the capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower and upper electrodes.
Samsung Electronics Co., Ltd.


08/20/15
20150236061 

Semiconductor device and driving method thereof


A semiconductor device including photosensor capable of imaging with high resolution is disclosed. The semiconductor device includes the photosensor having a photodiode, a first transistor, and a second transistor.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236057 

Semiconductor device


A semiconductor device used for a semiconductor relay includes: a first diode; a second diode; an electric field shield film for covering the second semiconductor island region, where the second diode is formed; and a wiring for electrically connecting the first diode to the second diode. The wiring is arranged so as to cross above a silicon oxide film surrounding the second semiconductor island region.
Renesas Electronics Corporation


08/20/15
20150236051 

Semiconductor device including groups of stacked nanowires and related methods


A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material.
Stmicroelectronics, Inc.


08/20/15
20150236050 

Semiconductor device including groups of nanowires of different semiconductor materials and related methods


A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material..
Stmicroelectronics, Inc.


08/20/15
20150236049 

Semiconductor device


An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236036 

Semiconductor device and methods of manufacturing and operating the same


A semiconductor device includes a memory cell array including a vertical channel layer, two or more selection transistors, and a plurality of memory cells formed along the vertical channel; a peripheral circuit suitable for programming the two or more selection transistors and the memory cells; and a control circuit suitable for controlling the peripheral circuit to decrease a pass voltage applied to one word line adjacent to two or more selection lines coupled to the respective selection transistors, during a program operation in which the peripheral circuit applies a program voltage to the two or more selection lines and applies the pass voltage to a plurality of word lines connected to the memory cells.. .
Sk Hynix Inc.


08/20/15
20150236028 

Semiconductor devices and methods of manufacturing the same


A semiconductor device including a substrate having a trench formed therein, a plurality of gate structures, an isolation layer pattern and an insulating interlayer pattern. The substrate includes a plurality of active regions defined by the trench and spaced apart from each other in a second direction.
Samsung Electronics Co., Ltd.


08/20/15
20150236025 

Semiconductor device


A well voltage supply cell includes third gate electrode group (including a third gate electrode corresponding to a first gate electrode) located symmetrically to first gate electrode group (including the first gate electrode constituting an access transistor) of a first sram cell, fourth gate electrode group (including a fourth gate electrode corresponding to a second gate electrode) located symmetrically to second gate electrode group (including the second gate electrode constituting an access transistor) of a second sram cell. A p-type impurity diffusion region located on a p well between the third gate electrode and the fourth gate electrode located opposite to each other, a first n-type impurity diffusion region located on the side of the third gate electrode closer to the first sram cell, and a second n-type impurity diffusion region located on the side of the fourth gate electrode closer to the second sram cell..
Renesas Electronics Corporation


08/20/15
20150236024 

Semiconductor structure having buried conductive elements


Embodiments for the present invention provide a semiconductor device and methods for fabrication. In an embodiment of the present invention, a semiconductor structure comprises a first conductor horizontally formed on a semiconductor substrate.
International Business Machines Corporation


08/20/15
20150236022 

Semiconductor device and manufacturing method thereof


Disclosed herein is a semiconductor device that includes: a semiconductor substrate; a well of a first conductive type that is formed in the semiconductor substrate; an element isolation region embedded in the semiconductor substrate so as to define an active region of the well; first and second gate electrodes each including a side surface and a bottom surface that are covered with the well such that the first and second gate electrodes are formed to traverse the active region, and a peak depth of the well corresponding to the active region is equal to or shallower than a peak depth of the well corresponding to the element isolation region.. .
Ps4 Luxco S.a.r.l.


08/20/15
20150236016 

Contact structure of semiconductor device


A method of fabricating a semiconductor device comprises forming a fin structure extending from a substrate, the fin structure comprising a first fin, a second fin, and a third fin between the first fin and the second fin. The method further comprises forming germanide over a first facet of the first fin, a second facet of the second fin, and a substantially planar surface of the third fin, wherein the first facet forms a first acute angle with a major surface of the substrate and is substantially mirror symmetric with the second facet, and wherein the substantially planar surface of the third fin forms a second acute angle smaller than the first acute angle with the major surface of the substrate..
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236012 

Semiconductor device


In a semiconductor device having a built-in schottky barrier diode as a reflux diode, a maximum unipolar current is increased in a reflux state and a leakage current is reduced in an off state. A schottky electrode is provided in at least a part of a surface between adjacent well regions of a second conductivity type disposed on a surface layer side of a drift layer of a first conductivity type, and an impurity concentration of a first conductivity type in a first region provided in a lower part of the schottky electrode and provided between the adjacent well regions is set to be higher than a first impurity concentration of a first conductivity type in the drift layer and to be lower than a second impurity concentration of a second conductivity type in the well region..
Mitsubishi Electric Corporation


08/20/15
20150236005 

Method of hybrid packaging a lead frame based multi-chip semiconductor device with multiple interconnecting structures


A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure.. .
Alpha And Omega Semiconductor Incorporated


08/20/15
20150236003 

Method of manufacturing semiconductor device


A method of manufacturing a semiconductor device obtained by laminating a first semiconductor chip and a second semiconductor chip with different planar sizes when seen in a plan view on a wiring board via an adhesive material, in which the second semiconductor chip with a relatively larger planar size is mounted on the first semiconductor chip with a relatively smaller planar size. Also, after the first and second semiconductor chips are mounted, the first and second semiconductor chips are sealed with resin.
Renesas Electronics Corporation


08/20/15
20150235994 

Semiconductor device and manufacturing a semiconductor device


A semiconductor device comprises the following: a wiring substrate having on one side a recessed section and a plurality of connection pads; a first semiconductor chip mounted in the recessed section; a second semiconductor chip that has a plurality of electrode pads on the surface of at least one end section (in this case, both ends) and that is laminated onto the first semiconductor chip so that at least one end section (in this case, both ends) protrudes from the first semiconductor chip; a plurality of wires that mutually and electrically connect the plurality of connection pads of the wiring substrate and the plurality of electrode pads of the second semiconductor chip. One end section of the second semiconductor chip extends beyond the inner surface of the recessed section and is supported by one side of the wiring substrate..
Ps5 Luxco S.a.r.l.


08/20/15
20150235987 

Method of manufacturing semiconductor device


A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body.
Renesas Electronics Corporation


08/20/15
20150235984 

Method of manufacturing semiconductor device and semiconductor device manufacturing apparatus


An ultrasonic joining step of joining the bump electrode 100 and the pad electrode 200 by vibrating at least one of the bump electrode 100 and the pad electrode 200 using ultrasonic waves.. .

08/20/15
20150235977 

Semiconductor device and manufacturing method thereof


A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer..
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150235973 

Semiconductor device manufacturing method and semiconductor device


To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane from the test pad and the alignment target am. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented..
Renesas Electronics Corporation


08/20/15
20150235972 

Semiconductor device having high frequency wiring and dummy metal layer at multilayer wiring structure


A semiconductor device includes a semiconductor substrate, a first wiring layer including a plurality of first dummy metals provided inside an inductor wiring, a plurality of second dummy metals provided outside the inductor wiring, and a plurality of third dummy metals provided to overlap the inductor wiring in a plan view, and a second wiring layer provided between the semiconductor substrate and the first wiring layer. The second wiring layer includes the inductor wiring formed in the second wiring layer, a first region surrounding the inductor wiring which includes a plurality of fourth dummy metals, and a second region surrounding the first region which includes a plurality of fifth dummy metals.
Renesas Electronics Corporation


08/20/15
20150235966 

Wiring board and semiconductor device using the same


A wiring board of an embodiment includes an insulating substrate and a wiring layer provided on the insulating substrate. The wiring layer has external connection terminals including a ground terminal.
Kabushiki Kaisha Toshiba


08/20/15
20150235965 

Semiconductor device manufacturing method


A method of manufacturing a semiconductor device, includes the steps of passing a control terminal through an opening of a resin case to partially expose the control terminal and covering a patterned insulating substrate with the resin case; inserting a resin block in the opening of the resin case; fitting a convex step portion formed on a side surface of the resin block into a valley formed between two projections of the control terminal; fitting a projection formed on the side surface of the resin block into a concave portion formed on a sidewall of the opening of the resin case; and fitting a projection formed on a bottom surface of the resin block into a concave portion formed in a beam portion at a bottom portion of the opening of the resin case to position and fix the control terminal.. .
Fuji Electric Co., Ltd.


08/20/15
20150235963 

Semiconductor device having interconnect layer that includes dielectric segments interleaved with metal components


The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patterned dielectric layer having a plurality of first openings.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150235962 

Semiconductor device and manufacturing method thereof


The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed..
Renesas Electronics Corporation*


08/20/15
20150235961 

Semiconductor device and producing same


In order to prevent the detachment of a film which is a constituent part of an interlayer-insulating film, and to prevent a decline in the so device properties of a semiconductor device, a semiconductor device is provided with an interlayer-insulating film having, in this order, a carbon-containing silicon nitride (sicn) film, a first silicon nitride film, and a silicon oxide film or a carbon-containing silicon oxide (sioc) film.. .
Ps4 Luxco S.a.r.l.


08/20/15
20150235958 

Method for producing salicide and a carbon nanotube metal contact


A method for producing a metal contact in a semiconductor device is disclosed. The method comprises depositing a catalyst layer in a via hole, forming a catalyst from the deposited catalyst layer, and growing a carbon nanotube structure above the catalyst in the via hole.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150235956 

Semiconductor device and formation thereof


A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150235953 

Semiconductor device and formation thereof


A semiconductor device and method of formation are provided. A semiconductor device includes a copper fill over a first layer in a first opening.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150235950 

Semiconductor device and manufacturing method thereof


A semiconductor device includes a spacer having a nitride/oxide/nitride (non) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug..
Sk Hynix Inc.


08/20/15
20150235948 

Grounding dummy gate in scaled layout design


A semiconductor device includes a gate and a first active contact adjacent to the gate. Such a device further includes a first stacked contact electrically coupled to the first active contact, including a first isolation layer on sidewalls electrically isolating the first stacked contact from the gate.
Qualcomm Incorporated


08/20/15
20150235943 

Semiconductor device


A semiconductor device is provided in which reliability of the semiconductor device is improved by improving an em characteristic, a tddb characteristic, and a withstand voltage characteristic of the semiconductor device. An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in the lower insulating layer.
Renesas Electronics Corporation


08/20/15
20150235942 

Semiconductor device and manufacturing the same


A semiconductor device and a method for manufacturing the same are disclosed. In the semiconductor device, an upper part of a storage node contact plug is increased in size, and an area of overlap between a storage node formed in a subsequent process and a storage node contact plug is increased, such that resistance of the storage node contact plug is increased and device characteristics are improved.
Sk Hynix Inc.


08/20/15
20150235941 

Semiconductor device


A semiconductor device includes a semiconductor chip, a dielectric substrate, and bonding wires. The dielectric substrate includes wiring patterns formed on a surface and a ground metal layer formed on a back side.
Panasonic Intellectual Property Management Co., Ltd.


08/20/15
20150235939 

Three-dimensional semiconductor devices


Three-dimensional (3d) semiconductor devices are provided. The 3d semiconductor device includes a plurality of dummy pillars penetrating each cell pad of an electrode structure and the electrode structure disposed under each cell pad.

08/20/15
20150235937 

Method for manufacturing semiconductor device using mold having resin dam and semiconductor device


The suppression of resin leakage is combined with the suppression of damage to the functional wiring area of a wiring board in forming an encapsulation resin. A method for manufacturing a semiconductor device includes the step of clamping a wiring board with a first mold and a second mold.
Renesas Electronics Corporation


08/20/15
20150235935 

Semiconducor device and manufacturing the same


A method of making a semiconductor device is characterized by the step of attaching a chip-on-interposer subassembly to a heat spreader with the chip inserted into a cavity of the heat spreader and the interposer laterally extending beyond the cavity. The interposer backside process is executed after the chip-on-interposer attachment and encapsulation to form the finished interposer.
Bridge Semiconductor Corporation


08/20/15
20150235933 

Semiconductor devices, semiconductor device packages, and packaging techniques for impedance matching and/or low frequency terminations


A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (rf) power amplifier transistor having a first port, a second port, and a third port.
Freescale Semiconductor, Inc.


08/20/15
20150235931 

Semiconductor device


A semiconductor device includes a semiconductor chip, a plurality of passive electronic components, a substrate, a main lead, and a sealing resin. The semiconductor chip includes a functional circuit.
Rohm Co., Ltd.


08/20/15
20150235928 

Encapsulated semiconductor device and manufacturing the same


An encapsulated semiconductor device includes: a first conduction path formative plate; a second conduction path formative plate joined to the first conduction path formative plate; a power element bonded to the first conduction path formative plate; a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin configured to encapsulate the first and second conduction path formative plates. A through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet.
Panasonic Intellectual Property Management Co., Ltd.


08/20/15
20150235926 

Semiconductor device and manufacturing the same


A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package..
Renesas Electronics Corporation


08/20/15
20150235925 

Semiconductor device and semiconductor device manufacturing method


A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.. .
Mitsubishi Electric Corporation


08/20/15
20150235924 

Power bar design for lead frame-based packages


A semiconductor device includes a semiconductor die encapsulated in a package casing and having four main side walls each oriented generally parallel with one of first or second orthogonal directions. Signal leads are electrically coupled to the die and each has an exposed portion that extends from one of the main side walls parallel with one of the first or second directions.

08/20/15
20150235923 

Semiconductor device


Provided is a semiconductor device that can suppress a temperature increase in beam leads while reducing the number of wiring lines and can suppress an increase in manufacturing costs. The semiconductor device is provided with a power module including an upper arm and a lower arm each configured by connecting in parallel a plurality of power elements and a plurality of rectifying elements.
Calsonic Kansei Corporation


08/20/15
20150235908 

On-chip diode with fully depleted semicondutor devices


An electrical device including a first conductivity semiconductor device present in a first semiconductor device region of an soi substrate, and a second conductivity semiconductor device present in a second semiconductor device region of the soi substrate. The electrical device also includes a diode present within a diode region of the soi substrate that includes a first doped layer of a first conductivity semiconductor material that is present on an soi layer of the soi substrate.
International Business Machines Corporation


08/20/15
20150235907 

Semiconductor device and production method


The object to provide a semiconductor device comprising a highly-integrated sgt-based cmos inverter circuit is achieved by forming an inverter which comprises: a first transistor including; an first island-shaped semiconductor layer; a first gate insulating film; a gate electrode; a first first-conductive-type high-concentration semiconductor layer arranged above the first island-shaped semiconductor layer; and a second first-conductive-type high-concentration semiconductor layer arranged below the first island-shaped semiconductor layer, and a second transistor including; a second gate insulating film surrounding a part of the periphery of the gate electrode; a second semiconductor layer in contact with a part of the periphery of the second gate insulating film; a first second-conductive-type high-concentration semiconductor layer arranged above the second semiconductor layer; and a second second-conductive-type high-concentration semiconductor layer arranged below the second semiconductor layer.. .
Unisantis Electronics Singapore Pte. Ltd.


08/20/15
20150235902 

Method of manufacturing a semiconductor device


A method of manufacturing a semiconductor device includes providing a wafer, grinding a backside of the wafer, disposing a backside film on the backside of the wafer, cutting the wafer to singulate a plurality of dies from the wafer, and forming a mark on the backside film disposed on each of the plurality of dies by a laser operation.. .
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150235901 

Semiconductor device and manufacturing semiconductor device


A semiconductor device has a semiconductor substrate having a first surface and a second surface, a through electrode penetrating through the semiconductor substrate and having a protrusion protruding from the second surface, and an insulation layer on the second surface, which covers the side surface of the protrusion, has an opening through which to expose the end surface of the protrusion, and has a thickness greater than the length of the protrusion.. .
Fujitsu Semiconductor Limited


08/20/15
20150235897 

Reverse tone self-aligned contact


Some embodiments of the present disclosure relate to a method to form a source/drain self-aligned contact to a transistor or other semiconductor device. The method comprises forming a pair of gate structures over a substrate, and forming a source/drain region between the pair of gate structures.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/20/15
20150235890 

Semiconductor device including a dielectric material


A method for manufacturing a semiconductor device includes providing a carrier and a semiconductor wafer having a first side and a second side opposite to the first side. The method includes applying a dielectric material to the carrier or the semiconductor wafer and bonding the semiconductor wafer to the carrier via the dielectric material.
Infineon Technologies Ag


08/20/15
20150235878 

Semiconductor manufacturing apparatus and manufacturing semiconductor device


In one embodiment, a semiconductor manufacturing apparatus includes a support module configured to support a wafer having first and second faces. The apparatus further includes a chamber configured to contain the support module.
Kabushiki Kaisha Toshiba


08/20/15
20150235872 

Curable silicone composition, producing semiconductor device, and semiconductor device


The present invention relates to a curable silicone composition comprising: (a) an organopolysiloxane composed of: (a-1) a linear organopolysiloxane having at least two silicon-bonded alkenyl groups in a molecule, and (a-2) a resin-like organopolysiloxane including 1.5 to 5.0% by weight alkenyl groups; (b) an organopolysiloxane having at least two silicon-bonded hydrogen atoms in a molecule; (c) a linear dialkyl polysiloxane having a viscosity at 25° c. Of 2 to 10 mm2/s and having alkenyl groups capping both molecular chain terminals; and (d) a hydrosilylation reaction catalyst.
Dow Corning Toray Co., Ltd.


08/20/15
20150235871 

Vacuum laminating manufacturing semiconductor apparatus


A vacuum laminating apparatus for use in manufacturing a semiconductor apparatus, including a frame mechanism to surround at least a side face of a support-base attached encapsulant including a thermosetting resin layer stacked as an encapsulant on a support base, the frame mechanism including a holding unit to hold a substrate on which semiconductor devices are mounted or a wafer on which semiconductor devices are formed with the substrate or the wafer facing and spaced apart from the thermosetting resin layer of the support-base attached encapsulant, the vacuum laminating apparatus capable of vacuum laminating the support-base attached encapsulant surrounded by the frame mechanism together with the substrate or wafer. The vacuum laminating apparatus inhibit the occurrence of voids in resin layer and warp of a substrate or wafer and manufacture a semiconductor apparatus having a precisely formed resin layer, even when the substrate or wafer used has a large area..
Shin-etsu Chemical Co., Ltd.


08/20/15
20150235867 

Semiconductor device manufacturing method


A semiconductor device manufacturing method, the method including: forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate; forming a conductive layer to cover the insulation layer having the protruding portion; and removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mw/cm2 or above on the semiconductor substrate, under a high pressure condition of 85 mtorr or above.. .
Tokyo Electron Limited


08/20/15
20150235866 

Semiconductor device and manufacturing semiconductor device


Tn-: the layer thickness of the drift layer.. .

08/20/15
20150235862 

Semiconductor device manufacturing method


A semiconductor device manufacturing method for etching a multilayer film using a mask is provided. The method includes (a) supplying a first gas containing hydrogen, hydrogen bromide, nitrogen trifluoride and at least one of hydrocarbon, fluorocarbon and fluorohydrocarbon into the processing chamber and exciting the first gas to etch the multilayer film from a top surface of the multilayer film to a predetermined position in a stacked direction of the multilayer film; and (b) supplying a second gas that does not substantially contain hydrogen bromide and contains hydrogen and nitrogen trifluoride and at least one of thydrocarbon, fluorocarbon and fluorohydrocarbon into the processing chamber and exciting the second gas to etch the multilayer film from the predetermined position of the multilayer film to a top surface of the etching stop layer..
Tokyo Electron Limited


08/20/15
20150235854 

Method for manufacturing semiconductor device


A method for manufacturing a semiconductor device is disclosed. The method comprises forming a etch stop layer and a dummy gate layer on a substrate; forming a dummy gate pattern by wet etching the dummy gate layer; forming a gate spacer around said dummy gate pattern; removing said dummy gate pattern by wet etching to form a gate trench; and forming a gate stack in the gate trench.
Institute Of Microelectronics, Chinese Academy Of Sciences


08/20/15
20150235852 

Methods of manufacturing semiconductor devices


In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An ion implantation process is performed at an upper portion of the substrate exposed by the gate structure, so that an ion implantation region is formed to have an expanded volume.
Samsung Electronics Co., Ltd.


08/20/15
20150235850 

Semiconductor device manufacturing method and semiconductor device manufacturing apparatus


A semiconductor device manufacturing method of the present invention includes forming a base film having a water-repellent surface on a substrate; forming a photosensitive film having a water-repellent surface on the base film; developing the photosensitive film to expose the base film, thereby forming a photosensitive film pattern; supplying a first spacer material on the photosensitive film and on the exposed base film; and removing at least a part of the first spacer material formed on a top surface of the photosensitive film and a top surface of the base film.. .
Tokyo Electron Limited


08/20/15
20150235845 

Method of manufacturing semiconductor device


According to one embodiment, a method of manufacturing a semiconductor device, includes preparing a semiconductor substrate includes a connection pad to electrically connect to a circuit element formed on a main surface, or a rewiring line connected to the connection pad, forming an insulating photosensitive resin film on the substrate with the exclusion of at least an edge portion of the substrate by inkjet, patterning the photosensitive resin film by photolithography, and forming a rewiring line, ubm or an electrode for external connection on the substrate on which the patterned photosensitive resin film is formed.. .
Tera Probe, Inc.


08/20/15
20150235843 

Method of manufacturing semiconductor device and substrate processing method


A method of manufacturing a semiconductor device is provided. The method includes: forming a film containing a predetermined element, oxygen, carbon and nitrogen on a substrate by repeating a cycle.
Hitachi Kokusai Electric Inc.


08/20/15
20150235836 

Methods of manufacturing semiconductor devices including an oxide layer


In a method of forming an oxide layer of a semiconductor process, a preliminary precursor flow is provided on a substrate in a deposition chamber to form a preliminary precursor layer, a precursor flow and a first oxidizing agent flow are provided on the preliminary precursor layer alternately and repeatedly to form precursor layers and first oxidizing agent layers alternately stacked on the preliminary precursor layer, and a second oxidizing agent flow is provided on the precursor layer or the first oxidizing agent layer alternately stacked to form a second oxidizing agent layer.. .
Samsung Electronics Co., Ltd.


08/20/15
20150235714 

Semiconductor device for parallel bit test and test method thereof


A semiconductor device includes a plurality of memory chips and a plurality of signal selection units respectively corresponding to the plurality of memory chips, and suitable for commonly transferring test data signals from an external to a corresponding one of the plurality of memory chips during a common test mode, wherein one or more of the plurality of signal selection units may transfer the test data signals from the external to corresponding ones of the plurality of memory chips during an individual test mode, and wherein the semiconductor device may be set to the common test mode when a common test signal is enabled, and set to the individual test mode when both the common test signal and a test control signal are enabled.. .
Sk Hynix Inc.


08/20/15
20150235710 

Semiconductor device


In this flash memory, after first and second nodes are precharged to a power supply voltage, a sense amplifier is activated, and signals appearing at the first and second nodes are held in a register. With output signals of the register, a transistor is rendered conductive, so that a constant current source for offset compensation is connected to the first or second node.
Renesas Electronics Corporation


08/20/15
20150235702 

Semiconductor device and operating method thereof


The semiconductor device includes a cam block including a plurality of vertical strings having a perpendicular configuration with respect to a semiconductor substrate, wherein each of the plurality of vertical strings is electrically coupled to a plurality of word lines and each of the plurality of word lines is electrically coupled to a plurality of cam cells, a peripheral circuit configured to program cam cells selected from the plurality of cam cells, and a control circuit configured to issue at least one command to the peripheral circuit to simultaneously apply a program voltage to an nth word line, an n−1th word line and an n+1th word line to simultaneously program cam cells electrically coupled to the n−1th word line, the nth word line and the n+1th word line, wherein the n−1th word line and an n+1th word line are adjacent to the nth word line and the selected cam cells are electrically coupled to the nth word line.. .
Sk Hynix Inc.


08/20/15
20150235692 

Pipeline-controlled semiconductor memory device with reduced power consumption and memory access time


A semiconductor device includes a memory cell array including a plurality of memory array basic units. A first bus for transfer of address/control signals, includes a first buffer circuit operating as a pipeline register.
Renesas Electronics Corporation


08/20/15
20150235685 

Semiconductor device


A semiconductor device includes a driving signal generation unit configured to selectively drive a sub word line driving signal in response to a sub word line select signal. The semiconductor device also includes a sub word line driving unit configured to drive a sub word line in response to a main word line select signal and the sub word line driving signal.
Sk Hynix Inc.


08/20/15
20150235683 

Semiconductor devices


A semiconductor device including a data aligner that aligns input data in response to internal strobe signals obtained by dividing a data strobe signal to generate a first alignment data and a second alignment data. The semiconductor device may also include a phase sensor that generates a control clock signal in response to a clock signal and senses phases of the internal strobe signals with the control clock signal to generate a selection signal, and a data selector that selectively outputs the first and second alignment data as a first selection alignment data and a second selection alignment data in response to the selection signal..
Sk Hynix Inc.


08/20/15
20150235679 

Semiconductor device


A semiconductor device includes data terminal, unit buffers which drive the data terminal and the impedance of which can be adjusted, and control circuits which successively switch the operation of at least two unit buffers selected from unit buffers. Because the operation of the plurality of unit buffers is switched successively, the peak current which flows during an output operation is dispersed, power-supply noise can be controlled, and the output potential can be switched very rapidly and continuously, while a fixed output impedance is maintained..
Ps4 Luxco S.a.r.l.


08/20/15
20150235543 

Network switch with enhanced interface


A network switch is provided that has an enhanced interface wherein an integrated circuit device is provided that facilitates the delivery of enhanced status information from the network switch. This integrated circuit, illustratively, a field programmable gate array (fpga) or programmable logic device (pld) such as a complex programmable logic device (cpld), facilitates the delivery of enhanced status indicator information in conjunction with the resident networking switch semiconductor device (i.e., an ethernet switch or phy device).
Alcatel-lucent Usa Inc.


08/20/15
20150235057 

Programmable device personalization


A semiconductor device may include a secure memory configured to store a programmable key, an interface for programming the programmable key in the secure memory, and a plurality of configurable features of the semiconductor device that are associated with the programmable key, each configurable feature having a set of multiple selectable configurations, wherein a value of the key defines a selection of one of the multiple configurations for each of the configurable features. For example, the key may include multiple sub-keys, each associated with one of the configurable features, wherein a value of each sub-key defines a selection of one of the multiple configurations for the configurable feature associated with that sub-key.



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This listing is a sample listing of patent applications related to Semiconductor Device for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Semiconductor Device with additional patents listed. Browse our RSS directory or Search for other possible listings.


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