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Semiconductor Device patents



      
           
This page is updated frequently with new Semiconductor Device-related patents. Subscribe to the Semiconductor Device RSS feed to automatically get the update: related Semiconductor RSS feeds.

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Date/App# patent app List of recent Semiconductor Device-related patents
04/10/14
20140099799
 Lithography masks, systems, and manufacturing methods patent thumbnailnew patent Lithography masks, systems, and manufacturing methods
Lithography masks, lithography systems, methods of manufacturing lithography masks, methods of altering material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a lithography mask includes a first pattern for at least one material layer of at least one die, the first pattern being oriented in a first position.
04/10/14
20140099797
 Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus patent thumbnailnew patent Method of manufacturing semiconductor device, substrate processing method and substrate processing apparatus
A silicon oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a silicon-containing layer on the substrate by supplying a source gas containing silicon, to the substrate housed in a processing chamber and heated to a first temperature; and oxidizing and changing the silicon-containing layer formed on the substrate, to a silicon oxide layer by supplying reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure atmosphere of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure atmosphere of less than atmospheric pressure and heated to a second temperature equal to the first temperature or higher than the first temperature.. .
04/10/14
20140099793
 Semiconductor device and method for fabricating the same patent thumbnailnew patent Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes forming a first mask on a substrate, forming a first side wall of a fin by performing a first etching of the substrate using the first mask, forming a second mask on the substrate, the second mask being different from the first mask, and forming a second side wall of the fin by performing a second etching of the substrate using the second mask.. .
04/10/14
20140099791
 Composition for forming resist underlayer film for euv lithography patent thumbnailnew patent Composition for forming resist underlayer film for euv lithography
A method for producing a semiconductor device includes the steps of: applying a composition for forming a resist underlayer film for euv lithography including a novolac resin containing a halogen atom onto a substrate having a film to be fabricated for forming a transferring pattern and baking the composition so as to form a resist underlayer film for euv lithography; and applying a resist for euv lithography onto the resist underlayer film for euv lithography, irradiating, with euv through a mask, the resist underlayer film for euv lithography and a film of the resist for euv lithography on the resist underlayer film, developing the film of the resist for euv lithography, and transferring an image formed in the mask onto the substrate by dry etching so as to form an integrated circuit device.. .
04/10/14
20140099787
 Semiconductor device processing with reduced wiring puddle formation patent thumbnailnew patent Semiconductor device processing with reduced wiring puddle formation
A method of forming an interconnect structure for a semiconductor device includes forming a lower antireflective coating layer over a dielectric layer; forming an organic planarizing layer on the lower antireflective coating layer; transferring a wiring pattern through the organic planarizing layer; transferring the wiring pattern through the lower antireflective coating layer; and transferring the wiring pattern through the dielectric layer, wherein unpatterned portions of the lower antireflective coating layer serve as an etch stop layer so as to prevent any bubble defects present in the organic planarizing layer from being transferred to the dielectric layer.. .
04/10/14
20140099784
 Method for manufacturing a semiconductor device patent thumbnailnew patent Method for manufacturing a semiconductor device
A method for manufacturing a semiconductor device includes forming an insulation film including a trench on a substrate, forming a first metal gate film pattern and a second metal gate film pattern in the trench, redepositing a second metal gate film on the first and second metal gate film patterns and the insulation film, and forming a redeposited second metal gate film pattern on the first and second metal gate film patterns by performing a planarization process for removing a portion of the redeposited second metal gate film so as to expose a top surface of the insulation film, and forming a blocking layer pattern on the redeposited second metal gate film pattern by oxidizing an exposed surface of the redeposited second metal gate film pattern.. .
04/10/14
20140099781
 Beam homogenizer, laser irradiation apparatus, and method for manufacturing semiconductor device patent thumbnailnew patent Beam homogenizer, laser irradiation apparatus, and method for manufacturing semiconductor device
The energy distribution of the beam spot on the irradiated surface changes due to the change in the oscillation condition of the laser or before and after the maintenance. The present invention provides an optical system for forming a rectangular beam spot on an irradiated surface including a beam homogenizer for homogenizing the energy distribution of the rectangular beam spot on the irradiated surface in a direction of its long or short side.
04/10/14
20140099777
 Singulation processes patent thumbnailnew patent Singulation processes
In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process.
04/10/14
20140099775
 Method for fabricating semiconductor device with mini sonos cell patent thumbnailnew patent Method for fabricating semiconductor device with mini sonos cell
A method for fabricating a semiconductor device with mini-sonos cell is disclosed. The method includes: providing a semiconductor substrate having a first mos region and a second mos region; forming a first trench in the semiconductor substrate between the first mos region and the second mos region; depositing a oxide liner and a nitride liner in the first trench; forming a sti in the first trench; removing a portion of the nitride liner for forming a second trench between the first mos region of the semiconductor substrate and the sti and a third trench between the sti and the second mos region of the semiconductor substrate; and forming a first conductive type nitride layer in the second trench..
04/10/14
20140099770
 Semiconductor device and a method of manufacturing the same and designing the same patent thumbnailnew patent Semiconductor device and a method of manufacturing the same and designing the same
There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary bl between the element forming region da and dummy region fa by placing the first dummy pattern dp1 of relatively wider area and the second dummy pattern dp2 of relatively small area in the dummy region fa.
04/10/14
20140099768
new patent Semiconductor devices having passive element in recessed portion of device isolation pattern and methods of fabricating the same
A semiconductor device includes a substrate, a device isolation pattern and a passive circuit element. The device isolation pattern is located on the substrate, delimits an active region of the substrate, and includes a recessed portion having a bottom surface located below a plane coincident with a surface of the active region.
04/10/14
20140099767
new patent Manufacturing method of semiconductor device
An insulating film and another insulating film are formed over a semiconductor substrate in that order to cover first, second, and third gate electrodes. The another insulating film is etched back to form sidewall spacers over side surfaces of the insulating film.
04/10/14
20140099766
new patent Method of manufacturing semiconductor device
A resist layer (46a) including a thick film section (47a), which is relatively thick, at one side thereof, and a thin film section (47b), which is relatively thin, at the other side thereof is formed using a multiple-tone mask. A gate electrode (15a) is formed at a place where it will be provided on a semiconductor layer (12a) so as to be narrower than the resist layer (46a), by executing isotropic etching to a conductive film (44) formed in advance using the resist layer (46a) as a mask, in order to form overhang portions (48) on the resist layer (46a) at both sides of the gate electrode (15a).
04/10/14
20140099763
new patent Forming silicon-carbon embedded source/drain junctions with high substitutional carbon level
Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (spe) process to form a highly substitutional silicon-carbon film.
04/10/14
20140099760
new patent Method for fabricating semiconductor device
A method for fabricating a semiconductor device, wherein the method comprises steps as follows: a dummy gate with a poly-silicon gate electrode and a passive device having a poly-silicon element layer are firstly provided. A hard mask layer is then formed on the dummy gate and the passive device.
04/10/14
20140099759
new patent Apparatus and methods for forming a modulation doped non-planar transistor
Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed..
04/10/14
20140099755
new patent Fabrication method of stacked package structure
A fabrication method of a stacked package structure is provided, which includes the steps of: providing a substrate having at least a semiconductor device disposed thereon; and disposing a semiconductor package on the substrate through a plurality of conductive elements such that the semiconductor device is located between the substrate and the semiconductor package, and forming an encapsulant between the substrate and the semiconductor package to encapsulate the semiconductor device. The encapsulant can be formed on the semiconductor package first and then laminated on the substrate to encapsulate the semiconductor device, or alternatively the encapsulant can be filled between the substrate and the semiconductor package driven by a capillary force after the semiconductor package is disposed on the substrate.
04/10/14
20140099752
new patent Semiconductor device and manufacturing method thereof
An oxide semiconductor layer with excellent crystallinity is formed to enable manufacture of transistors with excellent electrical characteristics for practical application of a large display device, a high-performance semiconductor device, etc. By first heat treatment, a first oxide semiconductor layer is crystallized.
04/10/14
20140099747
new patent Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate and a first insulating layer. The first insulating layer includes a first lower layer and a first upper layer on the first lower layer.
04/10/14
20140099742
new patent Method for fabricating a semiconductor device
The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an oled bonded to a base material with curvature.
04/10/14
20140098588
new patent Power module and power conversion apparatus using same
A power module includes a plurality of semiconductor devices constituting upper/lower arms of an inverter circuit, a plurality of conductive plates arranged to face electrode surfaces of the semiconductor devices and a module case configured to accommodate the semiconductor devices and conductive plates, wherein the module case includes a heat-radiation member made of plate-like metal and facing a surface of the conductive plate and a metallic frame body having an opening that is closed by the heat-radiation member, and wherein a heat-radiation fin unit having a plurality of heat-radiation fins vertically arranged thereon is provided at a center of the heat-radiation member, and a joint portion with the frame body is provided at an peripheral edge of the heat-radiation member, and the heat radiation member has a heat conductivity higher than that of the frame body, and the frame body has a higher rigidity than that of the heat-radiation member.. .
04/10/14
20140098585
new patent Rectifying circuit and semiconductor device
According to one embodiment, a rectifying circuit includes a transistor, a rectifying element and a resistor. The transistor includes a control electrode, a first electrode and a second electrode.
04/10/14
20140098538
new patent Cooling of semiconductor devices
A semiconductor device such as an led illumination device includes a substrate sheet (2) and a plurality of leds (4) that are supported on the front of the substrate sheet. A plurality of apertures (9) extend through the substrate sheet (2) and thermally conductive elements in the form of conduits or tubes (1) extend through the apertures, while thermally conductive elements in the form of pads (10) extend between the leds and the tubes (1).
04/10/14
20140098334
new patent Liquid crystal display device and electronic appliance
A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ito conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased.
04/10/14
20140097978
new patent Ad conversion circuit, semiconductor device, and ad conversion method
A reference voltage generator generates a reference voltage at the time of sampling a received input signal. A sampling time controller detects a change in the reference voltage.
04/10/14
20140097930
new patent Structure and method for a transformer with magnetic features
The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates.
04/10/14
20140097911
new patent Semiconductor device
A device, comprising an output terminal; an output circuit coupled to the output terminal and having an adjustable impedance; and an impedance adjustment circuit adjusting stepwise the adjustable impedance so as to head toward a first reference impedance. The impedance adjustment circuit changes the adjustable impedance by a first amount when the adjustable impedance is within a first range, and changes the adjustable impedance by a second amount when the adjustable impedance is out of the first range.
04/10/14
20140097886
new patent Systems, methods, and apparatus for controlling power semiconductor devices
Systems, methods, and apparatus for controlling power semiconductor devices are described. According to one embodiment of the disclosure, there is disclosed a system.
04/10/14
20140097876
new patent Gate driving circuit and method for driving semiconductor device
A gate driving circuit and method can improve the tradeoff relation between the noise and the loss caused in the turn-off switching of semiconductor device. The gate driving circuit includes first and second series circuits.
04/10/14
20140097864
new patent Semiconductor device test structures and methods
Semiconductor device test structures and methods are disclosed. In a preferred embodiment, a test structure includes a feed line disposed in a first conductive material layer, and a stress line disposed in the first conductive material layer proximate the feed line yet spaced apart from the feed line.
04/10/14
20140097863
new patent Test method and test arrangement
A test method in accordance with one or more embodiments may include: providing a semiconductor device to be tested, the semiconductor device including at least one device cell, the at least one device cell having at least one trench, at least one first terminal electrode region and at least one second terminal electrode region, at least one gate electrode, and at least one additional electrode disposed at least partially in the at least one trench, wherein an electrical potential of the at least one additional electrode may be controlled separately from electrical potentials of the at least one first terminal electrode region, the at least one second terminal electrode region and the at least one gate electrode; and applying at least one electrical test potential to at least the at least one additional electrode to detect defects in the at least one device cell.. .
04/10/14
20140097861
new patent Semiconductor device and test method
A semiconductor device includes a semiconductor substrate including an element region, an inner sealing and an outer sealing which are formed on the element region and have a first opening part and a second opening part, respectively, a multilayer interconnection structure which is formed on the substrate and stacks multiple inter-layer insulation films each including a wiring layer, a moisture resistant film formed between a first inter-layer insulation film and a second inter-layer insulation film which are included in the multilayer interconnection structure, a first portion which extended from a first side of the moisture resistant film and passes the first opening part, a second portion which extended from a second side of the moisture resistant film and passes through the second opening part, and a wiring pattern including a via plug which penetrates the moisture resistant film and connects the first portion and the second portion.. .
04/10/14
20140097548
new patent Semiconductor device connected by anisotropic conductive adhesive film
A semiconductor device connected using an anisotropic conductive adhesive composition, the anisotropic conductive adhesive composition including a thermosetting polymerization initiator; and tetrahydrofurfuryl (meth)acrylate or furfuryl (meth)acrylate, wherein the tetrahydrofurfuryl (meth)acrylate or furfuryl (meth)acrylate is present in the composition in an amount of 1 wt % to 25 wt %, based on the total weight of the composition in terms of solid content.. .
04/10/14
20140097547
new patent Semiconductor device
This invention is to improve noise immunity to the power supply and ground of a wiring board and a second semiconductor chip in an interior of a semiconductor device. A first semiconductor chip is mounted over a wiring board, and a second semiconductor chip is mounted in a central part located over the first semiconductor chip.
04/10/14
20140097546
new patent Multi-function and shielded 3d interconnects
A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices.
04/10/14
20140097538
new patent Semiconductor device having a self-forming barrier layer at via bottom
An approach for forming a semiconductor device is provided. In general, the device is formed by providing a metal layer, a cap layer over the metal layer, and an ultra low k layer over the cap layer.
04/10/14
20140097521
new patent Silicon on nothing devices and methods of formation thereof
In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate.
04/10/14
20140097520
new patent Methods of forming an array of openings in a substrate, related methods of forming a semiconductor device structure, and a related semiconductor device structure
A method of forming an array of openings in a substrate. The method comprises forming a template structure comprising a plurality of parallel features and a plurality of additional parallel features perpendicularly intersecting the plurality of additional parallel features of the plurality over a substrate to define wells, each of the plurality of parallel features having substantially the same dimensions and relative spacing as each of the plurality of additional parallel features.
04/10/14
20140097519
new patent Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes forming a first semiconductor wafer, in which a circuit part and a first bonding layer are stacked, on a first semiconductor substrate, forming a second semiconductor wafer, which includes structures and an insulating layer for gap-filling between the structures, on a second semiconductor substrate, the structures including a pillar and bit lines stacked therein, bonding the first semiconductor wafer with the second semiconductor wafer so that the first bonding layer faces the insulating layer, and separating the second semiconductor substrate from the bonded second semiconductor wafer.. .
04/10/14
20140097517
new patent Semiconductor device having localized charge balance structure and method
In one embodiment, a semiconductor substrate is provided having a localized superjunction structure extending from a major surface. A doped region is then formed adjacent the localized superjunction structure to create a charge imbalance therein.
04/10/14
20140097513
new patent Package-on-package type package including integrated circuit devices and associated passive components on different levels
A package-on-package (pop)-type package includes a first semiconductor package having a first passive element and a first semiconductor device mounted on a first substrate, and a second semiconductor package having a second semiconductor device mounted on a second substrate. The first passive element is electrically connected to the second semiconductor device.
04/10/14
20140097507
new patent Semiconductor device having a metal gate and fabricating method thereof
The present invention provides a method of forming a semiconductor device having a metal gate. A substrate is provided and a gate dielectric and a work function metal layer are formed thereon, wherein the work function metal layer is on the gate dielectric layer.
04/10/14
20140097505
new patent Semiconductor device having nitride layers
According to one embodiment, a second nitride semiconductor layer is provided on a first nitride semiconductor layer and has a band gap wider than that of the first nitride semiconductor layer. A third nitride semiconductor layer is provided above the second nitride semiconductor layer.
04/10/14
20140097502
new patent Semiconductor device and fabricating method thereof
A semiconductor device has gate-all-around devices formed in respective regions on a substrate. The gate-all-around devices have nanowires at different levels.
04/10/14
20140097500
new patent Semiconductor device
A semiconductor device includes a first planar semiconductor (e.g., silicon) layer, first and second pillar-shaped semiconductor (e.g., silicon) layers, a first gate insulating film, a first gate electrode, a second gate insulating film, a second gate electrode, a first gate line connected to the first and second gate electrodes, a first n-type diffusion layer, a second n-type diffusion layer, a first p-type diffusion layer, and a second p-type diffusion layer. A center line extending along the first gate line is offset by a first predetermined amount from a line connecting a center of the first pillar-shaped semiconductor layer and a center of the second pillar-shaped semiconductor layer..
04/10/14
20140097497
new patent Spacer design to prevent trapped electrons
Charge-trapping field effect transistors may be formed into an array on a wafer suitable to be a nand memory device. A thick oxide layer is applied over the gates to ensure that the gap between the gates is filled.
04/10/14
20140097494
new patent Method for producing semiconductor device and semiconductor device
A method for producing a semiconductor device includes forming a fin-shaped silicon layer, a first insulating film around the fin-shaped silicon layer, a pillar-shaped silicon layer on the fin-shaped silicon layer, a gate electrode and a gate insulating film around the pillar-shaped silicon layer, a gate line connected to the gate electrode, a first diffusion layer in an upper portion of the pillar-shaped silicon layer, a second diffusion layer in a lower portion of the pillar-shaped silicon layer and an upper portion of the fin-shaped silicon layer, and a first silicide and a second silicide on the first diffusion layer and the second diffusion layer; an interlayer insulating film to expose an upper portion of the pillar-shaped silicon layer; etching the interlayer insulating film to form a contact hole; depositing a metal to form the first contact on the second silicide; and performing etching to form the metal wire.. .
04/10/14
20140097490
new patent Semiconductor device
A semiconductor substrate of a semiconductor device includes a body region of a first conductivity type, a drift region of a second conductivity type coming into contact with a lower surface of the body region, a gate electrode that is provided in a gate trench passing through the body region and extending to the drift region and faces the body region, and a gate insulator that is provided between the gate electrode and a wall surface of the gate trench. An inverted u-shaped section is formed in a lower surface of the gate insulator, and a floating region of the first conductivity type is formed in the inverted u-shaped section.
04/10/14
20140097489
new patent Semiconductor device having localized charge balance structure and method
In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve eas characteristics.
04/10/14
20140097488
new patent Method for producing a semiconductor device and field-effect semiconductor device
A method for producing a semiconductor device is provided. The method includes providing a wafer including a main surface and a silicon layer arranged at the main surface and having a nitrogen concentration of at least about 3*1014 cm−3, and partially out-diffusing nitrogen to reduce the nitrogen concentration at least close to the main surface.
04/10/14
20140097487
new patent Plasma doping a non-planar semiconductor device
In plasma doping a non-planar semiconductor device, a substrate having a non-planar semiconductor body formed thereon is obtained. The substrate having the non-planar semiconductor body may be placed into a chamber.
04/10/14
20140097484
new patent Vertical type memory device
A semiconductor device, comprising: a plurality of memory cell strings; a bitline; and an interconnection coupling at least two of the memory cell strings to the bitline. Memory cell strings can be coupled to corresponding bitlines through corresponding interconnections.
04/10/14
20140097473
new patent Semiconductor device
A semiconductor device includes: an electron transit layer formed on a substrate and of a group iii nitride-based compound semiconductor; an electron supply layer formed on the electron transit layer and of a group iii nitride-based compound semiconductor having a higher band gap energy than the transit layer; a field plate layer formed on the supply layer, formed of a non-p-type group iii nitride-based compound semiconductor, and having a lower band gap energy than the supply layer; a first electrode forming an ohmic contact with a two-dimensional electron gas layer in the transit layer at an interface thereof with the supply layer; and a second electrode forming a schottky contact with the electron gas layer. The second electrode forms an ohmic contact, at a side wall of the field plate layer, with two-dimensional hole gas in the field plate layer at an interface thereof with the supply layer..
04/10/14
20140097471
new patent Active area shaping of iii-nitride devices utilizing a field plate defined by a dielectric body
In an exemplary implementation, a iii-nitride semiconductor device includes a iii-nitride heterojunction including a first iii-nitride body situated over a second iii-nitride body to form a two-dimensional electron gas. The iii-nitride semiconductor device further includes a gate well formed in a dielectric body, the dielectric body situated over the iii-nitride heterojunction.
04/10/14
20140097469
new patent Hydrogen mitigation schemes in the passivation of advanced devices
Embodiments of a silicon nitride (sin) passivation structure for a semiconductor device and methods of fabrication thereof are disclosed. In general, a semiconductor device includes a semiconductor body and a sin passivation structure over a surface of the semiconductor body.
04/10/14
20140097468
new patent Nitride semiconductor device and method for manufacturing same
A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer (1) located over the substrate; a second nitride semiconductor layer (2) located over the first nitride semiconductor layer (1), having a larger band gap than the first nitride semiconductor layer (1), and having a recess (11) penetrating into the first nitride semiconductor layer (1); and a third nitride semiconductor layer (12) continuously covering the second nitride semiconductor layer (2) and the recess (11), and having a larger band gap than the first nitride semiconductor layer (1); a gate electrode (5) located above a portion of the third nitride semiconductor layer (12) over the recess (11); and a first ohmic electrode (4a) and a second ohmic electrode (4b) located on opposite sides of the gate electrode (5).. .
04/10/14
20140097466
new patent Semiconductor device and method for manufacturing the semiconductor device
A semiconductor device includes a p-type collector region, a drift region arranged on the collector region, a base region arranged on the drift region, an emitter region arranged on the base region, a gate oxide film arranged on the bottom surface and side surface of a trench which penetrates the emitter region and the base region, and a gate electrode embedded in the inside of the trench so as to be opposed to the base region while interposing the gate oxide film therebetween, wherein the position of the lower surface of the base region is shallower in the region brought into contact with the gate oxide film than in the region spaced apart from the gate oxide film.. .
04/10/14
20140097465
new patent Silicon controlled rectifier (scr) device for bulk finfet technology
Some aspects relate to a semiconductor device disposed on a semiconductor substrate. The device includes an sti region that laterally surrounds a base portion of a semiconductor fin.
04/10/14
20140097457
new patent Semiconductor device
A semiconductor device includes a substrate and a semiconductor unit. The substrate includes a base and at least one pattern unit.
04/10/14
20140097455
new patent Semiconductor device and display apparatus
A semiconductor device according to an aspect of the present invention includes: a semiconductor layer including a channel region and a contact region; a pattern of a first conducting layer disposed at a position which overlaps with the channel region; a gate line formed in one of a second conducting layer or a third conducting layer, and connected to the pattern of the first conducting layer; and a source line formed in the other of the second conducting layer and the third conducting layer, and connected to the contact region.. .
04/10/14
20140097451
new patent Proximity sensor and circuit layout method thereof
A proximity sensor and a circuit layout method thereof are disclosed. The proximity sensor includes a light sensor and a light emitting unit.
04/10/14
20140097449
new patent Semiconductor device
According to one embodiment, a semiconductor device includes a semiconductor layer, an electrode, and an insulating portion. The semiconductor layer has a first surface.
04/10/14
20140097448
new patent Semiconductor device and method of manufacturing the same
A semiconductor device includes a drift layer including a trench formed on a semiconductor substrate. A well in the drift layer overlaps an edge of the trench, and at least one gate electrode is formed at this overlapping edge region.
04/10/14
20140097447
new patent Semiconductor device and method of manufacturing the same
Disclosed herein is a semiconductor device and method of manufacturing the semiconductor, including an n type buffer layer disposed on a first surface of an n+ type silicon carbide substrate, an n− type epitaxial layer disposed on the n type buffer layer, a first type of trench disposed on each side of a second type of trench, wherein the trenches are disposed in the n− type epitaxial layer, an n+ region disposed on the n− type epitaxial layer, a p+ region disposed in each first type of trench, a gate insulating layer disposed in the second trench, a gate material disposed on the gate insulating layer, an oxidation layer disposed on the gate material, a source electrode disposed on the n+ region, oxidation layer, and p+ region, and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate.. .
04/10/14
20140097445
new patent Semiconductor device
A transistor sel is formed by using a compound semiconductor layer (channel layer cnl). The channel layer cnl is formed over a buffer layer buf.
04/10/14
20140097444
new patent Nitride semiconductor device
A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate.
04/10/14
20140097443
new patent Nitride semiconductor device
A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor stacked layer, a light-emitting layer and a second type nitride semiconductor layer. The nucleation layer is disposed on the silicon substrate.
04/10/14
20140097442
new patent Nitride semiconductor device
A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate.
04/10/14
20140097441
new patent Devices, systems, and methods related to removing parasitic conduction in semiconductor devices
Semiconductor devices and methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a stack of semiconductor materials from an epitaxial substrate, where the stack of semiconductor materials defines a heterojunction, and where the stack of semiconductor materials and the epitaxial substrate further define a bulk region that includes a portion of the semiconductor stack adjacent the epitaxial substrate.
04/10/14
20140097433
new patent Semiconductor device and method of manufacturing the device
A semiconductor device includes a substrate; a carrier traveling layer formed on the substrate, made of first group iii nitride semiconductor, and containing carriers traveling in a direction along a principal surface of the substrate; a barrier layer formed on the carrier traveling layer and made of second group iii nitride semiconductor having a wider band gap than the first group iii nitride semiconductor; and an electrode formed on the barrier layer. The device further includes a cap layer formed on the barrier layer at a side of the electrode, and made of third group iii nitride semiconductor containing a mixture of single crystals and polycrystals..
04/10/14
20140097431
new patent Semiconductor devices and processing methods
A method for processing a semiconductor device in accordance with various embodiments may include: providing a semiconductor device having a first pad and a second pad electrically disconnected from the first pad; applying at least one electrical test potential to at least one of the first pad and the second pad; and electrically connecting the first pad and the second pad to one another after applying the at least one electrical test potential.. .
04/10/14
20140097428
new patent Oxide semiconductor film, transistor, and semiconductor device
To provide an oxide semiconductor film which has high stability and does not easily cause variation in electric characteristics of a transistor, a transistor including the oxide semiconductor film in its channel formation region, and a highly reliable semiconductor device including the transistor. The oxide semiconductor film including indium includes a crystal part whose c-axis is substantially perpendicular to a surface of the oxide semiconductor film.
04/10/14
20140097390
new patent Thick film silver paste and its use in the manufacture of semiconductor devices
The present invention is directed to an electroconductive silver thick film paste composition comprising ag particles and a bi—cu—b—zn-based glass frit dispersed in an organic medium. The present invention is further directed to an electrode formed from the paste composition and a semiconductor device and, in particular, a solar cell comprising such an electrode.
04/10/14
20140097004
new patent Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
A three-dimensional structure in which a wiring is provided on a surface is provided. At least a part of the surface of the three-dimensional structure includes an insulating layer containing filler.


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