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Semiconductor Device patents



      
           
This page is updated frequently with new Semiconductor Device-related patent applications. Subscribe to the Semiconductor Device RSS feed to automatically get the update: related Semiconductor RSS feeds. RSS updates for this page: Semiconductor Device RSS RSS


Substrate processing device, method for manufacturing semiconductor device, and vaporizer

Substrate processing device, method for manufacturing semiconductor device, and vaporizer

Phase shift mask, method of forming asymmetric pattern, method of manufacturing diffraction grating, and method of…

Phase shift mask, method of forming asymmetric pattern, method of manufacturing diffraction grating, and method of…

Phase shift mask, method of forming asymmetric pattern, method of manufacturing diffraction grating, and method of…

Method for manufacturing semiconductor device

Date/App# patent app List of recent Semiconductor Device-related patents
10/09/14
20140303335
 Diketopyrrolopyrrole polymers for use in organic semiconductor devices patent thumbnailDiketopyrrolopyrrole polymers for use in organic semiconductor devices
The present invention relates to polymers comprising one or more (repeating) unit(s) of the formula (i) which are characterized in that ar1 and ar1′ are independently of each other are an annulated (aromatic) heterocyclic ring system, containing at least one thiophene ring, which may be optionally substituted by one, or more groups, and their use as organic semiconductor in organic devices, especially in organic photovoltaics (solar cells) and photodiodes, or in a device containing a diode and/or an organic field effect transistor. The polymers according to the invention have excellent solubility in organic solvents and excellent film-forming properties.
10/09/14
20140302687
 Substrate processing device, method for manufacturing semiconductor device, and vaporizer patent thumbnailSubstrate processing device, method for manufacturing semiconductor device, and vaporizer
A substrate processing apparatus includes: a reaction chamber configured to process a substrate; a vaporizer including a vaporization container into which a processing liquid including hydrogen peroxide or hydrogen peroxide and water is supplied, a processing liquid supply unit configured to supply the processing liquid to the vaporization container, and a heating unit configured to heat the vaporization container; a gas supply unit configured to supply a processing gas generated by the vaporizer into the reaction chamber; an exhaust unit configured to exhaust an atmosphere in the reaction chamber; and a control unit configured to control the heating unit and the processing liquid supply unit such that the processing liquid supply unit supplies the processing liquid to the vaporization container while the heating unit heats the vaporization container.. .
10/09/14
20140302679
 Phase shift mask, method of forming asymmetric pattern, method of manufacturing diffraction grating, and method of manufacturing semiconductor device patent thumbnailPhase shift mask, method of forming asymmetric pattern, method of manufacturing diffraction grating, and method of manufacturing semiconductor device
A technique of forming an asymmetric pattern by using a phase shift mask, and further, techniques of manufacturing a diffraction grating and a semiconductor device, capable of improving accuracy of a product and capable of shortening manufacturing time. In a method of manufacturing a diffraction grating by using a phase shift mask (in which a light shield part and a light transmission part are periodically arranged), light emitted from an illumination light source is transmitted through the phase shift mask, and a photoresist on a surface of a si wafer is exposed by providing interference between zero diffraction order light and positive first diffraction order light which are generated by the transmission through this phase shift mask onto the surface of the si wafer, and a diffraction grating which has a blazed cross-sectional shape is formed on the si wafer..
10/09/14
20140302670
 Method for manufacturing semiconductor device patent thumbnailMethod for manufacturing semiconductor device
The number of masks and photolithography processes used in a manufacturing process of a semiconductor device are reduced. A first conductive film is formed over a substrate; a first insulating film is formed over the first conductive film; a semiconductor film is formed over the first insulating film; a semiconductor film including a channel region is formed by etching part of the semiconductor film; a second insulating film is formed over the semiconductor film; a mask is formed over the second insulating film; a first portion of the second insulating film that overlaps the semiconductor film and second portions of the first insulating film and the second insulating film that do not overlap the semiconductor film are removed with the use of the mask; the mask is removed; and a second conductive film electrically connected to the semiconductor film is formed over at least part of the second insulating film..
10/09/14
20140302669
 Pillar structure having a non-planar surface for semiconductor devices patent thumbnailPillar structure having a non-planar surface for semiconductor devices
A conductive pillar for a semiconductor device is provided. The conductive pillar is formed such that a top surface is non-planar.
10/09/14
20140302668
 Semiconductor device and manufacturing method thereof patent thumbnailSemiconductor device and manufacturing method thereof
An improvement is achieved in the performance of semiconductor device including a nonvolatile memory. In a split-gate nonvolatile memory, between a memory gate electrode and a p-type well and between a control gate electrode and the memory gate electrode, an insulating film is formed.
10/09/14
20140302667
 Method of manufacturing a semiconductor device including an edge area patent thumbnailMethod of manufacturing a semiconductor device including an edge area
A method of manufacturing a semiconductor device includes providing a doped layer containing a first dopant of a first conductivity type and forming a counter-doped zone in the doped layer in an edge area surrounding an element area of the semiconductor device. The counter-doped zone contains at least the first dopant and a second dopant of a second conductivity type which is the opposite of the first conductivity type.
10/09/14
20140302663
 Semiconductor device with isolation layer, electronic device having the same, and method for fabricating the same patent thumbnailSemiconductor device with isolation layer, electronic device having the same, and method for fabricating the same
A semiconductor device with an isolation layer buried in a trench includes an interface layer formed on the surface of the trench, a buffer layer formed in the interface layer at a bottom corner of the trench, a liner layer formed over the interface layer, and a gap-fill layer gap-filling the trench over the liner layer. The trench includes a micro-trench formed at the bottom corner thereof, and the buffer layer fills the micro-trench..
10/09/14
20140302662
 Method of manufacturing semiconductor device patent thumbnailMethod of manufacturing semiconductor device
A method of manufacturing a semiconductor device is disclosed, which can completely remove hard mask residues left along boundaries between a high-voltage device region and sti structures after a dry etch process, by partially reducing a thickness of each of the exposed portion of the respective sti structures adjacent to the high-voltage device region so as to sufficiently expose the residues. As a result, after a portion of an underlying pad oxide corresponding to the high-voltage device region is removed in a subsequent process, the exposed surface of the substrate is uniform with a smooth and clear border.
10/09/14
20140302657
 Method for fabricating power semiconductor device patent thumbnailMethod for fabricating power semiconductor device
A substrate having thereon an epitaxial layer is provided. A hard mask having an opening is formed on the epitaxial layer.
10/09/14
20140302654
Mos device and method of manufacturing the same
A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving ron-sp and bvd characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate.
10/09/14
20140302652
Semiconductor device and method of fabricating the same
A method of manufacturing a semiconductor device, a semiconductor device and systems incorporating the same include transistors having a gate metal doped with impurities. An altered work function of the transistor may alter a threshold voltage of the transistor.
10/09/14
20140302651
Method for manufacturing semiconductor device with first and second gates over buried bit line
A semiconductor device and a method for manufacturing the same are provided. The method includes forming a cell structure where a storage node contact is coupled to a silicon layer formed over a gate, thereby simplifying the manufacturing process of the device.
10/09/14
20140302650
Charge storage apparatus and methods
Methods of forming multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, an opening is formed in a tier of semiconductor material and a tier of dielectric.
10/09/14
20140302649
Semiconductor field-effect transistor, memory cell and memory device
Semiconductor device formed by a first conductive strip of semiconductor material; a control gate region of semiconductor material, facing a channel portion of the first conductive strip, and an insulation region arranged between the first conductive strip and the control gate region. The first conductive strip includes a conduction line having a first conductivity type and a control line having a second conductivity type, arranged adjacent and in electrical contact with each other, and the conduction line forms the channel portion, a first conduction portion and a second conduction portion arranged on opposite sides of the channel portion..
10/09/14
20140302646
Method of manufacturing semiconductor device
A performance and reliability of a semiconductor device are improved. On a semiconductor substrate, a gate electrode for a first misfet and a dummy gate electrode for a second misfet are formed, and then, an insulating film is partially formed on the gate electrode.
10/09/14
20140302644
Method for manufacturing semiconductor device
The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a silicic substrate; depositing a nickel-based metal layer on the substrate and the gate stacked structure; performing a first annealing so that the silicon in the substrate reacts with the nickel-based metal layer to form a ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the ni-rich phase of metal silicide; performing a second annealing so that the ni-rich phase of metal to silicide is transformed into a nickel-based metal silicide source/drain, and meanwhile, forming a segregation region of the doping ions at an interface between the nickel-based metal silicide source/drain and the substrate. The method for manufacturing the semiconductor device according to the present invention performs the annealing after implanting the doping ions into the ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the sbh between the nickel-based metal silicide and the silicon channel is effectively reduced, and the driving capability of the device is improved..
10/09/14
20140302639
Semiconductor device, display device, and electronic appliance
To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted.
10/09/14
20140302638
Semiconductor device and manufacturing method thereof
A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer.
10/09/14
20140302628
Optical semiconductor device and method of manufacturing optical semiconductor device
A method of manufacturing an optical semiconductor device including: forming a mesa structure including a first conductivity type cladding layer, an active layer and a second conductivity type cladding layer in this order on a first conductivity type semiconductor substrate, an upper most surface of the mesa structure being constituted of an upper face of the second conductivity type cladding layer; growing a first burying layer burying both sides of the mesa structure at higher position than the active layer; forming an depressed face by etching both edges of the upper face of the second conductivity type cladding layer; and growing a second burying layer of the first conductivity type on the depressed face of the second conductivity type cladding layer and the first burying layer.. .
10/09/14
20140302622
Semiconductor device and method for manufacturing the same
A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer.
10/09/14
20140302621
Semiconductor device and manufacturing method therefor
A semiconductor device manufacturing method is disclosed by which electron beam irradiation is accomplished at a low cost while exhibiting uniform characteristics. A wafer stack consisting of multiple stacked wafers is irradiated with an electron beam from both the front surface and reverse surface.
10/09/14
20140302428
Mask for fabricating semiconductor device and method of fabricating the mask
A photo-mask for fabricating a semiconductor device may include a transparent substrate including a main region, a supplementary region adjacent to the main region, a main pattern for developing circuits in a semiconductor device provided on the main region of the transparent substrate, and a supplementary pattern for optical proximity correction provided on the supplementary region of the transparent substrate. The main pattern has a sidewall perpendicular to a surface of the transparent substrate, and the supplementary pattern has a sidewall inclined to the surface of the transparent substrate and an upward tapered structure..
10/09/14
20140301127
Semiconductor device and electronic device including the same
A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers..
10/09/14
20140301058
Wiring substrate and semiconductor device
A wiring substrate includes a first insulation layer, a first wiring layer formed on the first insulation layer, and a second insulation layer stacked on the first insulation layer. The second insulation layer covers the first insulation layer and includes a filler.
10/09/14
20140300783
Method for driving semiconductor device
The resolution of a low-resolution image is made high and a stereoscopic image is displayed. Resolution is made high by super-resolution processing.
10/09/14
20140300410
Cascoded semiconductor devices
The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line.
10/09/14
20140300408
Semiconductor device having a complementary field effect transistor
A method for controlling power supply current in a cmos circuit, the method including applying a first predetermined voltage to a diode connected n-channel replica transistor, the n-channel replica transistor operating in weak inversion, applying a first substrate voltage to the substrate of the n-channel replica transistor so that the current flowing in the n-channel replica transistor equals a first predetermined target current, and applying the first substrate voltage to substrates of n-channel transistors in the cmos circuit. .
10/09/14
20140300404
Rf mems isolation, series and shunt dvc, and small mems
The present invention generally relates to an architecture for isolating an rf mems device from a substrate and driving circuit, series and shunt dvc die architectures, and smaller mems arrays for high frequency communications. The semiconductor device has one or more cells with a plurality of mems devices therein.
10/09/14
20140300399
Pulse generation circuit and semiconductor device
Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every m rows.
10/09/14
20140300006
Conductive structures, systems and devices including conductive structures and related methods
Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the plurality of conductive steps and insulated from at least another one of the conductive steps. Devices may include such conductive structures.
10/09/14
20140300005
Multilevel interconnect structures and methods of fabricating same
A multilevel interconnect structure for a semiconductor device includes an intermetal dielectric layer with funnel-shaped connecting vias. The funnel-shaped connecting vias are provided in connection with systems exhibiting submicron spacings.
10/09/14
20140300003
Semiconductor device and interconnect substrate
A semiconductor substrate includes a semiconductor chip and an interconnect substrate. The interconnect substrate has an interconnect region between a first main surface formed with plural orderly arranged first and second signal electrodes connected to the semiconductor chip, and a second main surface.
10/09/14
20140300002
Semiconductor device and method of forming conductive vias using backside via reveal and selective passivation
A semiconductor device includes a plurality of semiconductor die and a plurality of conductive vias formed in the semiconductor die. An insulating layer is formed over the semiconductor die while leaving the conductive vias exposed.
10/09/14
20140300000
Semiconductor device and method
A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer, a hard mask layer over the dielectric layer, and a capping layer over the hard mask layer.
10/09/14
20140299996
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66.
10/09/14
20140299995
Wiring device for semiconductor device, composite wiring device for semiconductor device, and resin-sealed semiconductor device
A wiring device for a semiconductor device, a composite wiring device for a semiconductor device and a resin-sealed semiconductor device are provided, each of which is capable of mounting thereon a semiconductor chip smaller than conventional chips and being manufactured at lower cost. The wiring device connects an electrode on a semiconductor chip with an external wiring device, and has an insulating layer, a metal substrate and a copper wiring layer.
10/09/14
20140299994
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66.
10/09/14
20140299993
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66.
10/09/14
20140299990
Semiconductor device
The semiconductor device of the present invention includes an insulating layer, a copper wiring for wire connection formed on the insulating layer, a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper, a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface for a wire, and a side protecting layer covering a side surface of the copper wiring, wherein the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer.. .
10/09/14
20140299989
Semiconductor device with air gap and method for fabricating the same
A semiconductor device includes a first conductive structure including a first conductive pattern that is formed over a substrate, a second conductive structure formed adjacent to a sidewall of the first conductive structure, and an insulation structure including an air gap that is formed between the first conductive structure and the second conductive structure, wherein the second conductive structure includes a second conductive pattern, an ohmic contact layer that is formed over the second conductive pattern, and a third conductive pattern that is formed over the ohmic contact layer and is separated from the first conductive pattern through the air gap.. .
10/09/14
20140299987
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66.
10/09/14
20140299986
Semiconductor device manufacturing method and semiconductor device
A plurality of protruding electrodes of a semiconductor chip are in contact with a plurality of electrodes formed on a semiconductor substrate, via a plurality of solder sections. In this state, the solder sections are melted so as to form a plurality of solder bonding sections joined to the protruding electrodes of the semiconductor chip and the electrodes of the semiconductor substrate.
10/09/14
20140299984
Chip and manufacturing method thereof
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device has an active surface.
10/09/14
20140299983
Joint structure and semiconductor device storage package
A joint structure includes: a ceramic member; a metallized layer formed on a surface of the ceramic member; and a metal member joined to the metallized layer via a brazing material. The metal member includes a base part erected on the metallized layer, and an extended part extended from the base part to define a predetermined gap with respect to the metallized layer.
10/09/14
20140299982
Semiconductor device and method of manufacturing the same
A semiconductor device includes a package 1, a block-module 2, and a control board 3 for controlling power semiconductor elements 11a. The block-module 2 has embedded power semiconductor elements 11a and second leads 4b and first leads 4a that are drawn from the block-module 2.
10/09/14
20140299979
Semiconductor device and a method for manufacturing a semiconductor device
The reliability of a semiconductor device is improved. A semiconductor device has a first metal plate and a second metal plate electrically isolated from the first metal plate.
10/09/14
20140299977
Semiconductor device
A semiconductor device includes: a lead frame; an ic element mounted on a main face of the lead frame; an inductor mounted on a back face of the lead frame; and a resin body configured to seal the lead frame, the ic element and the inductor, wherein the inductor and the lead frame are closely contacted with each other, wherein the ic element is disposed at a position corresponding to an center axis of the inductor, wherein the inductor and the ic element are electrically connected to each other, and wherein wiring of main current flowing through the ic element is disposed between terminals of the inductor.. .
10/09/14
20140299972
Semiconductor device having a through contact
A semiconductor device includes a semiconductor substrate having a first side and a second side opposite the first side, an active area and a through contact area, the active area including a transistor structure having a control electrode, the through contact area including a semiconductor mesa having insulated sidewalls. The semiconductor device further includes a first metallization on the first side in the active area and a recess extending from the first side into the semiconductor substrate and between the active area and the through contact area and including in the through contact area a horizontally widening portion, the recess being at least partly filled with a conductive material forming a first conductive region in ohmic contact with the semiconductor mesa and the transistor structure.
10/09/14
20140299971
Methods of forming a reversed pattern in a substrate, and related semiconductor device structures
A method of forming a reversed pattern in a substrate. A resist on a substrate is exposed and developed to form a pattern therein, the patterned resist having a first polarity.
10/09/14
20140299968
Semiconductor devices and fabrication methods
A method of making a semiconductor device comprises : providing a semiconductor wafer having a semiconductor layer; forming a first mask layer over the semiconductor layer; forming a second mask layer over the first mask layer; annealing the second mask layer to form islands; etching through the first mask layer and the semiconductor layer using the islands as a mask to form an array of pillars; and growing semiconductor material between the pillars and then over the tops of the pillars.. .
10/09/14
20140299965
Semiconductor device and method for manufacturing the same
After the formation of a first interlayer insulating, an etching stopper film made of sion is formed thereon. Subsequently, a contact hole extending from the upper surface of the etching stopper film and reaching a high concentration impurity region is formed, and a first plug is formed by filling w into the contact hole.
10/09/14
20140299962
Semiconductor device and manufacturing method thereof
A semiconductor device includes: a layer of a first conductivity type; a well of a second conductivity type on the layer of the first conductivity type in an active region; and a flat resurf layer of the second conductivity type on the layer of the first conductivity type on an outer circumference of the well as a termination structure. The resurf layer includes a low concentration layer arranged at an inner end on the well side and an outer end on the outer circumferential side, and a high concentration layer arranged between the inner end and the outer end and having a higher impurity concentration than the low concentration layer..
10/09/14
20140299961
Semiconductor device and method for manufacturing the same
A semiconductor device which solves the following problem of a super junction structure: due to a relatively high concentration in the body cell region (active region), in peripheral areas (peripheral regions or junction end regions), it is difficult to achieve a breakdown voltage equivalent to or higher than in the cell region through a conventional junction edge terminal structure or resurf structure. The semiconductor device includes a power mosfet having a super junction structure formed in the cell region by a trench fill technique.
10/09/14
20140299960
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66.
10/09/14
20140299958
Semiconductor device and method of manufacturing the same
A method of manufacturing a semiconductor device, includes forming a trench in a semiconductor substrate having a first face and a second face by processing the first face of the semiconductor substrate, the trench including a first portion and a second portion located between the first portion and a plane including a first face, filling an insulator in the second portion such that a space remains in the first portion and the trench is closed, and forming a plurality of elements between the first face and the second face, wherein the space and the insulator form element isolation.. .
10/09/14
20140299946
Semiconductor device
A semiconductor device concerning an embodiment is provided with a semiconductor layer, an impurity-doped layer selectively formed on the semiconductor layer, and a drain electrode formed on the impurity-doped layer. The semiconductor device is further provided with a source electrode which is formed and isolated from the drain electrode, and a gate electrode which is formed between the source electrode and the drain electrode.
10/09/14
20140299942
Semiconductor device having fin structure and method of manufacturing the same
In a semiconductor device, a thin wall oxide film formed over sidewalls of an active region is formed, and a portion of the wall oxide film adjacent to a gate region is removed. A gate insulating film is formed where the portion of wall oxide film was removed to prevent a parasitic transistorfrom being generated by the wall oxide film..
10/09/14
20140299939
Semiconductor device
Provided are a semiconductor device and a fabricating method of the semiconductor device. The semiconductor device may include an interlayer dielectric film formed on a substrate and including a trench, a gate insulating film formed in the trench, a first work function control film formed on the gate insulating film of the trench along bottom and sidewalls of the trench, a first metal gate pattern formed on the first work function control film of the trench and filling a portion of the trench, and a second metal gate pattern formed on the first metal gate pattern of the trench, the second metal gate pattern different from the first metal gate pattern..
10/09/14
20140299938
Methods and devices for enhancing mobility of charge carriers
Methods and devices for enhancing mobility of charge carriers. An integrated circuit may include semiconductor devices of two types.
10/09/14
20140299937
Spacer structures of a semiconductor device
A method of fabricating a semiconductor device includes forming a first set of gate electrodes over a substrate, adjacent gate electrodes of the first set of gate electrodes being separated by a first gap width. Each gate electrode of the first set of gate electrodes has a first gate width.
10/09/14
20140299936
Integrated circuit devices and fabrication techniques
Integrated circuit devices and fabrication techniques. A semiconductor device fabrication method may include doping, in a same processing step, first and second portions of a substrate of an integrated circuit.
10/09/14
20140299935
Shallow trench isolation for soi structures combining sidewall spacer and bottom liner
A method for making a semiconductor device is provided which includes (a) providing a layer stack comprising a semiconductor layer (211) and a dielectric layer (209) disposed between the substrate and the semiconductor layer, (b) creating a trench (210) which extends through the semiconductor layer and which exposes a portion of the dielectric layer, the trench having a sidewall, (c) creating a spacer structure (221) which comprises a first material and which is adjacent to the sidewall of the trench, and (d) forming a stressor layer (223) which comprises a second material and which is disposed on the bottom of the trench.. .
10/09/14
20140299934
Semiconductor device and method for fabricating the same
Provided is a semiconductor device. The semiconductor device includes a fin on a substrate; a gate electrode cross the fin on the substrate; a source/drain formed on at least one of both sides of the gate electrode, and including a first film and a second film; and a stress film arranged between an isolation film on the substrate and the source/drain, and formed on a side surface of the fin..
10/09/14
20140299932
Semiconductor device including a gate trench and a source trench
A semiconductor device includes a source trench extending into a semiconductor body from a first surface of the semiconductor body. A source trench dielectric and a source trench electrode are in the source trench.
10/09/14
20140299928
Semiconductor device and method of forming the same
A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove.
10/09/14
20140299926
Semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device comprises forming a first layer on an impurity diffusion region in a semiconductor substrate by a selective epitaxial growth method, forming a second layer on the first layer by the selective epitaxial growth method, forming a contact hole penetrating an interlayer insulating film in a thickness direction thereof and reaching the second layer, and filling a conductive material into the contact hole to form a contact plug including the first and second layers and the conductive material.. .
10/09/14
20140299919
Semiconductor device and method for manufacturing the same
A semiconductor device and a method for manufacturing the same are provided. In one embodiment, the method comprises: growing a first epitaxial layer on a substrate; forming a sacrificial gate stack on the first epitaxial layer; selectively etching the first epitaxial layer; growing and in-situ doping a second epitaxial layer on the substrate; forming a spacer on opposite sides of the sacrificial gate stack; and forming source/drain regions with the spacer as a mask..
10/09/14
20140299917
Semiconductor device
A semiconductor device includes a first conductive type semiconductor substrate, a second conductive type active region formed on a top surface side of the semiconductor substrate, a second conductive type inside vld region formed to contact the active region on the top surface side in a plan view, and a second conductive type well region formed to contact a portion opposite to the portion contacting the active region of the inside vld region on the top surface side in a plan view. The well region is formed to be deeper than the active region.
10/09/14
20140299915
Semiconductor device
In a semiconductor device having a vertical semiconductor element configured to pass an electric current between an upper electrode and a lower electrode, a field stop layer includes a phosphorus/arsenic layer doped with phosphorus or arsenic and a proton layer doped with proton. The phosphorus/arsenic layer is formed from a back side of a semiconductor substrate to a predetermined depth.
10/09/14
20140299914
Nanotube semiconductor devices
Semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In one embodiment, a semiconductor device is formed in a second semiconductor layer disposed on a first semiconductor layer of opposite conductivity type and having trenches formed therein where the trenches extend from the top surface to the bottom surface of the second semiconductor layer.
10/09/14
20140299891
Semiconductor device
A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction..
10/09/14
20140299890
Semiconductor devices comprising getter layers and methods of making and using the same
Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device.
10/09/14
20140299889
Semiconductor devices
A semiconductor device includes a first gate structure on a first region of a substrate and a second gate structure on a second region of the substrate, a first impurity region on an upper portion of the substrate adjacent to the first gate structure and a second impurity region on an upper portion of the substrate adjacent to the second gate structure, a first metal silicide layer on the first impurity region, a fermi level pinning layer on the second impurity region, a second metal silicide layer on the fermi level pinning layer, and a first contact plug on the first metal silicide layer and a second contact plug on the second metal silicide layer. The fermi level pinning layer pins a fermi level of the second metal silicide layer to a given energy level..
10/09/14
20140299888
Silicon carbide semiconductor device
A sic semiconductor device capable of increasing a switching speed without destroying a gate insulating film. In addition, in a sic-mosfet including an n-type semiconductor substrate formed of sic, a p-type semiconductor layer is entirely or partially provided on an upper surface of a p-type well layer that has a largest area of the transverse plane among a plurality of p-type well layers provided in an n-type drift layer and is arranged on an outermost periphery immediately below a gate electrode pad.
10/09/14
20140299887
Semiconductor devices comprising getter layers and methods of making and using the same
Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device.
10/09/14
20140299886
Silicon carbide semiconductor device and manufacturing method of the same
A silicon carbide semiconductor device includes: a semiconductor substrate made of silicon carbide single crystal and having a principal surface and a backside; and an ohmic electrode contacting one of the principal surface and the backside of the semiconductor substrate in an ohmic manner. A boundary between the ohmic electrode and the one of the principal surface and the backside of the semiconductor substrate is terminated with an element, which has a pauling electronegativity larger than silicon and a binding energy with silicon larger than a binding energy of si—h..
10/09/14
20140299885
Substrate structures and semiconductor devices employing the same
A substrate structure includes a substrate, a nucleation layer on the substrate and including a group iii-v compound semiconductor material having a lattice constant that is different from that of the substrate by less than 1%, and a buffer layer on the nucleation layer and including first and second layers, wherein the first and second layers include group iii-v compound semiconductor materials having lattice constants that are greater than that of the nucleation layer by 4% or more.. .
10/09/14
20140299882
Integrated fin and strap structure for an access transistor of a trench capacitor
At least one dielectric pad layer is formed on a semiconductor-on-insulator (soi) substrate. A deep trench is formed in the soi substrate, and a combination of an outer electrode, a node dielectric, and an inner electrode are formed such that the top surface of the inner electrode is recessed below the top surface of a buried insulator layer of the soi substrate.
10/09/14
20140299880
Layer formation with reduced channel loss
Insulating layers can be formed over a semiconductor device region and etched in a manner that substantially reduces or prevents the amount of etching of the underlying channel region. A first insulating layer can be formed over a gate region and a semiconductor device region.
10/09/14
20140299879
Semiconductor device
A semiconductor device is provided, which includes a display portion and a driver circuit portion configured to drive the display portion. The display portion includes a first pixel electrode, a second pixel electrode, a plurality of photo sensors between the first pixel electrode and the second pixel electrode, and a plurality of color filters.
10/09/14
20140299878
Semiconductor device and stacked semiconductor device
A semiconductor device includes a package substrate, and a stack of semiconductor chips over the package substrate, each of the semiconductor chips including first and second surfaces, each of the semiconductor chips including a first through electrode that extends through each of the semiconductor chips, a first surface electrode positioned on the first surface of each of the semiconductor chips, the first surface electrode being coupled to a first end of the first through electrode, a second surface electrode positioned on the second surface of each of the semiconductor chips, the second surface electrode being coupled to a second end of the first through electrode, a second through electrode that extends through each of the semiconductor chips, the second through electrode having third and fourth ends, and a third surface electrode positioned on the second surface of the first semiconductor chip.. .
10/09/14
20140299876
Semiconductor device and method for manufacturing the same
A semiconductor device which is miniaturized and has sufficient electrical characteristics to function as a transistor is provided. In a semiconductor device including a transistor in which a semiconductor layer, a gate insulating layer, and a gate electrode layer are stacked in that order, an oxide semiconductor film which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and in which the percentage of the indium is twice or more as large as each of the percentage of the gallium and the percentage of the zinc when the composition of the four elements is expressed in atomic percentage is used as the semiconductor layer.
10/09/14
20140299874
Semiconductor device
To provide a semiconductor device including, over the same substrate, a transistor and a resistor each including an oxide semiconductor. A semiconductor device includes a resistor having a first oxide semiconductor layer covered with a nitride insulating layer containing hydrogen and a transistor having a second oxide semiconductor layer which is covered with an oxide insulating layer, has the same composition as the first oxide semiconductor layer, and has a different carrier density from the first oxide semiconductor layer.
10/09/14
20140299841
Graphene based field effect transistor
A semiconductor device comprising a graphene layer, a graphene oxide layer overlaying the graphene layer, and a high-k dielectric layer overlaying the graphene oxide layer is provided, as well as a method for producing the same. The method results in a graphene chemical functionalization that efficiently and uniformly seeds ald growth, preserves the underlying graphene structure, and achieves desirable dielectric properties such as low leakage current and high capacitance..
10/09/14
20140299830
Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes forming an impurity layer over a first conductive layer; forming a first metal oxide layer over the impurity layer, wherein the first metal oxide layer includes oxygen at a lower ratio than a stoichiometric ratio; diffusing an impurity from the impurity layer into the first metal oxide layer to form a first doped metal oxide layer; forming a second metal oxide layer over the first doped metal oxide layer; and forming a second conductive layer over the second metal oxide layer.. .
10/09/14
20140299674
Micro synthetic jet ejector
A semiconductor device is provided which functions as a synthetic jet ejector. The semiconductor device (201) includes a first layer (203), a third layer (207), and a second layer (205) disposed between the first layer and the third layer, wherein the second layer includes a mems comb drive (221).
10/09/14
20140299472
Systems and methods for an integrated bio-entity manipulation and processing semiconductor device
An integrated semiconductor device for manipulating and processing bio-entity samples is disclosed. The device includes a microfluidic channel that is coupled to fluidic control circuitry, a photosensor array coupled to sensor control circuitry, an optical component aligned with the photosensor array to manipulate a light signal before the light signal reaches the photosensor array, and a microfluidic grid coupled to the microfluidic channel and providing for transport of bio-entity sample droplets by electrowetting.
10/09/14
20140299047
Method of growing heteroepitaxial single crystal or large grained semiconductor films on glass substrates and devices thereon
Inexpensive semiconductors are produced by depositing a single crystal or large grained silicon on an inexpensive substrate. These semiconductors are produced at low enough temperatures such as temperatures below the melting point of glass.


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