Follow us on Twitter
twitter icon@FreshPatents


Semiconductor Device patents

      

This page is updated frequently with new Semiconductor Device-related patent applications.




 Partial cqi feedback in wireless networks patent thumbnailnew patent Partial cqi feedback in wireless networks
A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery that includes a plurality of sides (111-114), an intersection of the sides forming corners (115).
Texas Instruments Incorporated


 Semiconductor device patent thumbnailnew patent Semiconductor device
According to one embodiment, a semiconductor device includes: a first circuit including a first transistor, a second transistor, the first and second transistors being capable of receiving first and second signals, respectively; a second circuit including a third transistor and a fourth transistor, a gate and one end of the third transistor being connected to one end of the first transistor, the fourth transistor being capable of receiving the first signal, one end of the fourth transistor being connected to the other end of the third transistor; and a third circuit configured to charge or discharge a node being connected to the one end of the first transistor according to the first signal.. .
Kabushiki Kaisha Toshiba


 Semiconductor device, electronic component, and electronic device patent thumbnailnew patent Semiconductor device, electronic component, and electronic device
A semiconductor device includes a logic circuit capable of storing configuration data. The logic circuit includes a latch circuit, an arithmetic circuit, a delay circuit, and a first output timing generation circuit.
Semiconductor Energy Laboratory Co., Ltd.


 Semiconductor device header and semiconductor device patent thumbnailnew patent Semiconductor device header and semiconductor device
A semiconductor device header is provided with a base including a main body and a heat sink. A lead is inserted through a through hole extending through the main body.
Shinko Electric Industries Co., Ltd.


 Semiconductor device and electronic device patent thumbnailnew patent Semiconductor device and electronic device
A semiconductor device in which a circuit and a battery are efficiently stored is provided. In the semiconductor device, a first transistor, a second transistor, and a secondary battery are provided over one substrate.
Semiconductor Energy Laboratory Co., Ltd.


 Thin film device with protective layer patent thumbnailnew patent Thin film device with protective layer
Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided.
International Business Machines Corporation


 Magnetic memory cells, semiconductor devices, and methods of operation patent thumbnailnew patent Magnetic memory cells, semiconductor devices, and methods of operation
A magnetic cell core includes at least one stressor structure proximate to a magnetic region (e.g., a free region or a fixed region). The magnetic region may be formed of a magnetic material exhibiting magnetostriction.
Micron Technology, Inc.


 Semiconductor device and  manufacturing the same patent thumbnailnew patent Semiconductor device and manufacturing the same
A semiconductor device includes a silicon substrate and a detection element and p-type and n-type mos transistors, which are arranged on the silicon substrate, wherein the detection element includes a semiconductor layer, electrodes, and a schottkey barrier disposed therebetween, the semiconductor layer is arranged just above a layer having the same composition and height as those of an impurity diffusion layer in the source or drain of the p-type or n-type mos transistor, a region, in the silicon substrate, having the same composition and height as those of a channel region, in the silicon substrate, just below a gate oxide film of the p-type mos transistor or the n-type mos transistor, or a region, in the silicon substrate, having the same composition and height as those of a region just below a field oxide film disposed between the p-type and the n-type mos transistor.. .
Canon Kabushiki Kaisha


 Semiconductor layered structure,  producing semiconductor layered structure, and  producing semiconductor device patent thumbnailnew patent Semiconductor layered structure, producing semiconductor layered structure, and producing semiconductor device
A semiconductor layered structure includes a substrate formed of a iii-v compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a iii-v compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of iii-v compound semiconductors. The substrate has a diameter of 55 mm or more.
Sumitomo Electric Industries, Ltd.


 Semiconductor devices, a fluid sensor and a  forming a semiconductor device patent thumbnailnew patent Semiconductor devices, a fluid sensor and a forming a semiconductor device
A semiconductor device comprises a plurality of quantum structures comprising predominantly germanium. The plurality of quantum structures are formed on a first semiconductor layer structure.
Infineon Technologies Ag


new patent

Electronic device and producing the same

An electronic device includes a structure including a first resin layer, an electronic component buried in the first resin layer, a reflector element for antenna disposed on the first resin layer, and an insulating layer disposed on the reflector element;a semiconductor device;a second resin layer in which the structure and the semiconductor device are buried; and a radiating element of the antenna, the radiating element being disposed on the insulating layer and electrically coupled the semiconductor device.. .
Fujitsu Limited

new patent

Semiconductor device

In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device, manufacturing the same, or display device including the same

To suppress a change in electrical characteristics and improve reliability in a transistor. The transistor includes a first gate electrode, a first insulating film over the first gate electrode, a second insulating film over the first insulating film, an oxide semiconductor film over the second insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a third insulating film over the oxide semiconductor film, a fourth insulating film over the third insulating film, a second gate electrode over the fourth insulating film, and a fifth insulating film over the second gate electrode.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor devices and methods of fabricating the same

A semiconductor device is disclosed. The device includes a substrate including an active region defined by a device isolation layer, a fin pattern protruding from the substrate and extending in a first direction, the fin pattern including a gate fin region and a source/drain fin region, a gate pattern disposed on the gate fin region to extend in a second direction crossing the first direction, and a source/drain portion provided on a sidewall of the source/drain fin region.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device, manufacturing the same, and evaluating semiconductor device

A semiconductor device has: a silicon (semiconductor) substrate; a gate insulating film and a gate electrode, which are formed on the silicon substrate in this order; and source/drain material layers formed in recesses (holes) in the silicon substrate, the recesses being located beside the gate electrode. Here, each of side surfaces of the recesses, which are closer to the gate electrode, is constituted of at least one crystal plane of the silicon substrate..
Fujitsu Semiconductor Limited

new patent

Semiconductor device and a manufacturing the same

A semiconductor device includes an n channel conductivity type fet having a channel formation region formed in a first region on a main surface of a semiconductor substrate and a p channel conductivity type fet having a channel formation region formed in a second region of the main surface, which second region is different from the first region. An impurity concentration of a gate electrode of the n channel fet has an impurity concentration greater than an impurity concentration of the gate electrode of the p channel fet to thereby create a tensile stress in the direction of flow of a drain current in the channel forming region of the n channel fet.
Renesas Electronics Corporation

new patent

Method for increasing stress in the channel region of fin field effect transistor

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming an interlayer dielectric (ild) layer around the gate structure; removing the gate structure to form a recess; forming a stress layer in the recess, wherein the stress layer comprises metal; and forming a work function layer on the stress layer..
United Microelectronics Corp.

new patent

Semiconductor device having at least one stressor and manufacturing the same

A method of manufacturing a semiconductor device includes forming a word line trench in an active region, forming a gate dielectric layer to cover at least a portion of the word line trench, forming a word line within the word line trench to define a capping trench, and/or forming a stressor having a compressive stress within the capping trench. The stressor is formed by using a plasma source..
Samsung Electronics Co., Ltd.

new patent

Semiconductor device

A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction..
Denso Corporation

new patent

High voltage semiconductor device and manufacturing the same

In embodiments, a high voltage semiconductor device includes a gate structure disposed on a substrate, a source region disposed at a surface portion of the substrate adjacent to one side of the gate structure, a drift region disposed at a surface portion of the substrate adjacent to another side of the gate structure, a drain region disposed at a surface portion of the drift region spaced from the gate structure, and an electrode structure disposed on the drift region to generate a vertical electric field between the gate structure and the drain region.. .
Dongbu Hitek Co. Ltd.

new patent

Semiconductor device capable of high-voltage operation

A semiconductor device includes a semiconductor substrate and a first well region formed in the semiconductor substrate. An insulator is formed in and over a portion of the first well region and a second well region is formed in the first well region at a first side of the insulator.
Mediatek Inc.

new patent

Semiconductor device

A control electrode ge1 is formed in a lower portion of a trench tr1 formed in a semiconductor substrate sub, and a gate electrode ge2 is formed in an upper portion inside the trench tr1. An insulating film g1 is formed between the control electrode ge1 and a side wall and a bottom surface of the trench tr1, an insulating film g2 is formed between the side wall of the trench tr1 and the gate electrode ge2, and an insulating film g3 is formed between the control electrode ge1 and the gate electrode ge2.

new patent

Structure and formation semiconductor device structure

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure.
Taiwan Semiconductor Manufacturing Co., Ltd

new patent

Crystalline-amorphous transition material for semiconductor devices and formation

The present disclosure presents a novel structure for a dielectric material for use with group iii-v material systems and a method of fabricating such a structure. More specifically, the present disclosure describes a novel dielectric layer that is formed on the top surface of a iii-v material where the dielectric layer comprises a first region in contact with the top surface of the iii-v material crystalline and a second region adjacent to the first region and at the upper side of the dielectric layer.
Toshiba Corporation

new patent

Semiconductor device and manufacturing method thereof

A semiconductor device according to an embodiment includes a semiconductor layer. A gate dielectric film is provided on the semiconductor layer.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device and manufacturing method thereof

A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an oxide insulating layer; intermediate layers apart from each other over the oxide insulating layer; a source electrode layer and a drain electrode layer over the intermediate layers; an oxide semiconductor layer that is electrically connected to the source electrode layer and the drain electrode layer and is in contact with the oxide insulating layer; a gate insulating film over the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; and a gate electrode layer that is over the gate insulating film and overlaps with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer..
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device and manufacturing method thereof

It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. An oxide semiconductor film serving as a channel formation region of a transistor is formed by a sputtering method at a temperature higher than 200° c., so that the number of water molecules eliminated from the oxide semiconductor film can be 0.5/nm3 or less according to thermal desorption spectroscopy.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Thin film device with protective layer

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A substrate is provided.
International Business Machines Corporation

new patent

Method for fabricating semiconductor device

The invention provides a method for fabricating a semiconductor device, including: forming a dummy gate on a substrate, forming an inter-layer dielectric layer (ild) on the dummy gate and the substrate, forming a metal layer on the upper surface of the dummy gate, removing the dummy gate to form a trench in the inter-layer dielectric layer (ild), conformally forming a gate dielectric layer in the trench, conformally forming a first conductive type metal layer on the gate dielectric layer, anisotropic etching the first conductive type metal layer and the gate dielectric layer over the metal layer to form a gap in the inter-layer dielectric layer (ild), and filling a second conductive type metal layer in the gap.. .
Nanya Technology Corp.

new patent

Semiconductor device

In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion.
Panasonic Intellectual Property Management Co., Ltd.

new patent

Method for forming via profile of interconnect structure of semiconductor device structure

A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer.
Taiwan Semiconductor Manufacturing Co., Ltd.

new patent

Stripe-shaped electrode structure including a main portion with a field electrode and an end portion terminating the electrode structure

A semiconductor device includes a stripe-shaped electrode structure that extends from a first surface into a semiconductor portion. The electrode structure includes a main portion and an end portion terminating the electrode structure.
Infineon Technologies Ag

new patent

Silicon carbide semiconductor device and manufacturing same

A silicon carbide epitaxial layer includes: a first impurity region; a second impurity region; and a third impurity region. A gate insulating film is in contact with the first impurity region, the second impurity region, and the third impurity region.
Sumitomo Electric Industries, Ltd.

new patent

Semiconductor device

A semiconductor device is provided with a semiconductor substrate and a trench gate. The semiconductor substrate is provided with a drift region of a first conductive type, wherein the drift region is in contact with the trench gate; a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the trench gate; a source region of the first conductive type, wherein the source region is disposed above the body region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate; and a front surface region of the second conductive type, wherein the front surface region is disposed above the source region, exposed on the front surface of the semiconductor substrate and is in contact with the trench gate..
Toyota Jidosha Kabushiki Kaisha

new patent

Semiconductor device having an inactive-fin and a forming the same

A semiconductor device includes a multi-fin active region having a plurality of sub-fins sequentially arranged on a substrate. A gate electrode crosses the multi-fin active region.

new patent

High voltage field balance metal oxide field effect transistor (fbm)

A semiconductor device includes a semiconductor substrate and epitaxial layer of a first conductivity type with the epitaxial layer on a top surface of the substrate. A body region of a second conductivity type opposite the first conductivity type is disposed near a top surface of the epitaxial layer.
Alpha And Omega Semiconductor Incorporated

new patent

Semiconductor device including a solid state imaging device

A semiconductor device is reduced in power consumption, the semiconductor device including a solid-state imaging device that includes pixels each having a plurality of light receiving elements. A pixel having first and second photodiodes is provided with a first transfer transistor that transfers charge in the first photodiode to a floating diffusion capacitance section, and a second transfer transistor that combines charge in the first photodiode and charge in the second photodiode, and transfers the combined charge to the floating diffusion capacitance section.
Renesas Electronics Corporation

new patent

Semiconductor device and manufacturing the same

A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device

An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device, finfet transistor and fabrication method thereof

The present disclosure provides semiconductor devices, fin field-effect transistors and fabrication methods thereof. An exemplary fin field-effect transistor includes a semiconductor substrate; an insulation layer configured for inhibiting a short channel effect and increasing a heat dissipation efficiency of the fin field-effect transistor formed over the semiconductor substrate; at least one fin formed over the insulation layer; a gate structure crossing over at least one fin and covering top and side surfaces of the fin formed over the semiconductor substrate; and a source formed in the fin at one side of the gate structure and a drain formed in the fin at the other side of the gate structure..
Semiconductor Manufacturing International (shanghai) Corporation

new patent

Semiconductor device and manufacturing the same

A semiconductor device that occupies a small area and has a high degree of integration is provided. The semiconductor device includes a first insulating layer, a conductive layer, and a second insulating layer.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device and display device

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Integrated circuit, semiconductor device based on intergrated circuit, and standard cell library

An integrated circuit (ic) may include at least one cell including a plurality of conductive lines that extend in a first direction and are in parallel to each other in a second direction that is perpendicular to the first direction, first contacts respectively disposed at two sides of at least one conductive line from among the plurality of conductive lines, and a second contact disposed on the at least one conductive line and the first contacts and forming a single node by being electrically connected to the at least one conductive line and the first contacts.. .
Samsung Electronics Co., Ltd.

new patent

Semiconductor device

Provided is a semiconductor device including a substrate, gate electrodes vertically stacked on the substrate, insulating patterns between the gate electrodes, an active pillar provided to penetrate the gate electrodes and the insulating patterns and electrically coupled with the substrate, and a memory pattern provided between the gate electrodes and the active pillar and between the insulating patterns and the active pillar. The gate electrodes include edge portions extending between the memory pattern and the insulating patterns..

new patent

Semiconductor device and manufacturing the same

A semiconductor device includes a substrate including a cell region and a peripheral region, a cell stacked structure stacked on the substrate in the cell region, a channel layer in one structure penetrating the cell stacked structure, a driving transistor formed in the peripheral region, and a plug structure coupled to the driving transistor and including a stacking structure of at least two contact plugs shorter than the channel layer, wherein each of the contact plugs is arranged at a same height as a part of the cell stacked structure.. .
Sk Hynix Inc.

new patent

Semiconductor device

A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device and manufacturing the same

One memory cell region includes memory cells that are aligned in a first direction and a second direction orthogonal to the first direction, a word line contact region adjacent to the memory cell region in the first direction interposed by a dummy pattern region, and first and second word lines that span a plurality of active regions aligned in the first direction and extend from the memory cell region to the word line contact region. A first word line and a second word line adjacent to each other within one active region located in the memory cell region constitute a word line pair.

new patent

Semiconductor device and driving semiconductor device

The semiconductor device includes a first memory cell, and a second memory cell thereover. The first memory cell includes first and second transistors, and a first capacitor.
Semiconductor Energy Laboratory Co., Ltd.

new patent

Semiconductor device

Provided is a semiconductor device including a gate structure, a first doped region of a first conductivity type, a plurality of second doped regions of a second conductivity type, a third doped region of the first conductivity type, and a plurality of fourth doped regions of the second conductivity type. The gate structure is located on a substrate.
Macronix International Co., Ltd.

new patent

Semiconductor devices including varied depth recesses for contacts

A first conductivity type finfet device can include first embedded sources/drains of a first material that have a first etch rate. The first embedded sources/drains can each include an upper surface having a recessed portion and an outer raised portion relative to the recessed portion.
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and manufacturing the same

Provided are a semiconductor device in which a multi-threshold voltage is embodied by controlling a work function, and a method of manufacturing the same. The device includes a semiconductor substrate including a first region and a second region, a first active region formed in an upper portion of the first region of the semiconductor substrate, a second active region formed in an upper portion of the second region of the semiconductor substrate, a first gate structure formed on the semiconductor substrate across the first active region, the first gate structure including an interfacial layer, a high-k dielectric layer, a capping metal layer, and a work function metal layer that are stacked sequentially, and a second gate structure formed on the semiconductor substrate across the second active region, the second gate structure including the interfacial layer, the high-k dielectric layer, the capping metal layer, a dielectric layer, and the work function metal layer that are stacked sequentially..
Samsung Electronics Co., Ltd.

new patent

Structure and formation semiconductor device structure

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.

new patent

Method for forming source/drain contacts during cmos integration using confined epitaxial growth techniques and the resulting semiconductor devices

A semiconductor device includes an isolation region laterally defining an active region in a semiconductor substrate, a gate structure positioned above the active region, and a sidewall spacer positioned adjacent to sidewalls of the gate structure. An etch stop layer is positioned above and covers a portion of the active region, an interlayer dielectric material is positioned above the active region and covers the etch stop layer, and a confined raised source/drain region is positioned on and in contact with an upper surface of the active region.
Globalfoundries Inc.

new patent

Semiconductor structure with a spacer layer

A multi-layer semiconductor structure is disclosed for use in iii-nitride semiconductor devices, including a channel layer, a band-offset layer having a wider bandgap than the channel layer, a spacer layer having a narrower bandgap than the band-offset layer, and a cap layer comprising at least two sublayers. Each sublayer is selectively etchable with respect to sublayers immediately below and above, each sublayer comprises a iii-n material alxinygazn in which 0≦x≦1, 0≦y≦1, and 0≦z≦1, at least one sublayer has a non-zero ga content, and a sublayer immediately above the spacer layer has a wider bandgap than the spacer layer.
Cambridge Electronics, Inc.

new patent

Semiconductor device

In a plan view of a semiconductor substrate, the semiconductor substrate includes a pillar exposing area in which the pillar region is exposed on the front surface of the semiconductor substrate, a pillar contacting area in which the pillar region is in contact with a deeper side of the anode contact region, and an anode contacting area in which the anode region is in contact with the deeper side of the anode contact region. In a direction along which the pillar contacting area and the anode contacting area are aligned, a width of the pillar contacting area is smaller than a width of the anode contacting area..
Toyota Jidosha Kabushiki Kaisha

new patent

Semiconductor device comprising electrostatic discharge protection structure

A semiconductor device includes a semiconductor body having first and second opposing surfaces, a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure. The electrostatic discharge protection structure includes a diode structure on the first isolation layer, a first terminal and a second terminal.
Infineon Technologies Dresden Gmbh

new patent

Semiconductor device with modified current distribution

Semiconductor devices having modified current distribution and methods of forming the same are described herein. As an example, a memory die in contact with a logic die can be configured to draw a sum amount of current from a current source.
Micron Technology, Inc.

new patent

Thermally enhanced face-to-face semiconductor assembly with built-in heat spreader and making the same

A face-to-face semiconductor assembly is characterized in that first and second semiconductor devices are face-to-face mounted on two opposite sides of a first routing circuitry and is further electrically connected to an interconnect board through the first routing circuitry. The interconnect board has a heat spreader to provide thermal dissipation for the second semiconductor device, and a second routing circuitry formed on the heat spreader and electrically coupled to the first routing circuitry.
Bridge Semiconductor Corporation

new patent

Semiconductor device having stacked chips

According to one embodiment, a semiconductor device includes chips and a first selection circuit. Each of the chips has at least first and second vias for transmitting at least first and second address signals, wherein these chips are stacked to be electrically connected via the first and second vias.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device

A semiconductor device includes a first substrate, a second substrate stacked over the first substrate, and a pillar member extending obliquely between the first and second substrates. The first substrate includes a mounting surface on which a semiconductor chip is mounted, with a resin interposed between the semiconductor chip and the mounting surface and extending beyond the periphery of the semiconductor chip on the mounting surface.
Shinko Electric Industries Co., Ltd.

new patent

Semiconductor device

According to one embodiment, a semiconductor device includes a first semiconductor chip including a first circuit, a second circuit, a first interconnect connected to the first circuit, a second interconnect connected to the second circuit, and a third interconnect connecting the first interconnect and the second interconnect.. .
Kabushiki Kaisha Toshiba

new patent

Semiconductor device

A semiconductor device includes a semiconductor chip in which a first bump is provided on a first surface, a plurality of first adhesives are provided on the first surface of the semiconductor chip, and a second adhesive is provided on the first surface of the semiconductor chip, and of which a layout area on the first surface is smaller than a layout area of the plurality of first adhesives. In comparison to a first adhesive that is farthest from the center or a moment of inertia of the first surface of the semiconductor chip among the plurality of the first adhesives, the second adhesive is provided farther from the center or the moment of inertia of the semiconductor chip..
Kabushiki Kaisha Toshiba

new patent

Semiconductor device and manufacturing semiconductor device

A semiconductor device includes a first substrate, an aluminum pad, a first nickel electrode, a second substrate, a second nickel electrode, and a connection layer. The first substrate includes a wiring therein.
Kabushiki Kaisha Toshiba

new patent

Wire bonding apparatus and manufacturing semiconductor device

A wire bonding apparatus includes: a bonding tool 40 into and through a wire 42 passes; a control unit 80 that performs a movement process of the bonding tool 40 for cutting the wire 42 after forming a wire loop 90 between first and second bonding points of a bonding target 100; and a monitoring unit 70 that supplies a predetermined electric signal between the wire 42 through the bonding tool 40 and the bonding target 100, and monitors whether the wire 42 is cut or not based on an output of the supplied electric signal. The control unit 80 continues the movement process of the bonding tool 40 while the wire 42 is determined not to be cut, and stops the movement process of the bonding tool 40 when the wire 42 is determined to be cut, based on a monitoring result from the monitoring unit 70.
Shinkawa Ltd.

new patent

Method of manufacturing semiconductor device and wire bonding apparatus

A method of manufacturing a semiconductor device includes: a wire tail forming step of forming a wire loop 130 between a first bonding point and a second bonding point with a bonding tool 40, and then cutting a portion of a wire 42 extending from a tip of the bonding tool 40 to thereby form a wire tail 43 at the tip of the bonding tool 40; and a wire tail bending step of bending the wire tail 43 so as to direct a tip 43a of the wire tail 43 upward by descending the bonding tool 40 toward the second bonding point with the wire loop 130 formed thereat and pressing the wire tail 43 against a portion of the wire loop 130 located above the second bonding point. Thus, the wire tail can be bent easily and efficiently..
Shinkawa Ltd.

new patent

Semiconductor devices and packages including conductive underfill material and related methods

Semiconductor devices and device packages include at least one semiconductor die electrically coupled to a substrate through a plurality of conductive structures. The at least one semiconductor die may be a plurality of memory dice, and the substrate may be a logic die.
Micron Technology, Inc.

new patent

Bonding material, bonding method and semiconductor device for electric power

The present invention has an object to achieve bonding which satisfies both in heat resistivity and in stress-relaxation ability, and the bonding material according to this invention is a sheet-like bonding material 1 made of a silver-bismuth alloy which, when heated in a state being in contact with a metal material as a bonding target (for example, surface layers 2f, 3f), forms in the metal material (as its material, for example, gold, silver or copper) a diffusion layer ld2, ld3 of silver due to solid-phase diffusion reaction, so as to be bonded to the metal material, said bonding material being characterized by containing not less than 1 mass % but not more than 5 mass % of bismuth.. .
Mitsubishi Electric Corporation

new patent

Semiconductor device and manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate provided with a through hole that extends therethrough from a first surface to a second surface on a side opposite to the first surface, a device layer provided at the first surface of the semiconductor substrate which includes an electrode, an insulating layer that covers the device layer, a first through electrode that extends through the insulating layer, an insulating layer that extends from the second surface of the semiconductor substrate to a bottom surface of the through hole through an inner surface of the through hole of the semiconductor substrate, and in which the portion thereof in contact with the bottom surface has a tapered shape, and a second through electrode electrically connected to the electrode in the device layer that is exposed to the bottom surface of the through hole.. .
Kabushiki Kaisha Toshiba

new patent

Semiconductor device

A semiconductor chip includes a substrate, an electrode pad formed on the substrate, an insulating layer covering the substrate and the electrode pad, and having an opening exposing a portion of a surface of the electrode pad, a first conductive layer formed on the exposed portion of the surface of the electrode pad and extending to a surface of the insulating layer, and a second conductive layer formed on the first conductive layer, covering the first conductive layer in a plan view, and having an outer edge portion which is located further out than an outer edge of the first conductive layer in a plan view. The outer edge portion of the second conductive layer has at least one curved portion.
Rohm Co., Ltd.

new patent

Packaging devices and methods of manufacture thereof

Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad.
Taiwan Semiconductor Manufacturing Company, Ltd.

new patent

Solder metallization stack and methods of formation thereof

A semiconductor device includes a contact metal layer disposed over a semiconductor surface of a substrate, a diffusion barrier layer disposed over the contact metal layer, an inert layer disposed over the diffusion barrier layer, and a solder layer disposed over inert layer.. .
Infineon Technologies Ag

new patent

Method of producing a semiconductor device with protruding contacts

A wiring (3) comprising electrical conductors (4, 5, 6, 7) is formed in a dielectric layer (2) on or above a semiconductor substrate (1), an opening is formed in the dielectric layer to uncover a contact pad (8), which is formed by one of the conductors, and a further opening is formed in the dielectric layer to uncover an area of a further conductor (5), separate from the contact pad. The further opening is filled with an electrically conductive material (9), and the dielectric layer is thinned from a side opposite the substrate, so that the electrically conductive material protrudes from the dielectric layer..
Ams Ag

new patent

Semiconductor device

A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body.
Renesas Electronics Corporation

new patent

Semiconductor package

A semiconductor package includes a support substrate; a stress relaxation layer provided on a main surface of the support substrate; a semiconductor device located on the stress relaxation layer; an encapsulation material covering the semiconductor device, the encapsulation material being formed of an insulating material different from that of the stress relaxation layer; a line running through the encapsulation material and electrically connected to the semiconductor device; and an external terminal electrically connected to the line. Where the support substrate has an elastic modulus of a, the stress relaxation layer has an elastic modulus of b, and the encapsulation material has an elastic modulus of c under a same temperature condition, the relationship of a>c>b or c>a>b is obtained..
J-devices Corporation

new patent

Thermosetting adhesive sheet and semiconductor device manufacturing method

A thermosetting adhesive sheet comprises a thermosetting binder, a transparent filler having an average primary particle diameter from 1 nm to 1000 nm and a colorant; wherein content of the transparent filler is from 30 to 100 pts. Mass with respect to 80 pts.
Dexerials Corporation

new patent

Creating unique device identification for semiconductor devices

Systems and methods for creating unique device identification for semiconductor devices are described. In some embodiments, a method may include receiving a wafer identification mark printed on a semiconductor wafer having a plurality of dies fabricated thereon; receiving a leadframe identification mark printed on a leadframe configured to receive the plurality of dies during a die attach operation; and for each of the plurality of dies: (a) recording a wafer location of a given die prior to the die attach operation; (b) recording a leadframe location of the given die after the die attach operation; (c) creating a device identification mark for the given die based upon the wafer identification mark, the leadframe identification mark, the wafer location, and the leadframe location; and (d) printing the device identification mark on a package of the given die..
Texas Instruments Incorporated

new patent

Method of manufacturing semiconductor device, and semiconductor device

A semiconductor device includes a semiconductor substrate provided with a through-hole, a device layer including a lower layer wiring, an insulating layer that covers the device layer, a first through-electrode that passes through the insulating layer, a first insulating film provided with an opening having a diameter that is substantially the same as or greater than an opening diameter of the through-hole of the semiconductor substrate, a second insulating film positioned on an upper side of the first insulating film and on an inner side surface of the through-hole of the semiconductor substrate, and a second through-electrode electrically connected to the lower layer wiring in the device layer from an upper side of the second insulating film through the inside of the through-hole of the semiconductor substrate.. .
Kabushiki Kaisha Toshiba

new patent

Semiconductor device

According to one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip outputs a first signal by a first bus width and includes a first via which transfers the first signal.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device having air-gap and manufacturing the same

A semiconductor device in which an air-gap located at a side of a bit line stack is extended to an upper part of the bit line stack is disclosed. An embodiment includes: a bit line stack; a plurality of storage node contacts located at both sides of the bit line stack; and an air-gap located between the bit line stack and the storage node contacts, and extended above the bit line stack..
Sk Hynix Inc.

new patent

Semiconductor device and electronic device

A semiconductor device includes a semiconductor substrate, a through hole via which pierces the semiconductor substrate, and a wiring layer (multilayer wirings) disposed under the semiconductor substrate and including plural layers of a group of lands disposed under the through hole via. The group of lands includes a land in a first layer which is disposed on an under surface of the through hole via and which is equal in external size to or smaller in external size than the through hole via in planar view and a land in a second layer which is disposed under the land in the first layer and which is larger in external size than the land in the first layer in the planar view.
Fujitsu Limited

new patent

Semiconductor device and manufacturing the same

A semiconductor device is provided, which includes a first conductive layer disposed on a substrate, a dielectric layer with at least an opening disposed on the first conductive layer, and a plurality of plugs filling up the openings. At least a portion of the dielectric layer adjacent to the openings is si-rich, and each of the plugs includes a second conductive layer surrounded by a barrier layer..
Macronix International Co., Ltd.

new patent

Semiconductor device and manufacturing semiconductor device

A through electrode and a multilayer wiring are provided on a semiconductor substrate, and a bottom layer connection wiring, a lower layer connection wiring, an upper layer connection wiring, and a top layer connection wiring are provided in the multilayer wiring. The through electrode is connected to the bottom layer connection wiring, and a via is arranged at a position other than a position immediately above the through electrode..
Kabushiki Kaisha Toshiba

new patent

Semiconductor device and manufacturing the same

The semiconductor device 1 includes an insulating substrate 2, a conductive part 3 that extends in a first direction, a conductive part 4 that is separated in a second direction and extends in the first direction, conductive parts 5 that are lined along the first direction between the part 3 and the part 4, high-side switches 11, 12 and 13, low-side switches 14, 15 and, signal terminals that are arrayed along the first direction, a power supply terminal 21 that is electrically connected to the part 3, a ground terminal 22 that is electrically connected to the part 4, and output terminals 23, 24 and 25 that are electrically connected respectively to the corresponding parts 5, arrayed along the first direction on the other end side of the substrate 2, and provided over a straight line l that passes through the part 4 and extends in the first direction.. .
Shindengen Electric Manufacturing Co., Ltd.

new patent

Semiconductor device and production method therefor

Provided is a semiconductor device having a wiring structure on a semiconductor element and capable of securing high quality and high reliability in response to the desire for high-temperature operations, a large-current specification, thinner wafers, smaller device size, and reduced loss. A semiconductor device that includes an insulating circuit board; a semiconductor element implemented on the insulating circuit board; a first insulating resin layer laminated on the insulating circuit board; a copper-plated wiring which contacts the semiconductor element via a window portion formed in the first insulating resin layer, which enables contact with the semiconductor element; and a second insulating resin layer laminated so as to seal the copper-plated wiring, and a method for producing the semiconductor device are provided..
Fuji Electronic Co., Ltd

new patent

Semiconductor device and forming substrate including embedded component with symmetrical structure

A semiconductor device comprises a first conductive layer. A second conductive layer is formed over the first conductive layer.
Stats Chippac, Ltd.

new patent

Package for a surface-mount semiconductor device and manufacturing method thereof

A method for manufacturing a surface-mount electronic device includes making a first partial cut from a bottom of an assembly that includes a first semiconductor body that is disposed on a first die pad, a second semiconductor body that is disposed on a second die pad, and a plurality of terminal regions that is disposed between the first and second die pads. The first partial cut forms a recess by removing a portion of each of the terminal regions.
Stmicroelectronics S.r.l.

new patent

Process for manufacturing a surface-mount semiconductor device, and corresponding semiconductor device

A process for manufacturing surface-mount semiconductor devices, in particular of the quad-flat no-leads multi-row type, comprising providing a metal leadframe, in particular a copper leadframe, which includes a plurality of pads, each of which is designed to receive the body of the device, the pads being separated from adjacent pads by one or more rows of wire-bonding contacting areas, outermost rows from among the one or more rows of wire-bonding contacting areas identifying, together with outermost rows corresponding to the adjacent pads, separation regions.. .
Stmicroelectronics S.r.l.

new patent

Semiconductor device including lead frames with downset

A semiconductor device includes a planar first lead frame including a die pad, a semiconductor chip coupled to the die pad, and a second lead frame coupled to the first lead frame. The second lead frame includes leads arranged such that the die pad is downset with respect to the leads..
Infineon Technologies Ag

new patent

Semiconductor device and fabricating semiconductor device

A semiconductor device includes: a semiconductor substrate; a wiring layer provided on a front-surface side of the semiconductor substrate; a through-via that penetrates through the semiconductor substrate from a back-surface side of the semiconductor substrate and is coupled to a wire included in the wiring layer; and a stress relaxation part that protrudes toward a through-via side and is disposed on a section in the wire and coupled to the through-via, the stress relaxation part including at least one insulating portion containing an insulating material having a smaller thermal expansion coefficient than a material of the through-via.. .
Fujitsu Limited

new patent

Semiconductor device and producing semiconductor device

A semiconductor device includes a semiconductor substrate, a device layer located at an upper surface of the semiconductor substrate, an insulating layer located on the device layer, and a through electrode. The through electrode includes a body located in a through hole provided in the insulating layer and a head located on the body and the insulating layer and is electrically connected to an upper-layer wiring in the device layer.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device

In a semiconductor device, a first to a sixth switching elements are joined to a second main surface of a substrate with their electrode surfaces facing the second main surface of the substrate. Non-electrode surfaces of the switching elements are provided with respective heat spreaders joined thereto.
Jtekt Corporation

new patent

Semiconductor structure having thermal backside core

A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink.
Avago Technologies General Ip (singapore) Pte. Ltd.

new patent

Semiconductor device package

Elastic modulus of the resin member is set in a prescribed range such that drift of an output voltage of the circuit is in a range within not less than 0.0 mv and not more than 1.5 mv.. .

new patent

Epoxy resin composition for encapsulating semiconductor device and semiconductor device encapsulated by the same

An epoxy resin composition for encapsulating a semiconductor device and a semiconductor device encapsulated by the epoxy resin composition, the composition including a base resin; a filler; a colorant; and a thermochromic pigment, wherein a color of the thermochromic pigment is irreversibly changed when a temperature thereof exceeds a predetermined temperature.. .
Samsung Sdi Co., Ltd.

new patent

Ion implantation methods and structures thereof

A method for fabricating a semiconductor device using a high-temperature ion implantation process includes providing a substrate including a plurality of fins. In some examples, a mask material is deposited and patterned to expose a group of fins of the plurality of fins and a test structure.
Taiwan Semiconductor Manufacturing Company, Ltd.

new patent

Semiconductor device and manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate, a metal member, and a metal oxide film. The semiconductor substrate is provided with a through-hole that passes through the semiconductor substrate from one surface to another surface opposite to the one surface.
Kabushiki Kaisha Toshiba

new patent

Method of manufacturing semiconductor device

A barrier metal is formed from a surface of an interlayer insulating film 2 to a trench that is formed in a semiconductor portion exposed in a contact hole. After rta treatment and a plasma nitriding process, a plug is embedded at an inner side of the barrier metal inside the trench and the contact hole.
Fuji Electric Co., Ltd.

new patent

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device may include forming an insulating layers on a substrate, forming a plurality of holes in an upper portion of the insulating layer, forming a mask layer having openings exposing at least a first set of the plurality of holes, etching a lower portion of the insulating layer exposed by one of the plurality of holes which is exposed by the mask layer to form a through hole in the insulating layer in combination with the one of the plurality of holes, and forming a conductive structure in the through hole.. .
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and semiconductor device manufacturing method

According to present invention, a semiconductor device includes a semiconductor substrate formed of gaas, an adhesion layer formed of pd or an alloy containing pd on the semiconductor substrate, a barrier layer formed of co or an alloy containing co on the adhesion layer, and a metal layer formed of cu, ag or au on the barrier layer.. .
Mitsubishi Electric Corporation

new patent

Method of manufacturing semiconductor device

According to an embodiment, a method of manufacturing a semiconductor device includes forming a first opening that extends from a second surface of a semiconductor substrate opposite to a first surface toward the first surface and extending to a first insulating layer in the semiconductor substrate, performing a first annealing process in a first gas atmosphere that contains hydrogen after formation of the first opening, forming a second insulating layer on a side wall of the semiconductor substrate in the first opening, performing a second annealing process after formation of the second insulating layer, forming a second opening that extends to the conductive layer in the first insulating layer through the first opening, and forming a via that is connected to the conductive layer in the first and second openings.. .
Kabushiki Kaisha Toshiba

new patent

Method of manufacturing semiconductor device

According to one embodiment, a method of manufacturing a semiconductor device comprises forming a first insulating film and a wiring pattern and forming a second insulating film on the upper side of these. Further, a process of making holes in the second insulating film simultaneously at position where the wiring pattern is placed and position where the wiring pattern is not formed is performed.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device and balancing surfaces of an embedded pcb unit with a dummy copper pattern

A semiconductor device has a substrate. A conductive via is formed through the substrate.
Stats Chippac Pte. Ltd.

new patent

Semiconductor substrate for flash lamp anneal, anneal substrate, semiconductor device, and manufacturing semiconductor device

A semiconductor substrate for flash lamp anneal is used in a manufacturing process of performing ion implantation to form a p-n junction on a semiconductor substrate surface and recovering an ion implantation defect by the flash lamp anneal, carbon concentration of the semiconductor substrate being 0.5 ppma or less. Consequently, it is possible to provide the semiconductor substrate for flash lamp anneal which can easily and surely prevent the ion implantation defect from remaining in a device using a flash lamp anneal process..
Shin-etsu Handotai Co., Ltd.

new patent

Hybrid fin cutting processes for finfet semiconductor devices

One illustrative method disclosed herein includes, among other things, forming a fin-removal masking layer comprised of a plurality of line-type features, each of which is positioned above one of the fins, and a masking material positioned at least between adjacent features of the fin-removal masking layer and above portions of an insulating material in the trenches between the fins. The method also includes performing an anisotropic etching process through the fin-removal masking layer to remove the portions of the fins to be removed..
Globalfoundries Inc.

new patent

Method for forming patterns for semiconductor device

A method for forming patterns for semiconductor device includes following steps. A substrate is provided.
United Microelectronics Corp.

new patent

Methods for manufacturing a semiconductor device

Carbon-containing patterns are formed on an etch target layer, side surfaces of the carbon-containing patterns are treated by a hydrophilic process, poly-crystalline silicon spacers are formed on the side surfaces of the carbon-containing patterns after the hydrophilic process has been performed, and the etch target layer is patterned using the poly-crystalline silicon spacers as an etch mask.. .
Samsung Electronics Co., Ltd.

new patent

Semiconductor device and manufacturing semiconductor device

A method of manufacturing a semiconductor device, where the device includes a donor layer that is obtained by changing a crystal defect formed in a first-conduction-type drift layer by proton radiation into a donor and in which the donor layer has an impurity concentration distribution including a first portion with a maximum impurity concentration and a second portion with a concentration gradient in which the impurity concentration is reduced from the first portion to both surfaces of the first-conduction-type drift layer. The method includes performing proton radiation for a first-conduction-type semiconductor substrate which will be the first-conduction-type drift layer to form a crystal defect in the first-conduction-type semiconductor substrate; and performing a heat treatment at a temperature equal to or higher than 300° c.
Fuji Electric Co., Ltd.

new patent

Systems and methods for bidirectional device fabrication

Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer.
Ideal Power Inc.

new patent

Semiconductor device manufacturing method

A resist layer is applied to a metal film disposed on a semiconductor substrate, using a positive photoresist having photosensitivity to at least one wavelength. The resist layer is exposed to light including a region of the one wavelength.
Mitsubishi Electric Corporation

new patent

Semiconductor device

A semiconductor device includes a semiconductor layer formed of a iii-v group semiconductor crystal containing as as a primary component of a v group. A v group element other than as has been introduced at a concentration of 0.02 to 5% into a v group site of the iii-v group semiconductor crystal in the semiconductor layer..
Furukawa Electric Co., Ltd.

new patent

Modification processing method and manufacturing semiconductor device

A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas..
Tokyo Electron Limited

new patent

Semiconductor devices including semiconductor structures and methods of fabricating the same

Semiconductor devices and methods for fabricating semiconductor devices are provided. In one example, a semiconductor device includes a semiconductor structure.
Gm Global Technology Operations Llc

new patent

Semiconductor device

A semiconductor device includes a memory circuit, a first fifo, a second fifo and an input/output circuit. The memory circuit outputs data.
Kabushiki Kaisha Toshiba

new patent

Semiconductor device suppressing bti deterioration

Disclosed herein is a device includes a command generation circuit that activates first and second command signals, an internal circuit that includes a plurality of transistors that are brought into a first operation state when at least one of the first and second command signals is activated, and an output gate circuit that receives a first signal output from the internal circuit, the output gate circuit being configured to pass the first signal when the second command signal is deactivated and to block the first signal when the second command signal is activated.. .
Micron Technology, Inc.

new patent

Reception circuit, adjusting timing in reception circuit, and semiconductor device

A reception circuit includes a control signal generation circuit that generates a first enable signal based on a strobe signal and a second enable signal based on a core clock signal and a pointer control signal. A pattern data generation circuit generates determination pattern data from the first enable signal.
Socionext Inc.

new patent

Semiconductor device and semiconductor system

A semiconductor system may include a controller and a semiconductor device. The controller may output command/address signals.
Sk Hynix Inc.

new patent

Semiconductor device and operating method thereof

A semiconductor device includes memory blocks including a plurality of strings in which memory cells are coupled between select transistors; a peripheral circuit suitable for erasing or programming the select transistors and the memory cells, which are included in a selected memory block among the memory blocks; and a control circuit suitable for controlling the peripheral circuit to erase the select transistors and the memory cells, increasing a threshold voltage of the select transistors within a range below an erase level, and increasing the threshold voltage of the select transistors up to a program level.. .
Sk Hynix Inc.

new patent

Semiconductor devices having initialization circuits and semiconductor systems including the same

A semiconductor device may include a boot-up operation circuit configured for executing a boot-up operation during a boot-up operation period after a power supply voltage signal reaches a predetermined level. The boot-up operation circuit may be configured for generating a boot-up period signal.
Sk Hynix Inc.

new patent

Semiconductor device

According to an embodiment, a semiconductor device includes a substrate, a connector, a volatile semiconductor memory element, multiple nonvolatile semiconductor memory elements, and a controller. A wiring pattern includes a signal line that is formed between the connector and the controller and that connects the connector to the controller.
Kabushiki Kaisha Toshiba





Follow us on Twitter
twitter icon@FreshPatents

###

This listing is a sample listing of patent applications related to Semiconductor Device for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Semiconductor Device with additional patents listed. Browse our RSS directory or Search for other possible listings.


2.8315

file did exist - 7667

1 - 1 - 136