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This page is updated frequently with new Rewrite-related patent applications. Subscribe to the Rewrite RSS feed to automatically get the update: related Rewrite RSS feeds. RSS updates for this page: Rewrite RSS RSS


Systems and methods for managing network resource requests

Ad-vantage Networks

Systems and methods for managing network resource requests

Methods and systems for creating a data-driven attribution model for assigning attribution credit to a plurality of…

Google

Methods and systems for creating a data-driven attribution model for assigning attribution credit to a plurality of…

Date/App# patent app List of recent Rewrite-related patents
07/02/15
20150186781
 Method and system for skipping over group(s) of rules based on skip group rule patent thumbnailnew patent Method and system for skipping over group(s) of rules based on skip group rule
A method and corresponding system for providing a skip group rule feature is disclosed. When a search for a key matches a skip group rule in a group of prioritized rules, the search skips over rules having priorities lower than the skip group rule and the search continues to a next group.
06/18/15
20150170072
 Systems and methods for managing network resource requests patent thumbnailSystems and methods for managing network resource requests
Systems and methods are configured to control network and content access. A url rewrite engine receives a content request from a client device coupled to a local network.
Ad-vantage Networks, Inc.
06/11/15
20150161654
 Methods and systems for creating a data-driven attribution model for assigning attribution credit to a plurality of events patent thumbnailMethods and systems for creating a data-driven attribution model for assigning attribution credit to a plurality of events
Systems and methods for creating rules for assigning attribution credit across events, includes, identifying, by a processor, conversions at a website. The processor identifies path types associated with the conversions.
Google Inc.
05/28/15
20150149662
 I/o module and process control system patent thumbnailI/o module and process control system
An i/o module according to one embodiment of the present invention includes a receiver electrically connectable to a field device and configured to receive first information autonomously transmitted from the field device, a storage storing the first information received by the receiver, and a comparator configured to compare the first information stored in the storage and second information newly received by the receiver and to rewrite the first information stored in the storage with the second information newly received by the receiver when the first information stored in the storage is different from the second information newly received by the receiver.. .
Yokogawa Electric Corporation
05/28/15
20150149436
 Rewrite constraints for database queries patent thumbnailRewrite constraints for database queries
A database system rewrites database queries based on rewrite constraints specification. The rewrite constraints specification provides directives to the database system to generate temporary tables for storing intermediate results of database queries and rewrite the corresponding database queries in terms of the temporary tables.
Paraccel Llc
05/28/15
20150146736
 Multi-tenant system, switch, controller and packet transferring method patent thumbnailMulti-tenant system, switch, controller and packet transferring method
A multi-tenant system is realized by the tunneling protocol. The multi-tenant system includes a server apparatus on which a virtual machine with tenant identification data operates; an equipment whose tenant identification data cannot be recognized; a plurality of switches configured to transfer a packet based on flow entries; and a controller configured to set the flow entries to the switches.
Nec Corporation
05/28/15
20150145833
 Circuit substrate, electro-optical device with input function, and electronic apparatus patent thumbnailCircuit substrate, electro-optical device with input function, and electronic apparatus
A circuit substrate according to the invention includes a pixel circuit that is provided for a pixel which is arranged in a display area provided on a substrate, in which the pixel circuit includes a pixel selection transistor; a data line that is connected to a source of the pixel selection transistor; a scan line that is connected to a gate of the pixel selection transistor; a pixel electrode; a memory unit that is connected to the pixel electrode and the pixel selection transistor, and that can switch an output state of a potential with respect to the pixel electrode; and a light sensor that can rewrite an output, which is retained in the memory unit by light input, with respect to the pixel electrode.. .
Seiko Epson Corporation
05/21/15
20150143348
 Hybrid dynamic code compiling device, method, and service system thereof patent thumbnailHybrid dynamic code compiling device, method, and service system thereof
An exemplary embodiment of the present disclosure illustrates a hybrid dynamic code compiling device having a parser, a native code generator, and a dynamic code rewriter, wherein the parser is coupled to the native code generator and the dynamic code rewriter. The parser receives and parses a first dynamic code to divide the first dynamic code into compilable blocks and non-compilable blocks.
Institute For Information Industry
05/21/15
20150143344
 Diagnosing production applications patent thumbnailDiagnosing production applications
A debugging and diagnostics system allow for dynamic code generation that inserts code into a production application to identify snappoints or breakpoints that cause snapshots to be taken if predefined conditionals are satisfied. The snappoints are associated with locations in source code for the production application and include conditional statements that must be met to create a snapshot of the production application.
Microsoft Corporation
05/21/15
20150138877
 Nonvolatile logic gate device patent thumbnailNonvolatile logic gate device
A nonvolatile logic gate device is configured to include a resistive network of a memory structure in which at least three nonvolatile resistive elements are connected, a reference resistive network as a reference resistance providing a tolerance of the memory structure to a resistance value of the resistive network of the memory structure, a writing part operable to selectively write or rewrite a value of each of the nonvolatile resistive elements in the resistive network into a maximum or a minimum corresponding to a logical value to be read when data are stored into the resistive network, and a logic circuit structure operable to use, as a logical value of the memory structure, a value obtained by comparison between the resistance value of the resistive network and the resistance value of the reference resistive network.. .
Nec Corporation
05/14/15
20150131972

Method and progressively deleting media objects from storage


A system for managing storage space on an electronic storage medium is provided in which a file format for stored data allows for progressive deletion of low-significance data, for example in a video or audio file, while allowing the remaining portions of the file to be subsequently retrieved. The file format allows for the ready deletion of low-significance data without having to open, edit and subsequently rewrite the data.
05/07/15
20150124812

Dynamic multipath forwarding in software defined data center networks


A mechanism is provided in a logically centralized controller for dynamic multipath forwarding in a software defined network. The mechanism identifies a set of multiple forwarding paths for a flow.
International Business Machines Corporation
04/30/15
20150117080

Multi-chip package and memory system


A multi-chip package includes a first group of memory chips that includes a first memory chip and a second memory chip, a second group of memory chips that includes at least one memory chip, a first internal wiring system that couples the first memory chip and the second memory chip to a first terminal configured to receive a chip-enable signal, a second internal wiring system that couples the at least one memory chip to a second terminal configured to receive the chip-enable signal. The first memory chip and the second memory chip each include a chip address memory region configured to store an address associated with the memory chip, and an address rewrite module configured to rewrite the address associated with the memory chip and stored in the chip address memory region in response to an external operation..
Kabushiki Kaisha Toshiba
04/23/15
20150109714

Ionizer and control method thereof


A polarity control unit includes a flag storage unit that stores any one of a first polarity pattern by which a positive direct-current voltage is applied to discharge needles in a first group and a negative direct-current voltage is applied to discharge needles in a second group and a second polarity pattern by which a negative direct-current voltage is applied to the discharge needles in the first group and a positive direct-current voltage is applied to the discharge needles in the second group, a flag update unit that rewrites one flag stored in the flag storage unit to another flag when a power switch is turned on from its off state or is turned off from its on state, and a command unit that commands a polarity pattern corresponding to the flag stored in the flag storage unit to be output from the polarity output unit.. .
Smc Corporation
04/09/15
20150098278

Non-volatile memory apparatus and data verification method thereof


A non-volatile memory apparatus and a data verification method thereof are provided. The non-volatile memory apparatus includes a plurality of memory cells, a page buffer, a write circuit, a sense amplifier, and a sense and compare circuit.
Ememory Technology Inc.
04/09/15
20150097792

Display device and controlling the same


According to one embodiment, a display device comprises a plurality of pixel circuits arrayed two-dimensionally. Each of the pixel circuits comprises a display element and a pixel memory configured to store a signal to drive the display element.
Japan Display Inc.
04/02/15
20150095626

Trace method and information processing apparatus


An information processing apparatus includes a rewriting unit and an execution unit. The rewriting unit rewrites a first instruction described at a trace point in a function defined in a program to a second instruction which gives instructions to execute a trace code, and stores the first instruction in a storage unit.
Fujitsu Limited
04/02/15
20150095511

Dynamic chunk manipulation for streaming mixed live and on-demand media: dynamic permutation layer


Timestamps for streams of media that transition from one media source to another (such as from live content to on-demand content, and vice versa) can be rewritten by a server to help ensure error-free streaming by the client. Embodiments can coordinate the creation of a client manifest with the dynamic creation of a requested segment of media (i.e., “chunk”) to determine how to rewrite timestamps of requested chunks such that they are continuous through the transition..
Unicorn Media, Inc.
04/02/15
20150095461

Dynamic chunk manipulation for streaming mixed live and on-demand media: application programming interface


Timestamps for streams of media that transition from one media source to another (such as from live content to on-demand content, and vice versa) can be rewritten by a server to help ensure error-free streaming by the client. Embodiments can coordinate the creation of a client manifest with the dynamic creation of a requested segment of media (i.e., “chunk”) to determine how to rewrite timestamps of requested chunks such that they are continuous through the transition..
Unicorn Media, Inc.
04/02/15
20150092498

Non-volatile memory for high rewrite cycles application


A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device.
Ememory Technology Inc.
03/26/15
20150089352

Key resource prefetching using front-end optimization (feo) configuration


Front-end optimization (feo) configuration information is leveraged to identify “key” resources required to load other pages on a site, and to automatically cause key resources to be prefetched to a server, and to the browser. In this approach, an feo analyzer uses knowledge of configured optimization templates to determine the key resources required to load pages for each template.
Akamai Technologies, Inc.
03/26/15
20150089177

Managing an analytic function to be performed on data stored in an input block


In an example, an analytic function to be performed on data stored in an input block is managed through an interface to a framework through which a user is to define the analytic function. The framework is to buffer batches of the data into a memory through implementation of a reader, a writer, a prereader, and a prewriter on the data stored in the input block when the user-defined analytic function is performed, and wherein the reader, the writer, the prereader, and the prewriter are individually movable with respect to each other in the input block.
03/19/15
20150078147

System and using stainless steel as a data archiving medium


An apparatus, method, and computer readable medium for writing data on a highly indestructible material is disclosed. A laser may write data on a first side of a highly indestructible material.
03/12/15
20150074490

Nonvolatile semiconductor memory device


According to an embodiment, a nonvolatile semiconductor memory device includes a nonvolatile memory, an ecc decoder, and a write controller. The nonvolatile memory includes a memory cell array and a buffer.
Kabushiki Kaisha Toshiba
03/12/15
20150074277

Train communication system


Provided is a network that is constituted in a train formation; communication relay devices; terminal devices; and a position-information distribution device. The communication relay devices rewrite position information from the position-information distribution device to vehicle information indicating positions of vehicles that are provided with the communication relay devices and transfer rewritten information.
Mitsubishi Electric Corporation
03/12/15
20150074076

Search method, apparatus and system


The present disclosure describes a search method, a search apparatus and a search system. The method includes: a data rewriting system that obtains, from a database, one or more search term candidates that are relevant to a present search term.
Alibaba Group Holding Limited
03/05/15
20150067242

Information processing device


In an information processing device, a nand flash memory has a first area and a second area in each of which a boot code is stored. A processor expands the boot code from the nand flash memory onto the random access memory, executes the expanded boot code, and rewrites the boot code in the first area and the boot code in the second area at different timings based on the number of times that boot is performed.
Kyocera Document Solutions Inc.
02/26/15
20150055656

Network appliance redundancy system, control apparatus, network appliance redundancy method and program


A network appliance redundancy system includes: a first switch arranged upstream of two different models of network appliances each of which switchably operates in an active system and a standby system; a second switch arranged downstream of the two different models of network appliances; and a control apparatus comprising a translation rule management unit learning a header translation rule(s) of a network appliance operating in the active system on the basis of header information of a packet transmitted from the first switch and header information of a packet received by the second switch via the network appliance operating in the active system and instructing, when the appliances in the active and standby systems are switched, the second switch to rewrite header information on the basis of the header translation rule(s) so as to obtain the same output packet as that from the network appliance operating in the active system.. .
Nec Corporation
02/26/15
20150055403

Memory device and memory system with sensor


According to one embodiment, a memory device includes: a nonvolatile memory that stores data according to a write access; an address memory that stores a first address described with a gray code; a first counter that counts up the first address for each write access, generates a second address as the count-up result, and supplies the second address to the nonvolatile memory; a rounding circuit configured to calculate a third address that is equal to or larger than a final output of the first counter and larger than the first address by one or a power of two after a series of write accesses is completed; and a controller that rewrites the third address in the address memory.. .
Kabushiki Kaisha Toshiba
02/19/15
20150052414

Non-volatile semiconductor storage apparatus


According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data.
Kabushiki Kaisha Toshiba
02/12/15
20150043588

Communication system, upper layer switch, control apparatus, switch control method, and program


A communication system includes: a core network including a lower layer switch that holds control information associating match condition(s) including lower layer header information, and processing content, and processes a received packet using control information having a match condition that matches the received packet; an upper layer switch, disposed at an edge of the core network, which rewrites a prescribed region of a header of a lower layer of a packet with content associated with communication content of an upper layer; and a control apparatus that instructs the upper layer switch to rewrite the header region of the lower layer, and also sets control information including, in a match condition, header information after the rewriting, in the lower layer switch.. .
Nec Corporation
02/05/15
20150035816

Liquid crystal display apparatus


According to one embodiment, a lateral electric-field type of liquid crystal display device includes a display panel including a plurality of liquid crystal pixels arranged in a matrix, and a controller configured to perform intermittent driving to rewrite an image signal to the liquid crystal pixels, wherein a frame frequency falls within a range of 10 hz to 20 hz, and an absolute value of a flexo coefficient (e11, e33) of a liquid crystal applied to the liquid crystal pixels is 1.6 pc/m or less.. .
Japan Display Inc.
01/15/15
20150015982

Optimum tape layout selection for improved error correction capability


According to one embodiment, a system for selecting an optimum tape layout to store data on a tape medium may include a processor and logic integrated with and/or executable by the processor, the logic being configured to: select a family of data set layouts based on parameters associated with at least a tape drive and the tape medium, compute a set of all minimum distances for the selected family of data set layouts, calculate a first performance metric associated with each possible set of parameters, select a best first performance metric from all calculated first performance metrics and store a set of parameters associated with the best first performance metric, and select a data set layout algorithm which utilizes the set of parameters associated with the best first performance metric, wherein the data set layout algorithm and a rewrite layout algorithm combine to form an optimum tape layout.. .
International Business Machines Corporation
12/25/14
20140380051

Secure data access using sql query rewrites


A mechanism is provided for secure data access in a data processing system. A database having two tables is provided.
International Business Machines Corporation
12/18/14
20140372742

Computer system and startup method


A computer system comprising a plurality of computers on which a plurality of operating systems run, wherein a memory stores a first hardware control unit, wherein a storage device stores a first os image, a second os image, a second hardware control unit for executing start processing of the second os, and an address rewrite unit, wherein the second hardware control unit includes a start unit for starting the second hardware control unit, wherein the address rewrite unit which is started by the first os is configured to: obtain an address of a storage area, in which address data to be rewritten is stored, as a target address, rewrite the address data stored in the storage area corresponding to the obtained target address and start the start unit, wherein the start unit is configured to start the second hardware control unit by using the rewritten address data.. .
Hitachi, Ltd.
12/18/14
20140371533

Endoscope device and endoscope system


The present invention is capable of setting a program corresponding to each programmable device for the programmable devices. This endoscope device and endoscope system are provided with: programmable devices performing processing in accordance with programs; and a rewrite control unit which transmits unique information which is specific to the programmable devices to an external storage device retaining the programs, receives the program corresponding to the unique information from the external storage device, and sets the received programs to the programmable devices..
Olympus Corporation
12/04/14
20140359403

Semiconductor integrated circuit


A semiconductor integrated circuit pertaining to the present invention comprises a plurality of storage elements for storing and holding an input signal, a majority circuit that outputs a result of a majority decision of outputs from the plurality of storage elements; an error detector circuit that detects a mismatch among the outputs of the plurality of storage elements and outputs error signals; and a monitor circuit that monitors the error signals from the error detector circuit, wherein the monitor circuit, based on the error signals, orders a refresh action that rewrites data for rectification to a storage element in which an output mismatch occurs out of the plurality of storage elements and, if rewrite and rectification by the refresh action are unsuccessful, sends a notification to an external unit or process.. .
12/04/14
20140359381

Memory controller and data storage device


A memory controller sets an estimated cell error ratio cerest based on an estimated retention time tret obtained from a calculated bit error ratio ber, a number of rewrite times nw/e, data datatag of a target cell and data dataadj of memory cells surrounding the target cell, sets an upper-level page llru and a lower-level page llrl with regard to all bits of read-out one-page data using the set estimated cell error ratio cerest and performs error correction and decoding of data read out from a flash memory using the settings of the upper-level page llru and the lower-level page llrl. This improves the error correction capability, while suppressing an increase in processing time..
11/27/14
20140347095

Bidirectional buffer and control method thereof


Bidirectional buffer 20d includes: multiplexer 30 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each input terminal; tristate buffer 51 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each output terminal and that receives the output of multiplexer 30 as input; demultiplexer 31 that receives the output of tristate buffer 51 as input; programming transistor tr0 whose drain terminal is connected to the input terminal of tristate buffer 51; and programming transistor tr1 whose drain terminal is connected to the output terminal of tristate buffer 51. Input terminals i1 and i3 of multiplexer 30 are connected to respective output terminals t1 and t2 of demultiplexer 31..
11/20/14
20140340580

Video display apparatus


In a video display apparatus a, a controller 9, while displaying video processed by a video processor 4 on a video display 3, displays luts 45r, 45g, and 45b which are tables of correction data for correcting luminance levels of red, green, and blue respectively. The controller 9 re-calculates and rewrites the correction data based on one adjustment point or two or more adjustment points p1 and p2 adjusted by the user..
11/13/14
20140337975

Method for analyzing spyware and computer system


A method for analyzing spyware and a computer system that relates to communication technology are provided. A trace of an executed spyware process is captured by the computer system.
11/06/14
20140330804

Automatic suggestion for query-rewrite rules


Embodiments of the invention relate to automatically suggesting query-rewrite rules. One embodiment includes providing a missing search result for a query.
11/06/14
20140327853

Liquid crystal display panel and electronic device


A lcd panel is proposed, which meets analog display mode and memory display mode. The lcd panel includes a capacitive element, first to third switch elements, and a circuit.
10/30/14
20140320479

Liquid crystal display device and driving the same


At the time of partial drive, the levels of voltages applied to data lines sl1 to sln are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines sl1 to sln are set to be higher than those for a moving-image display region with a relatively high rewrite frequency.
10/30/14
20140320477

Liquid crystal display device


Provided is a liquid crystal display device that includes: pixels, a pixel control unit, and a common voltage generation unit. The pixel includes: a display element; a first switching unit configured to sample each frame data; a first holding unit configured to form an sram, and to hold sub-frame data sampled; a second switching unit configured to output the sub-frame data; and a second holding unit configured to form a dram, and configured of which stored content is rewritten by the sub-frame data.
10/23/14
20140317341

System and flash memory data management


The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer.
10/23/14
20140316521

Rewriteable aberration-corrected gradient-index intraocular lenses


Systems and methods for rewritable aberration-corrected gradient-index intraocular lenses are provided. Various embodiments relate to rewritable aberration-corrected gradient-index intraocular lenses.
10/02/14
20140298089

Storage control device and storage control method


A storage control device includes a processor. The processor is configured to request a plurality of disk devices storing data therein to notify the processor of degradation information on degradation of data stored in the respective disk devices.
10/02/14
20140297767

Information processing apparatus and verification control method


An information processing apparatus obtains a plurality of messages transmitted between a client and a server, each message including at least one of a plurality of parameters and a value of the parameter. The information processing apparatus detects a parameter having different values set in different messages among the obtained plurality of messages, from among the plurality of parameters.
09/25/14
20140289449

Storage apparatus, storage controller and relocating data in solid state drive


According to one embodiment, a storage controller comprises an access statistic collection unit, a selection unit and a rewrite unit. The access statistic collection unit collects write frequencies of a plurality of small logical address areas having a predetermined size which configure a logical area of a logical unit defined using a solid state drive.
09/25/14
20140289446

Memory system and memory


According to one embodiment, a memory system includes a memory and a controller configured to control the memory. The memory includes a semiconductor memory region in which data rewrite is executed by an instruction of the controller, a timing determination module configured to derive a command input timing to the memory, based on the instruction and a clock which are received from the controller, and a status register configured to store the command input timing to the memory, which is derived by the timing determination module..
09/25/14
20140286175

Apparatus and controlling packet transfer


An apparatus includes a plurality of receiving ports and a plurality of transmitting ports. The apparatus stores, in a memory thereof, transfer control information for transferring a packet to a node that is able to transfer the received packet, and monitors packets received via the plurality of receiving ports.
09/18/14
20140282465

Methods for dynamic mobile application behavior modification subject to a behavior policy


The present invention provides a mechanism to change how mobile device applications, particularly android applications, work; essentially selectively modifying their behavior. Where an application provides a useful operation but also has functionality that can be detrimental to the desired action of a device, use of the application becomes problematic.
09/18/14
20140281748

Query rewrites for data-intensive applications in presence of run-time errors


An aspect of error handling includes a parsing block for pre-processing a document indexing application, a filtering block for discarding irrelevant documents, a transformation block to clean up and annotate input data by identifying a document language, and a processor configured for grouping inputs to collect documents for a same entity in a single spot. The processor processes a query operation.
09/18/14
20140281746

Query rewrites for data-intensive applications in presence of run-time errors


Embodiments relate to a method and computer program product for error handling. The method includes performing at least one query operation.
09/18/14
20140281247

Method to accelerate queries using dynamically generated alternate data formats in flash cache


A method for accelerating queries using dynamically generated columnar data in a flash cache is provided. In an embodiment, a method comprises a storage device receiving a first request for data that is stored in the storage device in a base major format in one or more primary storage devices.
09/18/14
20140281158

File differentiation based on data block identification


A memory system or flash card may include an algorithm for identifying and accounting for the rewrite frequency of data to be written to the card. The file system partition or file type of data may be used for monitoring rewrite frequency and predicting future rewrites.
09/11/14
20140258668

Systems and methods for managing storage space in hybrid data storage systems


The present invention relates to systems and methods for managing storage space in hybrid data storage systems. Specifically, the systems and methods of the present invention intelligently allocate data to solid state drives or other relatively high performance drives, and other data storage, such as, for example, hard drives or other like drives, based on data source, data type, data function or other like parameters.
08/28/14
20140244910

Electronic apparatus implemented with microprocessor with rewritable micro program and method to rewrite micro program


An intelligent optical transceiver able to revise a micro program by the host system is disclosed. The optical transceiver includes a mdio interface, a cpu, and a non-volatile memory.
08/28/14
20140241031

Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same


In some aspects, a memory cell is provided that includes a steering element and a memory element. The memory element includes a first conductive material layer, a first dielectric material layer disposed above the first conductive material layer, a second conductive material layer disposed above the first dielectric material layer, a second dielectric material layer disposed above the second conductive material layer, and a third conductive material layer disposed above the second dielectric material layer.
08/21/14
20140237203

Semiconductor memory card access apparatus, a computer-readable recording medium, an initialization method, and a semiconductor memory card


A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters.
08/21/14
20140233381

Communication apparatus, control apparatus, communication system, communication control method, and program


A communication apparatus, comprises: a packet processing unit that processes, based on a processing rule set by a control apparatus, a packet that corresponds to the processing rule; a statistical value measurement unit that measures a statistical value with respect to the packet processing based on the processing rule; and a processing rule management unit that rewrites a processing content of the processing rule to a packet discarding process, if the statistical value for the processing rule exceeds a predetermined threshold.. .
08/14/14
20140226413

Non-volatile buffering to enable sloppy writes and fast write verification


Method and apparatus for managing data in a memory. In accordance with some embodiments, input write data having a selected logical address are stored in a rewriteable non-volatile (nv) buffer.
08/07/14
20140223036

Peripheral, controlling peripheral, and firmware downloading system


A peripheral may be connected to a higher-level device. Firmware program data may be downloaded from the higher-level device to the peripheral.
08/07/14
20140218565

Image processing apparatus, image processing system, and image reading apparatus


An image processing apparatus is configured comprising a necessary/unnecessary determination data generating unit configured to generate necessary/unnecessary determination data; an image encoding unit assigning identification information respectively to, and recording, in a recording unit, each piece of data after division of each moving image of a moving image after encoding, a necessary/unnecessary determining unit configured to determine an unnecessary moving image frame based on necessary/unnecessary determination data; and a moving image file managing unit configured to rewrite information indicating a state of data at a recording unit in the recording unit corresponding to a moving image frame determined as unnecessary moving image frame by the necessary/unnecessary determining unit into information that there is no data.. .
07/17/14
20140201166

Rewriting relational expressions for different type systems


A computer determines that the type of one or more of a relational operator and operands of a relational expression originated in a first type system, and determines the sign of at least one of the operands. The computer rewrites the relational expression based on the sign of at least one of the operands, sends the rewritten relational expression for evaluation in a second type system, and receives the evaluated rewritten relational expression after evaluation in the second type system.
07/17/14
20140201165

Rewriting relational expressions for different type systems


A computer determines that the type of one or more of a relational operator and operands of a relational expression originated in a first type system, and determines the sign of at least one of the operands. The computer rewrites the relational expression based on the sign of at least one of the operands, sends the rewritten relational expression for evaluation in a second type system, and receives the evaluated rewritten relational expression after evaluation in the second type system.


Popular terms: [SEARCH]

Rewrite topics: Control Unit, Configuration Management, Source Code, Memory Cell, Concurrent, Input Device, Storage Device, User Interface, Amplification, Semiconductor, Nonvolatile Memory, Calibration, Volatile Memory, Ip Address, Host Computer

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