FreshPatents.com Logo
Enter keywords:  

Track companies' patents here: Public Companies RSS Feeds | RSS Feed Home Page
Popular terms

[SEARCH]

Nonvolatile Memory topics
Volatile Memory
Nonvolatile Memory
Memory Device
Memory Cell
Memory Cells
Crystallin
Semiconductor
Semiconductor Material
Control Unit
Data Storage
Operating System
Computing Device
Checkpoint
Dependency
Child Process

Follow us on Twitter
twitter icon@FreshPatents

Web & Computing
Cloud Computing
Ecommerce
Search patents
Smartphone patents
Social Media patents
Video patents
Website patents
Web Server
Android patents
Copyright patents
Database patents
Programming patents
Wearable Computing
Webcam patents

Web Companies
Apple patents
Google patents
Adobe patents
Ebay patents
Oracle patents
Yahoo patents

[SEARCH]

Nonvolatile Memory patents



      
           
This page is updated frequently with new Nonvolatile Memory-related patent applications. Subscribe to the Nonvolatile Memory RSS feed to automatically get the update: related Nonvolatile RSS feeds. RSS updates for this page: Nonvolatile Memory RSS RSS


Orchestrating management operations among a plurality of intelligent storage elements

Nonvolatile memory devices with aligned trench isolation regions

Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution

Date/App# patent app List of recent Nonvolatile Memory-related patents
07/17/14
20140201600
 Apparatus and method for encoding data for storage in multi-level nonvolatile memory patent thumbnailnew patent Apparatus and method for encoding data for storage in multi-level nonvolatile memory
A controller for a nonvolatile memory includes an encoder and a decoder. The memory includes memory cells that each store data using more than two levels.
07/17/14
20140201431
 Distributed procedure execution and file systems on a memory interface patent thumbnailnew patent Distributed procedure execution and file systems on a memory interface
Nonvolatile memory (e.g., flash memory, solid-state disk) is included on memory modules that are on a dram memory channel. Nonvolatile memory residing on a dram memory channel may be integrated into the existing file system structures of operating systems.
07/17/14
20140201427
 Storage control apparatus, data storage apparatus and method for storage control patent thumbnailnew patent Storage control apparatus, data storage apparatus and method for storage control
According to one embodiment, a storage control apparatus includes a first buffer controller and a second buffer controller. The first buffer controller is configured to store data of a first unit in each of data buffer regions, and the data of the first unit is transmitted from a host and written in a nonvolatile memory, or read from the nonvolatile memory and transmitted to the host.
07/17/14
20140201425
 Orchestrating management operations among a plurality of intelligent storage elements patent thumbnailnew patent Orchestrating management operations among a plurality of intelligent storage elements
An apparatus and associated methodology contemplating a data storage system having a group of processor-controlled intelligent storage elements (ises). Each ise in the group individually includes storage resources and a network interface.
07/17/14
20140198583
 Method and system for reducing the size of nonvolatile memories patent thumbnailnew patent Method and system for reducing the size of nonvolatile memories
Embodiments relate to system and methods including a plurality of nonvolatile memory elements wherein sets of least two nonvolatile memory elements each share one select element for selecting one of the nonvolatile memory elements of a particular one of the sets of nonvolatile memory elements for a read operation or a program operation.. .
07/17/14
20140198581
 Method of storing data in nonvolatile memory device and method of testing nonvolatile memory device patent thumbnailnew patent Method of storing data in nonvolatile memory device and method of testing nonvolatile memory device
A method of storing data in a nonvolatile memory device comprises performing a program operation on target memory cells among multiple memory cells, performing a first verify operation to determine whether the target memory cells are in a program pass state or a program fail state, and as a consequence of determining that the target memory cells are in the program pass state, performing a second verify operation to determine whether the target memory cells exhibit a program error symptom.. .
07/17/14
20140198577
 Semiconductor device patent thumbnailnew patent Semiconductor device
A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a mos type first transistor section (3) used for information storage, and a mos type second transistor section (4) which selects the first transistor section.
07/17/14
20140198574
 Nonvolatile memory and manipulating method thereof patent thumbnailnew patent Nonvolatile memory and manipulating method thereof
A manipulating method of a nonvolatile memory is provided and comprises following steps. The nonvolatile memory having a plurality of memory cell is provided.
07/17/14
20140198567
 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution patent thumbnailnew patent Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution
A system and methods to find the threshold voltage distribution across a set of nonvolatile memory cells, such that embodiments may incorporate this distribution information into calculations that may change the read compare voltages used to read the memory cells, while ensuring adequate separation in read voltage between different data states at which the memory cells may be read.. .
07/17/14
20140198556
 Nonvolatile memory device using variable resistive element and memory system having the same patent thumbnailnew patent Nonvolatile memory device using variable resistive element and memory system having the same
A nonvolatile memory device, which has an improved read reliability through a refresh operation, and a memory system, are provided. The nonvolatile memory device includes a resistive memory cell, a reference resistor corresponding to the resistive memory cell, a reference sense amplifier electrically connected to the reference resistor and configured to change a transition time of an output value of the reference resistor, and a refresh request signal generator configured to output the refresh request signal for the resistive memory cell when the transition time of an output value of the reference resistor is in a preset refresh requiring period..
07/17/14
20140197546
new patent Pad structures and wiring structures in a vertical type semiconductor device
Step shape pad structure and wiring structure in vertical type semiconductor device are include a first conductive line having a first line shape and including first pad regions at an upper surface of an edge portion, and a second conductive line having s second line shape and being spaced apart from the first conductive line and provided on the first conductive line. An end portion of the first conductive line is extended to a first position.
07/17/14
20140197481
new patent Vertical type semiconductor devices
A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines.
07/17/14
20140197465
new patent Nonvolatile memory devices with aligned trench isolation regions
A nonvolatile memory device includes a substrate, an elongate isolation region including a field insulation film disposed in a trench in the substrate, and a word line crossing the insulation region and including a tunneling insulation layer on an active region of the substrate adjacent the isolation region, a charge storage layer on the tunneling insulation layer and a blocking insulation layer on the charge storage layer. A first plane index of a bottom surface of the trench has a first interface trap density and a second plane index of a sidewall of the trench has a second interface trap density equal to or less than the first interface trap density.
07/17/14
20140197368
new patent Nonvolatile memory element, nonvolatile memory device, nonvolatile memory element manufacturing method, and nonvolatile memory device manufacturing method
A nonvolatile memory element including: a first electrode; a second electrode; a variable resistance layer that is between the first electrode and the second electrode and includes, as stacked layers, a first variable resistance layer connected to the first electrode and a second variable resistance layer connected to the second electrode; and a side wall protecting layer that has oxygen barrier properties and covers a side surface of the variable resistance layer. The first variable resistance layer includes a first metal oxide and a third metal oxide formed around the first metal oxide and having an oxygen deficiency lower than that of the first metal oxide, and the second variable resistance layer includes a second metal oxide having an oxygen deficiency lower than that of the first metal oxide..
07/10/14
20140192596
Nonvolatile memory with split substrate select gates and heirarchical bitline configuration
Generally, the present disclosure provides a non-volatile memory device having a hierarchical bitline structure for preventing erase voltages applied to one group of memory cells of the memory array from leaking to other groups in which erasure is not required. Local bitlines are coupled to the memory cells of each group of memory cells.
07/10/14
20140192588
Nonvolatile memory device and read method thereof
A nonvolatile memory device is provided which includes a main area including main cells connected to word lines and main bit lines; a reference area including reference cells connected to the word lines and reference bit lines and programmed using the same write condition as that of the main area; a reference sense amplifier circuit configured to read data written at the reference area through the reference bit lines at a read operation; and control logic configured to control the reference sense amplifier circuit such that data written at the reference area is shifted with a weight scheme and then read, the data written at the reference area being used as a read reference value of the main area at a read operation.. .
07/03/14
20140189469
Nonvolatile memory devices with age-based variability of read operations and methods of operating same
Integrated circuit memory systems and methods include comparing a number of erase cycles of a memory block corresponding to a read request to a first value and reading data stored in the memory block according to a first read condition corresponding to a first reliability improvement operation when the number of erase cycles of the memory block is less than the first value. An error of the data read according to the first read condition may be corrected using an error correction code (ecc) when the error of the data read according to the first read condition is correctable..
07/03/14
20140189371
Method and apparatus for a trust processor
In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit.
07/03/14
20140189221
Semiconductor storage device and method of controlling the same
A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect to the first and second nonvolatile memories.. .
07/03/14
20140189218
Method of programming data into nonvolatile memory and method of reading data from nonvolatile memory
Disclosed is a method of programming data into a nonvolatile memory that includes a plurality of memory cells connected with a word line, each memory cell storing first to mth bits of a plurality of bits, the plurality of bits forming first to mth pages. The method includes generating first to mth metadata based on first to mth page data received; rearranging the first to mth metadata to generate first to mth rearranged metadata; and programming the first to mth rearranged metadata and the first to mth page data into the first to mth pages, respectively..
07/03/14
20140189198
Memory allocation for fast platform hibernation and resumption of computing systems
Memory allocation for fast platform hibernation and resumption of computing systems. An embodiment of an apparatus includes logic at least partially implemented in hardware, the logic to: dynamically allocate at least a first portion of a nonvolatile memory; in response to a command to enter the apparatus into a standby state, the logic to store at least a portion of a context data from a volatile memory to the dynamically allocated first portion of the nonvolatile memory; and in response to a resumption of operation of the apparatus, the logic to copy at least the portion of the context data from the first portion of the nonvolatile memory to the volatile memory, and to reclaim the first portion of the nonvolatile memory for dynamic allocation..
07/03/14
20140185384
Nonvolatile memory devices including simultaneous impedance calibration
An operating method of a nonvolatile memory device is provided which includes receiving a command sequence; detecting whether the input command sequence accompanies an impedance calibration operation; and if the input command sequence accompanies the impedance calibration operation, simultaneously performing an operation corresponding to the input command sequence and the impedance calibration operation.. .
07/03/14
20140185374
Nonvolatile memory and method with improved i/o interface
Each i/o channel between a controller and one or more memory dice of a memory device has a driver on one end and a receiver at the other end. The receiver is optionally terminated with a pseudo open-drain (“pod”) termination instead of the conventional center-tapped (“ctt”) termination to save energy.
07/03/14
20140185370
Nonvolatile memory apparatus having magnetoresistive memory elements and method for driving the same
A semiconductor memory apparatus includes a source line, a first bit line disposed over the source line, a second bit line disposed under the source line, a first memory cell between the source line and the first bit line, and a second memory cell between the source line and the second bit line.. .
07/03/14
20140185360
Write method for writing to variable resistance nonvolatile memory element and variable resistance nonvolatile memory device
A write method for writing to a variable resistance nonvolatile memory element, comprising applying a set of strong recovery-voltage pulses at least once to the variable resistance nonvolatile memory element when it is determined that the resistance state of the variable resistance nonvolatile memory element fails to change to a second resistance state, remaining in a first resistance state, the set of strong recovery-voltage pulses including pulses: (1) a first strong recovery-voltage pulse which has a greater amplitude than a normal second voltage for changing the resistance state to the first resistance state, and has the same polarity as the second voltage; and (2) a second strong recovery-voltage pulse which follows the first strong recovery-voltage pulse and has a longer pulse width than the pulse width of the normal first voltage for changing the resistance state to the second resistance state, and has the same polarity as the first voltage.. .
07/03/14
20140183612
Nonvolatile memory structure and fabrication method thereof
A nonvolatile memory structure includes a semiconductor substrate having thereon a first oxide define (od) region, a second od region and a third od region arranged in a row. The first, second, and third od regions are separated from one another by an isolation region.
07/03/14
20140183436
Nonvolatile memory device having a current limiting element
Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element.
06/26/14
20140181439
Memory system
A memory system includes a processor, one or more volatile memory dies stacked with the processor and one or more nonvolatile memory dies stacked with the processor and the volatile memory dies. The processor transfers data stored in the volatile memory die to the nonvolatile memory die in response to a backup signal, and transfers the data stored in the nonvolatile memory die to the volatile memory die in response to a recovery signal..
06/26/14
20140181362
Electronic device for storing data on pram and memory control method thereof
The present disclosure relates to an electronic device for storing data on pram and a memory control method thereof the electronic device of the present disclosure comprises: a nonvolatile memory in which data is stored; a volatile memory in which an address conversion table of a nonvolatile memory is stored; and a controller that stores data on a nonvolatile memory by referencing an address conversion table of a nonvolatile memory stored on a volatile memory. Due to this, a nonvolatile memory having limitative number of write and read such as pram can be operated more effectively..
06/26/14
20140180310
Medical-technical device calibration
Robotic surgical tools, systems, and methods for preparing for and performing robotic surgery include a memory mounted on the tool. The memory can perform a number of functions when the tool is loaded on the tool manipulator: first, the memory can provide a signal verifying that the tool is compatible with that particular robotic system.
06/26/14
20140177368
Nonvolatile memory apparatus
A nonvolatile memory apparatus includes a memory cell configured to receive a first current and a second current through a bit line which is connected to a sensing node; a sensing node level control unit configured to be driven in response to a control signal, compare a reference voltage and a voltage of the sensing node, and output a driving signal to a driving node; a first current driving unit configured to output the first current to the driving node by using a first driving voltage in response to the driving signal; and a current control unit configured to perform a discharge operation of the bit line or electrically connect the driving node and the sensing node, in response to the control signal.. .
06/26/14
20140177355
Nonvolatile memory apparatus
A nonvolatile memory apparatus includes a read driver. The read driver unit is configured to apply read current to a memory cell in a normal read operation for outputting data stored in the memory cell, and apply refresh current larger than the read current to the memory cell in a refresh operation..
06/26/14
20140177353
Nonvolatile memory apparatus
A nonvolatile memory apparatus includes a read/write control unit and a voltage generation unit and the memory cell. The read/write control circuit is configured to supply a bias voltage in response to a read control signal, a write control signal and data.
06/26/14
20140177321
Nonvolatile memory device and related operating method
A method is for driving a nonvolatile memory device, where the nonvolatile memory device includes a memory cell array composed of resistance memory cells. The method includes electrically connecting a clamping circuit, a line resistor and a selected one of the resistance memory cells in series between a sensing node and a ground.
06/26/14
20140177319
Nonvolatile memory apparatus
A nonvolatile memory apparatus includes a sensing voltage generation unit, a memory cell, a current copy unit and a data sensing unit. The sensing voltage generation unit provides a sensing voltage with a constant level, to a sensing node.
06/26/14
20140175592
Semiconductor image sensor module and method of manufacturing the same
A cmos type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an a/d converter array.
06/26/14
20140175533
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes a memory gate including a memory layer provided over a substrate and a gate electrode provided over the memory layer, the memory gate having first and second opposing sidewalls disposed on first and second sides of the memory gate, respectively; first and second select gates disposed on the first and second sidewalls of the memory gate; a source region formed in the substrate proximate to the first side of the memory gate; a drain region formed in the substrate proximate to the second side of the memory gate; and a gate contact coupled to the gate electrode of the memory gate and to the first select gate, or the second select gate, or both.. .
06/26/14
20140175529
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device includes a floating gate formed over a substrate; a contact plug formed on a first side of the floating gate and disposed parallel to the floating gate with a gap defined therebetween; and a spacer formed on a sidewall of the floating gate and filling the gap, wherein the contact plug and the floating gate have a sufficiently large overlapping area to enable the contact plug to operate as a control gate for the floating gate.. .
06/26/14
20140175369
Manufacturing method of nonvolatile memory device and nonvolatile memory device
A method of manufacturing a non-volatile memory device comprises: forming a first electrode layer; a variable resistance material layer, a second electrode layer; and a hard mask layer, forming a first resist mask extending in a first direction on the hard mask layer; forming a first hard mask extending in the first direction by etching the hard mask layer using the first resist mask; forming a second resist mask extending in a second direction, on the first hard mask such that the width of the second resist mask is greater than the width of the first resist mask; forming a second hard mask by etching the first hard mask using the second resist mask; and forming a variable resistance element by patterning, by etching the second electrode layer, the variable resistance material layer and the first electrode layer using the second hard mask.. .
06/26/14
20140175363
Forming nonvolatile memory elements by diffusing oxygen into electrodes
Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing.
06/26/14
20140175357
Morphology control of ultra-thin meox layer
A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer.
06/26/14
20140175354
Sequential atomic layer deposition of electrodes and resistive switching components
Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers.
06/19/14
20140173315
Information processing apparatus operable in power saving mode and method for controlling the same
In an information processing apparatus operable in a power saving mode, a sub cpu reads out initial screen data pre-stored in a nonvolatile memory, and displays it on a display screen when the information processing apparatus returns from the power saving mode. Further, the sub cpu detects coordinate data of an area touched by a user on the initial screen, and stores it into the nonvolatile memory.
06/19/14
20140173268
Information processing apparatus, method for controlling information processing apparatus, non-transitory recording medium storing control tool, host device, non-transitory recording medium storing performance evaluation tool, and performance evaluation method for external memory device
According to the embodiments, a nonvolatile memory device is configured to store a normal operating system, and store a bootloader. A host device is capable of initiating the normal operating system by using the bootloader.
06/19/14
20140173189
Computing system using nonvolatile memory as main memory and method for managing the same
A method of managing data of a computing system is provided, where the computing system uses a nonvolatile memory as a main memory. The method includes loading a process into the nonvolatile memory in response to a first run request, freezing the process loaded into the nonvolatile memory in response to an exit request of the process, and activating the process frozen in the nonvolatile memory in response to a second run request of the process.
06/19/14
20140173184
Data storage device and operating method thereof
A method of operating a data storage device includes setting program verify voltages for verifying whether memory cells of a nonvolatile memory device are programmed to desired program states; transmitting the set program verify voltages to the nonvolatile memory device; generating data patterns respectively corresponding to program states based on the program verify voltages; transmitting a data pattern corresponding to the program verify voltages to the nonvolatile memory device; and programming the memory cells with the transmitted data pattern.. .
06/19/14
20140173183
Data storage device and method of operating the same
An operating method of a data storage device including nonvolatile memory devices includes making a victim block list for victim blocks for which a merge operation is to be performed and copying valid pages of the victim bocks to a merge block. The method also includes determining whether there is a victim block which has an erase-held valid page selectively erasing the victim blocks included in the victim block list, according to which victim blocks have an erase-held page, and updating the victim block list according to which victim blocks are erased..
06/19/14
20140169104
Nonvolatile flash memory structures including fullerene molecules and methods for manufacturing the same
Embodiments of tunneling barriers and methods for same can embed molecules exhibiting a monodispersion characteristic into a dielectric layer (e.g., between first and second layers forming a dielectric layer). In one embodiment, by embedding c60 molecules inbetween first and second insulating layers forming a dielectric layer, a field sensitive tunneling barrier can be implemented.
06/19/14
20140169095
Select transistor tuning
In a nonvolatile memory array in which a select transistor includes a charge storage element, the threshold voltage of the select transistor is monitored, and if the threshold voltage deviates from a desired threshold voltage range, charge is added to, or removed from the charge storage element to return the threshold voltage to the desired threshold voltage range.. .
06/19/14
20140169068
Nonvolatile memory device having variable resistive elements and method of driving the same
A method is provided for driving a nonvolatile memory device. The method includes selecting first write drivers based on a predetermined current, performing a first program operation on resistive memory cells corresponding to the first write drivers, verifying whether the resistive memory cells have passed or failed in the first program operation and sorting information regarding failed bit memory cells that failed in the first program operation, selecting second write drivers based on the sorted failed bit memory cell information, and performing a second program operation on resistive memory cells corresponding to the second write drivers..
06/19/14
20140167132
Semiconductor device
A nonvolatile memory cell includes a first n-well, a second n-well separated from the first n-well in a first direction, a selection transistor formed in the first n-well, a floating gate electrode formed to overlap with a part of the first n-well and a part of the second n-well in a plan view, and an n-conductivity-type semiconductor regions formed in the second n-well on both sides of the floating gate electrode. In write operation, −7 v is applied to the drain of a selected nonvolatile memory cell, −8 v is applied to the gate electrode of the selection transistor, and further −3 v is applied to the n-conductivity-type semiconductor region for obtaining a higher write speed.
06/19/14
20140166969
Nonvolatile memory device using a tunnel oxide as a passive current steering element
Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. The electrical properties of the current limiting component are configured to lower the current flow through the variable resistance layer during the logic state programming steps by adding a fixed series resistance in the resistive switching memory element of the nonvolatile memory device.
06/19/14
20140166968
Nonvolatile memory cell comprising a diode and a resistance-switching material
A nonvolatile memory cell is provided that includes a diode and a reversible resistance-switching element that includes a resistance-switching metal oxide or nitride, the metal oxide or nitride including only one metal. Numerous other aspects are provided..
06/19/14
20140166960
Il-free mim stack for clean rram devices
A nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, and methods of forming the same. A nonvolatile memory element includes a first electrode layer formed on a substrate, a resistive switching layer formed on the first electrode layer, and a second electrode layer.
06/19/14
20140166956
Using saturated and unsaturated ald processes to deposit oxides as reram switching layer
A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer.
06/12/14
20140164880
Error correction code rate management for nonvolatile memory
An apparatus having an interface and a circuit is shown. The interface is coupled to a memory that is nonvolatile.
06/12/14
20140164717
Systems and methods for improved communications in a nonvolatile memory system
Systems and methods are provided for improved communications in a nonvolatile memory (“nvm”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and nvm dies included in the system.
06/12/14
20140164688
Soc system and method for operating the same
A soc system includes a central processing unit; a memory management unit receiving a virtual address from the central processing unit and converting the virtual address into a physical address; a main memory implemented by a volatile memory and directly accessed through the physical address converted by the memory management unit; and a storage implemented by a nonvolatile memory separate from the main memory and including a first area directly accessed through the physical address converted by the memory management unit.. .
06/12/14
20140164683
Nonvolatile memory apparatus, operating method thereof, and data processing system having the same
A nonvolatile memory apparatus includes: a memory cell array; a write driver/sense amplifier (wd/sa) configured to program data into the memory cell array or read data from the memory cell array; and an i/o controller configured to receive the read data from the memory cell array from the wd/sa, decide a coding mode based on comparison data between write data and the read data, encode the write data according to the coding mode, and provide the encoded data to the wd/sa.. .
06/12/14
20140164682
Nonvolatile memory apparatus, operating method thereof, and data processing system having the same
Provided is a nonvolatile memory apparatus which writes data into a memory cell according to a program and verify (pnv) operation, wherein the nonvolatile memory apparatus performs the pnv operation for first data during a first time, and performs a plurality of pnv operations for second data during the first time.. .
06/12/14
20140162419
Method of manufacturing nonvolatile memory device
A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate; gate electrodes on the substrate, the gate electrodes being disposed along an outer side wall of the channel region and spaced apart from one another; and a channel pad that extends from one side of the channel region to an outside of the channel region, the channel pad covering a top surface of the channel region.. .
06/12/14
20140160858
Nonvolatile memory system and refresh method
A memory system including non-volatile memory devices and a corresponding refresh method are disclosed. The method groups memory blocks of the non-volatile memory devices into memory groups, determines a refresh sequence for the memory groups, and refreshes the memory groups in accordance with the refresh sequence..
06/12/14
20140160857
Non-volatile memory device, driving method of memory controller controlling the non-volatile memory device and memory system including the memory controller and the non-volatile memory device
The present inventive concept provides a driving method of memory controller controlling nonvolatile memory device using variable resistive element. The memory controller may control a plurality of first memory devices and a second memory device.
06/12/14
20140160847
Nonvolatile memory device and memory system comprising same
A nonvolatile memory device comprises a 3d memory cell array comprising multiple mats corresponding to different bit lines, each of the mats comprising multiple memory blocks, each of the memory blocks comprising multiple cell strings disposed perpendicular to a substrate and multiple string selection lines configured to select or unselect the cell strings, and each of the cell strings comprising at least one ground selection transistor, multiple memory cells, and at least one string selection transistor stacked in a direction perpendicular to the substrate. The nonvolatile memory device further comprises a string selection controller electrically connected to the mats through the string selection lines and configured to provide multiple string selection signals respectively corresponding to the string selection lines.
06/12/14
20140160842
Adaptive operation of multi level cell memory
A multi level cell (mlc) nonvolatile memory is tested and, if it fails to meet an mlc specification, is reconfigured for operation as an slc memory by assigning two of the mlc memory cell states as slc states in a first slc mode, according to predefined sets of criteria. Subsequently, different mlc memory cell states are assigned as slc states in a second slc mode..
06/12/14
20140160831
Nonvolatile memory devices using variable resistive elements and related driving methods thereof
Driving methods of a nonvolatile memory device are provided. The driving method includes providing a start pulse adjusted based on a previous write operation to a resistive memory cell to write data, verifying whether the data has accurately been written using the start pulse, and executing a write operation on the resistive memory cell by an incremental one-way write method or a decremental one-way write method according to the verify result.
06/05/14
20140157068
Programming nonvolatile memory based on statistical analysis of charge level distributions of memory cells
A system includes a read module, a statistical data generating module, and a storing module. The read module reads charge levels of nonvolatile memory cells and generates read signals.
06/05/14
20140157006
Nonvolatile memory modules and authorization systems and operating methods thereof
Memory modules and authorization systems include a nonvolatile memory, an authentication engine configured to receive an initialization request from a user system, configured to generate a certification value based on device identifiers of devices includes in the user system in response to the initialization request and configured to control access to the nonvolatile memory based on the certification value, and a certification value storage configured to store the certification value.. .
06/05/14
20140156964
Semiconductor storage device and buffer operation method thereof
A method of operating a semiconductor storage device is provided. A memory space of a buffer memory is allocated into a data area for storing user data and a map area for storing map data.
06/05/14
20140156919
Isolation switching for backup memory
Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system.
06/05/14
20140156916
Control arrangements and methods for accessing block oriented nonvolatile memory
A read/write arrangement is described for use in accessing at least one nonvolatile memory device in read/write operations with the memory device being made up of a plurality of memory cells which memory cells are organized as a set of pages that are physically and sequentially addressable with each page having a page length such that a page boundary is defined between successive ones of the pages in the set. The read/write arrangement includes a control arrangement that is configured to store and access a group of data blocks that is associated with a given write operation in a successive series of pages of the memory such that at least an initial page in the series is filled and each block includes a block length that is different than the page length..
06/05/14
20140156873
Electronic apparatus
A programmable display device includes a usb interface to which a usb removable drive device is connected, a nonvolatile memory configured to store usb removable drive device peculiar information peculiar to the usb removable drive device and drive allocation fixing setting information indicating correspondence between the usb removable drive device and a drive number and incorporated in the programmable display device, and a control unit configured to allocate, when information coinciding with the usb removable drive device peculiar information acquired from the usb removable drive device connected to the usb interface is included in drive allocation information stored in the nonvolatile memory, a drive number associated according to the drive allocation information to the usb removable drive device connected to the usb interface.. .


Popular terms: [SEARCH]

Nonvolatile Memory topics: Volatile Memory, Nonvolatile Memory, Memory Device, Memory Cell, Memory Cells, Crystallin, Semiconductor, Semiconductor Material, Control Unit, Data Storage, Operating System, Computing Device, Checkpoint, Dependency, Child Process

Follow us on Twitter
twitter icon@FreshPatents

###

This listing is a sample listing of patent applications related to Nonvolatile Memory for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Nonvolatile Memory with additional patents listed. Browse our RSS directory or Search for other possible listings.
     SHARE
  
         


FreshNews promo



0.5071

3885

0 - 1 - 72