Images List Premium Download Classic

Memory Management

Memory Management-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


loading
Multi-tenant memory service for memory pool architectures
International Business Machines Corporation
October 12, 2017 - N°20170293447

A memory management service occupies a configurable portion of an overall memory system in a disaggregate compute environment. The service provides optimized data organization capabilities over the pool of real memory accessible to the system. The service enables various types of data stores to be implemented in hardware, including at a data structure level. Storage capacity conservation is enabled through ...
Memory management with reduced fragmentation
International Business Machines Corporation
October 12, 2017 - N°20170293432

Various memory management apparatus and methods are disclosed. In one aspect, a method of memory management is provided that includes receiving a data block in a virtual space, sub-dividing the data block into plural sub-blocks of the same size, and mapping the plural sub-blocks to a physical space according to a selected memory mapping efficiency mode.
Memory protection at a thread level for a memory protection key architecture
Intel Corporation
October 05, 2017 - N°20170286326

A processing system includes a processing core to execute a task and an input output (io) memory management unit, coupled to the core. The io memory management unit includes a storage unit to store a page table entry including an identifier of a memory domain and a protection key associated with the identifier. The protection key indicates whether a memory ...
Memory Management Patent Pack
Download 175+ patent application PDFs
Memory Management Patent Applications
Download 175+ Memory Management-related PDFs
For professional research & prior art discovery
inventor
  • 175+ full patent PDF documents of Memory Management-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Hardware apparatuses and methods for memory performance monitoring
Qualcomm Incorporated
October 05, 2017 - N°20170286302

Methods and apparatuses relating to memory performance monitoring are described. In one embodiment, a processor includes at least one core, a performance monitoring unit, and a memory management unit including a first allocator to allocate a first virtual memory region of a memory for a first data structure, a second allocator to allocate a second, different virtual memory region of ...
Memory management
Qualcomm Incorporated
October 05, 2017 - N°20170286171

System and techniques for memory management are described herein. A request for an adjusted process-value for a process may be received. Here, the adjusted process-value may be used to compare resident processes to determine which resident process will be terminated in certain circumstances. In response to the request for the adjusted process-value, a launch-time weight for the process may be ...
Handling memory requests
Imagination Technologies Limited
October 05, 2017 - N°20170286151

A converter module is described which handles memory requests issued by a cache (e. G. An on-chip cache), where these memory requests include memory addresses defined within a virtual memory space. The converter module receives these requests, issues each request with a transaction identifier and uses that identifier to track the status of the memory request. The converter module sends ...
Memory Management Patent Pack
Download 175+ patent application PDFs
Memory Management Patent Applications
Download 175+ Memory Management-related PDFs
For professional research & prior art discovery
inventor
  • 175+ full patent PDF documents of Memory Management-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Multi-level memory management
Intel Corporation
September 28, 2017 - N°20170277633

A multi-level memory management circuit can remap data between near and far memory. In one embodiment, a register array stores near memory addresses and far memory addresses mapped to the near memory addresses. The number of entries in the register array is less than the number of pages in near memory. Remapping logic determines that a far memory address of ...
Technologies for memory management of neural networks with sparse connectivity
Intel Corporation
September 28, 2017 - N°20170277628

Technologies for memory management of a neural network include a compute device to read a memory of the compute device to access connectivity data associated with a neuron of the neural network, determine a memory address at which weights corresponding with the one or more network connections are stored, and access the corresponding weights from a memory location corresponding with ...
Dynamic memory management in workload acceleration
Lenovo Enterprise Solutions (singapore) Pte. Ltd
September 28, 2017 - N°20170277462

An apparatus for selecting a memory management method includes a memory condition module that determines memory parameters of host memory and device memory prior to a device executing a function and a memory selection module that selects a memory management method based on the memory parameters. The apparatus includes and an implementation module that implements the selected memory management method ...
Memory management method, memory storage device and memory control circuit unit
Phison Electronics Corp.
September 28, 2017 - N°20170277436

A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first data; performing a first programming process and determining whether a total number of a first-type physical unit is no larger than a first threshold value, wherein each physical unit belonging to the first-type physical unit does not store valid ...
Data processing method, memory management unit, and memory control device
Huawei Technologies Co., Ltd.
September 21, 2017 - N°20170270051

A method for processing data, a memory management unit and a memory control device are disclosed. In an embodiment, the method includes receiving, by a memory control device, a first data packet carrying a virtual address and a page table base address that are sent by a memory management unit, executing, by the memory control device, a page table walk ...
Memory management method, memory control circuit unit and memory storage device
Phison Electronics Corp.
September 21, 2017 - N°20170269873

A memory management method for a rewritable non-volatile memory module is provided. The memory management method includes using a first management mode to manage the rewritable non-volatile memory module after the rewritable non-volatile memory module is powered on; and using a second management mode to manage the rewritable non-volatile memory module if a shut down command is received from a ...
Memory management system and methods
City Of Hope
September 14, 2017 - N°20170262189

A memory management system and methods of using the same are disclosed herein. The memory management system can include storage devices including a tier 0 memory and a tier 1 memory. The storage devices can be connected to one or several user devices via one or several sans and one or several virtualization devices. The one or several virtualization devices can control ...
Memory Management Patent Pack
Download 175+ patent application PDFs
Memory Management Patent Applications
Download 175+ Memory Management-related PDFs
For professional research & prior art discovery
inventor
  • 175+ full patent PDF documents of Memory Management-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Method and system for dynamically updating data fields of buffers
Red Hat, Inc.
September 07, 2017 - N°20170255548

A computing system can include memory management capabilities. In one embodiment, the system receives a request to update a first size of each of a plurality of portions of memory to a second size. The plurality of portions of memory can be associated with a first memory pool and the first memory pool can be associated with a memory pool ...
Device, data saving process method and medium for data saving process program
Fujitsu Limited
September 07, 2017 - N°20170255411

A pre-copy creator creates a copy of a memory area that is used by an application that is switched to a background and updates a memory management table. At a time of transition to a hibernation mode, an uncopied-area saving unit refers to the memory management table and creates a copy of a memory area that is used by the ...
System and method for improved memory performance using cache level hashing
Qualcomm Incorporated
August 31, 2017 - N°20170249249

Various embodiments of methods and systems for cache-level memory management in a system on a chip (“soc”) are disclosed. Memory utilization is optimized in certain embodiments through application of customized hashing algorithms at the lower level cache of individual application clients. Advantageously, for those application clients that do not require or benefit from hashing transaction traffic ...
Memory management system with multiple boot devices and method of operation thereof
Smart Modular Technologies, Inc.
August 31, 2017 - N°20170249156

A memory management system, and method of operation thereof, includes: a primary device of a resilient storage module configured as a boot device for booting a computer system; an operational status received from the computer system; a secondary device of the resilient storage module configured as the boot device based on the operational status indicating a non-operational state; and a ...
Multiple input-output memory management units with fine grained device scopes for virtual machines
Red Hat Israel, Ltd.
August 31, 2017 - N°20170249106

A system and method of emulated input-output memory management units includes a management software associating a first device with a first input-output memory management unit having a first security designation, and associating a second device with a second input-output memory management unit having a second security designation different from the first security designation. A hypervisor constructs a table that describes ...
Managing memory fragmentation in hardware-assisted data compression
Google Inc.
August 24, 2017 - N°20170242614

Systems, devices, and methods for managing fragmentation in hardware-assisted compression of data in physical computer memory which may result in reduced internal fragmentation. An example computer-implemented method comprises: providing, by a memory management program to compression hardware, a compression command including an address in physical computer memory of data to be compressed and a list of at least two available ...
Scalable low-latency mesh interconnect for switch chips
Broadcom Corporation
August 10, 2017 - N°20170228335

A device implementing a scalable low-latency mesh may include a memory management unit, an egress processor, and an egress cell circuit that includes at least a first queue and a second queue. The memory management unit may be configured to buffer first cells for transmission. The egress cell circuit may be configured to queue the first cells from the memory ...
Method and system for optimized garbage collection in a storage device
Wipro Limited
August 10, 2017 - N°20170228313

The present disclosure relates to a method and system for optimizing garbage collection in a storage device. In an embodiment, number of free pages, number of valid pages and number of invalid pages in each of one or more memory blocks in the storage device is determined by a memory management system. Further, at least one target memory block having ...
Loading