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Memory Management

Memory Management-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Scalable low-latency mesh interconnect for switch chips
Broadcom Corporation
August 10, 2017 - N°20170228335

A device implementing a scalable low-latency mesh may include a memory management unit, an egress processor, and an egress cell circuit that includes at least a first queue and a second queue. The memory management unit may be configured to buffer first cells for transmission. The egress cell circuit may be configured to queue the first cells from the memory ...
Method and system for optimized garbage collection in a storage device
Wipro Limited
August 10, 2017 - N°20170228313

The present disclosure relates to a method and system for optimizing garbage collection in a storage device. In an embodiment, number of free pages, number of valid pages and number of invalid pages in each of one or more memory blocks in the storage device is determined by a memory management system. Further, at least one target memory block having ...
Memory management method, memory control circuit unit and memory storage device
Phison Electronics Corp.
August 10, 2017 - N°20170228172

A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: determining whether a relative relation between a first wear value of first physical erasing units initially configured to be programmed based on a first programming mode and a second wear value of second physical erasing units initially configured to be programmed ...
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Memory Management Patent Applications
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  • 175+ full patent PDF documents of Memory Management-related inventions.
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End of life prediction based on memory wear
Sandisk Technologies Llc
August 03, 2017 - N°20170221573

A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (dr), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of ...
Dynamic cache memory management with translation lookaside buffer protection
International Business Machines Corporation
August 03, 2017 - N°20170220484

A computer-implemented method for protecting a translation lookaside buffer (tlb) from tlb pollution includes receiving, via a processor, a virtual address for a data portion, determining, via the processor, whether the virtual address has a classification of memory cache transiency, creating, via the processor, a tlb entry in a first tlb, wherein the tlb entry omits a most recently used (...
Dynamic cache memory management with cache pollution avoidance
International Business Machines Corporation
August 03, 2017 - N°20170220479

A computer -implemented method for managing a cache memory includes fetching, via a processor, a data portion, identifying, via the processor, a transiency classification of a data portion in a memory address range, saving, via the processor, the data portion to a first level (l1) cache memory, evaluating, via the processor, whether the data portion should be copied to at ...
Memory Management Patent Pack
Download 175+ patent application PDFs
Memory Management Patent Applications
Download 175+ Memory Management-related PDFs
For professional research & prior art discovery
inventor
  • 175+ full patent PDF documents of Memory Management-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Memory device having address and command selectable capabilities
Micron Technology, Inc.
August 03, 2017 - N°20170220411

Subject matter disclosed herein relates to memory management, and more particularly to partitioning a memory based on memory attributes.
Buffer memory management method and write method using the same
Samsung Electronics Co., Ltd.
August 03, 2017 - N°20170220296

A method of performing a write operation, the method comprising: comparing a data pattern of a currently received command directing a write operation to data patterns of at least one previously received command; and performing a write operation, based on the currently received command directing the write operation, by writing the data patterns of the at least one previously received ...
Computing system with memory management mechanism and method of operation thereof
Samsung Electronics Co., Ltd.
July 27, 2017 - N°20170212835

A computing system includes: a storage component including a volatile-memory device and a non-volatile memory device configured to enable persistent storage of information along with block-oriented mass storage of information; and a controller component, coupled to the storage component, configured to implement a smart memory driver configured to dynamically manage the volatile-memory device including managing a persistent memory (pm) portion, ...
Low complex deblocking filter decisions
Sun Patent Trust
July 20, 2017 - N°20170208346

The present disclosure relates to deblocking filtering, which may be advantageously applied for block-wise encoding and decoding of images or video signals. In particular, the present disclosure relates to an improved memory management in an automated decision on whether to apply or skip deblocking filtering for a block and to selection of the deblocking filter. The decision is performed on ...
Memory management in graphics and compute application programming interfaces
Ati Technologies Ulc
July 20, 2017 - N°20170206630

Methods are provided for creating objects in a way that permits an api client to explicitly participate in memory management for an object created using the api. Methods for managing data object memory include requesting memory requirements for an object using an api and expressly allocating a memory location for the object based on the memory requirements. Methods are also ...
Tehcniques with os- and application- transparent memory compression
Sk Hynix Inc.
July 20, 2017 - N°20170206172

Memory systems may include a memory storage including a fast memory portion and a slow memory portion, a software page remapping kernel driver (sprkd) suitable for intercepting a memory management command generated by an operating system, at least one of compressing data to be written from the fast memory portion to the slow memory portion prior to execution of the ...
Cpu with external fault response handling
Hewlett Packard Enterprise Development Lp
July 20, 2017 - N°20170206126

A system includes a central processing unit (cpu) to process data. A first memory management unit (mmu) in the cpu generates an external request to a bus for data located external to the cpu. An external fault handler in the cpu processes a fault response received via the bus. The fault response is generated externally to the cpu and relates ...
Memory Management Patent Pack
Download 175+ patent application PDFs
Memory Management Patent Applications
Download 175+ Memory Management-related PDFs
For professional research & prior art discovery
inventor
  • 175+ full patent PDF documents of Memory Management-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Memory management method, memory storage device and memory control circuit unit
Epostar Electronics Corp.
July 20, 2017 - N°20170206006

A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first data; detecting a total number of first type physical erasing units not storing valid data; performing a first procedure if the total number is less than a first threshold value. The first procedure includes: receiving second data from a ...
Memory management system with backup system and method of operation thereof
Smart Modular Technologies, Inc.
July 13, 2017 - N°20170199684

An memory management system with backup system, and a method of operation of a memory management system with backup system thereof, including: a memory module controller for detecting a power failure condition, the memory module controller including a nonvolatile memory controller; a compression controller integrated within the nonvolatile memory controller for receiving a data block from volatile memory; a compression ...
Memory management method, memory control circuit unit, and memory storage apparatus
Phison Electronics Corp.
July 13, 2017 - N°20170199669

A memory management method is provided. The method includes receiving a write command, a first data, and a first instruction information corresponding to the write command, wherein the first instruction information instructs writing the first data into at least one first logical sub-unit of a first logical unit; executing load-align operation to the first data according to the first instruction ...
Memory management for systems for generating 3-dimensional computer images
Imagination Technologies Limited
July 06, 2017 - N°20170193631

A memory management system for generating 3-dimensional computer images is provided. The memory management system includes a device for subdividing an image into a plurality of rectangular areas, a memory for storing object data pertaining to objects in the image which fall in each rectangular area, a device for storing the object data in the memory, a device for deriving ...
Memory management method, memory control circuit unit and memory storage device
Phison Electronics Corp.
June 29, 2017 - N°20170185337

A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first ...
Memory management of high-performance memory
Intel Corporation
June 29, 2017 - N°20170185292

Various systems and methods for memory management of high-performance memory are described herein. A system for managing high-performance memory, the system comprising a random access memory; a high-performance memory, the high-performance memory of higher performance than the random access memory; and a memory management unit to: obtain execution metrics for a plurality of blocks resident in a random access memory; ...
Apparatus and method for transferring data and commands in a memory management environment
Microsemi Storage Solutions (u.s.), Inc.
June 22, 2017 - N°20170177541

A method and system for transferring nvme data over a network comprises using a discrete buffer memory device to generate a write command from an nvme-over-rdma write command request, store the user data from a client host of the network, and send an interrupt signal to a nvme storage device of the network. The nvme storage device retrieves the write ...
Information processing apparatus and shared-memory management method
Fujitsu Limited
June 22, 2017 - N°20170177508

A segment-information notifying unit in the home node notifies the number of the segment in the shared memory 43, which has been used by the faulty node, to each of the normal remote nodes, and it gives an instruction to temporarily stop the access on a per-segment basis. Then, a memory-access token setting unit sets a new token to the memory ...
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