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Memory Device

Memory Device-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Magnetic keys having a plurality of magnetic plates
Lexmark International, Inc.
June 14, 2018 - N°20180167526

Magnetic keys having a plurality of magnetic plates are disclosed. The location and orientation of the magnetic plates are controlled to generate magnetic fields that are of sufficient strength to be reliably read and sufficient complexity to be difficult to counterfeit.
Phase change memory stack with treated sidewalls
Micron Technology, Inc.
June 14, 2018 - N°20180166629

Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements.
Magnetic domain wall shift register memory devices with high magnetoresistance ratio structures
Industrial Technology Research Institute
June 14, 2018 - N°20180166626

A method includes depositing a magnetic track layer on a seed layer, depositing an alloy layer on the magnetic track layer, depositing a tunnel barrier layer on the alloy layer, depositing a pinning layer on the tunnel barrier layer, depositing a synthetic antiferromagnetic layer spacer on the pinning layer, depositing a pinned layer on the synthetic antiferromagnetic spacer layer and ...
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Semiconductor memory devices including protrusion pads
Samsung Electronics, Ltd.
June 14, 2018 - N°20180166462

Disclosed is a semiconductor memory device may include a substrate including a cell array region and a contact region and a stacking structure including a plurality of insulating layers and a plurality of gate electrodes alternately stacked on the substrate. The stacking structure may include a stepwise structure in the contact region.
Non-volatile memory device having nanocrystal floating gate and method of fabricating same
Taiwan Semiconductor Manufacturing Co., Ltd.
June 14, 2018 - N°20180166457

Non-volatile memory devices and methods of fabricating thereof are disclosed herein. An exemplary non-volatile memory device includes a heterostructure disposed over a substrate.
Integration of floating gate memory and logic device in replacement gate flow
International Business Machines Corporation
June 14, 2018 - N°20180166456

After forming a first sacrificial gate stack over a portion of a first semiconductor fin located in a logic device region of a substrate, and a second sacrificial gate stack over a portion of a second semiconductor fin located in a memory device region of the substrate, in which each of the first sacrificial gate stack and the second sacrificial ...
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Memory Device Patent Applications
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Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of ...
Zeno Semiconductor, Inc.
June 14, 2018 - N°20180166446

An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or string includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as ...
Anti-fuse device and memory device including the same
Samsung Electronics Co., Ltd.
June 14, 2018 - N°20180166382

An anti-fuse device includes a program transistor and a read transistor. The program transistor executes a program via insulation breakdown of a gate insulating layer.
Memory device including virtual fail generator and memory cell repair method thereof
Samsung Electronics Co., Ltd.
June 14, 2018 - N°20180166150

A memory device includes a memory cell array, a comparator, and a virtual fail generator. The memory cell array includes memory cells.
Control method for memory device and memory controller
Macronix International Co., Ltd.
June 14, 2018 - N°20180166148

A control method for a memory device is provided. The control method includes the following steps.
Memory device with a fuse protection circuit
Taiwan Semiconductor Manufacturing Company Limited
June 14, 2018 - N°20180166143

A memory device includes a memory circuit and a fuse protection circuit. The memory circuit includes a memory cell and a program line.
Non-volatile memory array with memory gate line and source line scrambling
Cypress Semiconductor Corporation
June 14, 2018 - N°20180166141

A memory device includes a memory array arranged in rows and columns. The memory array may have at least four non-volatile memory (nvm) cells coupled in the same column of the memory array, in which each nvm cell may include a memory gate.
Method and apparatus for providing multi-page read and write using sram and nonvolatile memory devices
Neo Semiconductor, Inc.
June 14, 2018 - N°20180166139

A memory device includes a static random-access memory (“sram”) circuit and a first nonvolatile memory (“nvm”) string, a second nvm string, a first and a second drain select gates (“dsgs”). The sram circuit is able to temporarily store information in response to bit line (“blȁ...
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Memory Device Patent Applications
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inventor
  • 2989+ full patent PDF documents of Memory Device-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Resistive random access memory cell
Microsemi Soc Corp.
June 14, 2018 - N°20180166135

A resistive random access memory cell includes three resistive random access memory devices, each resistive random access memory device having an ion source layer and a solid electrolyte layer. The first and second resistive random access memory devices are connected in series such that either both ion source layers or both solid electrolyte layers are adjacent to one another.
Concurrent read and reconfigured write operations in a memory device
Adesto Technologies Corporation
June 14, 2018 - N°20180166130

A method of controlling a memory device can include: receiving, by an interface, a write command from a host; beginning execution of a write operation on a first array plane of a memory array in response to the write command, where the memory array includes a plurality of memory cells arranged in a plurality of array planes; receiving, by the ...
Multi-die memory device
Rambus Inc.
June 14, 2018 - N°20180166121

A memory is disclosed that includes a logic die having first and second memory interface circuits. A first memory die is stacked with the logic die, and includes first and second memory arrays.
Floating body dram with reduced access energy
Rambus Inc.
June 14, 2018 - N°20180166120

Memory devices, controllers and associated methods are disclosed. In one embodiment, a memory device is disclosed.
Sub word line driver of semiconductor memory device
Sk Hynix Inc.
June 14, 2018 - N°20180166119

A layout structure of a sub word line driver for use in a semiconductor memory device may be disclosed. The sub word line driver may include a first active region through which first and second main word lines pass.
Memroy device and operating method thereof
Sk Hynix Inc.
June 14, 2018 - N°20180166117

An operating method of a memory device including a plurality of memory cells may include: measuring data retention times of at least a portion of the plurality of memory cells; and optimizing a refresh operation on the plurality of memory cells using the measurement result.. .
Non-volatile memory device having dummy cells and memory system including the same
Samsung Electronics Co., Ltd.
June 14, 2018 - N°20180166111

A non-volatile memory device includes a cell string, a ground select transistor, and at least one dummy cell. The cell string includes at least one memory cell.
Semiconductor memory device, and signal line layout structure thereof
Sk Hynix Inc.
June 14, 2018 - N°20180166108

A memory device includes first and second memory blocks each including a memory cell array, a sub-word line drive region and a bit line sense amplifier region corresponding to the memory cell array, first and second data transmission lines disposed in the bit line sense amplifier region of each memory block, wherein the first and second data transmission lines extend ...
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