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Memory Device

Memory Device-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Intelligent optical restoration in integrated multi-layer networks
Infinera Corp.
October 12, 2017 - N°20170295090

Memory devices, methods and systems are described in which a non-transitory memory device stores instructions that, when executed by a processor, cause the processor to: receive, via an input component, at least one message from a network element in a multi-layer network comprising information indicative of at least one failure of a working path; determine based at least in part ...
Nfc antenna for communicating with a motor and method of manufacturing and using same
Regal Beloit America, Inc.
October 12, 2017 - N°20170294825

An electric motor assembly includes an electric motor, a casing configured to house the motor, and an electrical enclosure coupled to the motor casing. The electrical enclosure houses a control board including a microcontroller and a memory device therein. The microcontroller is configured to control the electric motor based at least in part on motor configuration data stored in the ...
Resistive random access memory device and method for fabricating the same
Winbond Electronics Corp.
October 12, 2017 - N°20170294579

A resistive random access memory device and a method for fabricating the same are presented. The resistive random access memory device includes a first electrode having a first dopant within. A second electrode is disposed on the first electrode. A resistive switching layer is disposed between the first electrode and the second electrode.
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Memory Device Patent Applications
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Magnetic memory device and techniques for forming
Varian Semiconductor Equipment Associates, Inc.
October 12, 2017 - N°20170294569

A method may include: providing a device stack, the device stack comprising sidewall portions and extending above a substrate base, the device stack further including a plurality of metal layers; depositing an interface layer conformally over the device stack using an atomic layer deposition process, the interface layer comprising a first insulator material; depositing an encapsulation layer on the interface ...
Memory device including ovonic threshold switch adjusting threshold voltage thereof
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294483

A memory device may include a substrate, a first conductive line on the substrate and extending in a first direction, a second conductive line over the first conductive line and extending in a second direction crossing the first direction, a third conductive line over the second conductive line and extending in the first direction, a first memory cell at an ...
Three-dimensional structured memory devices
Micron Technology, Inc.
October 12, 2017 - N°20170294447

A 3d structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain region; a p+ region at the source/drain region; and a diffusion barrier material between the n+ region and the p+ region. The n+ region is substantially isolated from the p+ region.
Memory Device Patent Pack
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Memory Device Patent Applications
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For professional research & prior art discovery
inventor
  • 2989+ full patent PDF documents of Memory Device-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Vertical memory devices having dummy channel regions
Toshiba Memory Corporation
October 12, 2017 - N°20170294443

A memory device includes a plurality of channel regions that each extend in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate adjacent the channel regions, each of the gate electrodes extending different lengths, and a plurality of dummy channel regions adjacent first ...
Vertical memory devices and methods of manufacturing the same
Toshiba Memory Corporation
October 12, 2017 - N°20170294388

A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate linesare spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially ...
Multi-tier three-dimensional memory devices including vertically shared source lines and method of making thereof
Sandisk Technologies Llc
October 12, 2017 - N°20170294377

A multi-tier memory device includes a first tier structure overlying a substrate and containing a first alternating stack of first insulating layers and first electrically conductive layers, and first memory stack structures each including a first memory film and a first vertical semiconductor channel, a source line overlying the first tier structure, and a second tier structure overlying the source ...
Formation of getter layer for memory device
Taiwan Semiconductor Manufacturing Company, Ltd.
October 12, 2017 - N°20170294363

A method includes providing a semiconductor device disposed on a substrate, wherein the semiconductor device includes a semiconductor device feature, forming a conductive layer over the substrate such that the conductive layer is electrically coupled to the semiconductor device feature, forming a getter layer over the conductive layer, wherein the getter layer includes a first layer that is formed of ...
Detect developed bad blocks in non-volatile memory devices
Sk Hynix Inc.
October 12, 2017 - N°20170294237

Systems and methods are provided to detect a developed bad word-line of a flash memory. Embodiments provide an improved background media scan (bgms) process that can predict at the end of a block read if a word-line will potentially become bad with the use of the flash memory. Accordingly, data from the potentially bad block can be recovered and the ...
Input-output circuit for supporting multiple-input shift register (misr) function and memory device including the same
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294236

An input-output circuit includes a reception circuit and a register circuit. The reception circuit operates in accordance with a normal write protocol commonly in a normal write mode and a test write mode. The reception circuit receives a plurality of input signals to generate a plurality of latch signals. The register circuit generates a plurality of test result signals based ...
Nonvolatile memory device for suppressing read disturbances
Sk Hynix Inc.
October 12, 2017 - N°20170294232

A nonvolatile memory device includes a nonvolatile memory cell, a sensing circuit coupled between a sensing input line coupled to a bit line of the nonvolatile memory cell and a sensing output line, a sensing output grounding portion fixing an output signal of the sensing circuit at a low level if the output signal of the sensing circuit has a ...
Memory Device Patent Pack
Download 2989+ patent application PDFs
Memory Device Patent Applications
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For professional research & prior art discovery
inventor
  • 2989+ full patent PDF documents of Memory Device-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Nonvolatile memory device including nonvolatile memory and resistance-time converter, and integrated circuit card including nonvolatile ...
Panasonic Intellectual Property Management Co. Ltd.
October 12, 2017 - N°20170294227

A nonvolatile memory device comprises: a nonvolatile memory; a resistance-time converter that outputs an end signal at timing according to a resistance value of the nonvolatile memory; and a time-digital converter that measures the time from input of a start signal to input of the end signal and converts the measured time into a digital value. The time-digital converter includes: ...
Semiconductor structure and memory device including the structure
Stmicroelectronics (rousset) Sas
October 12, 2017 - N°20170294225

A semiconductor structure includes first and second source/drain region disposed in a semiconductor body and spaced from each other by a channel region. A gate electrode overlies the channel region and a capacitor electrode is disposed between the gate electrode and the channel region. A first gate dielectric is disposed between the gate electrode and the capacitor electrode and ...
Dynamic power managment of a memory device
Samsung Electronics Co., Ltd.
October 12, 2017 - N°20170294216

An electronic device includes a memory device including a power switch configured to provide one of a first voltage and a second voltage to an internal circuit in response to a control command. A power management device is configured to generate the first voltage, the second voltage, and the control command and to provide the first voltage, the second voltage, ...
Display device
Japan Display Inc.
October 12, 2017 - N°20170294171

According to one embodiment, a display device includes substrates with pixels, a pixel electrode in each of the pixels, a display select circuit connected to the electrode, which supplies display and non-display voltages, a power line to which first and second voltages are supplied, a memory device connected to the power line and the display select circuit, a voltage select ...
Sensor devices and networks for remotely acquiring stormwater data
Stormsensor Inc
October 12, 2017 - N°20170294102

The present invention is directed towards devices, systems, and methods for remotely acquiring stormwater data. A sensor device includes sensors and a transceiver. The sensors generate stormwater data in response to a fluid communication with (or exposure to) stormwater flowing through a stormwater drainage (such as a pipe). The transceiver provides the stormwater data to another sensor device included within ...
Online transactional system for processing alternative methods of electronic payment
Amadeus S.a.s.
October 12, 2017 - N°20170293902

Online transactional processing systems, methods, and computer program products for processing an alternative method of electronic payment (amop) in online transactions. A mass storage memory device hosts a database that stores data for transforming one or more virtual payment forms into data that relates to one or more amop's. Each of the one or more virtual payment forms stored in ...
Single command, multiple column-operation memory device
Rambus Inc.
October 12, 2017 - N°20170293552

A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first ...
Data storage device and operating method thereof
Sk Hynix Inc.
October 12, 2017 - N°20170293524

A data storage device includes a nonvolatile memory device including a plurality of memory cells; and a controller suitable for reading target data from a target page corresponding to the plurality of memory cells, estimating error bits of the target data based on reference data read from at least one reference page corresponding to the plurality of memory cells of ...
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