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Memory Chip

Memory Chip-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Packaging of high performance system topology for nand memory systems
Sandisk Technologies Llc
November 09, 2017 - N°20170323876

A topology for memory circuits of a non-volatile memory system reduces capacitive loading. For a given channel, a single memory chip can be connected to the controller, but is in turn connected to multiple other memory devices that fan out in a tree-like structure, which can also fan back in to a single memory device. In addition to the usual ...
Packaging of high performance system topology for nand memory systems
Sandisk Technologies Llc
November 09, 2017 - N°20170323875

A topology for memory circuits of a non-volatile memory system reduces capacitive loading. For a given channel, a single memory chip can be connected to the controller, but is in turn connected to multiple other memory devices that fan out in a tree-like structure, which can also fan back in to a single memory device. In addition to the usual ...
System-in-package module with memory
Etron Technology, Inc.
November 09, 2017 - N°20170323687

A system-in-package module with memory includes a non-memory chip, a substrate, and a memory chip. The non-memory chip has a first portion and a second portion. The substrate has a window and the substrate is electrically connected to the second portion of the non-memory chip. The memory chip is placed into the window of the substrate to electrically connect the ...
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Semiconductor apparatus, production method, and electronic apparatus
Hgst Netherlands B.v.
November 02, 2017 - N°20170317061

The present technology relates to a semiconductor apparatus, a production method, and an electronic apparatus that enable semiconductor apparatuses to be laminated and the laminated semiconductor apparatuses to be identified. A semiconductor apparatus that is laminated and integrated with a plurality of semiconductor apparatuses, includes a first penetrating electrode for connecting with the other semiconductor apparatuses and a second penetrating ...
Draining a write queue based on information from a read queue
Hgst Netherlands B.v.
November 02, 2017 - N°20170315914

A method to access a memory chip having memory banks includes processing read requests in a read queue, and when a write queue is filled beyond a high watermark, stopping the processing of the read requests in the read queue and draining the write queue until the write queue is under a low watermark. Draining the write queue include issuing ...
Method, flash memory controller, memory device for accessing flash memory
Hgst Netherlands B.v.
November 02, 2017 - N°20170315909

A method for accessing a flash memory module is provide. The flash memory module is a 3d flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least one super block of ...
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Method for accessing flash memory module and associated flash memory controller and memory device
Hgst Netherlands B.v.
November 02, 2017 - N°20170315867

A method for accessing a flash memory module is provided. The flash memory module is a 3d flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block ...
Semiconductor device having interconnection in package and method for manufacturing the same
Hgst Netherlands B.v.
October 19, 2017 - N°20170301388

A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being ...
Substrate for camera module and camera module having the same
Samsung Electro-mechanics Co., Ltd.
October 12, 2017 - N°20170294469

A substrate for a camera module includes: a first substrate; an image sensor installed on the first substrate and a memory chip installed to be embedded in the first substrate. The first substrate includes a soft substrate portion disposed at a central portion of the first substrate, and a hard substrate portion formed on upper and lower portions of the ...
Single command, multiple column-operation memory device
Rambus Inc.
October 12, 2017 - N°20170293552

A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first ...
Method and circuit for self-training of a reference voltage and memory system including the same
Samsung Electronics Co., Ltd.
October 05, 2017 - N°20170287535

A semiconductor device, includes at least a first memory chip, which includes at least a first buffer connected to receive an input signal and a reference voltage; at least a first reference voltage generator configured to output a reference voltage based on a first control code; and at least a first self-training circuit for determining an operational reference voltage to ...
Storage device
Kabushiki Kaisha Toshiba
October 05, 2017 - N°20170286000

According to one embodiment, there is provided a storage device including a control chip and a plurality of memory chips. The control chip has an input buffer common to the control chip and the plurality of memory chips and electrically connected to an external terminal. A first transmission path going through the input buffer and a second transmission path not ...
Semiconductor package
Sk Hynix Inc.
September 28, 2017 - N°20170278833

A semiconductor package may include a dram chip mounted on a substrate; an interposer stacked over the dram chip and including redistribution structures; a nonvolatile memory chip stacked over the interposer; a memory controller chip mounted on the substrate, and including a control circuit for controlling the nonvolatile memory chip and first pads and second pads electrically coupled to the ...
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Memory Chip Patent Applications
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Memory module repair system with failing component detection and method of operation thereof
Smart Modular Technologies, Inc.
September 14, 2017 - N°20170262337

A memory module repair system, and a method of operation thereof, including: a memory controller; a volatile memory having memory chips coupled to the memory controller, the memory controller for testing the volatile memory; an ecc controller, coupled to the memory controller, for determining a failing bit location information of a failing bit within the volatile memory; and an error ...
Memory module with packages of stacked memory chips
Netlist, Inc.
September 07, 2017 - N°20170256291

A memory module is operable in a computer system to communicate with a system memory controller via a command/address bus and a data bus. The memory module comprises a register device coupled to the command/address bus, and a plurality of dram packages coupled to the data bus and to the register device via a set of module control ...
Integrated circuit package and methods of forming same
Taiwan Semiconductor Manufacturing Company, Ltd.
August 31, 2017 - N°20170250170

An embodiment package-on-package (pop) device includes a package structure, a package substrate, and a plurality of connectors bonding the package structure to the package substrate. The package structure includes a logic chip bonded to a memory chip, a molding compound encircling the memory chip, and a plurality of conductive studs extending through the molding compound. The plurality of conductive studs ...
Information processing device, semiconductor device, and memory inspection method
Fujitsu Limited
August 24, 2017 - N°20170242750

An information processing device includes: a processor that executes processing of data; and a memory module that includes a first memory in which a plurality of memory chips each storing the data are mounted in layers, and a memory controller that controls the first memory, wherein the memory controller: inspects the data; executes correction processing of the data when a ...
Memory chip and operating method thereof
Sk Hynix Inc.
August 17, 2017 - N°20170236588

There are provided a memory chip and an operating method thereof. A memory chip includes a main memory block including a plurality of sub-memory blocks, a peripheral circuit for programming memory cells included in the sub-memory blocks in units of pages, and a control circuit for controlling the peripheral circuit such that, after a program operation of a sub-memory block ...
Adaptable gun safety system
Sk Hynix Inc.
August 17, 2017 - N°20170234637

A firearm with identification, safety system, preventing use by an unauthorized user. The firearm includes a scanner capable of scanning a middle and ring finger on the grip of the gun; a memory chip means for means for storing data representative of at least one fingerprint; a microprocessor connected to said scanner and said memory chip for receiving and transmitting ...
Integrated arming switch and arming switch activation layer for secure memory
International Business Machines Corporation
August 10, 2017 - N°20170229173

An arming switch structure and method of operation. The arming switch is integrated with a reactive material erasure device and phase change memory cell array and is coupled to a tamper detection device configured to trigger a signal for conduction to the reactive material erasure device that generates heat and induces a phase change in the phase change memory cell ...
Memory system
Sk Hynix Inc.
August 03, 2017 - N°20170220294

A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal ...
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