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Memory Chip

Memory Chip-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Fan-out semiconductor package
Samsung Electro-mechanics Co., Ltd.
April 12, 2018 - N°20180102332

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a processor chip disposed in the through-hole; a memory chip disposed in the through-hole and including a plurality of dies stacked on each other; an encapsulant encapsulating at least portions of the first interconnection member, the memory chip, and the processor chip; and a second interconnection member disposed ...
Memory module, memory controller and systems responsive to memory chip read fail information and related ...
April 12, 2018 - N°20180101424

A memory module for reporting information about a fail in chip units, an operation of a memory module, and an operation of a memory controller are provided. The memory module includes: first to mth memory chips (where m is an integer that is equal to or greater than 2) mounted on a module board and storing data, and an (m+1)th ...
Memory system that carries out temperature-based access to a memory chip
Toshiba Memory Corporation
March 29, 2018 - N°20180090218

A memory system is connectable to a host and comprises a memory chip including a nonvolatile semiconductor memory cell array, a memory controller, a first temperature sensor positioned to measure a first temperature, which is representative of a temperature of the memory controller, and a second temperature sensor positioned to measure a second temperature, which is representative of a temperature ...
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Fan-out semiconductor package
Samsung Electro-mechanics Co., Ltd.
March 15, 2018 - N°20180076156

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a processor chip disposed in the through-hole; a memory chip disposed in the through-hole and including a plurality of dies stacked on each other; an encapsulant encapsulating at least portions of the first interconnection member, the memory chip, and the processor chip; and a second interconnection member disposed ...
Providing memory bandwidth compression in chipkill-correct memory architectures
Qualcomm Incorporated
March 15, 2018 - N°20180074893

Providing memory bandwidth compression in chipkill-correct memory architectures is disclosed. In this regard, a compressed memory controller (cmc) introduces a specified error pattern into chipkill-correct error correcting code (ecc) bits to indicate compressed data. To encode data, the cmc applies a compression algorithm to an uncompressed data block to generate a compressed data block. The cmc then generates ecc data ...
Memory system
Sk Hynix Inc.
March 08, 2018 - N°20180067686

A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal ...
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Anti-rollback version upgrade in secured memory chip
Winbond Electronics Corporation
March 01, 2018 - N°20180060607

A secured storage system includes a non-volatile memory and a controller. The non-volatile memory is configured to store a first data item and a respective first version identifier assigned to the first data item. The controller is configured to receive a second data item accompanied by a second version identifier and a signature, for replacing the first data item in ...
Imaging cartridge and memory chip applied to imaging cartridge
Zhuhai Ninestar Management Co., Ltd.
March 01, 2018 - N°20180059615

The present invention discloses an imaging cartridge and a memory chip applied to the imaging cartridge. The memory chip is detachably installable on an imaging cartridge, and the imaging cartridge is detachably installable in the imaging device. The memory chip includes: an interface unit, electrically connecting the memory chip to the imaging device, and receiving an instruction that is sent ...
Memory error recovery
International Business Machines Corporation
February 22, 2018 - N°20180052741

An aspect includes memory error recovery in a memory system includes detecting an error condition within a memory chip of the memory system. A chip mark is applied to the memory chip to flag the error condition. An address range of the memory chip associated with the error condition is determined. Data are written from the address range of the ...
Method and circuit for storing and providing historical physiological data
Covidien Lp
February 15, 2018 - N°20180042560

Embodiments of the present invention include systems and methods that relate to pulse oximetry. Specifically, one embodiment includes an oximeter sensor comprising a light emitting element configured to emit light, a light detector configured to detect the light, and a memory chip having a built-in trimmed resistor, the trimmed resistor having a resistance value that is detectable by a monitor.
Semiconductor package and method of fabricating the same
Samsung Electronics Co., Ltd.
February 08, 2018 - N°20180040658

A semiconductor package including a substrate, a memory chip on the substrate, a mold layer on the substrate to cover a side surface of the memory chip, an image sensor chip on the memory chip and the mold layer, and a connection terminal between and electrically connecting the memory chip to the image sensor chip may be provided.
Method for manufacturing semiconductor device
February 08, 2018 - N°20180040598

When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed ...
Semiconductor storage device that dynamically changes a data buffering manner
Toshiba Memory Corporation
February 08, 2018 - N°20180039448

A semiconductor storage device includes m (m≧2) memory chips, a buffer, and a controller. The controller arranges, in the buffer, a first plurality of data units to be transferred to n (1≦n≦m) of the m memory chips, in an order in which each of the first plurality of data units has been received from a host, ...
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High performance persistent memory
Intel Corporation
February 01, 2018 - N°20180032414

Embodiments are generally directed to high capacity energy backed memory with off device storage. A memory device includes a circuit board; multiple memory chips that are installed on the circuit board; a controller to provide for backing up contents of the memory chips when a power loss condition is detected; a connection to a backup energy source; and a connection ...
Storage assist memory module
Dell Products L.p.
February 01, 2018 - N°20180032265

In accordance with embodiments of the present disclosure, a memory system may include a memory module comprising a plurality of memory chips configured to store data and a hardware accelerator communicatively coupled to the memory chips and configured to, in response to an input/output operation to a storage resource, perform a storage function to assist movement and calculation of ...
Stacked memory device and a memory chip including the same
Samsung Electronics Co., Ltd.
February 01, 2018 - N°20180032252

A stacked memory includes a logic semiconductor die, a plurality of memory semiconductor dies stacked with the logic semiconductor die, a plurality of through-silicon vias (tsvs) electrically connecting the logic semiconductor die and the memory semiconductor dies, a global processor disposed in the logic semiconductor die and configured to perform a global sub process corresponding to a portion of a ...
Mobile computing device reconfiguration is response to environmental factors including downloading hardware and software associated ...
Etron Technology, Inc.
January 25, 2018 - N°20180024959

A reconfigurable high speed memory chip module includes a type of memory cell array group, a first transmission bus, and a logic unit. The type memory cell array group includes multiple memory cell array integrated circuits (ics). The first transmission bus coupled to the type memory cell array group has a first programmable transmitting or receiving data rate, a first ...
Memory management system and method thereof
Korea University Research And Business Foundation
January 11, 2018 - N°20180011770

Disclosed are a memory management system and a method thereof. Restricted spare cells are optimally distributed (or allocated) into a physical region and a virtual region in a system for repairing a fault of a memory, thereby increasing a yield of a memory chip.
Solid state drive devices and storage systems having the same
Samsung Electronics Co., Ltd.
January 11, 2018 - N°20180011633

A solid state drive (ssd) device includes a first nonvolatile memory package, a second nonvolatile memory package, and a controller. The first nonvolatile memory package includes a first buffer chip and a plurality of first nonvolatile memory chips. The second nonvolatile memory package includes a plurality of second nonvolatile memory chips. The controller controls the first nonvolatile memory package and ...
Magnetic memory device
Toshiba Memory Corporation
January 04, 2018 - N°20180006212

According to one embodiment, a magnetic memory device includes a magnetic memory chip having a magnetoresistive element, a magnetic layer having first and second portions spacing out each other, the first portion covering a first main surface of the magnetic memory chip, the second portion covering a second main surface facing the first main surface of the magnetic memory chip, ...
Memory controller, memory buffer chip and memory system
Sk Hynix Inc.
January 04, 2018 - N°20180004446

A memory system may be provided. The memory system may include a memory buffer chip coupled to one or more memory chips. The memory system may include a memory controller configured to control the memory buffer chip to input/output data to/from the one or two or more memory chips. The memory buffer chip may include a first interface ...
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