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Line Driver patents

      

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 Semiconductor device patent thumbnailSemiconductor device
An assist driver is coupled to an end of a word line to which a word line driver is not coupled, and couples the other end of the word line to a first power source, in accordance with a voltage of the other end of the word line.. .
Renesas Electronics Corporation


 Semiconductor device with hierarchical word line scheme patent thumbnailSemiconductor device with hierarchical word line scheme
A semiconductor device includes: first and second memory cell regions disposed adjacent to each other in a first direction, and suitable for sharing a sub-word line driving signal, and a first sub-word line driving unit disposed in a crossing area that is disposed between the first and second memory cell regions in a diagonal direction. The first sub-word line driving unit includes a first sub-word line driver for driving the first memory cell regions, a second sub-word line driver for driving the second memory cell regions, and an interconnection for transmitting the sub-word line driving signal, which extends in the first direction..
Sk Hynix Inc.


 Semiconductor storage device and test method thereof using a common bit line patent thumbnailSemiconductor storage device and test method thereof using a common bit line
Provided is a semiconductor storage device including: first memory cells; first word lines; first bit lines; a first common bit line; second memory cells; second word lines; second bit lines; a second common bit line; a first selection circuit that connects the first common bit line to a first bit line selected from the first bit lines; a second selection circuit that connects the second common bit line to a second bit line selected from the second bit lines; a word line driver that activates any one of the first and second word lines; a reference current supply unit that supplies a reference current to a common bit line among the first and second common bit lines, the common bit line not being electrically connected to a data read target memory cell; and a sense amplifier that amplifies a potential difference between the first and second common bit lines.. .
Renesas Electronics Corporation


 Memory device with reduced neighbor memory cell disturbance patent thumbnailMemory device with reduced neighbor memory cell disturbance
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes a memory cell, digit line driver, access line driver, clamping element, and control circuit.
Micron Technology, Inc.


 Displays with gate driver circuitry for discharging display pixels patent thumbnailDisplays with gate driver circuitry for discharging display pixels
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The gate driver circuitry may include gate drivers connected in a chain.
Apple Inc.


 Display device patent thumbnailDisplay device
The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.. .
Semiconductor Energy Laboratory Co., Ltd.


 Address decoding circuitry patent thumbnailAddress decoding circuitry
Various implementations described herein are directed to an integrated circuit for address decoding. The integrated circuit may include an input circuit configured to provide an encoded address via multiple address lines.
Arm Limited


 Display device patent thumbnailDisplay device
According to one embodiment, a display device, includes a display panel which includes divided display areas, signal line drivers, circuit boards which include a master board, power supply circuits, gradation voltage generation circuits, and at least one connection line, all the gradation voltage generation circuits generating the gradation voltages corresponding to a reference voltage supplied from the power supply circuit provided on the master board.. .
Japan Display Inc.


 Display device with idle periods for data signals patent thumbnailDisplay device with idle periods for data signals
A display device performs display with a dot inversion driving method wherein, during a prescribed period of time between one driving period in which all of the scanning signal lines are scanned and a next driving period, an idle period that is longer in duration than each driving period is provided during which potentials of the plurality of data signal lines are kept constant, and during the idle period, the driving power control unit lowers a driving power of the signal line driver circuit, and wherein the signal line driver circuit outputs the data signals to the respective data signal lines during the driving period, and during the idle period, the signal line driver circuit sets an output thereof to the respective data signal lines to one of a high impedance state and a ground potential, such that the plurality of data signal lines have a constant potential.. .
Sharp Kabushiki Kaisha


 Sub word line driver of a semiconductor memory device patent thumbnailSub word line driver of a semiconductor memory device
A sub word line driver of a semiconductor memory device including a sub word line driver is disclosed. The sub word line driver of a semiconductor memory device comprising: a semiconductor substrate including an active region extended in a first direction; a plurality of gate electrodes extended in a second direction perpendicular to the active region; first and second metal contacts formed over the active region between the gate electrodes; a plurality of metal pads coupled to the first metal contacts; and a plurality of metal signal lines coupled to the second metal contacts, extended in the second direction, and bent at specific parts adjacent to the metal pads..
Sk Hynix Inc.


Temperature sensitive routing of data in a computer system

An apparatus and method routes data over network links based on a temperature of the network links. When the temperature of a link meets a first threshold a routing mechanism re-routes a portion of the network traffic over a lower temperature link to reduce the likelihood that the link will exceed a second threshold that necessitates that the link be throttled back or disabled.
International Business Machines Corporation

Display driver circuitry with gate line and data line delay compensation

Gate driver circuitry in a display may supply gate line signals to rows of pixels on gate lines. Data line driver circuitry may supply data line signals to columns of pixels on data lines.
Apple Inc.

Image display device and driving method thereof

A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one d/a converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a d/a converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each d/a converter circuit, the grey-scale electric power supply lines connected to each d/a converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed..
Semiconductor Energy Laboratory Co., Ltd.

Semiconductor memory apparatus

A semiconductor memory apparatus may include a decoding unit configured to enable one of a plurality of sub word line driver enable signals by decoding a plurality of addresses while the decoding unit operates in a normal mode, and enables specific sub word line driver enable signals among the plurality of sub word line driver enable signals regardless of the plurality of addresses while the decoding unit is operating in a test mode. The semiconductor memory apparatus may include a sub word line driver group configured to include a plurality of sub word line drivers, the plurality of sub word line drivers configured for activation in response to the plurality of sub word line driver enable signals.
Sk Hynix Inc.

Display device and electronic device

An object is, in a structure where switch circuits in a signal line driver circuit is placed over the same substrate as a pixel portion, to reduce the size of transistors in the switch circuits and to reduce load in the circuits during charging and discharging of signal lines due to the supply of data. A display device is provided which includes a pixel portion receiving a video signal, and a signal line driver circuit including a switch circuit portion configured to control output of the video signal to the pixel portion.
Semiconductor Energy Laboratory Co., Ltd.

Memory tile access and selection patterns

In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry.
Micron Technology, Inc.

Nonvolatile memory devices, operating methods thereof and memory systems including the same

Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver.

Memory architecture and access thereto

A memory device includes control line drivers coupled to respective pairs of reference supply voltage controllers and supply voltage controllers. The control line drivers are configured to apply control signals to the reference supply voltage controllers and the supply voltage controllers.
Taiwan Semiconductor Manufacturing Company, Ltd.

Memory refresh methods, memory section control circuits, and apparatuses

Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of memory section control circuits.
Micron Technology, Inc.

Displays with high impedance gate driver circuitry

A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (ifp) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals.
Apple Inc.

Electronic book

An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure.
Semiconductor Energy Laboratory Co., Ltd

Full-duplex transceiver circuit and method thereof

A full-duplex transceiver circuit comprises: a line driver configured to output a first current to a first node and a second current to a second node; a first resistor configured to shunt the first node to ground; a second resistor configured to shunt the second node to ground; a first capacitor configured to couple the first node to a third node; a second capacitor configured to couple the second node to the third node; an operational amplifier configured to receive a first input from a reference node and a second input from the third node and output an output voltage at a fourth node; a feedback network comprising a parallel connection of a third resistor and a third capacitor configured to provide a feedback from the fourth node to the third node; and a transmission line of a characteristic impedance configured to couple the first node to a remote transceiver.. .
Realtek Semiconductor Corp.

Fast gate driver circuit

A gate line driver circuit for a display panel includes a pull up circuit to drive a gate line of a display panel to a positive voltage that causes display panel switch elements that are coupled to the gate line to transition into an on state, a first pull down transistor to drive the gate line to a first negative voltage that causes the coupled display panel switch elements to transition into an off state, and a second pull down transistor to maintain the gate line at a second negative voltage that is less negative than the first negative voltage so as to maintain the coupled display panel switch elements in the off state. Other embodiments are also described and claimed..
Apple Inc.

Touch rejection for communication between a touch screen device and an active stylus

A touch panel includes capacitive sensing electrodes and a touch controller operates in a first operating mode to detect a touch location on the touch panel. In a second operating mode, the touch controller transmits a modulated data signal through the touch panel to an active stylus.
Stmicroelectronics Asia Pacific Pte Ltd

Display driving integrated circuit and display device including the same

A display driving integrated circuit is provided which drives a plurality of gate lines included in a display panel. The display driving integrated circuit includes: a charge pump configured to change a voltage from an external power source to generate an output voltage; and a gate line driver configured to drive the plurality of gate lines based on the output voltage.
Samsung Electronics Co., Ltd.

Apparatuses, sense circuits, and methods for compensating for a wordline voltage increase

Apparatuses, sense circuits, and methods for compensating for a voltage increase on a wordline in a memory is described. An example apparatus includes a bitline, a memory cell coupled to the bitline, a bipolar selector device coupled to the memory cell, a wordline coupled to the bipolar selector device, and a wordline driver coupled to the wordline.
Micron Technology, Inc.

Transmit circuitry and transmitting a signal

A transmit circuitry for transmitting data between a distribution point unit and an end-user device, comprising a line driver configured for amplifying a data signal to be transmitted over a copper pair between said distribution point unit and said end-user device; an input for receiving a signal for setting said line driver in a power-up mode or a power-down mode; a controllable impedance regulator adapted for regulating an output impedance of the transmit circuitry seen by the copper pair; wherein said controllable impedance regulator is further arranged for being controlled by said input in order to regulate said output impedance when the line driver is in the power-down mode.. .
Alcattel Lucent

Semiconductor memory device

A semiconductor memory device capable of a high-accuracy data search is provided. Each of the memory cells can hold two bits of information and includes a first cell and a second cell.
Renesas Electronics Corporation

Array substrate and liquid crystal display panel

The present invention discloses an array substrate and liquid crystal display panel, wherein in the array substrate, each pixel unit includes a first pixel electrode, a second pixel electrode and a third pixel electrode; and each pixel unit includes a first control circuit and a second control circuit; the first control circuit affects first pixel electrode to make first pixel electrode in a state corresponding to displaying a black image in 3d display mode; the second control circuit affects second pixel electrode to change the voltage of second pixel electrode. As such, the present invention can reduce color difference at large viewing angle, improve opening ratio in 2d mode, reduce signal cross-talk in 3d mode, and reduce the number of data line drivers to reduce the cost..
Shenzhen China Star Optoelectronics Technology Co. Ltd.

Vdsl2 and g.fast sfp for any-phy platform

A transceiver in the form of an integrated small form-factor pluggable (sfp) module is described. The sfp module may include a processor, a hybrid circuit, a transformer, a rj45 connector and a sfp connector.
Metanoia Communications Inc.

3d nand memory with decoder and local word line drivers

A memory device includes a plurality of stacks of conductive strips, a plurality of conductive vertical structures arranged orthogonally to the plurality of stacks, memory elements in interface regions at cross-points between side surfaces of the plurality of stacks and the plurality of conductive vertical structures, multiples pluralities of conductive lines, and control circuitry. The plurality of stacks of conductive strips alternate with insulating strips, including at least a bottom layer of conductive strips, a plurality of intermediate layers of conductive strips, and a top layer of conductive strips.
Macronix International Co., Ltd.

Semiconductor device or electronic device including the same

A semiconductor device with lower power consumption and an electronic device including the same are provided. To reduce leakage current flowing in a word line driver circuit, a switching element is provided, specifically, between the word line driver circuit and a high or low voltage power source.
Semiconductor Energy Laboratory Co., Ltd.

Multistage memory cell read

A multistage read can dynamically change wordline capacitance as a function of threshold voltage of a memory cell being read. The multistage read can reduce current spikes and reduce the heating up of a memory cell during a read.
Intel Corporation

Scan line driver

A scan line driver is disclosed. In one aspect, the scan line driver includes a driving signal generation circuit, an output line driving circuit, and a carry transfer circuit.
Samsung Display Co., Ltd.

Memory device and semiconductor device

An object of one embodiment of the present invention is to propose a memory device in which a period in which data is held is ensured and memory capacity per unit area can be increased. In the memory device of one embodiment of the present invention, bit lines are divided into groups, and word lines are also divided into groups.
Semiconductor Energy Laboratory Co., Ltd.

Method and reducing leakage current in memory

A method and apparatus in which word line drivers associated with memory word lines are selectively powered based on an active memory address reduces current consumption in a memory.. .

Scanline driver chip and display device including the same

A scanline driver chip includes: a chip selection de-serializer configured to provide an output enable signal based on an enable signal, a clock signal, and serial chip selection data, the serial chip selection data being received in serial order; an address data de-serializer configured to provide parallel address data based on the enable signal, the clock signal, the output enable signal, and serial address data, the serial address data being received in serial order; and a decoder-level shifter configured to provide a scanline enable signal based on the parallel address data. A display device includes: a controller configured to provide an enable signal, a clock signal, serial chip selection data, and serial address data; a plurality of the scanline driver chips each configured to provide a scanline enable signal; and a pixel array configured to be driven based on the scanline enable signal..

Apparatus and converting multi-channel tracking information for integrated processing of flight data

The present inventive concept relates to an apparatus and method for multiplexing tracking information output from a plurality of tracking radar systems that are operated upon testing the flight of guided weapons, converting the multiplexed tracking information into a single pcm stream signal, and processing the tracking information together with telemetry data in an integrated manner, thus enabling the tracking information to be simply and economically utilized for test control and measurement tasks. The apparatus for converting multi-channel tracking information for integrated processing of flight data, includes a signal receiver for receiving pieces of tracking information from tracking radar systems through a plurality of input channels, a programmable semiconductor for multiplexing the pieces of tracking information, and converting the multiplexed tracking information into a data stream-type pulse code modulation (pcm) frame, and a line driver for outputting the pcm frame to another piece of equipment..

Line driver with active termination and associated method

A line driver and a method for driving a load are proposed. The line driver includes a current amplifier and a feedback network.
Mediatek Inc.

Semiconductor memory device for stably reading and writing data

In a semiconductor memory device, static memory cells are arranged in rows and columns, word lines correspond to respective memory cell rows, and word line drivers drive correspond to word lines. Cell power supply lines correspond to respective memory cell columns and are coupled to cell power supply nodes of a memory cell in a corresponding column.
Renesas Electronics Corporation

Word line driver circuitry and compact memory using same

A memory device includes a memory array having a plurality of rows and columns of array blocks disposed in array block areas, array blocks including sub-arrays of memory cells arranged in rows and columns with word lines disposed in a patterned gate layer along the rows and one or more patterned conductor layers including bit lines disposed along the columns. A plurality of sets of local word line drivers is arranged in rows and columns disposed adjacent to corresponding array blocks.
Macronix International Co., Ltd.

Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage

A memory device of the non-volatile type including a memory array having a plurality of memory cells organized as sectors, each sector having a main word line associated with a plurality of local word lines, each local word line coupled to the main word line by a respective local word line driver circuit, each of the local word line driver circuits consisting of a first mos transistor coupled between the respective main word line and a respective local word line and a second mos transistor coupled between the respective local word line and a first biasing terminal. .
Conversant Intellectual Property Management Inc.

Static random access memory free from write disturb and testing method thereof

A static random access memory (sram) includes a memory cell array, a row decoder, a plurality of word-line drivers and an arbiter. The memory cell array includes a plurality of memory cell rows, wherein the memory cell rows are enabled by a plurality of word-lines, respectively.
Mediatek Inc.

Liquid crystal display device and driving method thereof

In a liquid crystal display device, in a first half of one horizontal scanning period, a first data line driver circuit outputs a corrected grayscale voltage obtained by correcting an input grayscale voltage corresponding to input display data to a plurality of data lines, and a second data line driver circuit is electrically disconnected from the plurality of data lines, and in a second half of one horizontal scanning period, the second data line driver circuit outputs an input grayscale voltage corresponding to the input display data to the plurality of data lines, and the first data line driver circuit is electrically disconnected from the plurality of data lines.. .
Panasonic Liquid Crystal Display Co., Ltd.

Scanline driver and display device including the same

A scanline driver includes a shift register circuit and an output buffer. The shift register circuit provides a register output signal and a plurality of signals based on a scan input signal and a plurality of clock signals.
Samsung Display Co., Ltd.

Apparatuses, circuits, and methods for biasing signal lines

Apparatuses, circuits, and methods are disclosed for biasing signal lines in a memory array. In one such example the memory array includes a signal line coupled to a plurality of memory cells and is configured to provide access to the plurality of memory cells responsive to a biasing condition of the signal line.
Micron Technology, Inc.

Memory device and performing a write operation in a memory device

The present invention provides a technique for performing write operations within a memory device comprising an array of memory cells. Wordline driver circuitry is used to assert a wordline signal to activate an addressed memory cell in the array.
Arm Limited

Display with intraframe pause circuitry

A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals.
Apple Inc.

Scan sense driver and display device including the same

A scan sense driver includes a scan driver and a sense driver. The scan line driver provides a scan line enable signal based on a plurality of clock signals, a global clock signal, and a scan input signal during a scan time interval.
Samsung Display Co., Ltd.

Semiconductor memory device

Proposed as a configuration, a controlling method, and a testing method for a ferroelectric shadow memory are (1) a bit line non-precharge method, in which no precharging of a bit line is performed during a read/write operation; (2) a plate line charge share method, in which electric charge is shared between plate lines that are driven sequentially during store/recall operation; (3) a word line boost method, in which the potential on a word line is raised during a write operation; (4) a plate line driver boost method, in which the driving capacity of a plate line driver is raised during a store/recall operation; and (5) a testing method for detecting a defect in a ferroelectric capacitor by arbitrarily setting a potential on a bit line from outside a chip.. .

Semiconductor device

A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels.



Line Driver topics:
  • Line Driver
  • Memory Cells
  • Memory Cell
  • Memory Device
  • Liquid Crystal
  • Liquid Crystal Display
  • Semiconductor
  • Integrated Circuit
  • Row Decoder
  • Column Decoder
  • Display Panel
  • Level Shifter
  • Level Shift
  • Fingerprint
  • Daisy Chain


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    This listing is a sample listing of patent applications related to Line Driver for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Line Driver with additional patents listed. Browse our RSS directory or Search for other possible listings.


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