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This page is updated frequently with new Lexer-related patent applications.




Date/App# patent app List of recent Lexer-related patents
02/04/16
20160037192 
 Transport stream packet header compression patent thumbnailnew patent Transport stream packet header compression
A demultiplexer 630 routes only one or more transport stream packets with a single packet identifier value to each physical layer pipe. A header compression unit 620 replaces the packet identifier of the transport stream packet with a short packet identifier of one bit length indicating at least whether the transport stream packet is a null packet..
Panasonic Intellectual Property Management Co., Ltd.


02/04/16
20160036580 
 Mobile communication device configured with a single crystal piezo resonator structure patent thumbnailnew patent Mobile communication device configured with a single crystal piezo resonator structure
A mobile communication system. The system has a housing comprising an interior region and an exterior region and a processing device provided within an interior region of the housing.
Akoustis, Inc.


02/04/16
20160036550 
 Method and system for a polarization immune wavelength division multiplexing demultiplexer patent thumbnailnew patent Method and system for a polarization immune wavelength division multiplexing demultiplexer
Methods and systems for a polarization immune wavelength division multiplexing demultiplexer are disclosed and may include, in an optoelectronic transceiver having an input coupler, a demultiplexer, and an amplitude scrambler: receiving input optical signals of different polarization via the input coupler, communicating the input optical signals to the amplitude scrambler via waveguides, configuring the average optical power in each of the waveguides utilizing the amplitude scrambler, and demultiplexing the optical signals utilizing the demultiplexer. The amplitude scrambler may include phase modulators and a coupling section.
Luxtera, Inc.


02/04/16
20160036464 
 Multi-code chien's search circuit for bch codes with various values of m in gf(2m) patent thumbnailnew patent Multi-code chien's search circuit for bch codes with various values of m in gf(2m)
The present invention discloses a multi-code chien's search circuit for bch codes with various values of m in gf(2m). The circuit includes: a combined matrix unit, a number of first multiplexers, a number of registers and a number of second multiplexers.
Storart Technology Co., Ltd.


02/04/16
20160036447 
 Reconfigurable logic device patent thumbnailnew patent Reconfigurable logic device
[solution] a reconfigurable logic device for forming a plurality of logic circuits in accordance with configuration data information. Each of the multi-lookup table units includes: a configuration memory that stores configuration data; data input lines; data output lines; and a reconfigurable logic multiplexer that, in response to the configuration data, selectively links data inputted to the data input lines to data outputted to the data output lines, and/or outputs, to the data output lines, data obtained by performing a logical operation on data pertaining to the inputted data.

02/04/16
20160036446 
 Cross point switch patent thumbnailnew patent Cross point switch
A cross point switch, in accordance with one embodiment, includes a plurality of tri-state repeaters coupled to form a plurality of multiplexers. Each set of corresponding tri-state repeaters in the plurality of multiplexers share a front end module such that delay through the cross point switch due to input capacitance is reduced as compared to conventional cross point switches..
Intellectual Ventures Holding 81 Llc


02/04/16
20160036428 
 Fine-grained power gating in fpga interconnects patent thumbnailnew patent Fine-grained power gating in fpga interconnects
Systems and methods for power gating in logic and/or computing circuitry in accordance with embodiments of the inventions are disclosed. In one embodiment, a multiplexer for fine-grain power gating includes a first supply voltage and a second supply voltage, a plurality of inputs, a plurality of selection inputs, a selection circuitry configured to select one of the plurality of inputs, where one of the plurality of inputs is the first supply voltage and one of the selection inputs is a power gating enable input, an output inverter stage including a pmos transistor and an nmos transistor, where at least one input to the inverter stage is provided to the gates of the pmos and nmos transistors and selection of the power gating enable signal applies the first supply voltage to the gate of the pmos transistor and places the pmos transistor in a cutoff mode of operation..
The Regents Of The University Of California


02/04/16
20160036427 
 Photorepeated integrated circuit with compensation of the propagation delays of signals, notably of clock signals patent thumbnailnew patent Photorepeated integrated circuit with compensation of the propagation delays of signals, notably of clock signals
Integrated circuits of large size produced by photorepetition of several mutually identical partial patterns are provided, more precisely to the compensation of propagation delays of signals (notably of clock signals) from one partial circuit to the following whereas the signals concerned must reach the various partial circuits simultaneously for proper operation of the whole. The compensation circuit provided in each partial circuit comprises a main transmission line for a master clock signal and a compensation line with multiple outputs, as well as a multiplexer for selecting one of the outputs, the output selected being different in the various partial circuits.
Pyxalis


02/04/16
20160036424 
 Power efficient multiplexer patent thumbnailnew patent Power efficient multiplexer
A power efficient multiplexer. In accordance with a first embodiment, a power efficient multiplexer comprises a transmission gate structure for selectively passing one of a plurality of input signals and a stacked inverter circuit for inverting the one of a plurality of input signals.
Intellectual Ventures Holding 81 Llc


02/04/16
20160036420 
 Skew calibration circuit and operation  the skew calibration circuit patent thumbnailnew patent Skew calibration circuit and operation the skew calibration circuit
A skew calibration circuit may include a data delay unit receiving first data and a first code, and output delayed first data as second data by delaying the first data according to the first code; a clock delay unit receiving a first clock signal and a second code, and output delayed first clock signal as second clock signal by delaying the first clock signal according to the second code; a multiplexer receiving a clock signal and output the clock signal or an inverted clock signal of the clock signal as a first clock signal in response to a selection signal; and a control logic unit receiving the second data and the second clock signal and control the first code, the second code and the selection signal in response to the second data and the second clock signal.. .
Samsung Electronics Co., Ltd.


02/04/16
20160036415 
new patent

Elastic wave filters and duplexers using same


An elastic wave filter including a substrate, a signal line disposed on the substrate and connecting a first signal terminal to a second signal terminal, a plurality of series resonators connected to the signal line in series, and a plurality of parallel resonators connected to the signal line. At least one of the series resonator having an anti-resonant frequency closest to the passband of the filter among the plurality of series resonators, and/or the parallel resonator having a resonant frequency closest to the passband of the filter among the plurality of parallel resonators, is covered with a dielectric film that is relatively thicker than a dielectric film covering the other series and/or parallel resonators..
Skyworks Panasonic Filter Solutions Japan Co., Ltd.


02/04/16
20160036409 
new patent

Printed diplexer


A printed diplexer is printed on a pcb, having at least two input terminals respectively connected to at least two end portions thereof, having the output terminal connected at a center portion thereof, and configured to output a signal inputted from the at least two input terminals to the output terminal.. .
Lg Innotek Co., Ltd.


02/04/16
20160035414 
new patent

Sram bit-line and write assist lowering dynamic power and peak current, and a dual input level-shifter


Described is an apparatus comprising a plurality of memory arrays, local write assist logic units, and read/write local column multiplexers coupled together in a group such that area occupied by the local write assist logic units and the read/write local column multiplexers in the group is smaller than it would be when global write assist logic units and the read/write global column multiplexers are used. Described is a dual input level-shifter with integrated latch.

02/04/16
20160034729 
new patent

Rfid integrated antenna system


An rfid system includes at least one host controller and at least one antenna module coupled to the host controller. The antenna module may include a plurality of antenna elements, at least one multiplexer (mux) module integrated in the antenna module, and an rfid reader integrated in the antenna module.
Promega Corporation


02/04/16
20160030753 
new patent

Multi-electrode neural prothesis system


A hermetic electronics package of a multi-electrode neural prosthesis system includes a metal case, a feedthrough construction having an electrically insulating substrate and an array of electrically conductive feedthroughs extending through it, with the electrically insulating substrate connected to the open end of the metal case to form a hermetically sealed enclosure. And a set of electronic components is located within the hermetically sealed enclosure and operably connected to the feedthroughs of the feedthrough construction so as to electrically communicate outside the package.
Lawrence Livermore National Security, Llc


01/28/16
20160029013 

Image display method and apparatus


An image display apparatus according to an embodiment of the present invention comprises: an ir emitter controller for recognizing a pair of 3d glasses connected to the image display apparatus; a video multiplexer for receiving a plurality of displayed video data using a plurality of pairs of 3d glasses, setting a frame rate for the plurality of video data to assign a frame period thereto, and multiplexing the plurality video data according to the frame period assigned at the set frame rate, when the plurality of pairs of 3d glasses is connected to the image data apparatus; and a display unit for frame-sequentially displaying the multiplexed video data.. .
Lg Electronics Inc.


01/28/16
20160028804 

Systems with virtual universal asynchronous receiver transmitter and methods therefor


In one embodiment, a monolithic integrated circuit includes a first uart, a second uart, and a multiplexer. The first uart has a parallel io interface to couple to a host system to transceive parallel data and a serial io interface.

01/28/16
20160028528 

Method and system for balancing reference signal powers across ofdm symbols


A base station includes a reference signal allocator that allocates a first layer of dedicated reference signals and a second layer of reference signals to the same resource elements in a first resource block. The reference signals are allocated to two adjacent resource elements corresponding to a first ofdm symbol and a second ofdm symbol on a first, second, and third subcarriers of the first resource block.
Samsung Electronics Co., Ltd.


01/28/16
20160028527 

Method and system for balancing reference signal powers across ofdm symbols


A base station includes a reference signal allocator that allocates a first layer of dedicated reference signals and a second layer of reference signals to the same resource elements in a first resource block. The reference signals are allocated to two adjacent resource elements corresponding to a first ofdm symbol and a second ofdm symbol on a first, second, and third subcarriers of the first resource block.
Samsung Electronics Co., Ltd.


01/28/16
20160028515 

Division of bit streams to produce spatial paths for multicarrier transmission


A device for bit-demultiplexing in a multicarrier mimo communication system (e.g. Precoded spatial multiplexing mimo communication systems using adaptive ofdm), including a multicarrier mimo transmitter and a multicarrier mimo receiver.
Sony Corporation


01/28/16
20160028502 

Mechanism for traffic privacy in reconfigurable add/drop multiplexer based submarine networks


A method for data transport that includes providing a branch terminal between a first and second trunk terminal, wherein a branching unit is present at an intersect between the first and second trunk terminal and the branch terminal. The branching unit includes a reconfigurable add/drop multiplexers (roadm) at least one attenuator.
Nec Corporation


01/28/16
20160028455 

Apparatus and methods for cross-polarized tilt antennas


Embodiments are provided for cross-polarized antennas design with different down tilt angles that support versatile functionality, such as for mimo or beamforming. An embodiment antenna circuit comprises a baseband signal processor, a pair of rf transmitters coupled to the baseband signal processor, a pair of pas coupled to the rf transmitters, a 90°/180° hybrid coupler coupled to the rf transmitters, a pair of duplexers and two antennas coupled to the pas.
Futurewei Technologies, Inc.


01/28/16
20160028396 

High-performance low-power near-vt resistive memory-based fpga


A field programmable gate array (fpga) of the island-type comprising a plurality of cluster-based configurable logic blocks (clbs), whereby each of the cluster-based clbs is surrounded by a global routing structure formed by a plurality of multiplexers and pass/transmission-gates organized in switch boxes (sbs) and connection blocks (cbs), the switch boxes and the connection blocks comprising at least a first plurality of resistive memories inserted in a data path of a first routing architecture of the switch boxes and the connection blocks. Each clb contains basic logic elements (bles), as well as local routing resources..
Ecole Polytechnique Federale De Lausanne (epfl)


01/28/16
20160028373 

High rejection surface acoustic wave duplexer


Filer devices and duplexer devices are disclosed. A filter device includes two or more surface acoustic wave resonators, including at least a first shunt resonator, formed on a surface of a substrate.
Resonant Inc.


01/28/16
20160028372 

Acoustic wave elements and antenna duplexers, and modules and electronic devices using same


An acoustic wave element according to certain examples includes a piezoelectric body, an interdigital transducer (idt) electrode disposed above the piezoelectric body, and a connection electrode disposed above the piezoelectric body and connected to the idt electrode. A first insulation layer covers the connection electrode, and a second insulation layer covers the idt electrode.
Skyworks Panasonic Filter Solutions Japan Co., Ltd.


01/28/16
20160028371 

Filter and duplexer


A filter includes: piezoelectric thin film resonators, each including a substrate, a piezoelectric film located on the substrate, a lower electrode and an upper electrode facing each other across at least a part of the piezoelectric film, and an insertion film inserted in the piezoelectric film, located in at least a part of an outer peripheral region within a resonance region, and not located in a center region of the resonance region, the resonance region being a region where the lower electrode and the upper electrode face each other across the piezoelectric film, wherein at least two piezoelectric thin film resonators out of the piezoelectric thin film resonators have different widths of the insertion films within the resonance regions.. .
Taiyo Yuden Co., Ltd.


01/28/16
20160028366 

Duplexer


A duplexer includes a first band-pass filter and a second band-pass filter with a pass-band lower than the first band-pass filter. The first band-pass filter includes an unbalanced surface acoustic wave filter.
Murata Manufacturing Co., Ltd.


01/28/16
20160028143 

Duplexer


A duplexer according to the present invention includes a transmission-side terminal, a reception-side terminal, a common terminal, a transmission-side circuit unit, and a reception-side circuit unit. Here, the transmission-side circuit unit is connected between the transmission-side terminal and the common terminal.
Nec Corporation


01/28/16
20160028137 

A frequency demultiplexer


A frequency demultiplexer comprising an input part (106) with an input port (101), a low pass filter (125) and a band-pass filter (108) with output ports (120, 145). The input part (106), the low-pass filter (125) and the band-pass filter (108) comprise open waveguide sections, and the band-pass filter (108) comprises gap-coupled resonators (130, 135, 140).
Telefonaktiebolaget Lm Ericsson (publ)


01/28/16
20160026331 

Touch display driving circuit capable of responding to cpu commands


A touch display driving circuit capable of responding to cpu commands, including: a first interface receiving touch configuration data from a cpu and outputting touch report data to the cpu; a second interface coupling with a touch display module; a control unit executing a touch detection procedure on the touch display module via the second interface to derive touch detected data, and processing the touch detected data to generate the touch report data, wherein the touch detection procedure is determined according to the touch configuration data determining a connection configuration of at least one multiplexer and a weighting configuration of at least one touch point, and the content of the touch report data include a sensed pressure profile, a finger print, a palm print, an ear image, characteristics of a finger print, characteristics of a palm print, or characteristics of an ear image.. .
Rich Ip Technology Inc.


01/21/16
20160020931 

Method and digitization of broadband analog signals


Methods and systems for digitization of broadband analog signals may comprise in a radio frequency (rf) transceiver comprising a diplexer, first and second automatic gain and slope control (ascs) modules, a combiner, and an analog to digital converter (adc): receiving an input rf signal comprising at least two signals, splitting the input rf signal in the frequency domain into first and second signals of different frequency utilizing the diplexer, configuring a frequency-dependent gain level for each of the first and second signals utilizing the first and second ascs modules, combining output signals from the first and second ascs modules utilizing the combiner, and converting the combined output signals to a digital signal utilizing the adc. The frequency dependent gain levels of the first and second signals may be configured to enable the adc to operate with an effective number of bits (enob) of approximately 10..
Entropic Communications, Inc.


01/21/16
20160020867 

Burst-mode optical amplification apparatus and method thereof


A burst-mode optical amplification apparatus and method is provided. The burst-mode optical amplification apparatus includes a gain saturation signal generator configured to generate a gain saturation signal for gain stabilization based on an incoming input optical signal; a wavelength multiplexer configured to wavelength multiplex the incoming input optical signal and the gain saturation signal; and an optical amplifier configured to amplify both the wavelength-multiplexed input optical signal and the wavelength-multiplexed gain saturation signal.
Electronics And Telecommunications Research Institute


01/21/16
20160020777 

Configurable time-interleaved analog-to-digital converter


A time-interleaved analog-to-digital converter for conversion of l analog input signals to l corresponding digital output signals comprises an array of n (n>l) constituent analog-to-digital converters each having an analog input and a digital output and each adapted to digitize an analog input sample, and a controller adapted to (for each of the l analog input signals indexed by i=1, 2, . .
Anacatum Design Ab


01/21/16
20160020770 

Programmable mixed-signal input/output (io)


Techniques are described for providing highly integrated and configurable io ports for integrated circuits that can be individually configured for a variety of general purpose digital or analog functions, such as multiple channel analog-to-digital converters (adc), multiple channel digital-to-analog converters (dac), multiplexers, gpios, analog switches, switch and multiplexers, digital logic level translators, comparators, temperature sensors and relays, and so forth. The configurations of individual ports can be set by a configuration register that can, for instance, designate the function and voltage range of the port without impacting the other ports.
Maxim Integrated Products, Inc.


01/21/16
20160019842 

Light emitting element display device and driving the same


A display device includes a data driver and a demultiplexer. The data driver supplies an image data signal to the demultiplexer.
Samsung Display Co., Ltd.


01/21/16
20160019827 

In-cell touch display device


An in-cell touch display device. A panel has a plurality of data lines, a plurality of gate lines and a plurality of touch electrodes disposed thereon.
Lg Display Co., Ltd.


01/21/16
20160019182 

Generating a parallel data signal by converting serial data of a serial data signal to parallel data


Methods and deserializer circuits are provided for generating a parallel data signal by converting serial data of a serial data signal to parallel data. In a particular embodiment, the deserializer circuit includes a logic divider configured to generate based on a half rate clock, a quarter rate clock, a mode rate clock, and a selection control signal.
International Business Machines Corporation


01/21/16
20160019174 

Universal serializer architecture


Systems and methods for a universal serializer-deserializer (serdes) architecture are described. In various implementations, a transceiver may include: a first plurality of data flip- flops coupled to a data lookup circuit of a serdes interface; a second plurality of data flip-flops coupled to the data lookup circuit; a plurality of latches, each latch of the plurality of latches coupled to a corresponding data flip-flop of the second plurality of data flip-flops; and a plurality of multiplexers coupled to the plurality of latches, to the first plurality of data flip-flops, and to a transmitter circuit..
Texas Instruments Incorporated


01/21/16
20160018916 

In-cell touch display device


An in-cell touch display device. A panel has a plurality of data lines, a plurality of gate lines and a plurality of touch electrodes disposed thereon.
Lg Display Co., Ltd.


01/21/16
20160018600 

Delay line interferometer multiplexer


In an embodiment, a delay line interferometer (dli) multiplexer (mux) includes a first stage and a second stage. The first stage includes a first dli and a second dli.
Finisar Corporation


01/21/16
20160018462 

Apparatus and method to debug a voltage regulator


Described is an apparatus which comprises: a first voltage regulator (vr) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.. .

01/21/16
20160018447 

Sampling circuitry and sampling a plurality of electrodes


A sampling circuitry for a plurality of electrodes the circuitry comprising a plurality of charge amplifiers and a plurality of modulators, wherein each charge amplifier and each modulator, comprised in the plurality of charge amplifiers and the plurality of modulators, respectively, corresponds to an electrode of the plurality of electrodes, wherein each modulator is capable of generating a residue signal and a rough code corresponding to each sampled electrode of the plurality of electrodes, a multiplexer capable of receiving a plurality of residue signals generated by the plurality of modulators, a residue analog to digital converter capable of receiving a multiplexed residue signal from the multiplexer and outputting a digitized multiplexed residue signal, and a digital summation circuitry capable of receiving the digitized multiplexed residue signal and a plurality of rough codes, comprising each rough code corresponding to each sample electrode, and outputting a plurality of output codes.. .
Semtech Corporation


01/21/16
20160016169 

Microfluidic devices for the rapid and automated processing of sample populations


Microfluidic devices for the rapid and automated processing of sample populations are provided. Described are multiplexer tiplexer microfluidic devices configured to serially deliver a plurality of distinct sample populations to a sample processing element rapidly and automatically, without cross-contaminating the distinct sample populations.
Board Of Regents, The University Of Texas System


01/14/16
20160013923 

Flexible integrated communications and navigation transceiver system


An integrated transceiver system for an avionics radio comprises a first transceiver comprising a first duplexer coupled with a first antenna, a first transmitter that sends an rf signal to the first duplexer, a first receiver that receives an rf signal from the first antenna through the first duplexer, and a first processor in communication with the first transmitter. The first transceiver is reconfigurable for atg communications or dme navigation.
Honeywell International Inc.


01/14/16
20160013868 

Silicon photonic hybrid polarization demultiplexer


An optical demultiplexer that includes at least one a hybrid phase shifter configured to receive a light signal over a fiber element, the light signal including polarized optical signals. Each phase shifter includes a thermo-optic phase shifter configured to phase shift the light signal, an electro-optic phase shifter configured to phase shift the light signal, and a coupler configured to maintain polarization of the polarized signal components.
Cisco Technology, Inc.


01/14/16
20160013784 

Signal adjustment circuit


A circuit may include a phase detector circuit, a charge pump circuit, a delay circuit, and a multiplexer circuit. The phase detector circuit may be configured to output a comparison signal based on a comparison of a phase of an inversion of a first clock signal and a phase of a multiplexer signal.
Fujitsu Limited


01/14/16
20160012794 

Voltage transmission circuit, voltage transmitting circuit and voltage receiving circuit


The voltage transmission circuit includes: a multiplexer for transmitting positive and negative voltages ranging +vdd to −vdd selectively; and a demultiplexer for receiving the positive and negative voltages and output them at positive and negative outputs. The voltage transmission circuit is arranged by use of elements each having a withstand voltage of which the absolute value is not 2.
vdd


01/14/16
20160012772 

Display with secure decryption of image signals


A display securely decrypts an encrypted image signal. Pixels are disposed between the display substrate and cover in a display area, and provide light to a user in response to a drive signal.
Global Oled Technology Llc


01/14/16
20160012252 

Techniques and architecture for anonymizing user data


An apparatus may include an interface to receive a multiplicity of user information samples at a respective multiplicity of instances; a processor circuit, and an entropy multiplexer for execution on the processor circuit to generate a pseudo random number based upon a pseudo random number seed and pseudo random number algorithm for each user information sample of the multiplicity of user information samples. Other embodiments are described and claimed..

01/14/16
20160011262 

Scan test multiplexing


System and method for performing scan test on multiple ic devices by site-multiplexing. Multiple test sites of an ate are coupled to multiple duts through a multiplexer.
Advantest Corporation


01/14/16
20160011261 

Scan test multiplexing


System and method for performing scan test on multiple ic devices by site-multiplexing. Multiple test sites of an ate are coupled to multiple duts through a multiplexer.
Advantest Corporation


01/07/16
20160006556 

Systems and methods related to time-division and frequency-division duplex protocols for wireless applications


Systems and methods related to time-division and frequency-division duplex protocols for wireless applications. In some embodiments, a wireless architecture can include a radio-frequency (rf) path configured to support a first modified time-division duplex (tdd) band operation and a second modified tdd band operation.
Skyworks Solutions, Inc.


01/07/16
20160006507 

Optical communication systems and methods


Systems and methods presented herein provide for optical communications with a remotely located laser. In one embodiment, a communication system includes an optical link and a communication hub comprising at least two lasers optically coupled to a first end of the optical link, the communication hub further comprising an optical multiplexer operable to multiplex light from the lasers and to propagate the multiplexed light along the optical link.

01/07/16
20160006417 

Signal processing apparatus and method


A signal processing apparatus includes a first electrical signal generator configured to generate a first electrical signal, a second electrical signal generator configured to generate a second electrical signal based on a voltage signal output from a variable impedance unit, and a multiplexer configured to selectively supply the first electrical signal and the second electrical signal to the variable impedance unit.. .
Samsung Electronics Co., Ltd.


01/07/16
20160006410 

Acoustic wave devices, and antenna duplexers, modules, and communication devices using same


An elastic wave device including a substrate, an interdigital transducer (idt) electrode provided on an upper surface of the substrate, a first wiring electrode provided on the upper surface of the substrate and connected to the idt electrode, a dielectric film that does not cover a first region of the first wiring electrode but covers a second region of the first wiring electrode above the substrate, the first wiring electrode including a cutout in the second region, and a second wiring electrode that covers an upper surface of the first wiring electrode in the first region and an upper surface of the dielectric film in the second region above the substrate.. .
Skyworks Panasonic Filter Solutions Japan Co., Ltd


01/07/16
20160006408 

Module


A module includes: a first duplexer including a common terminal coupled to a first terminal of a diplexer, the diplexer including an antenna terminal coupled to an antenna, the first terminal, and a second terminal; and a second duplexer including a common terminal coupled to the second terminal of the diplexer and having a passband different from a passband of the first duplexer, wherein a frequency at which a reactance component of an impedance is approximately zero and the impedance is less than a reference impedance is not located in a passband of the first duplexer, the impedance being an impedance when the second duplexer is viewed from a node at which the antenna terminal is divided into the first terminal and the second terminal in the diplexer.. .
Taiyo Yuden Co., Ltd.


01/07/16
20160005455 

Memory controller and memory device command protocol


Embodiments generally relate to a command protocol and/or related circuits and apparatus for communication between a memory device and a memory controller. In one embodiment, the memory controller includes an interface for transmitting commands to the memory device, wherein the memory device includes bitline multiplexers, and accessing of memory cells within the memory device is carried out by a command protocol sequence that includes a wordline selection, followed by bitline selections by the bitline multiplexers.
Rambus Inc.


01/07/16
20160004661 

Usb transceiver


A universal serial bus (usb) controller includes a usb transceiver to detect a high-speed (hs) disconnect between the usb controller and a device connected to it. The usb transceiver includes a reference-voltage generation circuit, a hs current driver, first and second comparators, and a multiplexer.
Freescale Semiconductor, Inc.


01/07/16
20160003742 

Time-resolved laser-induced fluorescence spectroscopy systems and uses thereof


The invention provides systems for characterizing a biological sample by analyzing emission of fluorescent light from the biological sample upon excitation and methods for using the same. The system includes a laser source, collection fibers, a demultiplexer and an optical delay device.
Cedars-sinai Medical Center


01/07/16
20160003672 

Multiplexer for single photon detector, process for making and use of same


An multiplexer includes: a plurality of single photon detectors arranged in a two-dimensional array; a plurality of first bias lines in electrical communication with the single photon detectors; a plurality of second bias lines in electrical communication with the single photon detectors; a plurality of first readout lines in electrical communication with the single photon detectors; and a plurality of second readout lines in electrical communication with the single photon detectors, wherein, for every single photon detector, the first bias line is in electrical communication with the first readout line in a first common line, and for every single photon detector, the second bias line is in electrical communication with the second readout line in a second common line such that the multiplexer is configured for resistive current splitting.. .
National Institute Of Standards And Technology


12/31/15
20150382363 

Remote radio head unit system with wideband power amplifier and method


A remote radio head unit (rru) system for multiple operating frequency bands, multi-channels, driven by a single or more wide band power amplifiers. More specifically, the present invention enables multiple-bands rru to use fewer power amplifiers in order to reduce size and cost of the multi-band rru.
Dali Systems Co. Ltd.


12/31/15
20150381387 

System and facilitating communication between multiple networks


In one embodiment, a communication system configured for facilitating communication between multiple networks is provided. The communication system comprises a communication end point configured for handling network traffic among the plurality of networks and a network server coupling each of the networks with the communication end point via a communication channel, the network server configured for handling a communication request from at least one network entity for accessing at least one resource of at least one destination network.
Ciphergraph Networks, Inc.


12/31/15
20150381304 

Minimizing bandwidth narrowing penalties in a wavelength selective switch optical network


This invention relates to provisioning wavelength-selective switches and reconfigurable optical add-drop multiplexers to minimize the bandwidth narrowing effect from the optical filters. Novel architectures and methods are disclosed that can significantly reduce bandwidth-narrowing on channels in a reconfigurable wdm network where a large number of optical filter elements are cascaded.

12/31/15
20150381302 

Telecommunications network node linking a metropolitan area network with at least one access network


The telecommunications network node linking a metropolitan area network, including at least one optical link connecting the nodes, with at least one access network, includes an electronic card that enables the aggregation of traffic from multiple access networks, a transmitter capable of receiving an electrical signal from the electronic card and of transmitting an optical packet to the metropolitan area network, a circulator capable of extracting a stream of multiplexed optical packets from the optical link and of inserting a stream of multiplexed optical packets into the optical link, and a reflective switching matrix receiving a stream of multiplexed optical packets from among which it selects and detects those intended for the access network. The reflective switching matrix includes a poadm optical packet add/drop multiplexer that receives multiplexed optical packets and transmits demultiplexed optical packets, and at least one rsoa reflective semiconductor optical amplifier capable of receiving a demultiplexed optical packet, which includes three sections..
Alcatel Lucent


12/31/15
20150381177 

Communication cell for an integrated circuit operating in contact and contactless mode, electronic chip comprising the communication cell, electronic system including the chip, and test apparatus


A communication cell for an integrated circuit includes a physical interface configured to supply an input signal (for example, a capacitive signal or an ohmic signal). A receiver circuit operates to receive the capacitive signal and generate a first intermediate signal.
Stmicroelectronics S.r.l.


12/31/15
20150381160 

Robust multiplexer, and operating a robust multiplexer


Multi-channel multiplexers and a method for operating a multi-channel multiplexer are presented, wherein each of a plurality of input channels includes at least one doped bulk well of a conductivity type. The method further includes blocking each input channel of a selection of the plurality of input channels by at least one corresponding control voltage, and bringing each of the at least one doped bulk well of each of the input channels of the selection of the plurality of input channels to an at least one corresponding predetermined voltage.
Infineon Technologies Ag


12/31/15
20150381147 

Configurable generic filter hardware block and methods


A configurable generic filter hardware block and corresponding methods are provided. A configurable generic filter hardware block comprises a plurality of multipliers; a plurality of adders; and one or more multiplexers, wherein the configurable generic filter hardware block is configured using a header data structure, the header data structure comprises a pointer to a memory location storing a plurality of input samples, a pointer to a memory location storing a plurality of output samples and a coefficient selection control value.
Lsi Corporation


12/31/15
20150381142 

Filter, duplexer and module


A filter includes: one or more series resonators connected in series between an input terminal and an output terminal; one or more parallel resonators connected in parallel between the input terminal and the output terminal; a first inductor having one end connected to at least one of the input terminal and the output terminal; a second inductor having one end connected to a terminal near a ground of at least one of the parallel resonators; and a third inductor connected between a first node and the ground, the first node connecting the other end of the first inductor and the other end of the second inductor.. .
Taiyo Yuden Co., Ltd.


12/31/15
20150380791 

Rf filter circuit, rf filter with improved attenuation and duplexer with improved isolation


A filter circuit providing improved attenuation, a filter having improved attenuation and a duplexer with improved isolation are provided. The filter circuit has a first and a second coupling conductor segment which couple an input port to a ground port or the filter's output port.
Epcos Ag


12/31/15
20150378099 

Technologies for generating a broadband optical output


Technologies for generating a broadband optical output include a plurality of narrowband optical sources formed in a silicon substrate to generate a narrowband optical output, a plurality of input optical waveguides to route the narrowband optical output, an optical multiplexer formed in the silicon substrate to reflect the routed narrowband optical output, and an output optical waveguide to collect the reflected narrowband optical output to generate the broadband optical output. The output optical waveguide may route the broadband optical output to an output of the photonic integrated circuit..

12/31/15
20150378098 

Polarization beam splitter and optical device


Provided are a polarization beam splitter and an optical device with high productivity. A polarization beam splitter (pbs) according to an exemplary embodiment of the present invention includes: a demultiplexer (11) that is formed of a rib waveguide (50) and demultiplexes input light into first input light and second input light; a multiplexer (14) that is formed of the rib waveguide (50) and multiplexes the first input light and the second input light that are obtained by demultiplexing the input light by the demultiplexer (11); a first arm waveguide (12) that is formed of a channel waveguide (51) and guides the first input light to the multiplexer (11); and a second arm waveguide (13) that is formed of the channel waveguide (51), generates a phase difference in the first input light propagating through the first arm waveguide, and guides the second input light to the multiplexer (14)..
Nec Corporation


12/31/15
20150377981 

Novel on-chip test technique for low drop-out regulators


A circuit and method is described for automatically testing multiple ldo regulator circuits on an integrated circuit chip independent of an ate. Each ldo regulator is tested for voltage at a specified current output capability, wherein the output driver transistor is formed by at least two pass transistors, which are each tested for voltage output at a particular current capability.
Dialog Semiconductor Gmbh


12/31/15
20150377736 

System and multiplexed and buffered sensor arrays


A miniature pressure scanning system may comprise: a plurality of miniature pressure sensors including a plurality of sensor outputs, each of the miniature pressure sensors including at least one sensor output for providing an analog output signal and each at least one sensor output having an associated output impedance; a plurality of buffers, each buffer of said plurality of buffers being electrically coupled to one sensor output of the plurality of sensor outputs, and each said buffer being operative to reduce a settling time constant associated with multiplexer voltage spikes and reduce the associated output impedance of the one sensor output coupled to it; and at least one multiplexer electrically coupled to the plurality of sensor outputs, said at least one multiplexer being operative to be switched between each of the plurality of sensor outputs.. .
Measurement Specialties, Inc.


12/31/15
20150376052 

Crystallized glass and manufacturing same


What is achieved is an optical wavelength multiplexer/demultiplexer not necessarily requiring the function of adjusting the optical path. A value (Δlmax−Δlmin)/l obtained by dividing a difference between a maximum value Δlmax and a minimum value Δlmin of Δl in a range of −40° c.
Nippon Electric Glass Co., Ltd.


12/24/15
20150373433 

Radix enhancement for photonic packet switch


A system can include an optical multiplexer to combine a plurality of optical input signals having respective wavelengths into a wide-channel optical input signal that is provided to an input channel. The system also includes a photonic packet switch comprising a switch core and a plurality of ports defining a switch radix of the photonic packet switch.
Hewlett-packard Development Company, L.p.


12/24/15
20150373432 

Spectral-temporal connector for full-mesh networking


A spectral-temporal connector interconnects a large number of nodes in a full-mesh structure. Each node connects to the spectral-temporal connector through a dual link.

12/24/15
20150373233 

Device for receiving video signals transmitted over a packet computer network


The presented invention enables the reception of video signals with variable channel synchronization. All logic elements are located on the receiver side that can work with any transmitter.
Cesnet, Zajmove Sdruzeni Pravnickych Osob


12/24/15
20150372700 

Software programmable, multi-segment capture bandwidth, delta-sigma modulators for cellular communications


A cellular radio architecture for a vehicle that includes a triplexer coupled to an antenna structure and including three signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal.
Gm Global Technology Operations Llc


12/24/15
20150372698 

Software programmable cellular radio architecture for telematics and infotainment


A cellular radio architecture for a vehicle that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a triplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals.
Gm Global Technology Operations Llc


12/24/15
20150372684 

Apparatus for a monotonic delay line, fast locking of a digital dll with clock stop/start tolerance, robust clock edge placement, and clock offset tuning


Described is an apparatus comprising: a delay line including at least four delay stages coupled together in a series; a first multiplexer having a first input coupled to an output of a first delay stage of the at least four delay stages, and a second input coupled to an output of a third delay stage of the at least four delay stages; a second multiplexer having a first input coupled to an output of a second delay stage of the at least four delay stages, and a second input coupled to an output of a fourth delay stage of the at least four delay stages; and a phase interpolator coupled to outputs of the first and second multiplexers, the phase interpolator having an output.. .

12/24/15
20150372364 

Dielectric filter, duplexer, and communication device


There are provided a dielectric filter with excellent electrical characteristics, a duplexer, and a communication device using the dielectric filter. A dielectric filter includes a dielectric block provided with first through holes; inner conductors disposed on inner surfaces of the first through holes; second through holes; a terminal electrode connected to an inner conductor located at on end; a terminal electrode connected to an inner conductor located at the other end; and an outer conductor surrounding the dielectric block, being connected to a reference potential, wherein the first through holes are located on a second main surface side, and the second through holes are located on a first main surface side with respect to the first through holes.
Kyocera Corporation


12/24/15
20150371702 

Static random access memory and using the same


A static random access memory (sram) including a bit cell, wherein the bit cell includes at least two p-type pass gates. The sram further includes a bit line connected to the bit cell, and a bit line bar connected to the bit cell.
Taiwan Semiconductor Manufacturing Company, Ltd.


12/24/15
20150370574 

Replicating logic blocks to enable increased throughput


A datapath pipeline which uses replicated logic blocks to increase the throughput of the pipeline is described. In an embodiment, the pipeline, or a part thereof, comprises a number of parallel logic paths each comprising the same logic.
Imagination Technologies Limited


12/17/15
20150365336 

Method to schedule multiple traffic flows through packet-switched routers with near-minimal queue sizes


A method to schedule multiple traffic flows through a multiplexer server to provide fairness while minimizing the sizes of the associated queues, is proposed. The multiplexer server minimizes a quantity called the maximum normalized service lag for each traffic flow.

12/17/15
20150365276 

Component structure of a wireless node


A wireless node comprises a central core (100) of interlocking horizontal layers of circuit boards and conductive material comprising, from bottom to top, an rf modem comprising a layer of circuit board (24) sandwiched between layers of conductive material (26, 28), a duplexer (30) connected to the rf modem, and an rf switch array connected to the duplexer (30), the rf switch array comprising a layer of circuit board (18) sandwiched between layers of conductive material (20, 22).. .
Cambridge Communication Systems Limited


12/17/15
20150365176 

Process to assemble optical receiver module


An optical receiver module that receives wavelength multiplexed light and a process to assemble the optical receiver module are disclosed. The optical receiver module provides a coupling unit to collimate the wavelength multiplexed light and a device unit that installs an optical de-multiplexer and photodiode elements within housing.
Sumitomo Electric Industries, Ltd.


12/17/15
20150365175 

Optical receiver module and process to assemble optical receiver module


An optical receiver module that receives wavelength multiplexed light and a process to assemble the optical receiver module are disclosed. The optical receiver module provides a coupling unit to collimate the wavelength multiplexed light and a device unit that installs an optical de-multiplexer and photodiode elements within housing.
Sumitomo Electric Industries, Ltd.


12/17/15
20150365099 

Multiplexed signal sampler and conditioner


A signal convertor includes a first sensor configured to generate a first signal and a second signal and first and second multiplexers configured receive the first and second signals, respectively, and generate samples. The signal convertor also includes an analog-to-digital (a/d) convertor configured to convert the samples and a processor configured to multiply the samples by a sine vector and by a cosine vector and determine a magnitude of the first and second signals based upon the product of the samples and the sine vector and the product of the samples and the cosine vector.
Hamilton Sundstrand Corporation


12/10/15
20150358674 

Method and apparatus enabling fast channel change for dsl system


There is provided methods and apparatus for enabling a fast channel change for a digital subscriber line (dsl) system. A channel change processing unit for enabling a channel change in a dsl system includes a demultiplexer (132) and a selector (134) in signal communication with the demultiplexer.
Thomson Licensing


12/10/15
20150357918 

Regulator circuit and operating regulator circuit


A regulator circuit includes a regulator output node, at least (n+1) regulator control circuits, and n drivers. N is an integer greater than 1.
Taiwan Semiconductor Manufacturing Company, Ltd.


12/10/15
20150357721 

Independent azimuth patterns for shared aperture array antenna


A multi-column antenna having ports for different sub-bands is provided. In one aspect of the invention, power dividers couple the sub-band ports to the columns of radiating elements.
Commscope Technologies Llc


12/10/15
20150356940 

Display device


A demultiplexer circuit (12) of a display device according to one aspect of the present invention includes signal input lines (vn), control lines (bsw, gsw, and rsw), and sampling transistors (13r2, 13g2, and 13b1). Sampling transistors connected to one signal input line includes first and second sampling transistors.
Sharp Kabushiki Kaisha


12/10/15
20150355277 

Circuit and monolithic stacked integrated circuit testing


A monolithic stacked integrated circuit (ic) is provided with a known-good-layer (kgl) test circuit. The kgl test circuit includes a scan segment, and a plurality of inputs, outputs, and multiplexers coupled to the scan segment.
Taiwan Semiconductor Manufacturing Company, Ltd.


12/03/15
20150350756 

Providing simultaneous digital and analog services and optical fiber-based distributed antenna systems, and related components and methods


Embodiments relate to providing simultaneous digital and analog services in optical fiber-based distributed radio frequency (rf) antenna systems (dass), and related components and methods. A multiplex switch unit associated with a head-end unit of a das can be configured to receive a plurality of analog and digital downlink signals from one or more sources, such as a service matrix unit, and to assign each downlink signal to be transmitted to one or more remote units of the das.
Corning Optical Communications Wireless Ltd


12/03/15
20150350705 

Receiver, display apparatus and non-transitory computer-readable storage medium storing receiving control program


The receiver is connectable to at least one of plural transmitters and configured to receive, from a connected transmitter, a transmission signal in which an image signal and a control signal are multiplexed, the plural transmitters having mutually different specifications on the control signal. The receiver includes a demultiplexer configured to demultiplex the transmission signal received from the connected transmitter into the image signal and the control signal, a selector configured to select a signal path for the demultiplexed control signal, an information acquirer configured to acquire first information to be used to identify the connected transmitter, and a controller configured to control the selection of the signal path by the selector depending on the first information..
Canon Kabushiki Kaisha


12/03/15
20150350625 

Broadcast transmitter, broadcast receiver and 3d video data processing method thereof


A broadcast transmitter/receiver and a 3d video data processing method of the same are disclosed. A 3d video data processing method of a broadcast transmitter includes encoding 3d video data, using an encoder, generating system information included in 3d video metadata, using a system information processor, outputting a transport stream by inserting frame sync information in the 3d vide data and multiplexing the 3d video data and system information, using a tp encoder, and modulating and transmitting the transport stream, using a transmitting unit.
Lg Electronics Inc.


12/03/15
20150349994 

Method and crest factor reduction


The invention provides apparatuses and method for crest factor reduction. In one embodiment, an apparatus comprising: a plurality of peak detectors respectively corresponding to a plurality of paths, each peak detector detecting a peak from an input signal; a statistical multiplexer, statistically multiplexing the peaks from the plurality of peak detectors; an allocator, allocating one of the multiplexed peaks to one of a plurality of peak cancellation units; the plurality of peak cancellation units, each generating, for an allocated peak, a cancellation peak; a plurality of de-multiplexers respectively corresponding to the plurality of peak cancellation units, each de-multiplexing the cancellation peak onto a corresponding path; a plurality of summation units respectively corresponding to the plurality of paths, each summing the de-multiplexed cancellation peaks on one path; and a plurality of subtraction units, each subtracting the summed cancellation peaks from the input signal on the path to obtain a peak-cancelled signal..
Telefonaktiebolaget L M Ericsson (publ)


12/03/15
20150349984 

Cml quarter-rate predictive feedback equalizer architecture


A system for reduced-rate predictive dfe. In one embodiment a plurality of sampler-multiplexer blocks, each including two samplers and a multiplexer-latch, controlled by a multi-phase clock, sample the received analog signal one at a time, and the output of each multiplexer-latch, which may represent the value of the last received bit, is used to control the select input of another multiplexer-latch, so that the other multiplexer-latch selects the appropriate one of two samplers, each applying a different correction to the received analog signal before sampling.
Samsung Display Co., Ltd.


12/03/15
20150349911 

Optical receiver


An optical receiver includes a semiconductor optical amplifier configured to amplify an optical signal in which an optical signal with a first wavelength and an optical signal with a second wavelength are multiplexed. The receiver includes an optical demultiplexer configured to receive the optical signal amplified by the semiconductor optical amplifier and include a first filter configured to transmit the optical signal with the first wavelength with a transmission rate t1 and a second filter configured to transmit the optical signal with the second wavelength with a transmission rate t2.
Fujitsu Optical Components Limited


12/03/15
20150349413 

Multilevel antennae


A multi-band antenna includes at least one structure useable at multiple frequency ranges. The structure includes at least two levels of detail, with one level of detail making up another level of detail.
Fractus, S.a.




Lexer topics: Capacitive Sensor, Semiconductor, Demultiplex, Video Play, Multiplexing, Compatibility, Coding Method, Volatile Storage, Volatile Memory, Memory Cells, Memory Cell, Semiconductor Substrate, Speech Recognition, Intersymbol Interference, Feedback Signal

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