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Lexer patents



      

This page is updated frequently with new Lexer-related patent applications.




Date/App# patent app List of recent Lexer-related patents
04/28/16
20160119222 
 Method and  routing traffic using asymmetrical optical connections patent thumbnailMethod and routing traffic using asymmetrical optical connections
A method, computer-readable storage device and apparatus for routing traffic in a reconfigurable optical add-drop multiplexer layer of a dense wavelength division multiplexing network are disclosed. For example, the method determines the reconfigurable optical add-drop multiplexer layer has asymmetric traffic, and routes the asymmetric traffic in the reconfigurable optical add-drop multiplexer layer over a plurality of asymmetrical optical connections, wherein the plurality of asymmetrical optical connections is provided with only uni-directional equipment in the reconfigurable optical add-drop multiplexer layer..
At&t Intellectual Property I, L.p.


04/28/16
20160119020 
 Mimo antenna leakage canceller system patent thumbnailMimo antenna leakage canceller system
A system includes a first duplexer that receives samples of a signal transmitted from a first transmit portion of a communication device and outputs a filtered signal based on sampled transmitted signal. A first modulator adjusts the filtered signal based on at least one of a phase, amplitude, and delay of leakage associated with the transmitted signal.
Maxim Integrated Products, Inc.


04/28/16
20160119017 
 Multiplexer device with multiple notch filters connected in parallel patent thumbnailMultiplexer device with multiple notch filters connected in parallel
A multiplexer device includes an antenna node connected to an antenna for at least one of receiving and transmitting signals; multiple band pass filters connected to the antenna node, each band pass filter having a different passband; and multiple notch filters connected in to the antenna node and the multiple band pass filters, each notch filter having a different stopband corresponding to one of the passbands of the band pass filters. The notch filters are connected in parallel with one another in order to reduce insertion loss..
Avago Technologies General Ip (singapore) Pte. Ltd.


04/28/16
20160119003 
 Rf front end architecture patent thumbnailRf front end architecture
Rf front end circuitry includes mid/high-band switching circuitry and a carrier-aggregation diplexer. The mid/high-band switching circuitry is configured to receive and selectively route mid-band and high-band signals between a mid/high-band output port and a number of mid/high-band transceiver ports.
Rf Micro Devices, Inc.


04/28/16
20160118995 
 Analog-to-digital conversion with noise injection via wavefront multiplexing techniques patent thumbnailAnalog-to-digital conversion with noise injection via wavefront multiplexing techniques
A novel noise injection technique is presented to improve dynamic range with low resolution and low speed analog to digital converters. This technique combines incoming signal and noise signal with wave front de-multiplexer and split into several channels.
Spatial Digital Systems, Inc.


04/28/16
20160118100 
 Differential current sensing scheme for magnetic random access memory patent thumbnailDifferential current sensing scheme for magnetic random access memory
A circuit includes first and second reference cells and a current sense amplifier. The first and second reference cells are configured to store opposite logic values, respectively.
Taiwan Semiconductor Manufacturing Company Ltd.


04/21/16
20160112129 
 Resource allocation in pon networks via wave-front multiplexing and de-multiplexing patent thumbnailResource allocation in pon networks via wave-front multiplexing and de-multiplexing
A data communication system comprises a wave-front multiplexer configured to wave-front multiplex first electronic signals into second electronic signals, an electronic-to-optical converter configured to convert a third electronic signal carrying information associated with said second electronic signals into a first optical signal; an optical transferring module configured to split said first optical signal into second optical signals, wherein each of said second optical signals carries substantially the same data as said first optical signal carries; optical-to-electronic converters configured to convert said second optical signals into fourth electronic signals; wave-front demultiplexers each configured to wave-front demultiplex one of said fourth electronic signals into fifth electronic signals substantially equivalent to said first electronic signals respectively.. .

04/21/16
20160112113 
 Antenna structure and wireless communication device using the same patent thumbnailAntenna structure and wireless communication device using the same
An antenna structure includes a feed end, a ground end, a main radiator, a coupling portion, a matching circuit, a switching circuit, and a diplexer. The main radiator is coupled to the feed end.

04/21/16
20160112073 
 Wireless circuitry for simultaneously receiving radio-frequency transmissions in different frequency bands patent thumbnailWireless circuitry for simultaneously receiving radio-frequency transmissions in different frequency bands
An electronic device has wireless communications circuitry that includes transmitters and receivers. Antenna structures may be coupled to the transmitters and receivers to support radio-frequency signal transmission and radio-frequency signal reception operations.

04/21/16
20160112071 
 Multiband wireless data transmission between aircraft and ground systems based on availability of the ground systems patent thumbnailMultiband wireless data transmission between aircraft and ground systems based on availability of the ground systems
Provided are methods and systems for multiband wireless data transmission between aircraft and ground systems. The transmission uses different wavelength ranges, each wavelength range corresponding to a different data domain and establishing a different communication channel.

04/21/16
20160112030 

Acoustic wave device, filter, and duplexer


Acoustic wave device includes: a piezoelectric substrate; a first idt located on the piezoelectric substrate; and a second idt located on the piezoelectric substrate and connected in series to the first idt, wherein the first idt and the second idt share a single common bus bar as a first bus bar of two bus bars of the first idt and a first bus bar of two bus bars of the second idt, and the common bus bar has a width not more than two times a wavelength of an acoustic wave propagating through the first and second idts, the common bus bar connects to no dummy electrode finger facing a tip of an electrode finger connected to a second bus bar of the two bus bars of the first idt and the second idt across a gap.. .

04/21/16
20160112025 

Multiplexer


A multiplexer includes: a first filter connected between a common terminal and a first terminal; a second filter connected between the common terminal and a second terminal, and having a passband lower in frequency than a passband of the first filter; and a resonant circuit including: a first inductor and a capacitor connected in series between a first end and a second end of the resonant circuit, the first end being coupled to a node at which the common terminal diverges into the first filter and the second filter, the second end being coupled to the first filter, and a second inductor connected in parallel to the first inductor and the capacitor between the first end and the second end, wherein the passband of the first filter is higher in frequency than an antiresonant frequency of the resonant circuit.. .

04/21/16
20160109501 

Back-plane connector for cubesat


A back-plane connector connects component boards for a cubesat with a processing unit and a board connector electrically connected to the back-plane connector. The board connector mates with complimentary connectors on the component boards.

04/14/16
20160105688 

Operation point for carriage of layered hevc bitstream


A device for processing a bitstream including video data, such as a demultiplexer, extracts a descriptor from the bitstream, wherein the bitstream includes layers of video data for operation points, separate from the descriptor, such that each operation point includes one or more of the layers of video data, and wherein the descriptor includes a set of profile, tier, and level (ptl) structures and data that associates each of the layers of each of the operation points with a corresponding one of the ptl structures, extracts video data for one of the operation points from the bitstream based at least in part on the ptl structures to which the layers of the one of the operation points correspond, and provides the extracted video data to a video decoder.. .

04/14/16
20160104944 

Electronic device cavity antennas with slots and monopoles


An electronic device may be provided with wireless circuitry. The wireless circuitry may include cavity antennas.

04/14/16
20160104593 

Piezoelectric multiplexer


A piezoelectric multiplexer includes an actuator and multiple piezo-morph beams. The actuator includes an actuator conducting head and an actuator stem, and each piezo-morph beam includes a conducting beam contact head and a beam stem manufactured out of piezo-morph material.

04/14/16
20160104520 

Clock signal processor and non-volatile memory device including the same


A clock signal processor includes a duty cycle corrector, a switch point calculator, and a multiplexer. The duty cycle corrector generates a second clock signal by modifying a duty cycle of a first clock signal.

04/14/16
20160103281 

Polarization beam splitter and optical device


A polarization beam splitter according to an exemplary embodiment of the present invention includes: a demultiplexer (11); a multiplexer (14); a first arm waveguide (12), at least a part of which is formed of a rib waveguide; and a second arm waveguide (13), at least a part of which is formed of a channel waveguide. The first and second arm waveguides are formed with a waveguide width at which, in one of linear polarization components orthogonal to each other, a refractive index of the first arm waveguide (12) with respect to input light is the same as a refractive index of the second arm waveguide (13) with respect to the input light and a refractive index change of the first arm waveguide with respect to a change in the waveguide width is the same as a refractive index change of the second arm waveguide with respect to a change in the waveguide width.

04/14/16
20160103181 

Estimation circuit for soc and soh of battery


Estimation circuit for soc and soh of battery includes a control circuit, a current estimation circuit, an open-circuit voltage detection circuit, an optional multiplexer and an electrical-capacity calculation circuit. The control circuit operates under six modes based on a reset signal, a voltage signal and a current signal.

04/07/16
20160099851 

Method and system for optical connection validation in a reconfigurable optical add-drop multiplexer (roadm) node


A method of validating connections in an optical add/drop multiplexer (oadm) that includes a plurality of modules configured to route optical signals through the oadm, and at least one multi-fiber cable connecting modules of the oadm. A light source coupled to a first port of a first module is controlled to emit a test light.
Ciena Corporation


04/07/16
20160099823 

Real time ofdm transmission system


An ofdm (orthogonal frequency division multiplexing) transmitter includes an inverse fast fourier transform circuit, which, in operation, generates, based on digital input data, a complex time-varying digital signal having real and imaginary components; and a multiplexer adapted to generate a time-multiplexed digital signal by time-multiplexing one or more of the real components with one or more of the imaginary components.. .
Stmicroelectronics Sa


04/07/16
20160099800 

Transceiver and operation method thereof


A receiver, a transceiver, and method of operating the transceiver are provided. The receiver includes a diplexer configured to separate a first band signal and a second band signal, the first band signal including a plurality of first subband signals; a first multi-mode switch configured to generate one or more signal paths corresponding to one or more of the plurality of first subband signals; and a plurality of first band pass filters configured to filter the plurality of first subband signals, wherein the plurality of first band pass filters and the first multi-mode switch are electrically coupled, and one or more of the plurality of first band pass filters, corresponding to one or more of the plurality of first subband signals, filter the plurality of first subband signals, respectively..

04/07/16
20160098956 

Organic light emitting display device


An organic light emitting display device includes a display area and a non-display area. The display area includes display pixels at crossing areas of data lines, scan lines, and emission control lines.
Samsung Display Co., Ltd.


04/07/16
20160098506 

Signal delay flip-flop cell for fixing hold time violation


A signal delay cell for use in resolving hold time violations in an ic has a first multiplexer having a first functional data input node and a scan data input node ti and a second multiplexer having a second functional data input node, a second input node connected to the output of the first multiplexer and a flip-flop module. The propagation of a data input signal applied to the first multiplexer is delayed, and the hold margin of the flip-flop module is increased by transit through the first multiplexer.
Freescale Semiconductor, Inc.


04/07/16
20160097901 

Apparatus and optical time domain reflectometry


An optical signal routing device may include a first lens, second lens and a wavelength division multiplexer (“wdm”) filter positioned between the first and second lenses. The wdm filter may reflect a signal of a first wavelength with a first attenuation and pass the first wavelength signal attenuated by at most a second attenuation to the second lens, the first attenuation exceeding the second attenuation by a first predetermined amount.
Go!foton Holdings, Inc.


04/07/16
20160095559 

Photon-counting detector with count-rate dependent multiplexing


A photon-counting system includes photon-counting detectors that output photon-counting signals to indicate a number of photons impinging on the photon-counting detectors. The system also includes analog-to-digital conversion circuits, which convert one of the photon-counting signals into a digital photon-counting signals, and a processor that processes the digital photon-counting signals to extract information from the photon-counting signals.
Toshiba Medical Systems Corporation


03/31/16
20160094860 

Image encoding device, image encoding method, image decoding device, and image decoding method


An image encoding device includes an encoder that encodes a first field of a specific frame as an intra picture which is predicted by using only an ultra prediction, and that encodes the first field of the above-described specific frame, a second field of the above-described specific frame, a picture whose encoding order is later than that of the first field of the above-described specific frame later and whose display order is earlier than that of the first field, and another picture whose encoding order and also display order are later than those of the first field of the above-described specific frame in order of those pictures, and a multiplexer that multiplexes information showing that the first field of the above-described specific frame is a picture, in a bitstream, at which decoding can be started into the above-described bitstream.. .
Mitsubishi Electric Corporation


03/31/16
20160094331 

Multiplexers and duplexers having active cancellation for improved isolation between transmit and receive ports


A multiplexer is configured to receive a transmit signal from a first amplifier and to provide a receive signal to a second amplifier. A leakage signal is transmitted to a path leading to the second amplifier.
Avago Technologies General Ip (singapore) Pte. Ltd .


03/31/16
20160094330 

Systems and methods for selecting digital content channels using low noise block converters including digital channelizer switches


Systems and methods are provided for selecting data from intermediate frequency signals, corresponding to received signals (e.g., satellite signals) carrying modulated data, using digital channelizer switches. An example digital channelizer switch may comprise a plurality of high speed analog-to-digital converters configured to digitize the intermediate frequency signals; a plurality of digital channelizers configured to digitally tune data from the digitized intermediate frequency signals; a multiplexer configured to select one or more digitized intermediate frequency signal generated by the plurality of high speed analog-to-digital converters as inputs to the plurality of digital channelizers; and a high speed digital-to-analog converter configured to generate an analog output signal using digitally tuned data by the digital channelizer, from at least one digitized intermediate frequency signal..
Entropic Communications, Llc


03/31/16
20160094201 

Surface acoustic wave filter device and duplexer


A surface acoustic wave filter device includes surface acoustic wave filters, one of which includes a longitudinally coupled resonator-type first filter section and a longitudinally coupled resonator-type second filter section. The second filter section is electrically connected in parallel or series with the first filter section on at least one of an input signal side and an output signal side.
Murata Manufacturing Co., Ltd.


03/31/16
20160094198 

Filter device and duplexer


In a filter device, first and second filter sections are connected in parallel between an input terminal and an output terminal. The first filter section is a longitudinally coupled resonator-type elastic wave filter including first and second inter-stage wiring lines with a two-stage cascading connection.
Murata Manufacturing Co., Ltd.


03/31/16
20160093260 

Display device and associated method


A display device comprises a display panel. The display panel comprises a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels, a gate driver connected to the gate lines, and a data driver connected to the data lines.
Innolux Corporation


03/31/16
20160092399 

Folded butterfly module, pipelined fft processor using the same, and control the same


A folded butterfly module performs a radix-22 butterfly operation, and includes: a buffer operable to store first and second to-be-stored data and output first and second stored data; a first multiplexer operable to output one of the second stored data and input data as first selection data; a butterfly operator performing a radix-2 butterfly operation on the first stored data and the first selection data to generate operation data and the second to-be-stored data; a second multiplexer operable to output one of the input data and the operation data as the first to-be-stored data; a third multiplexer operable to output one of the operation data and the second stored data as second selection data; and a multiplier generating output data that equal a product of the second selection data and twiddle data.. .
National Chiao Tung University


03/31/16
20160091560 

Integrated circuit and testing


An integrated circuit includes a first circuit and a test circuit. The test circuit is configured to test the timing of a first circuit.
Taiwan Semiconductor Manufacturing Company, Ltd.


03/24/16
20160087818 

Partial response equalizer and related method


A multi-phase partial response receiver supports various incoming data rates by sampling prdfe output values at a selected one of at least two clock phases. The receiver includes a calibration circuit that performs a timing analysis of critical data paths in the circuit, and this analysis is then used to select the particular clock phase used to latch the output values.
Rambus Inc.


03/24/16
20160087714 

Forward and reverse calibration for ground-based beamforming


Methods and systems for calibrating the return and forward links of a satellite communication system are provided according to embodiments of the invention. The phase and/or amplitude variations caused by the return and forward links are calculated and/or estimated to aid in beamforming, such as ground-based beamforming.
Viasat, Inc.


03/24/16
20160086560 

Semiconductor device, driver circuit, and display device


To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines.
Semiconductor Energy Laboratory Co., Ltd.


03/24/16
20160085260 

Apparatuses and methods for providing clock signals


Apparatuses and methods for providing clock signals are described herein. An example apparatus may include a clock generator circuit.
Micron Technology, Inc.


03/24/16
20160085024 

Optical spatial mode-multiplexer


An apparatus includes an optical fiber bundle that includes a plurality of input optical fibers and a tapered segment. One end of each of the input optical fibers physically connects to a wide end of the tapered segment.
Alcatel-lucent Usa Inc.


03/17/16
20160080782 

Employing helper transport streams for re-multiplexing


In one system embodiment, a master re-multiplexer may be configured to receive an indexed transport stream, re-multiplex the indexed transport stream by performing a set of re-multiplexing operations, generate a helper transport stream, the helper transport stream comprising a description of the set of operations, wherein the set of operations comprises both program clock reference (pcr) re-stamping and inserting packets, and providing the helper transport stream over a communications network to plural remote re-multiplexers capable of identically re-multiplexing the indexed transport stream based on the helper transport stream.. .
Cisco Technology, Inc.


03/17/16
20160080119 

Self-test gsm/edge power measurement


A method and apparatus for self-testing a gsm/edge communications device. An embodiment provides a method of measuring transmit power.
Qualcomm Incorporated


03/17/16
20160080102 

Optimizing optical systems using code division multiple access and/or orthogonal frequency-division multiplexing


An optical receiver comprises an optical port configured to receive an encoded optical signal, and a demodulation block indirectly coupled to the port and comprising a multiplexer, wherein the multiplexer is configured to receive an encoded electrical signal, wherein the encoded electrical signal is associated with the encoded optical signal, and wherein the encoded electrical signal is encoded using a code division multiple access (cdma) scheme, receive a code associated with the scheme, perform a dot multiplication of the encoded electrical signal and the code, and generate a differential voltage based on the dot multiplication.. .
Futurewei Technologies, Inc.


03/17/16
20160079971 

Delay circuit


Systems and methods for delay control are described herein. In one embodiment, a delay circuit comprises a first delay path and a second delay path.
Qualcomm Incorporated


03/17/16
20160079934 

World band radio frequency front end module, system and method thereof


The present disclosure relates to a world band radio frequency power amplifier and a world band radio frequency front end module. The world band power amplifier can contain at least one broadband power amplifier connected to a switch which can direct an rf input signal to a plurality of transmission paths, each transmission path configured for a different frequency.
Micro Mobio Corporation


03/17/16
20160078845 

Display panel and transmitting signals therein


A display panel includes scan lines, data lines and a multiplexer circuit. The data lines interlace with the scan lines.
Au Optronics Corporation


03/17/16
20160078826 

Display device


A display device includes a pixel array having a plurality of pixels arranged in a matrix form based on a crossing structure of data lines and gate lines, a data driver having a plurality of output channels and configured to output a data voltage, a multiplexer configured to distribute the data voltage output from the data driver to the data lines in response to first and second control signals, and a gate driver configured to output a gate pulse synchronized with the data voltage in a non-sequential manner. The first and second control signals are in antiphase, and a switching cycle of the first and second control signals is one horizontal period or two horizontal periods..
Lg Display Co., Ltd.


03/17/16
20160077174 

Flexible signal multiplexer for mri receiving systems


The embodiments relate to a method and a receiving system for an imaging magnetic resonance tomography system. The receiving system includes at least one multiplexer entity for a plurality of receive signals, which respectively come from an antenna of a local coil and may be switched to an analog-digital converter, wherein sampling rates (e.g., 20 ms/s per ch, 40 ms/s per ch, 80 ms/s per ch) of an analog-digital converter for the sampling of a receive signal may be changed..

03/17/16
20160076331 

Modular, retrievable valve packs for blowout preventer multiplexer controls


Retrievable sub-pods for use in a blowout preventer (bop) stack, including systems of sub-pods and methods for use, are disclosed. The sub-pod includes a valve assembly, wherein the valve assembly includes a solenoid, an electronics interface, and a directional control valve.
Hydril Usa Distribution, Llc


03/10/16
20160072605 

Time-division multiplexing data aggregation over high speed serializer/deserializer lane


A digital signal interface includes a multiplexer coupled to receive a plurality of data signals from at least one of a microprocessor, a microcontroller, or a field-programmable gate array (fpga), the multiplexer multiplexing the plurality of data signals. The interface further includes a serializer/deserializer (serdes) transceiver coupled to receive the multiplexed data signals, the serdes transceiver serializing the multiplexed data signals and transmitting the serialized data signals..
Artesyn Embedded Computing, Inc.


03/10/16
20160072477 

Duplexer, filter and communication module


A duplexer includes: a transmit filter that is connected between an antenna terminal and a transmit terminal and has a plurality of acoustic wave resonators; a receive filter that is connected between the antenna terminal and a receive terminal and has a plurality of acoustic wave resonators; and a delay line or a longitudinal coupling type resonator that is connected in parallel with at least one of the plurality of acoustic wave resonators of the transmit filter and the plurality of acoustic wave resonators of the receive filter and has at least two idts (interdigital transducers).. .
Taiyo Yuden Co., Ltd.


03/10/16
20160072471 

Elastic wave filter and duplexer using same


An elastic wave filter has an unbalanced signal terminal, first and second balanced signal terminals, and first through fifth idt electrodes arranged in ordinal order between a pair of grating reflectors. Wiring electrodes of the third and fifth idt electrodes are disposed adjacent a ground electrode of the fourth idt electrode, wiring electrodes of the second and third idt electrodes are disposed adjacent one another, and ground electrodes of the first and second idt electrodes are disposed adjacent one another.
Skyworks Panasonic Filter Solutions Japan Co., Ltd.


03/10/16
20160071469 

Liquid crystal display device and related alignment method


A liquid crystal display device includes a display panel, a multiplexer, an alignment circuit and a short bar circuit. The multiplexer is configured to provide a plurality of output data signals according to a plurality of switch control signals and an input data signal.
Au Optronics Corp.


03/10/16
20160071463 

Semiconductor device, driver ic, display device, and electronic device


A semiconductor device including a test circuit is miniaturized. The semiconductor device includes r first input terminals (r is an integer of 2 or more), a second input terminal, r functional circuits, a demultiplexer, and a switch circuit.
Semiconductor Energy Laboratory Co., Ltd.


03/10/16
20160070595 

Asynchronous task multiplexing and chaining


The described technology is directed towards sharing asynchronous (async) tasks between task chains, including in a way that prevents cancellation of lower-level chain entity from cancelling a shared async task. A shared async task is wrapped in multiplexer code that maintains lower-level entity identities as a set of listeners of the shared async task, and when a listener cancels, only removes that listener from the set of listeners so that the shared async task does not cancel as long as one listener remains in the set.
Home Box Office, Inc.


03/03/16
20160065934 

Imaging architecture for depth camera mode with mode switching


An imaging architecture is described for a depth camera mode with mode switching. In one example, an imaging device has a primary camera to capture an image of a scene, a secondary camera to capture an image of the same scene, a third camera to capture an image of a second scene, a processor having a first port coupled to the primary camera to receive images from the primary camera and a second port to receive images, and a multiplexer coupled to the secondary camera and to the third camera to receive the captured images and to alternately couple the secondary camera or the third camera to the second port of the processor..
Intel Corporation


03/03/16
20160065423 

Collecting and analyzing selected network traffic


A tracking system is described herein for investigating the behavior of a network. In operation, each switch in the network (or each switch in some subset of switches) may determine whether each original packet that it processes satisfies one or more packet-detection rules.
Microsoft Corporation


03/03/16
20160065303 

Methods, apparatuses and system for monitoring roadm optical network


Provided are methods, apparatuses and a system for monitoring a reconfigurable optical add drop multiplexer (roadm) optical network. The method includes: loading, in an optical signal at a sending end, a wavelength label frequency and attribute information of a channel used for transmitting the optical signal; sending the wavelength label frequency and/or the attribute information; receiving, at a monitoring end, the optical signal and acquiring, from the optical signal, the wavelength label frequency and/or the attribute information of the channel used for transmitting the optical signal; and monitoring the roadm optical network according to the wavelength label frequency and/or the attribute information.
Zte Corporation


03/03/16
20160065263 

Dual band concurrent transceiver


A method and apparatus are disclosed for concurrently transmitting and/or receiving two or more communication signals by a wireless device. The communication signals may include signals described by two or more communication protocols, such as wi-fi communication signals and bluetooth communication signals.
Qualcomm Incorporated


03/03/16
20160065216 

Integrated circuit device with programmable analog subsystem


An integrated circuit (ic) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (ct) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (mux) configured to selectively connect any of a plurality of input/outputs (i/os) of the ic device to the analog blocks, the analog mux including at least one low noise signal path pair having a lower resistance than other signal paths of the analog mux; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.. .
Cypress Semiconductor Corporation


03/03/16
20160065175 

Surface acoustic wave filter, surface acoustic wave filter device, and duplexer


A surface acoustic wave filter includes a longitudinally coupled resonator first filter section and a longitudinally coupled resonator second filter section that is electrically connected to the first filter section in parallel or in series and that is provided next to the first filter section in a surface acoustic wave propagation direction. The first filter section includes a first interdigital transducer group arranged in the surface acoustic wave propagation direction.
Murata Manufacturing Co., Ltd.


03/03/16
20160065174 

Ladder filter and duplexer


A ladder filter includes a plurality of series-arm resonators and parallel-arm resonators including surface acoustic wave resonators. A metallization ratio of the series-arm resonator having the smallest electrostatic capacity among the plurality of series-arm resonators is the smallest among the plurality of series-arm resonators and an electrode finger pitch of the series-arm resonator having the smallest electrostatic capacity is the largest among electrode finger pitches of the plurality of series-arm resonators..
Murata Manufacturing Co., Ltd.


03/03/16
20160064075 

Memory device


A memory device according to an embodiment includes a first memory cell array; a second memory cell array; and a multiplexer arranged between the first memory cell array and the second memory cell array, the multiplexer controlling the first memory cell array and the second memory cell array.. .
Kabushiki Kaisha Toshiba


03/03/16
20160063168 

Pattern-based fpga logic block and clustering algorithm


A routing architecture for fast interconnections between look-up tables (luts) in a group of basic logic elements (bles), whereby a size of the group ranges from 1 to k+1, where k is the number of inputs of a lut, and luts in the group are indexed from 1 to k+1, and whereby (a) an output of a luti, 1≦i≦k, connects to one of the inputs of routing multiplexers of lutj, i<j≦k+1, hence creating a fast interconnection between luts, each routing multiplexer of lutm, 2≦m≦k+1, has only one input that is connected to the output of an other lut, the output of lut(k+1) being devoid of any connection to any one of the inputs of the routing multiplexers; (b) a subset of the inputs of lut1 are connected to the outputs of other luts by means of fast interconnections, leaving the remaining inputs of lut1 free of any fast interconnection, whereby for lutp, 2≦p≦k+1, p−1 inputs of the lutp are connected to the outputs of lutq, 1≦q≦j, by means of fast interconnections; and (c) a cluster-based logic block contains at least one group of luts.. .
Ecole Polytechnique Federale De Lausanne (epfl)


03/03/16
20160061894 

Scheme to measure individually rise and fall delays of non-inverting logic cells


A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path.
Stmicroelectronics International N.v.


03/03/16
20160061891 

Mixed mode integrated circuit, providing a controllable test clock signal to a sub-circuitry of the mixed-mode integrated circuit and detecting current paths causing violations of electromagnetic compatibility standards in the mixed mode integrated circuit


A mixed mode integrated circuit, a method of providing a controllable test clock signal to a sub-circuitry of the mixed-mode integrated circuit and a method of detecting current paths causing violations of electromagnetic compatibility standards in the mixed mode integrated circuit are provided. The mixed mode integrated circuit 100 comprises in addition to a clock network 110 an integrated test clock signal generator 140 to generate test clock signals that are provided via controllable multiplexers 150, 160 to an analogue and digital sub-circuitry, respectively, of the mixed-mode integrated circuit.
Freescale Semiconductor, Inc.


02/25/16
20160057487 

Data stream processing apparatus


An embodiment of the invention provides a data stream processing apparatus. The data stream processing apparatus includes a demultiplexer, a data processor and a backward buffer.
Media Tek Singapore Pte. Ltd.


02/25/16
20160056949 

Method and managing estimation and calibration of non-ideality of a phase interpolator (pi)-based clock and data recovery (cdr) circuit


A method for managing estimation and calibration of non-ideality of a clock and data recovery (cdr) circuit. The method comprises a) selecting a first output path for calibration comprising at least a first phase interpolator (pi) of a plurality of pis, at least one of a plurality of output-side programmable delay elements, an external delay element, at least one sampler, a first and a second external multiplexer, b) programming the output-side programmable delay element using a digital delay control code (ddcc), c) calibrating the external delay element until a given predetermined criterion based on an early-late detection method is met, d) upon satisfaction of the predetermined criterion, retaining a corresponding digital external delay control code (dedcc) in the external delay element for subsequent use, e) selecting a second output path for calibration comprising at least a second pi of the plurality of pis, the at least one of the plurality of output-side programmable delay elements, external delay element, at least one sampler, the first and second external multiplexers, f) calibrating the output-side programmable delay element until the given predetermined criterion based on the early-late detection method is met, g) upon satisfaction of the predetermined criterion, retaining the corresponding ddcc in the output-side programmable delay element for subsequent use, h) repeating the steps e-g for each of the remaining pis such that the remaining output-side programmable delay elements are each separately calibrated, i) selecting a first input path for calibration comprising the at least first phase interpolator (pi) of the plurality of pis, at least one of the plurality of input-side programmable delay elements, the external delay element, at least one sampler, the first and second external multiplexers, j) programming the input-side programmable delay element using the digital delay control code (ddcc), k) calibrating the external delay element until the given predetermined criterion based on the early-late detection method is met, l) upon satisfaction of the predetermined criterion, retaining a corresponding digital external delay control code (dedcc) in the external delay element for subsequent use and m) assigning at least one value of a binary control code (bcc) to select a unique phase in a given quadrant of a full phase cycle, n) calibrating the input-side programmable delay element until the given predetermined criterion based on the early-late detection method is met, o) upon satisfaction of the predetermined criterion, retaining the corresponding ddcbc in the input-side programmable delay element for subsequent use and p) repeating the steps m-o for each of the remaining unique phases in the inputs to the pi such that the remaining input-side programmable delay elements are each separately calibrated..

02/25/16
20160056945 

Circuit arrangement


A circuit arrangement includes an antenna port, a first receiving port, a second receiving port, a first transmission port, and a second transmission port. A number of 90 degree hybrids are configured to transfer an input signal into two output signals that are phase shifted relative to each other.
Epcos Ag


02/25/16
20160056911 

Arrayed waveguide grating based modular interconnection networks and methods for constructing and applying the same


An arrayed waveguide grating (awg) based interconnection network and modular construction method, comprising n1 left nodes, with each left node having n2 ports, n2 right nodes, with each right node having n1 ports, where n1≧n2, n1 and n2 having a greatest common divisor r, and each port having an optical transceiver associated with a fixed wavelength; n1n2 r×1 wavelength multiplexers having their input ports respectively connected with the ports of n1 left nodes, where n2=n2/r; n2n1 1×r wavelength demultiplexers having their output ports respectively connected with the ports of n2 right nodes, where n1=n1/r; n1n2 r×r awgs connecting the r×1 wavelength multiplexers and the 1×r wavelength demultiplexers r×rn1n2, and each of the r×r awgs being associated with a wavelength subset {λk. .
k=0, 1, . . . , r−1}.


02/25/16
20160056540 

Modular design of a high power, low passive intermodulation, active universal distributed antenna system interface tray


A modular high power, low passive intermodulation, active, universal, distributed antenna system interface tray that includes one or more front-end rf frequency duplexers instead of a high power, low passive intermodulation attenuator to achieve superior fim performance. A cable switch matrix allows for the use of the system among varying power levels and accomplishes the above in a modular architecture..
Intel Corporation


02/25/16
20160055789 

Display pael


A display panel comprises: a data driver unit; a first de-multiplexer unit; a plurality of first data lines connected between the data driver unit and an input terminal of the first de-multiplexer unit; and a plurality of second data lines connected to an output terminal of the first de-multiplexer unit.. .
Innolux Corporation


02/25/16
20160054431 

Wholly optically controlled phased array radar transmitter


A wholly optically controlled phased array transmitter with integrated tunable optoelectronic oscillators, which are based on multi-wavelength optical sources and optical true time delay units, and optical time delay networks, having a multi-wavelength optical source, a first wavelength division multiplexer, a first optical splitter, a first electro-optic modulator, a second optical splitter, a first optical amplifier, a first optical time delay network, a photodetector, an electric amplifier, a dc-block, a second electro-optic modulator, a second optical amplifier, a second optical time delay network, an optical combiner, a second wavelength division multiplexer, an optical fibers, a photodetector array, a t/r component array, a microwave antenna array, a 1×2 optical switch, a 2×2 optical switch, a circulator, a third wavelength division multiplexer, a bundle of optical fibers with precise lengths, and a faraday rotation mirror.. .
Shanghai Jiao Tong University


02/25/16
20160054271 

Sensor self-test


A crystal self-test circuit is used to self-test either an acoustic emission crystal or a vibration crystal installed onto one of a bearing, a bearing housing, and a machine. A crystal self-test circuit includes a multiplexer ic, which toggles between a pulse injection configuration and a signal collection configuration.
Aktiebolaget Skf


02/18/16
20160050665 

Radio-frequency front-end architecture for carrier aggregation of cellular bands


Circuits and methods related to radio-frequency (rf) architectures having carrier aggregation. In some implementations, a carrier aggregation (ca) architecture can include a duplexer configured to provide duplexing functionality for a first frequency band and a second frequency band with a common antenna.
Skyworks Solutions, Inc.


02/18/16
20160050043 

Apparatuses, systems, methods, and computer program products for add-drop multiplexing


A network element includes first and second multiplexers, first and second interfaces, and first and second selecting units. The multiplexers are communicatively coupled.
Tellabs Operations, Inc.


02/18/16
20160050042 

Demultiplexing device and multiplexing device


A demultiplexing device includes: a first demultiplexer configured to demultiplex a first input signal; a second demultiplexer configured to demultiplex a second input signal; and a switching unit configured to set an input destination of signals demultiplexed by each of the first demultiplexer and the second demultiplexer to one of the first demultiplexer and the second demultiplexer, based on a configuration of each of the first input signal and the second input signal.. .
Fujitsu Limited


02/18/16
20160050021 

Optical power equalization method and apparatus


Provided are an optical power equalization method and apparatus, which are applied to a flexible grid reconfigurable optical add drop multiplexer (flex roadm) system. The optical power equalization method includes: judging, according to an optical power monitoring result and an optical power control target value of an optical channel, whether optical power equalization needs to be performed on the optical channel; and when a judgement result is that the optical power equalization needs to be performed on the optical channel, performing equalization on an optical power of the optical channel and an optical power of each sub-carrier in the optical channel according to the optical power monitoring result.
Zte Corporation


02/18/16
20160050019 

Aligning optical components in a multichannel receiver or transmitter platform


Embodiments described herein describe a sub-mount that is etched to include respective cavities with at least two adjacent sides that align optical filters and a mirror. Moreover, the cavities are arranged on the sub-mount such that when the filters and mirror are disposed in the cavities, they align in a manner that enables the performance of a multiplexing or demultiplexing function as part of, for example, a zigzag multiplexer/demultiplexer.
Cisco Technology, Inc.


02/18/16
20160049985 

Switchable rf transmit/receive multiplexer


A switchable rf transmit/receive (tx/rx) multiplexer, which includes a group of rf tx bandpass filters, a group of rf tx switching elements, and a group of rf rx bandpass filters; is disclosed. The group of rf tx bandpass filters includes a first rf tx bandpass filter and a second rf tx bandpass filter, such that each of the first rf tx bandpass filter and the second rf tx bandpass filter is coupled to a first filter connection node.
Rf Micro Devices, Inc.


02/18/16
20160049965 

Tunable rf transmit/receive multiplexer


A tunable rf transmit/receive (tx/rx) multiplexer, which includes a tunable rf tx/rx diplexing circuit and a first group of rf rx bandpass filters, is disclosed. The tunable rf tx/rx diplexing circuit has a first rx connection node and a first antenna port, which is coupled to a first rf antenna.
Rf Micro Devices, Inc.


02/18/16
20160049921 

Configurable rf transmit/receive multiplexer


A configurable rf transmit/receive (tx/rx) multiplexer, which includes a group of rf tx bandpass filters, a group of rf tx switching elements, and a group of rf rx bandpass filters; is disclosed. Each of the group of rf rx bandpass filters is coupled to a first common connection node.
Rf Micro Devices, Inc.


02/18/16
20160049920 

Acoustic wave element, duplexer, and communication module


An acoustic wave element of the present disclosures has a piezoelectric substrate and an acoustic wave resonator s1 on a main surface of the piezoelectric substrate. The acoustic wave resonator s1 is one being divided into a first idt electrode and a second idt electrode which are electrically connected to the first idt electrode.
Kyocera Corporation


02/18/16
20160049129 

Display apparatus and touch display apparatus


A display apparatus includes a multiplexer circuit, a driving unit, a first control line and a second control line. The multiplexer circuit includes a plurality of switch units.
Innolux Corporation


02/18/16
20160048424 

Semiconductor memory device


According to one embodiment, a semiconductor memory device includes first and second banks, each of the first and second banks comprising a memory cell array; a data buffer a data buffer which is shared by the first and second banks, and stores write data which is to be written to the first and second banks and read data which is read from the first and second banks; a correcting circuit which is shared by the first and second banks, and corrects an error of the read data; and a multiplexer which switches a connection between the first bank and the data buffer and correcting circuit, and switches a connection between the second bank and the data buffer and correcting circuit. The multiplexer is disposed between the data buffer and the correcting circuit..

02/18/16
20160047989 

Wavelength division multiplexing of uncooled lasers with wavelength-common dispersive element


An example demultiplexer may include at least one dispersive element that is common to multiple wavelength channels. The demultiplexer may additionally include multiple field lenses positioned optically downstream from the at least one dispersive element, where a number of the field lenses is equal to a number of the wavelength channels.
Finisar Corporation


02/11/16
20160043803 

High-rf-frequency analog fiber-optic links using optical signal processing techniques


Wide band phase modulators used with high power laser carriers convert high-frequency rf signals to phase-modulated optical signals. Higher laser optical power to the modulator produces larger rf signal sidebands.
Eospace Inc.


02/11/16
20160043799 

Monitoring a multiplexed laser array in an optical communication system


Individual channels of a multiplexed laser array in a multi-channel optical transmitter are monitored at an output of an optical multiplexer. The monitoring may be used to confirm proper operation of each of the channels in the multiplexed laser array and/or to perform wavelength locking on each of the channels.
Applied Optoelectronics, Inc.


02/11/16
20160043767 

Transmitter receiver leakage reduction in a full duplex system without the use of a duplexer


A transceiver suitable for frequency duplex division communication is disclosed. The transceiver comprises a transmitter, wherein the transmitter comprises a power amplifier; a receiver; an auxiliary power amplifier which is arranged to provide a controllable phase shift and gain output; a first filter arranged at an output of the power amplifier arranged to attenuate frequencies at a receiving frequency of the receiver; a second filter arrangement at an output of the auxiliary power amplifier arranged to attenuate frequencies at a receiving frequency of the receiver; and a signal transmission arrangement.
Telefonaktiebolaget L M Ericsson (publ)


02/11/16
20160038031 

Optical coherence tomography probe for crossing coronary occlusions


Systems and methods for controlling a guide with the aid of optical coherence tomography (oct) data are described. A guide wire includes at least one optical fiber, a flexible substrate, and one or more optical elements.
Medlumics S.l.


02/04/16
20160037192 

Transport stream packet header compression


A demultiplexer 630 routes only one or more transport stream packets with a single packet identifier value to each physical layer pipe. A header compression unit 620 replaces the packet identifier of the transport stream packet with a short packet identifier of one bit length indicating at least whether the transport stream packet is a null packet..
Panasonic Intellectual Property Management Co., Ltd.


02/04/16
20160036580 

Mobile communication device configured with a single crystal piezo resonator structure


A mobile communication system. The system has a housing comprising an interior region and an exterior region and a processing device provided within an interior region of the housing.
Akoustis, Inc.


02/04/16
20160036550 

Method and system for a polarization immune wavelength division multiplexing demultiplexer


Methods and systems for a polarization immune wavelength division multiplexing demultiplexer are disclosed and may include, in an optoelectronic transceiver having an input coupler, a demultiplexer, and an amplitude scrambler: receiving input optical signals of different polarization via the input coupler, communicating the input optical signals to the amplitude scrambler via waveguides, configuring the average optical power in each of the waveguides utilizing the amplitude scrambler, and demultiplexing the optical signals utilizing the demultiplexer. The amplitude scrambler may include phase modulators and a coupling section.
Luxtera, Inc.


02/04/16
20160036464 

Multi-code chien's search circuit for bch codes with various values of m in gf(2m)


The present invention discloses a multi-code chien's search circuit for bch codes with various values of m in gf(2m). The circuit includes: a combined matrix unit, a number of first multiplexers, a number of registers and a number of second multiplexers.
Storart Technology Co., Ltd.


02/04/16
20160036447 

Reconfigurable logic device


[solution] a reconfigurable logic device for forming a plurality of logic circuits in accordance with configuration data information. Each of the multi-lookup table units includes: a configuration memory that stores configuration data; data input lines; data output lines; and a reconfigurable logic multiplexer that, in response to the configuration data, selectively links data inputted to the data input lines to data outputted to the data output lines, and/or outputs, to the data output lines, data obtained by performing a logical operation on data pertaining to the inputted data.

02/04/16
20160036446 

Cross point switch


A cross point switch, in accordance with one embodiment, includes a plurality of tri-state repeaters coupled to form a plurality of multiplexers. Each set of corresponding tri-state repeaters in the plurality of multiplexers share a front end module such that delay through the cross point switch due to input capacitance is reduced as compared to conventional cross point switches..
Intellectual Ventures Holding 81 Llc


02/04/16
20160036428 

Fine-grained power gating in fpga interconnects


Systems and methods for power gating in logic and/or computing circuitry in accordance with embodiments of the inventions are disclosed. In one embodiment, a multiplexer for fine-grain power gating includes a first supply voltage and a second supply voltage, a plurality of inputs, a plurality of selection inputs, a selection circuitry configured to select one of the plurality of inputs, where one of the plurality of inputs is the first supply voltage and one of the selection inputs is a power gating enable input, an output inverter stage including a pmos transistor and an nmos transistor, where at least one input to the inverter stage is provided to the gates of the pmos and nmos transistors and selection of the power gating enable signal applies the first supply voltage to the gate of the pmos transistor and places the pmos transistor in a cutoff mode of operation..
The Regents Of The University Of California


02/04/16
20160036427 

Photorepeated integrated circuit with compensation of the propagation delays of signals, notably of clock signals


Integrated circuits of large size produced by photorepetition of several mutually identical partial patterns are provided, more precisely to the compensation of propagation delays of signals (notably of clock signals) from one partial circuit to the following whereas the signals concerned must reach the various partial circuits simultaneously for proper operation of the whole. The compensation circuit provided in each partial circuit comprises a main transmission line for a master clock signal and a compensation line with multiple outputs, as well as a multiplexer for selecting one of the outputs, the output selected being different in the various partial circuits.
Pyxalis


02/04/16
20160036424 

Power efficient multiplexer


A power efficient multiplexer. In accordance with a first embodiment, a power efficient multiplexer comprises a transmission gate structure for selectively passing one of a plurality of input signals and a stacked inverter circuit for inverting the one of a plurality of input signals.
Intellectual Ventures Holding 81 Llc


02/04/16
20160036420 

Skew calibration circuit and operation the skew calibration circuit


A skew calibration circuit may include a data delay unit receiving first data and a first code, and output delayed first data as second data by delaying the first data according to the first code; a clock delay unit receiving a first clock signal and a second code, and output delayed first clock signal as second clock signal by delaying the first clock signal according to the second code; a multiplexer receiving a clock signal and output the clock signal or an inverted clock signal of the clock signal as a first clock signal in response to a selection signal; and a control logic unit receiving the second data and the second clock signal and control the first code, the second code and the selection signal in response to the second data and the second clock signal.. .
Samsung Electronics Co., Ltd.


02/04/16
20160036415 

Elastic wave filters and duplexers using same


An elastic wave filter including a substrate, a signal line disposed on the substrate and connecting a first signal terminal to a second signal terminal, a plurality of series resonators connected to the signal line in series, and a plurality of parallel resonators connected to the signal line. At least one of the series resonator having an anti-resonant frequency closest to the passband of the filter among the plurality of series resonators, and/or the parallel resonator having a resonant frequency closest to the passband of the filter among the plurality of parallel resonators, is covered with a dielectric film that is relatively thicker than a dielectric film covering the other series and/or parallel resonators..
Skyworks Panasonic Filter Solutions Japan Co., Ltd.


02/04/16
20160036409 

Printed diplexer


A printed diplexer is printed on a pcb, having at least two input terminals respectively connected to at least two end portions thereof, having the output terminal connected at a center portion thereof, and configured to output a signal inputted from the at least two input terminals to the output terminal.. .
Lg Innotek Co., Ltd.




Lexer topics: Capacitive Sensor, Semiconductor, Demultiplex, Video Play, Multiplexing, Compatibility, Coding Method, Volatile Storage, Volatile Memory, Memory Cells, Memory Cell, Semiconductor Substrate, Speech Recognition, Intersymbol Interference, Feedback Signal

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