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Device and method for performing timing analysis

Method and apparatus for backplane support of 100/1000 ethernet

Delay device, method, and random number generator using the same

Date/App# patent app List of recent Lexer-related patents
07/17/14
20140201584
 Scan test circuitry comprising at least one scan chain and associated reset multiplexing circuitry patent thumbnailScan test circuitry comprising at least one scan chain and associated reset multiplexing circuitry
An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises at least one scan chain having a plurality of scan cells.
07/17/14
20140201581
 Device and method for performing timing analysis patent thumbnailDevice and method for performing timing analysis
A device for performing timing analysis used in a programmable logic array system is provided. The device comprises first and second basic i/o terminals, a channel multiplexer, high-speed i/o terminals, a sampling module and a timing analysis module.
07/17/14
20140201413
 Method and apparatus for backplane support of 100/1000 ethernet patent thumbnailMethod and apparatus for backplane support of 100/1000 ethernet
A method and apparatus for backplane support of 100/1000 ethernet. A communication card for use in a chassis system is provided that includes a 100base-tx physical layer device component, a 1000base-kx physical layer device component, and a backplane connector, which is configured for enabling communication by the communication card over a backplane of the chassis system.
07/17/14
20140201253
 Delay device, method, and random number generator using the same patent thumbnailDelay device, method, and random number generator using the same
A delay device for generating a signal for a random component in a random number generator is disclosed. The delay device includes a delay module, for generating a plurality of delayed signals, wherein each delayed signal has a delay time and the delay time is different from each other; a first multiplexer, coupled to the delay module, for outputting a delayed signal among the plurality of delayed signals as a delayed trigger signal to control the random component to generate a random bit; and a delay selector, coupled to the first multiplexer, for generating a selecting signal to control the first multiplexer to select to output the delayed signal as the delayed trigger signal..
07/17/14
20140199068
 Optical polarization demultiplexing for a coherent-detection scheme patent thumbnailOptical polarization demultiplexing for a coherent-detection scheme
An optical receiver having a plurality of optical iq modulators arranged in a butterfly configuration and configured to operate as an optical polarization de-multiplexer. The optical receiver further has (i) an opto-electric circuit configured to apply optical homodyne detection to an optical input signal received by the optical receiver and (ii) a controller configured to generate one or more control signals for driving the iq modulators of the plurality based on one or more electrical feedback signals received from the opto-electric circuit..
07/17/14
20140198835
 Method and system for a multi-standard receiver patent thumbnailMethod and system for a multi-standard receiver
A multi-standard receiver may comprise in an electronic device, receiving an input radio frequency (rf) signal comprising at least two rf signals of different communication standards. The input rf signal may be separated into two signals based on their different communication standard sand configurable gain levels may be applied to equalize their magnitudes.
07/17/14
20140198812
 Communications network transport node, optical add-drop multiplexer and method of routing communications traffic patent thumbnailCommunications network transport node, optical add-drop multiplexer and method of routing communications traffic
A communications network transport node comprising an optical add-drop multiplexer (oadm), comprising optical signal processing apparatus, electrical signal routing apparatus, and a packet switch. Each optical signal processing apparatus comprises an optical input, an optical output, optical-to-electrical (o-e) signal conversion apparatus arranged to receive input optical channel signals and to convert each into an input radio frequency (rf) modulated electrical channel signal, and electrical to optical (e-o) signal conversion apparatus arranged to receive output rf modulated electrical channel signals and to convert each into an output optical channel signal.
07/17/14
20140198135
 Organic light emitting display device patent thumbnailOrganic light emitting display device
Provided is an organic light emitting display device including: a scan driver configured to supply a scan signal to a scan line during a scan period of a horizontal period; a data driver configured to supply a plurality of data signals to a plurality of output lines during a data period of the horizontal period; a demultiplexer configured to transmit the data signals through the output lines to a plurality of data lines according to a plurality of control signals; and a demultiplexer controller configured to supply the control signals to the demultiplexer, with a supply order of the control signals being changed for each frame.. .
07/17/14
20140197903
 Signal separation device patent thumbnailSignal separation device
A signal separation device is a duplexer in which a reception frequency band is located at higher frequencies than a transmission frequency band. A series arm of a ladder transmission filter includes a plurality of series arm resonators, and parallel arms respectively include parallel arm resonators.
07/17/14
20140197902
 Diplexer design using through glass via technology patent thumbnailDiplexer design using through glass via technology
A diplexer includes a substrate having a set of through substrate vias. The diplexer also includes a first set of traces on a first surface of the substrate.
07/10/14
20140196095
Server and client processing multiple sets of channel information and controlling method of the same
A technical method related to a server and a client processing multiple sets of channel information is disclosed. Herein, an apparatus of processing multiple channel information according to an exemplary embodiment of the present invention includes a decoder decoding encoded data received from a server, a demultiplexer demultiplexing video data, audio data and metadata for each channel from the decoded data, a controller extracting video data, audio data and metadata for a channel group for on-screen display (osd) data, the channel group including one or more channels, an osd generator generating osd data based on the extracted video data, audio data and metadata for the channel group, and a display module displaying the generated osd data on a predetermined section along with a broadcast screen of a currently selected channel..
07/10/14
20140196067
Universal multiplexer for content channels via injecting
An interface for a single network point that provides channels of content and services to a subscribing user while maintaining the functionality of the channels of content as separate entities. Channels of content and services include, but are not limited to audio and video via cable and broadcast over the air, satellite broadcasts, cell phone service, gps, internet, and voice over internet protocol (voip).
07/10/14
20140195820
Apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor
An apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address includes a first multiplexer that selects a first key value from a plurality of key values based on a first portion of the fetch address. A second multiplexer selects a second key value from the plurality of key values based on the first portion of the fetch address.
07/10/14
20140195764
Memory device having an adaptable number of open rows
A memory device comprises a memory array, at least one row address buffer, a set of row data buffers, a row decoder, an array of sense amplifiers, and a demultiplexer. The memory array comprises data elements organized into rows and columns.
07/10/14
20140195579
Efficient angle rotator configured for dynamic adjustment
An apparatus and method for angle rotation is disclosed to rotate a complex input by the angle θ to produce a rotated complex output signal. A memory storage device generates control information based on a coarse angle θm.
07/10/14
20140195578
Fast fourier transform circuit
A multiplexer receives a plurality of data streams transmitted in parallel on a time axis, and outputs partial data of each data stream every unit time in determined data stream order. A butterfly computation section at a first stage receives as second input data the partial data outputted from the multiplexer.
07/10/14
20140195253
Audio signal encoder
An apparatus comprising: a coding rate determiner configured to determine a first coding bitrate for at least one first frame audio signal multi-channel parameter and a second coding bitrate for at least one second frame audio signal multi-channel parameter, wherein the combined first and second coding bitrate is less than a bitrate limit; a channel analyser configured to determine for a first frame the at least one first frame audio signal multi-channel parameter and configured to determine for a second frame the at least one second frame audio signal multi-channel parameter; a multi-channel parameter determiner configured to generate an encoded first frame audio signal multi-channel parameter within the first coding bitrate from the at least one first frame audio signal multi-channel parameter and configured to generate an encoded at least one second frame audio signal parameter within the second coding bitrate from the at least one second frame audio signal multi-channel parameter; and a multiplexer configured to combine the encoded at least one first frame audio signal multi-channel parameter and the encoded at least one second frame audio signal multi-channel parameter.. .
07/10/14
20140194072
Duplex filter arrangements for use with tunable narrow band antennas having forward and backward compatibility
A transceiver module and duplexer within a communication device supports a minimized antenna volume and enhances a transfer gain for transmit and receive channels. The duplexer is communicatively coupled to one of multiple antenna and filter matching configurations which include a first configuration that couples receive and transmit filter matching circuits to a single antenna matching circuit.
07/10/14
20140193156
Optical network apparatus for self-seeded communications
Optical network apparatus comprises an optical add drop multiplexer (10) comprising an optical signal input (11) and an optical signal output (12). An add input path (15) is connected to the optical signal output (12) for receiving a wavelength channel to be added.
07/10/14
20140193155
Microphotonic coupled-resonator devices
An optical resonator supports three resonance modes and having third-order optical nonlinearity. One or more waveguides are coupled to the three resonant modes.
07/10/14
20140193003
Parasitic isolation communication switch
This document discusses, among other things, a switch multiplexer having a common connector, the switch multiplexer including a first switch configured to receive a first signal at or above a ground (gnd) reference and a second switch configured to receive a second signal that swings positive and negative about ground. The switch multiplexer includes a negative charge pump configured to bias the first switch with a negative charge pump voltage lower than the most negative voltage swing of the second signal when the second switch is enabled, and to bias the first switch with gnd when the first switch is enabled..
07/10/14
20140191931
Flat panel display device
A flat panel display device includes a pixel unit having scan-lines, data-lines, and first through third pixels that are coupled to the scan-lines and the data-lines, a scan driver that applies a scan signal to the pixel unit, a data driver that selectively applies a first data signal, a second data signal, a third data signal, and an initialization signal to the pixel unit, a demultiplexing unit having at least one demultiplexer that applies the first data signal, the second data signal, and the third data signal to the first pixels, the second pixels, and the third pixels, respectively, and that simultaneously applies the initialization signal to the first through third pixels, and a timing control unit that controls the scan driver, the data driver, and the demultiplexing unit.. .
07/10/14
20140191777
Monitoring system for detecting degradation of integrated circuit
A monitoring system for detecting stress degradation of a semiconductor integrated circuit has an amplifier circuit and degradation test transistors. Multiplexers are provided that have an output coupled to a respective electrode of the degradation test transistor.
07/03/14
20140189749
Apparatus and method for combining realtime and non-realtime encoded content
A terminal for decoding and presenting encoded realtime and non-realtime interactive program guide (ipg) content including a realtime video portion and a non-realtime guide graphics portion. The terminal includes a demodulator operative to receive and demodulate a modulated signal to provide a transport stream, and a transport demultiplexer coupled to the demodulator and operative to receive and process the transport stream to provide a sequence of transport packets re-timestamped to synchronize encoded realtime content and encoded non-realtime content included therein.
07/03/14
20140189453
High density low power scan flip-flop
A scan flip flop includes a partial multiplexer coupled to a master latch. The partial multiplexer is configured to receive a scan enable (scan) where the partial multiplexer includes an or gate coupled to a tri-stated and gate.
07/03/14
20140189319
Opportunistic utilization of redundant alu
A processor includes at least one processing core that includes an operation dispatch for dispatching operations from an instruction pipeline, a plurality of arithmetic logic units for executing the operations, a plurality of multiplexers, each of which connects the operation dispatch to a respective arithmetic logic unit, and a controller configured to selectively enable at least one multiplexer to connect the operation dispatch to at least one arithmetic logic unit based on a reliability mode associated with the operation.. .
07/03/14
20140189189
Computer arbitration system, bandwidth, allocation apparatus, and method thereof
The bandwidth allocation apparatus includes a high bandwidth arbitration module, a low bandwidth arbitration module and a multiplexer. The high bandwidth arbitration module is used to select one downstream device from the high bandwidth downstream device group for allowing uplink.
07/03/14
20140189175
Generic bus de-multiplexer/port expander with inherent bus signals as selectors
A circuit comprising: a device determiner configured to, in a first mode of operation, receive a device selection signal via at least one of: at least one control line and at least one signal line; and a device router configured to, in a second mode of operation, route signals between the at least one of: at least one control line and at least one signal line and at least one device dependent on the device selection signal.. .
07/03/14
20140188094
Focused near-infrared lasers for non-invasive varicose veins and other thermal coagulation or occlusion procedures
Focused infrared light may be used in a non-invasive varicose vein treatment procedure with infrared light from a plurality of laser diodes that are combined in a multiplexer and coupled to a multi-mode fiber coupled to another fiber or fiber bundle that delivers the light to a lens/mirror assembly for application in the non-invasive procedures. The wavelength of light may be selected near 980 nm, 1210 nm, or 1720 nm to achieve a desired penetration depth and/or for absorption in a particular tissue type or water.
07/03/14
20140186043
Passive optical network reach extender based on wavelength tunable optical module and method thereof
Provided are a passive optical network reach extender based on a wavelength tunable optical module and a method thereof. According to an embodiment of the invention, a passive optical network reach extender includes a first optical splitter configured to receive an optical signal from an optical line terminal and split the signal into optical signals having a multiplexed wavelength, a wavelength tunable remote relay configured to receive the optical signals split from the first optical splitter, and select and control an available wavelength for each port, a wavelength multiplexer configured to multiplex a wavelength of the optical signal output from the wavelength tunable remote relay, and a second optical splitter configured to split the optical signal multiplexed by the wavelength multiplexer into a plurality of optical network units..
07/03/14
20140186038
Multi directional multiplexer
Described herein is an optical transmission cross-connect for routing wavelength signals to a bank of directionless transceivers. One embodiment (1) includes an array of four common-port fibers (3) for transmitting and receiving a multiplexed optical signal and an array of sixteen add/drop fibers (5) for receiving and transmitting demultiplexed signals including individual wavelength channels.
07/03/14
20140186028
Method and system for encoding multi-level pulse amplitude modulated signals using integrated optoelectronic devices
Methods and systems for encoding multi-level pulse amplitude modulated signals using integrated optoelectronics are disclosed and may include generating generating a multi-level, amplitude-modulated optical signal utilizing an optical modulator driven by two or more of a plurality of electrical input signals. The optical modulator may configure levels in the multi-level amplitude modulated optical signal.
07/03/14
20140185979
Light absorption and scattering devices in a photonic integrated circuit
A photonic integrated circuit is provided that may include a substrate; one or more optical sources, on the substrate, to output light associated with a corresponding one or more optical signals; one or more waveguides connected to the one or more optical sources; a multiplexer connected to the one or more waveguides; and one or more light absorptive structures, located on the substrate adjacent to one of the one or more optical sources, one of the one or more waveguides, and/or the multiplexer, to absorb a portion of the light associated with at least one of the corresponding one or more optical signals.. .
07/03/14
20140185498
Method and apparatus for tuning a communication device for multi band operation
In one example, a wireless communication device adapted for multi-band operation includes a first antenna, a first diplexer configured to pass signals within first and second sets of frequency bands, first and second signal paths, wherein each signal path includes a set of notch filters tunable to attenuate a different frequency. The wireless communication device includes a second antenna, a second diplexer configured to pass the first and second frequency bands, third and fourth signal paths, wherein each of the third and fourth signal paths includes one or more notch filters tunable to attenuate a different frequency, and a transceiver coupled to each signal path..
07/03/14
20140185367
Sram bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter
Described is an apparatus comprising a plurality of memory arrays, local write assist logic units, and read/write local column multiplexers coupled together in a group such that area occupied by the local write assist logic units and the read/write local column multiplexers in the group is smaller than it would be when global write assist logic units and the read/write global column multiplexers are used. Described is a dual input level-shifter with integrated latch.
07/03/14
20140184581
Data driver
A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line.
07/03/14
20140184355
Laminated waveguide diplexer with shielded signal-coupling structure
A laminated waveguide diplexer includes an upper conductive layer having a first slot and a second slot; a first line crossing over the first slot; a first shielding conductor disposed over the first line; a plurality of first conductive pillars connecting the upper conductive layer and the first shielding conductor; a second line crossing over the second slot; a second shielding conductor disposed over the second line; and a plurality of second conductive pillars connecting the upper conductive layer and the second shielding conductor.. .
07/03/14
20140184268
Power conservation using gray-coded address sequencing
A multiplexer tree operable to control an output a sequence of data stored in a plurality of storage units in accordance with a non-linear address sequence that has less bit transition counts than a linear address sequence. The non-linear address sequence is provided to the selection inputs of the multiplexer tree and causes the levels having greater numbers of multiplexers to toggle less frequently than the levels having smaller numbers of multiplexers.
06/26/14
20140181164
Selectively combinable shifters
An apparatus for mathematical manipulation is described allowing the selective combination of shifters to shift binary numbers of various widths. Selective combination allows on-the-fly adjustment of shifters from independent to coordinated shifting operations.
06/26/14
20140178069
Optical receiver module
An optical receiver module may include a demultiplexer routing a plurality of multiplexed optical signals to different optical paths depending on their wavelengths, a photodetector provided spaced apart from the demultiplexer to convert the optical signals into electric signals, respectively, a pre-amplifier electrically connected to the photodetector to amplify intensities of the electric signals, a flexible printed circuit board including a first electrode layer, which is electrically connected to the pre-amplifier to transmit the electric signals to the external circuit, and a second electrode layer configured to supply a ground potential. The flexible printed circuit board are provided not to have any via hole between the first and second electrode layers..
06/26/14
20140177771
Clock data recovery circuit, data reception apparatus, and data transmission and reception system
A clock data recovery circuit includes: an oscillator that outputs a clock signal; a phase comparator that outputs a signal corresponding to a phase difference between an input reception data signal and the clock signal; a divider that outputs a feedback clock signal; a first variable delay circuit that outputs a delay data signal; a second variable delay circuit that outputs a delay feedback clock signal; a frequency phase comparator that outputs a signal corresponding to a frequency difference and a phase difference between the delay data signal and the delay feedback clock signal; a lock detector that outputs a determination signal indicating whether or not the frequency difference and the phase difference are within a predetermined range; and a multiplexer that receives the determination signal and select a signal of the phase comparator and a signal of the frequency phase comparator.. .
06/26/14
20140177763
Wireless receiving apparatus and program
A data signal component output from a reference signal demultiplexer and channel state information obtained by using dm-rs output from a channel estimating unit are input into a modulo estimating unit. In a channel compensator, a first provisional decision value sequence is calculated on the basis of the channel state information.
06/26/14
20140177649
Communication devices in a communication network and methods for processing data in such devices
A communication device in a communication network according to the invention comprises: a signal processing unit configured to demodulate symbols of a received digital signal into payload data to be provided to a data processing unit through an interfacing link, e.g. A mac/phy interface, the received digital signal being made of raw data; a bandwidth determining module configured to determine available bandwidth in a transmission slot allocated to one symbol of the received digital signal for transmitting corresponding payload data through the interfacing link; a sampler configured to select raw data from the received digital signal that correspond to the determined available bandwidth; and a multiplexer configured to combine the selected raw data with the payload data corresponding to the one symbol into the same transmission packet to be provided to the data processing unit through the interfacing link..
06/26/14
20140177493
Power amplifying circuit and front end module including the same
There are provided a power amplifying circuit and a front end module including the same. The power amplifying circuit includes a signal amplifying unit amplifying and outputting a plurality of wireless signals having different frequency bands, and a diplexer circuit transferring at least one of the plurality of wireless signals output from the signal amplifying unit to an antenna, wherein the signal amplifying unit and the diplexer circuit include impedance matching circuits having different impedance matching ranges, respectively, and the impedance matching range of the diplexer circuit is continuous with that of the signal amplifying unit..
06/26/14
20140177316
Non-volatile memory system with reset verification mechanism and method of operation thereof
A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state.. .
06/26/14
20140177087
Equalization combining outputs of multiple component filters
An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the detector configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer.
06/26/14
20140177024
Methods using an intense control light at a first wavelength to cause a whispering gallery mode resonator to self tune at a second wavelength, and apparatus employing such methods such as optical pass/stop band filters and optical demultiplexers
An all-photonic method to cause a wgm resonator to self-tune to a given wavelength is described. Such all photonic approaches include simply superimposing intense light of a wavelength in a range different from that of a signal wave.
06/26/14
20140176951
Multi-band multiplexing intra-cavity gas sensing system and method
Disclosed is a multi-band multiplexing intra-cavity gas sensing system and method. The system consists of a laser resonant cavity subsystem, a gas sensing subsystem and a detection-demodulation subsystem.
06/26/14
20140176256
Base station rf duplexer, rf module, and rf system
The present disclosure relates to telecommunication, and in particular, to a base station radio frequency (rf) duplexer, an rf module, and an rf system. A base station rf apparatus provided herein includes: an enclosure, an intermediate rf processing unit, and a duplexer.
06/26/14
20140176167
Semiconductor apparatus
A semiconductor apparatus includes: an output timing controller configured to delay an applied external read command by a predetermined time and generate a normal output enable flag signal, during a normal mode, a test output timing controller configured to generate a dll clock signal from an external clock signal, delay the applied external read command in synchronization with the dll clock signal, and output the delayed applied external read command as a test output enable flag signal, during a test mode, and a multiplexer (mux) configured to output any one of the normal output enable flag signal or the test output enable flag signal as an output enable flag signal.. .
06/19/14
20140170993
Radio frequency communication
A bidirectional radio frequency communication unit includes: a transmit modem; a receive modem; an rf transceiver circuit; a coupling waveguide arrangement; and an antenna. The rf transceiver circuit transmits and receives at rf frequencies greater than or equal to 50 ghz.
06/19/14
20140169389
Optical receiver module using wavelength division multiplexing type
An optical receiver module includes a demultiplexer, an optical device including a right-angled mirror reflecting individual optical signals transmitted from the demultiplexer and a plurality of lenses receiving the reflected optical signals, and a plurality of photodetectors spaced apart from the plurality of lenses by a predetermined distance. The plurality of photodetectors converts the individual optical signals into electrical signals.
06/19/14
20140169243
Mobile communication circuitry for three or more antennas
Communication circuitry is disclosed that is capable of switching between three or more antennas while providing low harmonic interference during carrier aggregation. In one embodiment, a communication system includes a first switch with two poles and four throws, a second switch with two poles and four throws, and four diplexers associated with four antennas.
06/19/14
20140169235
Wide band electrical balance duplexer with balanced bridge circuit
A circuit for a wideband electrical balance duplexer (ebd) may include a first impedance element and a second impedance coupled between a first and a second node and a second and a third node of the bridge circuit, respectively. An antenna may be coupled between the first and a fourth node of the bridge circuit to receive and transmit rf signals.
06/19/14
20140169231
Low-loss tx-to-rx isolation using electrical balance duplexer with noise cancellation
A circuit for a low-loss electrical balance duplexer (ebd) with noise cancellation may include an ebd circuit. The ebd circuit may be coupled to one or more output nodes of a transmit (tx) path, an antenna, and a one or more input nodes of a receive (rx) path.
06/19/14
20140168655
Broadband fiber light source with high wavelength stability under radiation for ifog applications
A rare-earth-doped-fiber light source with wavelength stability includes a rare-earth doped fiber and an undoped fiber placed in proximity to each other and having the same host material and the same cross-sectional structure, a coupler configured to direct a first portion of pump power from a pump laser to the undoped fiber so the first portion of pump power was twice passed through the coupler; and a wavelength division multiplexer configured to input a second portion of pump power from the pump laser to the rare-earth doped fiber. The rare-earth doped fiber is an active medium for the broadband light source and includes a fiber core doped with rare-earth ions.
06/19/14
20140168518
Radio frequency communication
A point-to-point radio frequency (rf) communication system having one or more communication units coupled to respective television cameras and displays; and a further communication unit; wherein the units transmit video data to the further communication unit at frequencies greater than or equal to 50 ghz and at data rates greater than or equal to 1 gigabit/second; and the units receive video data transmitted by the further communication unit at frequencies greater than or equal to 50 ghz and at data rates 250 megabits/second. The units can each include an antenna with a waveguide diplexer and an rf transceiver circuit board having sufficient transmit/receive isolation for the transmitting and receiving to take place point-to-point at distances greater than or equal to 1 km..
06/19/14
20140167881
Acoustic wave device and antenna duplexer using the same
An acoustic wave device includes a piezoelectric substrate, a comb-shaped electrode formed on the piezoelectric substrate and configured to excite a rayleigh wave as a main acoustic wave, a first dielectric film formed above the piezoelectric substrate to cover the comb-shaped electrode, and a second dielectric film having a portion provided between electrode fingers of the comb-shaped electrode and a portion provided above the comb-shaped electrode. The portion provided between the electrode fingers is provided between the piezoelectric substrate and the first dielectric film.
06/19/14
20140167683
Multiple cell battery management
A method and system to manage battery pack having a plurality of rechargeable battery cells connected in series is disclosed. The system comprises a plurality of identical voltage detection and charging modules, one for each of the plurality of battery cells.
06/19/14
20140166861
Single photon counting detector system having improved counter architecture
A single photon counting detector system has a layer of photosensitive material and an n×m array of photo-detector diodes. Each photo-detector diode has a bias potential interface and a diode output interface.
06/12/14
20140165125
Broadcasting system and broadcasting method of providing multi-picture
A broadcasting transmitting apparatus of providing a multi-picture may include a multi-picture generator configured to divide an acquired video into a first video and a second video; a first video encoder configured to encode the first video; a second video encoder configured to encode the second video; a multiplexer configured to multiplex the first and second videos to a single stream video; and a transmitter configured to modulate the multiplexed single stream video to transmit the modulated single stream video to a receiving apparatus through a broadcasting network.. .
06/12/14
20140164848
Tracing instruction pointers and data accesses
A system for tracing instruction pointers and data accesses in a plurality of processor cores includes a plurality of trace units. The plurality of trace units include at least one first trace unit configured to perform an instruction pointer trace and at least one second trace unit configured to perform a data trace.
06/12/14
20140161452
Optical frequency division multiplexer and polarization control method
An all-optical modulator includes a directional coupling unit that multiplexes, on a carrier light beam, a signal light beam of a modulation signal that a carrier signal at a characteristic frequency is modulated with an information signal. The all-optical modulator includes a nonlinear medium that cross-phase-modulates the carrier light beam with the multiplexed signal light beam, and frequency-multiplexes the information signal in the signal light beam on the carrier light beam to generate an optical frequency division multiplexed signal.
06/12/14
20140160096
Display having shared drain structure
A display includes a source driver, a demultiplexer, a first data line, a second data line, a first pixel and a second pixel. The demultiplexer includes a first pixel signal transmission unit and a second pixel signal transmission unit.
06/05/14
20140153892
Optical fiber distribution frame with outside plant enclosure
A fiber optic telecommunications frame is provided including panels having front and rear termination locations, the panels positioned on left and right sides of the frame. The frame includes vertical access for the rear cables.
06/05/14
20140153341
Sequential access memory with master-slave latch pairs and method of operating
A synchronous sequential latch array generated by an automated system for generating master-slave latch structures is disclosed. A master-slave latch structure includes n/2 rows of master-slave latch pairs, an n/2-to-1 multiplexer and control logic.
06/05/14
20140152715
Frame rate converter and timing controller and processing apparatus and method thereof
A frame rate converter includes: a receiving circuit for receiving an input image data and accordingly outputting an output image data, the input image data having a plurality of data segments with information of a plurality of color components of pixels of a frame, respectively, wherein each of the data segments includes information of a same color component only; a frame buffer for storing the output image data; and a first multiplexer for selecting one of the output image data outputted from the receiving circuit and the output image data buffered in the frame buffer as an output of the frame rate converter. The first multiplexer outputs the output image data buffered in the frame buffer at least once after outputting the output image data outputted from the receiving circuit to generate at least one duplication of the frame..
06/05/14
20140152639
Organic light emitting display and method for operating the same
An organic light emitting display device includes: a pixel unit including first pixels positioned at intersection parts between first data lines and first scan lines and the second pixels positioned at intersection parts between the second data lines and the second scan lines; a scan driver sequentially supplying first scan signals to the first scan lines and sequentially supplying second scan signals to the second scan lines; a data driver supplying first output signals to first output lines and supplying second output signals to second output lines; and a demultiplexer block unit including demultiplexers which demultiplex the first output signals in response to control signals, respectively, and supply the demultiplexed signals to the first data lines, wherein the second output lines are directly connected to the second data lines.. .
06/05/14
20140152484
Oversampling time-to-digital converter
An oversampling time-to-digital converter includes an input pulse generation circuit generating two pulse signals, a reference pulse generation circuit generating two pulse signals, a swap circuit swapping two pulse signals, a multiplexer selecting an output of the input pulse generation circuit or the swap circuit, a time-to-current conversion circuit outputting two pulse currents in accordance with an output of the multiplexer, a current mirror circuit whose input and output terminals receive the two pulse currents, an integration circuit integrating a differential current between the pulse current connected to the output terminal of the current mirror circuit and an output current of the current mirror circuit, and a comparison circuit comparing an output signal of the integration circuit to a threshold voltage. An output signal of the comparison circuit is given to the swap circuit as a control signal..
06/05/14
20140152375
Multiplexer and dynamic bias switch thereof
A multiplexer and a dynamic bias switch thereof are provided. The dynamic bias switch includes a switch transistor and a dynamic bulk bias (dbb) unit.
05/29/14
20140149643
Patch mechanism in embedded controller for memory access
Various exemplary embodiments relate to a patch module connected between a data bus and a rom memory controller. The patch module may include: at least one patch address register configured to store a rom address; a patch data register corresponding to each patch address register, each patch data register configured for storing an instruction; an address comparator configured to compare an address received on the data bus with an address stored in each patch address register and output a first signal identifying a matching patch address register and a second signal indicating whether there is a matching address; and a first multiplexer configured to select the patch data register corresponding to the matching patch address register and output the contents of the patch data register to the data bus..
05/29/14
20140149615
Connecting multiple slave devices to a single master
A device comprising: a bus master, including a bi-directional data and clock lines, configured to produce a select signal output for enabling data transmission on the bi-directional data line to first/second different data busses supporting multiple slave devices configured to receive/transmit data over a respective data bus and to receive a clock signal from the bus master from the clock line; and a de-multiplexer including an input, first and second outputs and a control input, the input coupled to the bi-directional data line of the bus master, first/second outputs of the de-multiplexer coupled to first/second data busses, respectively, and the control input configured to receive the select signal from the bus master that is configured to communicate to a first slave device when the select signal is in a first state, and a second different slave device when the select signal is in a second different state.. .
05/29/14
20140149059
Linear device value estimating method, capacitance detection method, integrated circuit, touch sensor system, and electronic device
A capacitance distribution detection circuit (102) includes a multiplexer (104), a driver (105), and a sense amplifier (106), and the multiplexer (104) switches states between a first connection state in which first signal lines (hl1 to hlm) are connected to the driver (105) and second signal lines (vl1 to vlm) are connected to the sense amplifier (106), and a second connection state in which the first signal lines (hl1 to hlm) are connected to the sense amplifier (106) and the second signal lines (vl1 to vlm) are connected to the driver (105). The first connection state (a) (a) drives, on the basis of code sequences (di (=di1, di2, .


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Lexer topics: Capacitive Sensor, Semiconductor, Demultiplex, Video Play, Multiplexing, Compatibility, Coding Method, Volatile Storage, Volatile Memory, Memory Cells, Memory Cell, Semiconductor Substrate, Speech Recognition, Intersymbol Interference, Feedback Signal

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