|| List of recent Lexer-related patents
|Data access system, data accessing device, and data accessing controller|
A data access system, device and controller are provided. The data access system includes a plurality of storage units and first controllers, a second controller, and a host.
|Allocating internet protocol (ip) addresses to nodes in communications networks which use integrated is-is|
Previously it has only been possible to allocate unique internet protocol (ip) addresses to nodes in open systems interconnection (osi) communications networks such as those using integrated is-is, by manual configuration. This is time consuming and expensive because an operator must travel to the site of the node.
|Wireless communication unit, radio frequency module and method therefor|
A wireless communication unit includes at least one antenna port; a transmitter and a receiver operably coupled to the at least one antenna port via a duplexer; wherein the duplexer includes a dynamically reconfigurable phase shift network that includes: at least one tunable radio frequency (rf) component; and at least one switch operably coupled to the tunable rf component and controllable to reconfigure the dynamically reconfigurable phase shift network to selectively support both normal and reverse duplexer modes of operation for rf signals passing there through.. .
|Reconfigurable 1xn few-mode fiber optical switch based on a spatial light modulator|
An optical switch includes an array of parallel few-mode fibers stacked vertically; beam stretchers that modifies an aspect ratio between a height and a width of beams associated with each few-mode fiber; a spatial light modulator with a 2d array of independently programmed tunable pixels, wherein the spatial light modulator manipulates phase and/or amplitude at each position of an incident optical beam; a wavelength demultiplexer which can separate the spectral components of an incident beam in angle; and lenses for imaging the modes of the input array of fiber to the spatial light modulator.. .
|Common mode voltage multiplexer|
A circuit and a system that uses the circuit for connecting a plurality of input channels to a receiving device. The circuit includes a plurality of dmos switches, each of which connects a respective one of the input channels to the receiving device in response to a respective control signal.
|Inspection system for oled display panels|
A system for inspecting at least a portion of a display panel having thin film transistors (tfts) and light emitting devicxes (oleds), during or immediately following fabrication, so that adjustments can be made to the fabrication procedures to avoid defects and non-uniformities. The system provides bonding pads connected to signal lines on at least portions of the display panel, and probe pads along selected edges of the display panel.
|Memory interleaving on memory channels|
A memory interleaver includes a channel selection unit to receive a system memory address for a memory request. The interleaver also includes a local memory address computation unit and a de-multiplexer.
A multi-standards transceiver includes: a first synthesizer arranged to generate a first oscillating signal; a second synthesizer arranged to generate a second oscillating signal; a first transceiver; a second transceiver; and a multiplexer coupled to the first synthesizer and the second synthesizer; wherein when the multi-standards transceiver operates under a first frequency mode, the first transceiver is arranged to use the first oscillating signal to modulate a first analog signal and the multiplexer is arranged to output the second oscillating signal to the second transceiver so that the second transceiver uses the second oscillating signal to modulate a second analog signal.. .
|Digital polar modulator for a switch mode rf power amplifier|
A digital polar modulator (dpm) for transforming a baseband signal into a modulated digital modulator output signal comprises an input unit and two low-pass delta-sigma modulators, a first one being connected downstream from the first input part and configured to provide at its output a first pulse train in dependence on an amplitude- modulating baseband signal component, and a second one being connected downstream from the second input part and configured to provide at its output a multilevel quantized signal in dependence on a phase modulating baseband signal component; a multiphase generator, which is configured to provide a set of square-wave carrier signals having a common carrier frequency and exhibiting discrete phase shifts with respect to each other; a multiplexer, which is configured to provide a multiplexer output signal that is formed by switching, in dependence on a signal received at a select input as a function of time, between selected ones of the carrier signals; and a combiner unit.. .
|Video encoding device, video decoding device, video encoding method, video decoding method, and program|
A video encoding device includes: a transformer for transforming an image block; an entropy encoder for entropy-encoding transformed data of the image block transformed by the transformer; a pcm encoder for pcm-encoding an image block; a multiplexed data selector for selecting output data of the entropy encoder or output data of the pcm encoder, for each block of an externally set block size; and a multiplexer for embedding a pcm header into a bitstream, in a block of the externally set block size, wherein the number of successive pcm-encoded blocks is embedded into the pcm header, and pcm data for the number of successive pcm-encoded blocks is multiplexed into the bitstream.. .
An electrical balance duplexer comprising an electrical balance load having an electrical balance load connection, an antenna connection, a first differential power amplifier output connection, a second differential power amplifier output connection; and a power combiner configured to combine output power signals from the first differential power amplifier output connection with output power signals from the second differential power amplifier output connection into the antenna connection and into the electrical balance load connection.. .
|Time-interleaved multi-modulus frequency divider|
Described are a multi-modulus frequency divider and event counter that are based on time-interleaved signals generated from a received signal. For the frequency divider, each time-interleaved clock signal generated from a received clock signal is provided to a bit counter and the output signal from each bit counter is provided to a multiplexer.
|Circuit for measuring acceleration of three-axis acceleration sensor|
Disclosed herein is a circuit for measuring acceleration of a three-axis acceleration sensor. The circuit for measuring acceleration of a three-axis acceleration sensor includes: three-axis acceleration sensors connected to one another in parallel and sensing the respective accelerations applied to three axes directions of x, y, and z axes to output corresponding signals; a demultiplexer outputting three axes signals each output from the three-axis acceleration sensors through a single path; and an amplifier amplifying the output signal from the demultiplexer, and further includes, at a back-end of the amplifier, a multiplexer distributing a signal output from the amplifier to the respective axes, a sample and hold circuit unit sampling and storing an analog signal of each axis output from the multiplexer, and an analog-to-digital converter converting an analog signal output from the amplifier into a digital signal..
|Position independent testing of circuits|
Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs. Multiplexer and demultiplexer circuits select between the scan circuitry and the functional inputs and outputs.
|Method for testing paths to pull-up and pull-down of input/output pads|
A scan chain architecture for each path in a circuit having combinational paths includes a control mechanism to control one or more flip flops and multiplexers to direct operational or test signals. Operational signals are sent along at least one combinational path to a pull-up/pull-down for at least one input/output pad and an operational voltage is recorded.
|Optimizing optical systems using code division multiple access and/or orthogonal frequency-division multiplexing|
An optical receiver comprises an optical port configured to receive an encoded optical signal, and a demodulation block indirectly coupled to the port and comprising a multiplexer, wherein the multiplexer is configured to receive an encoded electrical signal, wherein the encoded electrical signal is associated with the encoded optical signal, and wherein the encoded electrical signal is encoded using a code division multiple access (cdma) scheme, receive a code associated with the scheme, perform a dot multiplication of the encoded electrical signal and the code, and generate a differential voltage based on the dot multiplication.. .
|Switching architecture with packet encapsulation|
The invention includes, among other things, a system for passing tdm traffic through a packet switch. In one embodiment, the system includes a packet switch that has a plurality of data ports and is capable of routing fsdu packets between the plurality of data ports.
|Analog/digital converter and method for converting analog signals to digital signals|
The objective of the invention is to provide an a/d converter that exhibits fewer malfunctions due to variations in manufacturing. An a/d converter (1) of the invention, which is a cyclic type of analog/digital converter for converting an analog input signal to a digital signal having a predetermined resolution, comprises: a digital approximation unit (10) that includes a comparing unit (13) for comparing the magnitude of an input first analog signal with a threshold value to output a digital value indicating a result of the comparison and that also includes an mdac unit (14) for amplifying the first analog signal to β-fold, where β is greater than one but smaller than two, and for executing a predetermined computation in accordance with the result of the comparison of the comparing unit to output a second analog signal; a multiplexer (20) that, if the msb is to be computed, outputs the analog input signal and, otherwise, outputs the second analog signal as the first analog signal; a β estimating unit (30) that estimates the value of β; and a digital signal outputting unit (40) that sequentially takes in digital values outputted by the comparing unit and that outputs the taken-in digital values as the digital signal..
|Ultra-broadband planar millimeter-wave mixer with multi-octave if bandwidth|
In some embodiments, a system may include a passive uniplanar single-balanced millimeter-wave mixer. In some embodiments, a three-port diode-tee ic forming a mixer core is coupled between an end of a slotline balun and a second coplanar balun.
|Pulse generation circuit and semiconductor device|
Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every m rows.
|Method and apparatus for band separation for multiband communication systems|
Aspects of a method and apparatus for band separation for multiband communication systems are provided. One or more circuits for use in a transceiver may comprise a triplexer and a leakage processing module.
|Dual master jtag method, circuit, and system|
A dual-master controller includes a plurality of jtag data registers including a controller-mode register that stores information indicating a standard jtag or a processor-controlled mode of operation. A jtag tap controller receives control signals over a standard test access port and a processor controller receives processor control signals over an external processor bus.
|Circuit and method for testing memory devices|
The present application provides a circuit and method for testing a memory device. The memory device has multiple blocks addressable via a plurality of address lines and capable of inputting and/or outputting data via a plurality of data lines.
|Wireless system for epilepsy monitoring and measurement|
A wireless system for brain monitoring/mapping of neurological-disorder patients includes a plurality of electrodes each configured for surface abutment of brain tissue and main circuitry for placement outside a body of a patient and configured to transmit power at radio frequencies and send and receive data using infrared energy. Remote circuitry is provided for subcutaneous implantation in a head of the patient.
|Laser relay for free space optical communications|
A laser relay module for free space optical communications including an optical telescope for receiving and transmitting optical beams; an optical diplexer for separating transmitting and received optical beams; an optical amplifier; a modulated beacon laser for line of sight control of a plurality of communicating remote network nodes; a beacon beam detector for detecting an incoming beacon optical beam for line of sight control of the optical telescope and receiving data from other network nodes; and means for inserting an output of the modulated beacon laser into the optical telescope for transmission to another network node, and for transporting the incoming beacon optical beam to the beacon detector.. .
|Optical communication apparatus and optical communication method|
An optical communication apparatus and an optical communication method are disclosed. An optical communication apparatus mounted in a first node in a linear network coupled among a plurality nodes through an optical transmission line includes a multiplexer for receiving a plurality of optical signals having different wavelengths to output a first multi-wavelength optical signal obtained by coupling the plurality of optical signals, and a first optical coupler for dividing the first multi-wavelength optical signal into respective multi-wavelength optical signals to be transmitted to at least two different neighboring nodes..
|Signal margin centering for single-ended edram sense amplifier|
Apparatus and methods for signal margin centering for single-ended edram sense amplifier. A plurality of dram cells is connected to an input side of a multiplexer by a first bitline.
|Sampling device with buffer circuit for high-speed adcs|
A sampling and interleaving stage device for use in an analog-digital-converter and for providing a sampling output signal and an analog-to-digital-converter. The sampling and interleaving stage device for use in an analog-digital-converter, including: a receiving unit having a clock unit with a plurality of clock-driven switches for receiving an input signal; for each of the plurality of clock-driven switches, a first demultiplexer, for receiving the input signal via a clock-driven switch and for providing a number of first demultiplexer outputs; for a first demultiplexer output, at least one storage element for a stored input potential depending on the input signal; and an output demultiplexer for receiving an indication about the stored input potential and for outputting a corresponding sampling output signal to a respective sampling output..
One embodiment of the present invention provides a synthesizer. The synthesizer includes one or more tunable oscillators, a frequency-dividing circuit coupled to the tunable oscillators, and a multiplexer coupled to the frequency-dividing circuit.
|Sensor control apparatus and gas detection system|
A sensor control apparatus (2) of a gas detection system (1) includes a first low-pass filter (46), a second low-pass filter (48), and a multiplexer (50) so as to provide different time constants for detection of a sensor output signal vs1 and for detection of a response signal vs2. When the sensor output signal vs1 is detected, a signal whose frequency band is the same as that of vs1 is input to the analog-to-digital conversion section (31) through the first low-pass filter (46).
|Mobile communication method, radio base station, and mobile station|
A duplexer d1 or d2 to be used is appropriately selected from multiple duplexers d1 and d2. A mobile communication method of the invention is a mobile communication method for a mobile communication system 1 operated in a band f1.
|Method and apparatus for sorting elements in hardware structures|
A method for sorting elements in hardware structures is disclosed. The method comprises selecting a plurality of elements to order from an unordered input queue (uiq) within a predetermined range in response to finding a match between at least one most significant bit of the predetermined range and corresponding bits of a respective identifier associated with each of the plurality of elements.
|Method for implementing a reduced size register view data structure in a microprocessor|
A method for implementing a reduced size register view data structure in a microprocessor. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks; using a plurality of multiplexers to access ports of a scheduling array to store the instruction blocks as a series of chunks..
|Systems and methods for obtaining substantially simultaneous mult-channel impedance measurements and related applications|
An implantable system includes terminals, a pulse generator, a sensing circuit, separate signal processing channels, and first, second and third multiplexers. The terminals are connected to electrodes via conductors of leads.
|Tunable ila and dila matching for simultaneous high and low band operation|
A method and system configures a wireless communication device to support simultaneous signal propagation using a single narrow band antenna. An antenna tuner controller (atc) configures a tunable low band matching circuit to provide a first antenna matching in order to support propagation of a low band signal with a first signal path.
|Optical signal demodulator, optical signal demodulating method, and optical add-drop multiplexer|
An optical signal demodulator includes: an obtaining unit configured to obtain a spectrum of an optical signal generated by a second signal being superimposed on a first signal using frequency modulation; an identifying unit configured to identify a peak wavelength which is a wavelength corresponding to a peak position of the spectrum; and a demodulating unit configured to demodulate the second signal from the optical signal using a wavelength-variable filter to which a transmitted wavelength band has been set based on the peak wavelength.. .
|Upgradeable passive optical fiber circuit|
Optical equipment for 1g-epon, 10g-epon, and cwdm services are joined together using a novel combination of optical power splitters and multiplexers. This combination of splitters and multiplexers can be disposed in a single housing, which reduces the size of the combination and improves performance, since jumpers between multiple, separately packaged, optical components can be avoided.
|Method and apparatus for multiplexed time aligned analog input sampling|
A sensor system includes a first sensor and a second sensor and a multiplexor having at least two multiplexer inputs connected to the sensors. The output of the multiplexor is connected to a time correlation logic circuit via at least a signal conditioning and anti-aliasing filter, and the output of the time correlation logic is a time correlated sensor reading of the first and second sensor..
|Low-power cml-less transmitter architecture|
Exemplary embodiments of the present invention relate to a low-power current mode logic (cml)-less transmitter architecture. A transmitter comprises a main multiplexer configured to generate a main data signal by multiplexing parallel main data signals retimed from a retimer for time margin between parallel input data signals and a multiphase clock signals from a clock distributor, a secondary multiplexer configured to generate a post data signal by multiplexing parallel post data signals retimed from the retimer, and a plurality of output drivers configured to generate a serial data signal by summing the main data signal and the post data signal..
|Full-duplex wireless transceiver with hybrid circuit and reconfigurable radiation pattern antenna|
A method and circuit are provided that solve the problem of prolonged signal fading in transceivers utilizing dual antenna match in a hybrid transmitter-receiver cancellation circuit, thereby enabling practically implementable full-duplex single channel, or duplexerless frequency division duplex (fdd), wireless communication systems. The method includes controlling dynamic change in signal's amplitude and phase at the receiver port of a hybrid tx-rx circuit by continuously varying radiation pattern parameters of at least one antenna, while maintaining nearly constant impedance at the hybrid's antenna interface ports and equalizing propagation delays between the hybrid circuit and both antennas, using a novel circuit design..
|Device and method for improving reading speed of memory|
A memory device includes a plurality of sense amplifiers coupled with an array of memory cells, a plurality of output data lines receiving outputs of corresponding sense amplifiers, and a plurality of precharge circuits configured to apply a precharge voltage on the output data lines. A controller provides control signals to the sense amplifiers and to the precharge circuits, including to cause the precharge circuits to precharge the output data lines before the sense amplifiers drive output data signals to the output data lines.
|Memory with bit line current injection|
Embodiments of a memory are disclosed that may allow for the detection of weak data storage cells or may allow operation of data storage cells under conditions that may represent the effects of transistor ageing. The memory may include data storage cells, a column multiplexer, a sense amplifier, and a current injector.
|Circuit for memory write data operation|
A pulsed dynamic lcv circuit for improving write operations for sram. The pulsed dynamic lcv circuit includes voltage adjustment circuitry having a plurality of selectable reduced supply voltages and timing adjustment circuitry having a plurality of selectable logical state transition timings for adjustably controlling the voltage and timing of a transition from a selected reduced supply voltage back to a nominal supply voltage.
|Memory with redundant sense amplifier|
Embodiments of a memory are disclosed that may reduce the likelihood of a miss-read while reading a weak data storage cell. The memory may include a number of data storage cells, a column multiplexer, a first sense amplifier and a second sense amplifier, and an output circuit.
An expandable backplane is provided. The expandable backplane includes a baseboard management controller for connecting several disks, a first expansion board, a second expansion board, and a multiplexer.
|Digital subscriber line access multiplexer enclosures having onboard power|
A system includes a digital subscriber line access multiplexer (dslam) enclosure having a power area for housing power components and a component area for housing components configured to receive power from the power components. The system further includes at least one dslam positioned in the component area of the dslam enclosure and an ac power supply for providing ac power to the at least one dslam.
A stereo camera for measuring distance to an object using two images of the object having parallax includes an optical multiplexer to set a length of light path of each of the two images having different spectrum properties and parallax to the same length and to superimpose each of the light paths to one light path; an image capturing element to detect luminance of at least two images having different spectrum properties; an optical device to focus a superimposed image on the image capturing element; and a distance computing unit to compute distance to the object using parallax between the two images.. .
|For node in render setup graph|
Systems and methods for rendering three-dimensional images using a render setup graph are provided. A dependency graph is accessed.
|Display and method of transmitting signals therein|
A display includes first pixels, second pixels, a first de-multiplexer and a second de-multiplexer. The first de-multiplexer transmits a first data signal to the first pixels sequentially in response to first control signals.
|Method and semiconductor apparatus for reducing power when transmitting data between devices in the semiconductor apparatus|
A semiconductor apparatus is provided herein for reducing power when transmitting data between a first device and a second device in the semiconductor apparatus. Additional circuitry is added to the semiconductor apparatus to create a communication system that decreases a number of state changes for each signal line of a data bus between the first device and the second device for all communications.
|Latency/area/power flip-flops for high-speed cpu applications|
A circuit for a low latency, low area, and low power flip-flop may include a pass-gate multiplexer that can selectively allow one of input or test data to enter a master cell when a clock signal is low. The master cell may include a first inverter cross-coupled to a second inverter, and may receive the input or test data and may latch and provide at an input node of the slave cell, an inverted input data or the test data, upon a transition of the clock signal to a high state.
|Phase interpolator based output waveform synthesizer for low-power broadband transmitter|
Exemplary embodiments of the present invention relate to an output waveform synthesizer using phase interpolators and an on-chip eye opening monitoring (eom) circuit for a low-power transmitter. In order to achieve both small area and low-power consumption in the transmitter design, a single-stage multiphase multiplexer operating in subrate is employed.
|Voltage regulator with current limiter|
A voltage regulator includes an amplifier having a first input coupled to a first reference voltage and a second input coupled to a voltage feedback signal; a multiplexer having a first input coupled to an output of the amplifier, a second input coupled to a voltage clamp signal, and a control input; and a control circuit having a first input coupled to an over current indicator, a second input coupled to a no over voltage indicator, a third input coupled to a timer signal, and an output coupled to the control input of the multiplexer.. .
|Round-robin sensing device and method of use|
A round-robin sensing device is disclosed. The round-robin sensing device comprises a mems device, wherein the mems device includes first and second sense electrodes.
|Data tunneling via closed captioning|
An example apparatus that processes dtvcc data has a demultiplexer that extracts dtvcc data packets from a dtv signal. A parser parses the dtvcc data packets by: passing normal dtvcc data to a cc decoder; detecting ancillary data in the dtvcc data packets; and separating the ancillary data from the dtvcc data for output to an ancillary data process.
|Video phone system|
A system allocates channel bandwidth based on the data received from a plurality of remote sources. A de-multiplexer/priority circuit separates two or more different data streams into their components parts.
|Method, apparatus, and system for disaster recovery of optical communication system|
A method, an optical add-drop multiplexer branching unit, and a system for disaster recovery of an optical communication system are provided. The method for disaster recovery of an optical communication system using an optical add-drop multiplexer unit (oadm) includes: detecting a transmission link fault in an optical communication system; and when a transmission link fault is detected, switching the state of a link where the transmission link fault occurs from pass-through to loopback, so that an optical signal input from a non-faulty end of the link is looped back to the end for outputting.
|Power amplifier system including a composite digital predistorter|
A power amplifier system including a composite digital predistorter (dpd) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (dac), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite dpd.
|Binary adder and multiplier circuit|
An adder circuit includes first through fourth two-bit adder modules, and first through third result mux blocks for receiving and adding first and second binary values to generate a final sum. A multiplier circuit that multiplies a multiplier and a multiplicand includes a multiplexer, an encoder connected to the multiplexer, a shifter connected to the encoder, and an accumulator connected to the encoder for receiving the multiplier and multiplicand and generating a multiplication product..
|Charge pump power savings|
Exemplary embodiments are directed to systems, devices, methods, and computer-readable media for reducing static and dynamic power consumption of a charge pump. In one embodiment, a device may include a plurality of switches, each switch of the plurality having a gate coupled to a dedicated driver of a plurality of drivers.
|Ping pong comparator voltage monitoring circuit|
A ping pong comparator voltage monitoring circuit which includes first and second comparators having inputs connected to a voltage vin to be monitored, and second inputs connected to first and second nodes, respectively. A multiplexer alternately couples the first and second comparator outputs to an output in response to a periodic control signal.
|System and method for quantum efficiency measurement employing diffusive device|
A system for measuring a characteristic of a solar cell is disclosed and includes a light source irradiating an optical signal having a spectral range from about 100 nm to about 3000 nm, a wavelength selector configured to selectively narrow the spectral range of the optical signal, a beam splitter, a reference detector in optical communication with the beam splitter and configured to measure a characteristic of the optical signal, a specimen irradiated with the optical signal, a reflectance detector in optical communication with the specimen via the beam splitter and configured to measure an optical characteristic of the optical signal reflected by the specimen, a multiplexer in communication with at least one of the reference detector, specimen, and reflectance detector, and a processor in communication with at least one of the reference detector, specimen, and reflectance detector via the multiplexer and configured to calculate at least one characteristic of the specimen.. .
|System and method for multiplexed and buffered miniaturized sensor arrays|
A miniature pressure scanning system includes a plurality of miniature pressure sensors where each pressure sensors includes at least one sensor output for providing an analog output signal indicative of a detected pressure on a body, and each pressure sensor output has an associated output impedance; a plurality of buffers, each buffer electrically connected to the output port of a corresponding one of the pressure sensors, and configured to reduce the associated output impedance of the corresponding sensor output coupled thereto, and further configured to provide at an output of the buffer the analog output pressure signal from the pressure sensor; and a multiplexer coupled downstream of the plurality of buffers and configured to multiplex the buffered analog output pressure signals to output a multiplexed analog signal representing the detected pressures.. .
|Digital broadcasting system and method of processing data|
A digital broadcasting system and a method of processing data are disclosed. Herein, additional encoding is performed on mobile service data, which are then transmitted, thereby providing robustness in the processed mobile service data, so that the mobile service data can respond more strongly against fast and frequent channel changes.
|System, method, and apparatus for playing back a plurality of video elementary streams with one playback channel|
A system, method, and apparatus for playback of multiple video elementary streams is presented herein. A host processor modifies the video elementary streams to allow a transport demultiplexer to distinguish among the plurality of the video elementary streams..
|Branch target buffer with efficient return prediction capability|
Improved branch target buffers (btbs) and methods of processing data in a microprocessor with a pipeline are provided. According to various embodiments, a btb is provided that includes a non-return buffer, a return buffer, and a multiplexer.
|Wavelength real time display on the equipment for wdm optical networking systems with wavelength tunable capability|
A wavelength tunable device for use in a wavelength division multiplexing (wdm) system comprising a display device for displaying at least one operating wavelength of the wavelength tunable device. The display device is electrically coupled to a control unit in the wavelength tunable device so as to display the tuned wavelength in real time.
|Partial response receiver and related method|
A multi-phase partial response equalizer circuit includes sampler circuits that sample an input signal to generate sampled signals in response to sampling clock signals having different phases. A first multiplexer circuit selects one of the sampled signals as a first sampled bit to represent the input signal.
|Switching fabric for embedded reconfigurable computing|
An output switch fabric is disclosed that comprises an interleaved plurality of multiplexers for switching channels between first and second busses. The busses run in tracks that form a grid pattern.
|Low passive inter-modulation capacitor|
A high power, low passive inter-modulation capacitor is presented, which is formed using metal clad substrates, which are broad-side coupled through a thin air gap. Each substrate may include metal layers affixed on both sides which are electrical coupled together to form a single capacitor plate, or each substrate may have only a single metal layer on the surface adjacent to the air gap.
|Specifications support enablement|
Several circuits and methods that may be implemented to enable specification support of a plurality of interface components in an ic are disclosed. In an embodiment, a circuit includes a plurality of multiplexer circuits and a control circuit.
|Method and circuit structure for suppressing single event transients or glitches in digital electronic circuits|
A circuit structure (200) for suppressing single event transients (sets) or glitches in digital electronic circuits is provided. The circuit structure includes a first input (100) which receives an output of a digital electronic circuit (a), a second input (100′) which receives a redundant or duplicated output of the digital electronic circuit (a′), and two sub-circuits (102, 106) that each receive the inputs and have one output.
|Low impedance neutral and diagnosis|
A method to diagnose and localize parasitic voltages in an electric drive train is provided. The method includes manipulating a multiplexer to sequentially connect multiple diagnostic locations to a generator neutral, at predefined intervals.