|| List of recent Level Shift-related patents
|Driver and image sensing device including the same|
A driver includes a first level shifting unit generating a second signal swinging in a second threshold range in response to a first signal swinging in a first threshold range, a second level shifting unit generating a third signal swinging in a third threshold range in response to the second signal, a first pull-up driving unit driving an output terminal with a first high-voltage in response to the second signal, a first pull-down driving unit driving the output terminal with a first low voltage in response to the third signal, a second pull-down driving unit driving the output terminal with a second low voltage higher than the first low voltage in response to the fourth signal, and a first path coupling unit coupling the second pull-down driving unit with the output terminal in response to the second signal.. .
Sk Hynix Inc.
|Single supply level shifter with improved rise time and reduced leakage|
A single supply level shifter converts an input logic level signal in into level shifted out and out_x. An in inverter generates out at an out node.
Texas Instruments Incorporated
|Circuit arrangements and methods of operating the same|
In various embodiments, a circuit arrangement may be provided. The circuit arrangement may include a level shifting stage configured to be coupled to a first reference voltage, the level shifting stage having an output node.
Agency For Science, Technology And Research
|Bias circuit for a switched capacitor level shifter|
A noise resistant switch control circuit is provided. The circuit includes a low pass filter configured to couple to a first terminal of a switch and a first voltage clamp coupled to the low pass filter.
|Method and equalizing a level shifted signal|
A method and apparatus are provided for equalizing an output of a level shifter so as to obtain a symmetrical transition. In one implementation, a transition equalizing inverter includes: an nmos for establishing a high-to-low transition for an equalized signal in response to a low-to-high transition of an asymmetrical signal; a delay circuit for outputting a delayed signal in response to the asymmetrical signal; and a pmos for establishing a low-to-high transition for the equalized signal in response to a high-to-low transition of the delayed signal, wherein a delay introduced by the delay circuit offsets a timing mismatch between a low-to-high transition and a high-to-low transition of the asymmetrical signal.
Realtek Semiconductor Corp.
|System and a level shifting decoder|
According to various embodiments described herein, a circuit includes a decode logic circuit, a buffer coupled to the decode logic, a positive level shifter with an input coupled to receive address signals and an output coupled to the buffer, and a negative level shifter with an input coupled to receive the address signals and an output coupled to the buffer.. .
Stmicroelectronics International N.v.
|Level shifter with improved operation|
A level shifter includes a first branch and a second branch. A trigger of the first branch is coupled to a low voltage input, an inverted high voltage output and a ground.
|Level shifters for systems with multiple voltage domains|
A data latch includes a first stage configured to receive an input in a first voltage domain, and a second stage. The second stage includes a level shifter configured to shift the input from the first voltage domain to a second voltage domain, and an output circuit having a pull down circuit and pull up circuit arranged to generate an output in the second voltage domain, wherein the pull down circuit is responsive to the input in the first voltage domain and the pull up circuit is responsive to the input in the second voltage domain..
|Electro-optic device, driving electro-optic device, and electronic apparatus|
Provided is an electro-optic device including: a first pixel circuit that is provided corresponding to a position where one scanning line and a first data line are intersect with each other; a second pixel circuit that is provided corresponding to a position where the one scanning line and a second data line are intersect with each other; a first level shift unit circuit that shifts electric potential of a first data signal so as to compress electric potential amplitude of the first data signal with a first compression rate, and supplies the signal to the first data line; and a second level shift unit circuit that shifts electric potential of a second data signal so as to compress electric potential amplitude of the second data signal with a second compression rate different from the first compression rate, and supplies the signal to the second data line.. .
Seiko Epson Corporation
|Gate driver including level shifter and driving the same|
A gate driver comprises a level shifter outputting first and second signals; an output switch unit causing a first current flow in an output terminal by a voltage of the first signal in a first section of the driver to charge the output terminal, causing a second current flow by a voltage of the second signal in a second section, and discharging the output terminal depending on the second current. A current sensing unit causes a sensing current flow depending on the voltage of the second signal in the second section and outputting a preset voltage depending on the flow of the sensing current.
Samsung Electro-mechanics Co., Ltd.
Adaptive level shifter for print nozzle amplifier
An apparatus includes an amplifier to provide a waveform to drive a print nozzle. The amplifier also provides a current proportional to a slew rate of the waveform.
Hewlett-packard Development Company, L.p.
Level shifter and serializer having the same
A level shifter includes a level shifting unit suitable for changing a swing voltage level of an input signal from a first swing voltage level to a second swing voltage level based on a clock signal, a precharging unit suitable for precharging an output node of the level shifting unit based on the clock signal, and an output unit suitable for latching a signal of the output node having the second swing voltage level to output as an output signal.. .
Sk Hynix Inc.
System on chip with power switches
According to an exemplary implementation, an integrated circuit (ic) includes a logic circuit monolithically formed on the ic. The logic circuit is configured to generate modulation signals for controlling power switches of a power inverter.
International Rectifier Corporation
Voltage regulator and semiconductor device
Provided is a voltage regulator including a clamp circuit capable of protecting a gate of an output transistor without limiting a drivability of the output transistor. The voltage regulator includes a level shift circuit having an input terminal connected to the gate of the output transistor and an output terminal connected to an input of the clamp circuit.
Seiko Instrument Inc.
Level shifters, memory systems, and level shifting methods
Level shifters, memory systems, and level shifting methods are described. According to one arrangement, a level shifter includes an input configured to receive an input signal in a first voltage domain, an output configured to output an output signal from the level shifter in a second voltage domain different than the first voltage domain, a plurality of pull-down devices, and wherein one of the pull-down devices is coupled with the input and the output, a plurality of cross-coupled devices coupled with the pull-down devices and configured to provide transitions in the output signal as a result of transitions in the input signal, a plurality of current limiting devices coupled with the cross-coupled devices and configured to limit a flow of current from a source to the cross-coupled devices, and a plurality of dynamic devices configured to selectively provide charging current from the source to the cross-coupled devices..
Micron Technology, Inc.
H-bridge shoot-through avoidance
An h-bridge uses a diode or other level shifter between the gates of two transistors in series. The level shifter enforces a sufficient voltage separation between the gates to ensure that both transistors cannot be turned on at the same time.
Makerbot Industries, Llc
High voltage dc/dc converter with master/slave output stage
The present document relates to dc/dc converters with a modular structure for providing different levels of output currents. A power converter configured to convert electrical power at an input voltage into electrical power at an output voltage is described.
Dialog Semiconductor Gmbh
Compact row decoder with multiple voltage support
The present invention provides a compact row decoder with multiple voltage support. The row decoder may include a global driver and a plurality of row-level drivers.
Cista System Corp.
Level shifter circuit
A level shifter circuit for level shifting voltages of signals crossing multiple circuit domains includes an input stage and a driver stage. The input stage receives an oscillating signal generated by a ring oscillator and generates an inverted oscillating signal.
Actuating circuit for three-level inverter
An actuating circuit having a primary-side circuit part with an actuating logic circuit and a primary-side reference potential, and four secondary-side circuit parts each having one driver stage designed for actuating a phase of a three-level inverter and a first to fourth semiconductor switch, wherein each semiconductor switch and the secondary-side circuit part assigned thereto has a respective first to fourth secondary-side reference potential, and wherein in each case a level shifter connects the primary-side circuit part to the respective secondary-side circuit part and thus is assigned in each case to both circuit parts. In this connection, the primary-side reference potential corresponds to the first secondary-side reference potential.
Semikron Elektronik Gmbh & Co., Kg
Display device and initializing gate shift register of the same
Disclosed is a display device that comprises: a display panel; a level shifter shifting a start pulse, an initialization pulse, and n (n is an integer equal to or greater than 2)-phase shift clocks to a predetermined voltage; and a gate shift register comprising multiple stages respectively connected to scan lines of the display panel and shifting the start pulse in response to the n-phase shift clocks within a driving period defined by the start pulse to sequentially output a scan pulse, wherein the stages are simultaneously reset in response to the initialization pulse and the n-phase shift clocks within an initialization period preceding the driving period.. .
Lg Display Co., Ltd.
Wide supply range high speed low-to-high level shifter
A level shifter may include a first current source configured to source current to a node that pulls up an output voltage of the level shifter to a logic high level and a second current source configured to sink away current from the node to pull down the output voltage to a logic low level. When the output voltage at the node reaches the logic high voltage, the first current source may be deactivated while a latch connected to the node maintains the output voltage at the logic high level.
Sandisk Technologies Inc.
Transistor devices operating with switching voltages higher than a nominal voltage of the transistor
A voltage selector circuit may be coupled to transistors to protect one or more inputs of the transistor from exceeding a safe operating range. In one example, a cross-coupled pair of transistors may be coupled to a gate of a transistor to select between a first voltage and a cascoded voltage that is a safe bias voltage.
Cirrus Logic, Inc.
Cascaded h-bridge (chb) inverter level shift pwm with rotation
Cascade h-bridge inverters and carrier-based level shift pulse width modulation techniques are presented for generating inverter stage switching control signals, in which carrier waveform levels are selectively shifted to control thd and to mitigate power distribution imbalances within multilevel inverter elements using either complementary carrier or complementary reference modulation techniques.. .
Rockwell Automation Technologies, Inc.
A semiconductor device includes: a first level shifter suitable for shifting a level of a region identification signal identifying first and second regions to a preset voltage; a plurality of second level shifters suitable for shifting levels of a plurality of internal control signals to the preset voltage; and a plurality of logic operators suitable for generating a plurality of first internal assignment signals assigned to the first region and a plurality of second internal assignment signals assigned to the second region in response to a common shifting signal output from the first level shifter and a plurality of individual shifting signals output from the plurality of second level shifters.. .
Sk Hynix Inc.
Level shifter circuit
A level shifting circuit that includes a level shifter and a circuit stage. The circuit stage includes a pair of diodes circuits.
Freescale Semiconductor, Inc.
Small signal amplifier circuit
A signal amplifier circuit may include a bias circuit unit generating a first bias voltage, a level shifting circuit unit shifting a level of an input alternating current (ac) signal by an amount equal to a predetermined direct current (dc) shifting voltage so as to provide a first signal, and a first amplification unit amplifying a difference signal between the first bias voltage and the first signal, the first bias voltage and the dc shifting voltage being generated by circuits having the same characteristics.. .
Samsung Electro-mechanics Co., Ltd.
A level shifter includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a switching element. The first transistor is connected to a first node, the input signal and a first power supply voltage.
Orise Technology Co., Ltd.
Group iii-v voltage converter with monolithically integrated level shifter, high side driver, and high side power switch
There are disclosed herein various implementations of a monolithically integrated high side block. Such a monolithically integrated high side block includes a level shifter, a high side driver coupled to the level shifter, and a high side power switch coupled to the high side driver.
International Rectifier Corporation
Half-bridge circuit with a low-side transistor and a level shifter transistor integrated in a common semiconductor body
A half-bridge circuit includes a low-side transistor and a high-side transistor each having a load path and a control terminal. The half-bridge circuit further includes a high-side drive circuit having a level shifter with a level shifter transistor.
Infineon Technologies Austria Ag
Capacitive coupling, asynchronous electronic level shifter circuit
An asynchronous level shifter electronic circuit including: a transmitter, which can be coupled to a first voltage and generates a communication signal; a receiver, which can be coupled to a second voltage; and a capacitive coupling stage, which receives the communication signal and supplies a corresponding filtered signal to the receiver. The receiver includes: a threshold device, which has an input terminal and an output terminal and switches an electrical quantity on the output terminal between a first value and a second value, as a function of corresponding transitions through a threshold of a first intermediate signal present on the input terminal, to generate a second intermediate signal; and a biasing circuit, which generates the first intermediate signal to have a d.c.
Pre-driver and power circuit including the same
Disclosed are a pre-driver having a modified circuit for gate pulse modulation and a power circuit including the same. The pre-driver includes a level shifter that outputs pulses having a phase difference and a gate pulse modulator that performs gate pulse modulation.
Silicon Works Co., Ltd.
Voltage detection device
A first part circuit and an operational amplifier form a level shift circuit, which selects either one of battery cells forming an assembled battery and extracts and holds a voltage representing an inter-terminal voltage of a selected battery cell. A second part circuit and the operational amplifier form a residual voltage generation circuit, which generates a residual voltage by amplifying a differential voltage between a conversion subject voltage and an analog voltage corresponding to a conversion result of an a/d conversion circuit and applies the residual voltage to the a/d conversion circuit as a conversion subject voltage.
Semiconductor storage device, controlling the same and control program
According to one embodiment, a semiconductor memory stores a program for causing a memory controller to operate in at least one of first and second modes. In the first mode, for each of the blocks, the memory controller autonomously erases and writes data and reads the written data, and determines that the block or the semiconductor storage device is defective when a count of errors in the read data exceeds a correction capability or a threshold.
Kabushiki Kaisha Toshiba
Sram write-assisted operation with vdd-to-vcs level shifting
An electronic circuit and a method for driving data writes to an sram bit cell in an electronic circuit. The electronic circuit translates a first write signal in a lower voltage domain to a second write signal in a higher voltage domain.
International Business Machines Corporation
Negative level shifter
A level shifter including a differential input stage including first and second transistors having respective first terminals, respective control terminals configured to receive a differential input signal, and respective second terminals connected in common to a first voltage; a breakdown voltage controller including third and fourth transistors having respective first terminals, respective second terminals connected to respective first terminals of the first and second transistors, and respective control terminals configured to receive a bias signal, and a load stage comprising fifth and sixth transistors having respective first terminals connected to respective first terminals of the third and fourth transistors, respective control terminals that are cross coupled, and respective second terminals connected to a second voltage is disclosed. A bias voltage applied to bulks or bodies of the first through the fourth transistors equals or substantially equals the first voltage..
Dongbu Hitek Co., Ltd.
Multi-protocol combined receiver
A receiver circuit configured to operate in a displayport (dp) mode and a high-definition multimedia interface (hdmi) mode. The receiver circuit includes: termination circuitry configured to receive a dp signal in the dp mode and an hdmi signal in the hdmi mode; and voltage common-mode (vcm) level shifter circuitry configured to operate as a pass-through for the dp signal in the dp mode and generate a converted hdmi signal from the hdmi signal in the hdmi mode..
High voltage switch, nonvolatile memory device comprising same, and related operation
A high voltage switch operates in response to a first drive voltage and a second drive voltage higher than the first drive voltage. The high voltage switch comprises a pmos transistor transmitting the second drive voltage to an output terminal according to a voltage applied to its gate, a first depletion mode transistor providing the second drive voltage to the pmos transistor according to an output signal fed back from the output terminal, a second depletion mode transistor receiving the second drive voltage through one end and providing a switching voltage to another end according to a switching control signal, and a level shifter providing the switching voltage to a gate of the pmos transistor according to an enable signal and a reverse enable signal..
Samsung Electronics Co., Ltd.
Level shift circuit utilizing resistance in semiconductor substrate
An apparatus such as a level shift circuit includes a first signal output device configured to output a first level shifting signal, a second signal output device configured to output a second level shifting signal, and first and second detector devices. The level shifting signals are to control an output switching element of a high potential side of an output device that includes a power source and a load.
Fuji Electric Co., Ltd.
Wide range core supply compatible level shifter circuit
A level shifter circuit is implemented with dual gate fully depleted silicon-on-insulator (fdsoi) technology. By enhancing the performance of the nmos and devices within the level shifting circuit, the vt of the dual gate fdsoi nmos transistors is lowered without a need for additional control circuitry.
Level shift circuit and dc-dc converter for using the same
A level shift circuit and a dc-dc buck converter controller for using the same are disclosed. The level shift circuit is capable of detecting a state of a converting circuit, and avoids a current leakage when determining that the converting circuit is operating under a light-load.