|| List of recent Level Shift-related patents
| Wide supply range high speed low-to-high level shifter|
A level shifter may include a first current source configured to source current to a node that pulls up an output voltage of the level shifter to a logic high level and a second current source configured to sink away current from the node to pull down the output voltage to a logic low level. When the output voltage at the node reaches the logic high voltage, the first current source may be deactivated while a latch connected to the node maintains the output voltage at the logic high level.
Sandisk Technologies Inc.
| Transistor devices operating with switching voltages higher than a nominal voltage of the transistor|
A voltage selector circuit may be coupled to transistors to protect one or more inputs of the transistor from exceeding a safe operating range. In one example, a cross-coupled pair of transistors may be coupled to a gate of a transistor to select between a first voltage and a cascoded voltage that is a safe bias voltage.
Cirrus Logic, Inc.
| Cascaded h-bridge (chb) inverter level shift pwm with rotation|
Cascade h-bridge inverters and carrier-based level shift pulse width modulation techniques are presented for generating inverter stage switching control signals, in which carrier waveform levels are selectively shifted to control thd and to mitigate power distribution imbalances within multilevel inverter elements using either complementary carrier or complementary reference modulation techniques.. .
Rockwell Automation Technologies, Inc.
A semiconductor device includes: a first level shifter suitable for shifting a level of a region identification signal identifying first and second regions to a preset voltage; a plurality of second level shifters suitable for shifting levels of a plurality of internal control signals to the preset voltage; and a plurality of logic operators suitable for generating a plurality of first internal assignment signals assigned to the first region and a plurality of second internal assignment signals assigned to the second region in response to a common shifting signal output from the first level shifter and a plurality of individual shifting signals output from the plurality of second level shifters.. .
Sk Hynix Inc.
|Level shifter circuit|
A level shifting circuit that includes a level shifter and a circuit stage. The circuit stage includes a pair of diodes circuits.
Freescale Semiconductor, Inc.
|Small signal amplifier circuit|
A signal amplifier circuit may include a bias circuit unit generating a first bias voltage, a level shifting circuit unit shifting a level of an input alternating current (ac) signal by an amount equal to a predetermined direct current (dc) shifting voltage so as to provide a first signal, and a first amplification unit amplifying a difference signal between the first bias voltage and the first signal, the first bias voltage and the dc shifting voltage being generated by circuits having the same characteristics.. .
Samsung Electro-mechanics Co., Ltd.
A level shifter includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a switching element. The first transistor is connected to a first node, the input signal and a first power supply voltage.
Orise Technology Co., Ltd.
|Group iii-v voltage converter with monolithically integrated level shifter, high side driver, and high side power switch|
There are disclosed herein various implementations of a monolithically integrated high side block. Such a monolithically integrated high side block includes a level shifter, a high side driver coupled to the level shifter, and a high side power switch coupled to the high side driver.
International Rectifier Corporation
|Half-bridge circuit with a low-side transistor and a level shifter transistor integrated in a common semiconductor body|
A half-bridge circuit includes a low-side transistor and a high-side transistor each having a load path and a control terminal. The half-bridge circuit further includes a high-side drive circuit having a level shifter with a level shifter transistor.
Infineon Technologies Austria Ag
|Capacitive coupling, asynchronous electronic level shifter circuit|
An asynchronous level shifter electronic circuit including: a transmitter, which can be coupled to a first voltage and generates a communication signal; a receiver, which can be coupled to a second voltage; and a capacitive coupling stage, which receives the communication signal and supplies a corresponding filtered signal to the receiver. The receiver includes: a threshold device, which has an input terminal and an output terminal and switches an electrical quantity on the output terminal between a first value and a second value, as a function of corresponding transitions through a threshold of a first intermediate signal present on the input terminal, to generate a second intermediate signal; and a biasing circuit, which generates the first intermediate signal to have a d.c.
Pre-driver and power circuit including the same
Disclosed are a pre-driver having a modified circuit for gate pulse modulation and a power circuit including the same. The pre-driver includes a level shifter that outputs pulses having a phase difference and a gate pulse modulator that performs gate pulse modulation.
Silicon Works Co., Ltd.
Voltage detection device
A first part circuit and an operational amplifier form a level shift circuit, which selects either one of battery cells forming an assembled battery and extracts and holds a voltage representing an inter-terminal voltage of a selected battery cell. A second part circuit and the operational amplifier form a residual voltage generation circuit, which generates a residual voltage by amplifying a differential voltage between a conversion subject voltage and an analog voltage corresponding to a conversion result of an a/d conversion circuit and applies the residual voltage to the a/d conversion circuit as a conversion subject voltage.
Semiconductor storage device, controlling the same and control program
According to one embodiment, a semiconductor memory stores a program for causing a memory controller to operate in at least one of first and second modes. In the first mode, for each of the blocks, the memory controller autonomously erases and writes data and reads the written data, and determines that the block or the semiconductor storage device is defective when a count of errors in the read data exceeds a correction capability or a threshold.
Kabushiki Kaisha Toshiba
Sram write-assisted operation with vdd-to-vcs level shifting
An electronic circuit and a method for driving data writes to an sram bit cell in an electronic circuit. The electronic circuit translates a first write signal in a lower voltage domain to a second write signal in a higher voltage domain.
International Business Machines Corporation
Negative level shifter
A level shifter including a differential input stage including first and second transistors having respective first terminals, respective control terminals configured to receive a differential input signal, and respective second terminals connected in common to a first voltage; a breakdown voltage controller including third and fourth transistors having respective first terminals, respective second terminals connected to respective first terminals of the first and second transistors, and respective control terminals configured to receive a bias signal, and a load stage comprising fifth and sixth transistors having respective first terminals connected to respective first terminals of the third and fourth transistors, respective control terminals that are cross coupled, and respective second terminals connected to a second voltage is disclosed. A bias voltage applied to bulks or bodies of the first through the fourth transistors equals or substantially equals the first voltage..
Dongbu Hitek Co., Ltd.
Multi-protocol combined receiver
A receiver circuit configured to operate in a displayport (dp) mode and a high-definition multimedia interface (hdmi) mode. The receiver circuit includes: termination circuitry configured to receive a dp signal in the dp mode and an hdmi signal in the hdmi mode; and voltage common-mode (vcm) level shifter circuitry configured to operate as a pass-through for the dp signal in the dp mode and generate a converted hdmi signal from the hdmi signal in the hdmi mode..
High voltage switch, nonvolatile memory device comprising same, and related operation
A high voltage switch operates in response to a first drive voltage and a second drive voltage higher than the first drive voltage. The high voltage switch comprises a pmos transistor transmitting the second drive voltage to an output terminal according to a voltage applied to its gate, a first depletion mode transistor providing the second drive voltage to the pmos transistor according to an output signal fed back from the output terminal, a second depletion mode transistor receiving the second drive voltage through one end and providing a switching voltage to another end according to a switching control signal, and a level shifter providing the switching voltage to a gate of the pmos transistor according to an enable signal and a reverse enable signal..
Samsung Electronics Co., Ltd.
Level shift circuit utilizing resistance in semiconductor substrate
An apparatus such as a level shift circuit includes a first signal output device configured to output a first level shifting signal, a second signal output device configured to output a second level shifting signal, and first and second detector devices. The level shifting signals are to control an output switching element of a high potential side of an output device that includes a power source and a load.
Fuji Electric Co., Ltd.
Wide range core supply compatible level shifter circuit
A level shifter circuit is implemented with dual gate fully depleted silicon-on-insulator (fdsoi) technology. By enhancing the performance of the nmos and devices within the level shifting circuit, the vt of the dual gate fdsoi nmos transistors is lowered without a need for additional control circuitry.
Level shift circuit and dc-dc converter for using the same
A level shift circuit and a dc-dc buck converter controller for using the same are disclosed. The level shift circuit is capable of detecting a state of a converting circuit, and avoids a current leakage when determining that the converting circuit is operating under a light-load.
Dual gate fd-soi transistor
Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (fd-soi) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate fd-soi transistors with enhanced switching performance.
Charge and discharge signal circuit and dc-dc converter
A charge and discharge signal circuit includes: high side transistors connected in series; low side transistors connected in series; high side drive circuits; low side drive circuits; and a drive signal generation circuit, wherein each drive circuit includes: a level shifter; a capacitor switch string connected in series, being connected in parallel with the transistor; and a drive part, to which an output of the level shifter is supplied, at least one pair of neighboring ones of the level shifters are commonly formed, and two neighboring ones of the drive parts receive a same output from the common shifters.. .
Selectable upper voltage range monitoring circuit
A battery voltage measuring circuit for an implantable cardiac device is presented. Since the usable battery voltage for the device is limited to an upper range of voltages, the need for measuring lower voltages at which the battery is approaching end of life is of no use.
Cameron Health, Inc.
A data driver is disclosed. The data driver includes a first latch unit including a plurality of first latches configured to store data, a selector configured to select and/or output data in two or more first latches, a level shifter unit configured to convert a voltage level of the data in the two or more selected first latches and output the voltage level-converted data, and a second latch unit including a plurality of second latches configured to store the voltage level-converted data..
Dongbu Hitek Co., Ltd.
Scalable layout architecture for metal-programmable voltage level shifter cells
A layout architecture for voltage level shifters is provided. The architecture includes features of voltage level shifter cells and arrangements of the voltage level shifter cells within integrated circuits.
Semiconductor device and detecting state of input signal of semiconductor device
A semiconductor device includes a signal detection unit suitable for detecting a state of an input signal and generating a detection signal based on a detected result, and a signal transmission unit suitable for selectively transmitting the input signal in response to the detection signal, wherein the signal detection unit includes a state signal generation unit suitable for detecting a level shifting time of the input signal, and generating a state signal at a detected level shifting time, and a state determination unit suitable for comparing a voltage level of the input signal with a voltage level of a reference voltage in response to the state signal, and outputting the detection signal.. .
Sk Hynix Inc.
Level shifter, dc-dc converter, and level shift method
A level shifter includes: a first cascode portion, including a first transistor of a first conductivity type and a second transistor of a second conductivity type which are cascode-coupled to each other, configured to transmit a first input signal; a second cascode portion, including a third transistor of the first conductivity type and a fourth transistor of the second conductivity type which are cascode-coupled to each other, configured to transmit a second input signal; a latch portion configured to retain a first output signal and a second output signal obtained by changing, based on a first voltage obtained by boosting a power supply voltage, potential levels of the first input signal and the second input signal; and a potential-difference suppression circuit, coupled in parallel to the first cascode portion, configured to control a potential difference between source and drain of each of the first transistor and the second transistor.. .
Level shifter of driving circuit and operating method thereof
A level shifter applied in a driving circuit of a display is disclosed. The level shifter includes a first stage of level shifting unit and a second stage of level shifting unit and used to convert an input voltage signal with low voltage level into an output voltage signal with high voltage level.
Raydium Semiconductor Corporation
Half-bridge circuit including a low-side transistor and a level shifter transistor integrated in a common semiconductor body
A half-bridge circuit includes a low-side transistor and a high-side transistor each having a load path and a control terminal, and a high-side drive circuit having a level shifter with a level shifter transistor. The low-side transistor and the level shifter transistor are integrated in a common semiconductor body..
Infineon Technologies Austria Ag
Self biased dual mode differential cmos tia for 400g fiber optic links
A transimpedance amplifier (tia) device. The device includes a photodiode coupled to a differential tia with a first and second tia, which is followed by a level shifting/differential amplifier (ls/da).
Dual path level shifter
Dual path level shifter methods and devices are described. The described level shifter devices can comprise voltage-to-current and current-to-voltage converters..
Peregrine Semiconductor Corporation
Phase locked loop circuit
A phase locked loop (pll) circuit is provided. The pll includes a voltage controlled oscillator (vco) for outputting an oscillation signal of a frequency corresponding to an inputted voltage, a frequency divider for dividing the oscillation signal and output a frequency-divided signal, a phase comparator for comparing a phase of the frequency-divided signal and the phase of an input signal from the outside and output a first phase comparison signal and a second phase comparison signal which have different polarities, a differential amplifier circuit for outputting a control voltage based on a voltage difference between the first phase comparison signal and the second phase comparison signal to the vco, a level shift circuit for outputting a level-shifted signal which is made by shifting a direct current level of the second phase comparison signal, and an amplifier circuit for outputting an amplified signal which is an amplified level-shifted signal..
Nihon Dempa Kogyo Co., Ltd.
Level shift circuit and semiconductor device
A level shift circuit includes: a latch circuit (q5, q6, q7, q8) including first (q5, q7) and second (q6, q8) inverter circuits; a first input mos transistor (q1) operating in accordance with an input signal; a second input mos transistor (q2) operating in accordance with an inversion signal of the input signal; and a current-voltage control mos transistor (q9). The latch circuit (q5, q6, q7, q8) outputs a voltage having been converted from the input voltage in level.
Renesas Electronics Corporation
Level shifting circuit
A level shifter shifts the level of an input signal from a second voltage domain to a first voltage domain. To accommodate different input signal levels (e.g., including sub-threshold input signal levels) that may arise due to changes in the supply voltage for the second voltage domain, current for a latch circuit of the level shifter is limited based on the supply voltage for the second voltage domain.
Equalization device for assembled battery
In an equalization device for equalizing voltages of battery cells connected in series, each battery cell is provided with an equalization switch and a level shift section. The level shift section includes at least one level shift circuit.