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This page is updated frequently with new Lattice-related patent applications. Subscribe to the Lattice RSS feed to automatically get the update: related Lattice RSS feeds. RSS updates for this page: Lattice RSS RSS


Semiconductor device having vertical channel, resistive memory device including the same, and method of manufacturing…

Sk Hynix

Semiconductor device having vertical channel, resistive memory device including the same, and method of manufacturing…

Nitride-based semiconductor device and method of manufacturing the same

Kabushikikaisha Toshiba

Nitride-based semiconductor device and method of manufacturing the same

Nitride-based semiconductor device and method of manufacturing the same

National Chiao Tung University

Method for growing aluminum indium nitride films on silicon substrate


Date/App# patent app List of recent Lattice-related patents
08/20/15
20150237284 
 Imager readout architecture utilizing a/d converters (adc) patent thumbnailImager readout architecture utilizing a/d converters (adc)
The invention provides an imager readout architecture utilizing analog-to-digital converters (adc), the architecture comprising a band-limited sigma delta modulator (sdm) adc; and a serpentine readout which can be configured to allow the band-limited sdm to multiplex between multiple columns by avoiding discontinuities at the edges of a row. Sdm adc image reconstruction artifacts are minimized using a modified serpentine read out methodology, the methodology comprising using primary and redundant slices with the serpentine read out in opposite directions and averaging the slices.
Intrinsix Corporation


08/20/15
20150236126 
 Semiconductor device having vertical channel, resistive memory device including the same, and  manufacturing the same patent thumbnailSemiconductor device having vertical channel, resistive memory device including the same, and manufacturing the same
A semiconductor device, a resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device includes a pillar extending substantially perpendicular from a semiconductor substrate, the pillar including an inner portion and an outer portion surrounding the inner portion.
Sk Hynix Inc.


08/20/15
20150236103 
 Nitride-based semiconductor device and  manufacturing the same patent thumbnailNitride-based semiconductor device and manufacturing the same
The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped alxga1-xn (0≦x<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type alyga1-yn (0<y≦1, x<y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7..
Kabushikikaisha Toshiba


08/20/15
20150235837 
 Method for growing aluminum indium nitride films on silicon substrate patent thumbnailMethod for growing aluminum indium nitride films on silicon substrate
A method for growing aluminum indium nitride (alinn) films on silicon substrates comprises several steps: firstly, arranging a silicon substrate in a reaction chamber; secondly, providing multiple reaction gases in the reaction chamber, wherein the reaction gases include aluminum precursors, indium precursors and nitrogen-containing gases; finally, dynamically adjusting flow rates of the reaction gases and directly growing an alinn layer on the silicon substrate via a crystal growth process. By directly forming an alinn layer on the silicon substrate, lattice matching is increased, residual thermal stress is reduced and film quality is improved.
National Chiao Tung University


08/20/15
20150235246 
 Cross-channel audience segmentation patent thumbnailCross-channel audience segmentation
A method comprising using at least one hardware processor for: receiving first a set of keywords associated with a first advertising platform; receiving second a set of keywords associated with a second advertising platform; defining binary relations between the first and second sets of keywords; applying formal concept analysis (fca) to the binary relations, to produce a concept lattice; and updating the concept lattice responsive to changes in the first or second sets of keywords.. .
Kenshoo Ltd.


08/20/15
20150233256 
 Novel architectures for ultra low thermal conductivity thermal barrier coatings with improved erosion and impact properties patent thumbnailNovel architectures for ultra low thermal conductivity thermal barrier coatings with improved erosion and impact properties
A thermal barrier coating system for metal components in a gas turbine engine having an ultra low thermal conductivity and high erosion resistance, comprising an oxidation-resistant bond coat formed from an aluminum rich material such as mcraly and a thermal insulating ceramic layer over the bond coat comprising a zirconium or hafnium oxide lattice structure (zro2 or hfo2) and an oxide stabilizer compound comprising one or more of the compounds ytterbium oxide (yb2o3), yttria oxide (y2o3), hafnium oxide (hfo2), lanthanum oxide (la2o3), tantalum oxide (ta2o5) or zirconium oxide (zro2). The invention includes a new method of forming the ceramic-based thermal barrier coatings using a liquid-based suspension containing microparticles comprised of at least one of the above compounds ranging in size between about 0.1 and 5 microns.
General Electric Company


08/20/15
20150233015 
 Method of growth of lead zirconate titanate single crystals patent thumbnailMethod of growth of lead zirconate titanate single crystals
Growth of single crystals of lead zirconate titanate (pzt) and other perovskites is accomplished by liquid phase epitaxy onto a substrate of suitable structural and lattice parameter match. A solvent and specific growth conditions for stable growth are required to achieve the desired proportions of zr and ti..
Quest Integrated, Inc.


08/20/15
20150232376 
 Low-e glazing performance by seed structure optimization patent thumbnailLow-e glazing performance by seed structure optimization
A bi-layer seed layer can exhibit good seed property for an infrared reflective layer, together with improved thermal stability. The bi-layer seed layer can include a thin zinc oxide layer having a desired crystallographic orientation for a silver infrared reflective layer disposed on a bottom layer having a desired thermal stability.
Intermolecular Inc.


08/20/15
20150231620 
 Iron-zeolite chabazite catalyst for use in nox reduction and  making patent thumbnailIron-zeolite chabazite catalyst for use in nox reduction and making
An iron-zeolite chabazite (cha) catalyst is provided as an scr catalyst for reducing nitrogen oxides (nox) from vehicle engine exhausts. The catalyst is formed by incorporating iron during synthesis of the chabazite zeolite, which eliminates the need for a post-synthesis ion-exchange step and which results in the incorporation of iron into the (cha) zeolite crystal lattice structure.
Ford Global Technologies, Llc


08/20/15
20150231617 
 Fe-sapo-34 catalyst for use in nox reduction and  making patent thumbnailFe-sapo-34 catalyst for use in nox reduction and making
The system and methods described provide for an fe-sapo-34 catalyst in an scr catalyst for reducing nitrogen oxides (nox) from vehicle engine exhausts. In one example, the catalyst is formed by incorporating iron during synthesis of the sapo-34 zeolite, which allows iron to be incorporated into the zeolite crystal lattice structure and eliminates the post-synthesis ion-exchange step.
Ford Global Technologies, Llc


08/13/15
20150228811 

Compound-based thin film solar cell


A compound-based thin film solar cell which has a high photovoltaic conversion efficiency is obtained. The compound-based thin film solar cell is provided with substrate (1), back surface electrode layer (2) formed on substrate (1), p-type light absorption layer (3) formed on back surface electrode layer (2), n-type high resistance buffer layer (4) formed on p-type light absorption layer (3), and zno film (5) formed on n-type high resistance buffer layer (4), where n-type high resistance buffer layer (4) includes a first buffer layer (4a) formed on the p-type light absorption layer (3) and a second buffer layer (4b) formed on the first buffer layer (4a) and where the second buffer layer (4b) is formed by a material which has a lattice constant closer to the lattice constant of the zno film (5) than the first buffer layer (4a)..
Showa Shell Sekiyu K.k.


08/13/15
20150228794 

N/p mos finfet performance enhancement by specific orientation surface


As will be appreciated in more detail herein, the present disclosure provides for finfet techniques whereby a finfet channel region has a particular orientation with respect to the crystalline lattice of the semiconductor device to provide enhanced mobility, compared to conventional finfets. In particular, the present disclosure provides finfets with a channel region whose lattice includes silicon atoms arranged on (551) lattice plane.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/13/15
20150228779 

Semiconductor device and semiconductor device manufacturing method


In aspects of the invention, an n-type epitaxial layer that forms an n− type drift layer is formed on the upper surface of an n-type semiconductor substrate formed by being doped with a high concentration of antimony. A p-type anode layer is formed on a surface of the n− type drift layer.
Fuji Electric Co., Ltd.


08/13/15
20150228755 

Integrated circuits with relaxed silicon / germanium fins


Integrated circuits with relaxed silicon and germanium fins and methods for fabricating such integrated circuits are provided. The method includes a forming a crystalline silicon and germanium composite layer overlying a crystalline silicon substrate, where a composite layer crystal lattice is relaxed.
Globalfoundries, Inc.


08/13/15
20150228752 

Semiconductor device and semiconductor device manufacturing method


In aspects of the invention, an n-type epitaxial layer that forms an n− type drift layer is formed on the upper surface of an n-type semiconductor substrate formed by being doped with a high concentration of antimony. A p-type anode layer is formed on a surface of the n− type drift layer.
Fuji Electric Co., Ltd.


08/13/15
20150228444 

Method and control of coherent synchrotron radiation effects during recirculation with bunch compression


A modulated-bending recirculating system that avoids csr-driven breakdown in emittance compensation by redistributing the bending along the beamline. The modulated-bending recirculating system includes a) larger angles of bending in initial fodo cells, thereby enhancing the impact of csr early on in the beam line while the bunch is long, and 2) a decreased bending angle in the final fodo cells, reducing the effect of csr while the bunch is short.
Jefferson Science Associates, Llc


08/13/15
20150228065 

Dimension calculation a semiconductor device


An automatic calculation method for thickness calculation of a deposition layer in a fin-type field-effect transistor (finfet) is disclosed through mapping edge lines onto an excel spreadsheet. The similar method is also applied to the thickness calculation of superlattice or multiple quantum well for a light emitting diode (led).
Materials Analysis Technology Inc


08/13/15
20150226708 

Laser projected acoustic sensor apparatus and method


A plurality of lasers produces a lattice of projected points. A sensor system detects movement in the projected points in response to an incoming wave..
Lockheed Martin Corporation


08/13/15
20150226528 

Armor components comprising hexagonal boron nitride and forming same


An armor component including a body including a ceramic component comprising hbn. In one aspect, the hbn is configured to undergo a phase change upon a projectile impact.
Saint Gobain Ceramics & Plastics, Inc.


08/13/15
20150226527 

Armor components and forming same


An armor component including a body including a material component configured to undergo a phase change upon a projectile impact. The material component may also have a ready state defining a first lattice structure configured to change from the ready state to an absorbed state defining a second lattice structure different from the first lattice structure.
Saint-gobain Ceramics & Plastics, Inc.


08/13/15
20150225874 

Method for growing zirconium nitride crystal


According to the present invention, if a zirconium nitride lattice is grown by a method for growing zirconium nitride using a metal-organic vapor phase epitaxy method, the lattice binding efficiency of zrn and gan can enable a low cost preparation of an led having high performance and it is very advantageous to grow a green led by a direct band gap in the presence of zr3n4. In addition, inzr3n4 can be substituted for in when growing a mqw in an led, and thus it is very advantageous to prepare green and red leds.
Sm Technology


08/13/15
20150225600 

Grafted acrylic comprising water soluble and water insoluble portions and lattices and coatings comprising the same


A latex comprising of two stage grafted acrylic is disclosed. The acrylic comprises a water soluble portion and a water insoluble portion that are grafted together.
Ppg Industries Ohio, Inc.


08/13/15
20150224687 

Method of making a panel


A method is provided for manufacturing a seamless, reinforced panel of any desired length using a single mold. The seamless panels of the present invention may be used in a variety of construction application.

08/06/15
20150222873 

Dynamic stereo and holographic image display


A dynamic stereo and holographic image display includes: an image acquisition lattice, an encoder, a display panel, and a light shielding matrix. The image acquisition lattice acquires an image at each acquisition point.

08/06/15
20150222307 

Reception quality measuring apparatus and reception quality measuring method


A reception quality measuring apparatus (100) including: an equalizing processing unit (1) for performing an equalizing process on a reception signal to derive an equalized reception signal; lattice distance estimating element (2) for deriving a lattice distance estimation value using the equalized reception signal; an rssi estimating unit (3) for deriving an rssi estimation value using the lattice distance estimation value; an issi estimating unit (4) for deriving an issi estimation value by subtracting the rssi estimation value from the lattice distance estimation value; and a dividing unit (5) for deriving an sir representing reception quality by dividing the rssi estimation value by the issi estimation value.. .
Nec Corporation


08/06/15
20150221826 

Nitride semiconductor light emitting device


The nitride semiconductor light emitting device includes a first conductivity-type nitride semiconductor layer, a first superlattice layer disposed on the first conductivity-type nitride semiconductor layer, a pit forming layer disposed on the first superlattice layer and having a plurality of v-shaped pits, a second superlattice layer, an active layer, and a second conductivity-type nitride semiconductor layer disposed on the active layer and filling the v-shaped pits. The second superlattice layer is disposed on the pit forming layer and has windings that have the same shape as a shape of windings generated by the v-shaped pits.

08/06/15
20150221822 

Light emitting diode and fabricating the same


Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the super lattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer..
Seoul Viosys Co., Ltd.


08/06/15
20150221812 

Surface passivation for cdte devices


In one embodiment, a method for surface passivation for cdte devices is provided. The method includes adjusting a stoichiometry of a surface of a cdte material layer such that the surface becomes at least one of stoichiometric or cd-rich; and reconstructing a crystalline lattice at the surface of the cdte material layer by annealing the adjusted surface..
Alliance For Sustainable Energy, Llc


08/06/15
20150221803 

Monolithic multijunction power converter


Resonant cavity power converters for converting radiation in the wavelength range from 1 micron to 1.55 micron are disclosed. The resonant cavity power converters can be formed from one or more lattice matched gainnassb junctions and can include distributed bragg reflectors and/or mirrored surfaces for increasing the power conversion efficiency..
Solar Junction Corporation


08/06/15
20150221719 

Semiconductor body with strained monocrystalline region


A semiconductor body comprised of a semiconductor material includes a first monocrystalline region of the semiconductor material having a first lattice constant along a reference direction, a second monocrystalline region of the semiconductor material having a second lattice constant, which is different than the first, along the reference direction, and a third, strained monocrystalline region between the first region and the second region.. .
Lnfineon Technologies Austria Ag


08/06/15
20150221546 

Semiconductor diodes fabricated by aspect ratio trapping with coalesced films


A method of forming a photonic device that comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/06/15
20150221405 

Method and generating neutrons from metals under thermal shock


A method and apparatus for generating neutrons by inducing hydride-forming metals infused with hydrogen isotopes to undergo rapid phase transitions. Such transitions are induced by exposing the metals to rapid temperature changes.
The Curators Of The University Of Missouri


08/06/15
20150219862 

Ferrule of multilayer waveguide connector


A ferrule for a multilayer waveguide connector includes a face having mechanical alignment slots arranged in a bidirectional lattice structure, the mechanical alignment slots including first slots disposed in a first direction, the first slots configured to respectively receive one end of waveguide layers, and second slots disposed in a second direction different from the first direction, the second slots configured to respectively receive protrusions transverse from a main surface of the waveguide layers.. .
International Business Machines Corporation


08/06/15
20150219859 

Ferrule of multilayer waveguide connector


A ferrule for a multilayer waveguide connector includes a face having mechanical alignment slots arranged in a bidirectional lattice structure, the mechanical alignment slots including first slots disposed in a first direction, the first slots configured to respectively receive one end of waveguide layers, and second slots disposed in a second direction different from the first direction, the second slots configured to respectively receive protrusions transverse from a main surface of the waveguide layers.. .
International Business Machines Corporation


08/06/15
20150218840 

Modular tower for a wind power plant


The invention relates to a tower of a wind power plant, having a lower part in the form of a lattice tower or truss tower with at least two corner bars, and an upper part in the form of a cross-sectionally substantially round tubular tower, wherein each particular corner bar is put together from a plurality of steel tube profiles that are connected together in the longitudinal direction. In order to achieve good transportability and easier assembly of the components of such a tower, the invention proposes a modular tower concept.
Thyssenkrupp Steel Europe Ag


08/06/15
20150218796 

Foundation for a wind turbine


An openwork load-bearing structure for a wind turbine, in particular a lattice-tower structure for a wind turbine, in particular a foundation structure for a wind turbine, in particular for anchoring an offshore wind turbine in the ground via driven foundation piles, wherein the openwork load-bearing structure has primary structures, via which loads which occur in the load-bearing structure as a result of the wind turbine are dissipated, and secondary structures, which perform functional, rather than load-dissipating, tasks, wherein the secondary structures are arranged on the primary structures and are connected integrally thereto, and wherein the integral connection between the primary and the secondary structures is in the form of a connecting layer arranged therebetween. Also, a method for producing a lattice-tower structure for a wind turbine, in particular a foundation structure for a wind turbine, in particular for anchoring an offshore wind turbine in the ground via foundation piles..
Senvion Se


07/30/15
20150214470 

Piezoelectric element, manufacturing piezoelectric element, and electronic apparatus


A piezoelectric element includes a piezoelectric material portion. The piezoelectric material portion is made of a piezoelectric ceramic that includes a perovskite-type metal oxide including barium titanate and mn and that has residual polarization.
Canon Kabushiki Kaisha


07/30/15
20150214469 

Piezoelectric ceramic, manufacturing the same, piezoelectric element, and electronic apparatus


A piezoelectric ceramic includes a perovskite-type metal oxide containing barium titanate, and mn. When a surface thereof along the remanent polarization direction is subjected to x-ray diffraction analysis at room temperature, the ratio of the diffraction intensity of the (002) plane to the diffraction intensity of the (200) plane is 1.0 or more, the diffraction peak of the (002) plane has a half width of 1.2° or less, and the lattice constant of the c-axis thereof and the lattice constant of the a-axis thereof satisfy the relationship 1.004≦c/a≦1.010..
Canon Kabushiki Kaisha


07/30/15
20150214412 

Lattice matchable alloy for solar cells


An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 ev, namely, ga1-xinxnyas1-y-zsbz with a low antimony (sb) content and with enhanced indium (in) content and enhanced nitrogen (n) content, achieving substantial lattice matching to gaas and ge substrates and providing both high short circuit currents and high open circuit voltages in gainnassb subcells for multijunction solar cells. The composition ranges for ga1-xinxnyas1-y-zsbz are 0.07≦x≦0.18, 0.025≦y≦0.04 and 0.001≦z≦0.03..
Solar Junction Corporation


07/30/15
20150214403 

Ultrathin group ii-vi semiconductor layers, group ii-vi semiconductor superlattice structures, photovoltaic devices incorporating the same, and related methods


Disclosed are ultrathin layers of group ii-vi semiconductors, group ii-vi semiconductor superlattice structures, photovoltaic devices incorporating the layers and superlattice structures and related methods. The superlattice structures comprise an ultrathin layer of a first group ii-vi semiconductor alternating with an ultrathin layer of at least one additional semiconductor, e.g., a second group ii-vi semiconductor, or a group iv semiconductor, or a group iii-v semiconductor..
University Of Kansas


07/30/15
20150214402 

Light receiving element and solar cell including light receiving element


A light receiving element includes a p-type semiconductor layer, an n-type semiconductor layer, and a first and a second superlattice semiconductor layers, and the first and the second superlattice semiconductor layers each have a superlattice structure in which a barrier layer and a quantum dot layer are alternately and repeatedly stacked. A band structure of the superlattice structure of the first superlattice semiconductor layer is a type i structure, and that of the second superlattice semiconductor layer is a type ii structure.
Sharp Kabushiki Kaisha


07/30/15
20150214368 

Embedded source or drain region of transistor with laterally extended portion


In some embodiments, in a method, a body structure with a gate structure configured thereon is provided. The gate structure comprises a gate side wall traversing the body structure.
Taiwan Semiconductor Manufacturing Company Ltd.


07/30/15
20150214366 

Embedded source or drain region of transistor with downward tapered region under facet region


In some embodiments, a field effect transistor (fet) structure comprises a body structure, dielectric structures, a gate structure and a source or drain region. The gate structure is formed over the body structure.
Taiwan Semiconductor Manufacturing Company Ltd.


07/30/15
20150214364 

Fin field effect transistor including a strained epitaxial semiconductor shell


A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces.
International Business Machines Corporation


07/30/15
20150214351 

Semiconductor device including superlattice sige/si fin structure


A semiconductor device includes a semiconductor-on-insulator substrate having an insulator layer, and at least one silicon germanium (sige) fin having a superlattice structure. The sige fin is formed on an upper surface of the insulator layer.
International Business Machines Corporation


07/30/15
20150214275 

Magnetic tunnel junction with superlattice barriers


A magnetic tunnel junction is provided. The magnetic tunnel junction can enhance the tunnel magnetoresistance ratio and a device including the magnetic tunnel junction.
National Taiwan University


07/30/15
20150214157 

Ultrathin superlattice of mno/mn/mnn and other metal oxide/metal/metal nitride liners and caps for copper low dielectric constant interconnects


An electrical device comprising including an opening in a low-k dielectric material, and a copper including structure present within the opening for transmitting electrical current. A liner is present between the opening and the copper including structure.
International Business Machines Corporation


07/30/15
20150214050 

Nanowire article and processes for making and using same


A nanowire article includes a substrate; a plurality of nanowires disposed on the substrate, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table; and a superlattice layer interposed between the substrate and the plurality of gallium nitride nanowires. A process for producing a nanowire article includes disposing a superlattice layer on a substrate; disposing a first buffer layer on the superlattice layer; contacting the first buffer layer with a precursor; and forming a plurality of nanowires from the precursor on the first buffer layer to form the nanowire article, the nanowires comprising a semiconductor nitride, the semiconductor comprising an element selected from group 3 of the periodic table.
National Institute Of Standards And Technology


07/30/15
20150213927 

Iron-silicon oxide particles having an improved heating rate


D) the core has lattice plane spacings of 0.20 nm, 0.25 nm and 0.29 nm, in each case +/−0.02 nm, determined by means of hr-tem.. .

07/30/15
20150212622 

Touch panel substrate and display device


A touch panel substrate used for a touch panel with enhanced display quality is realized. A touch panel substrate (2) in accordance with one aspect of the invention includes a first detection electrode (11) including a plurality of first lattice electrodes (13) aligned in a lateral direction.
Sharp Kabushiki Kaisha


07/30/15
20150210581 

Regenerator for glass melting tanks


A regenerator for glass melting tanks for storing waste heat from combustion cycles and emitting the stored heat to oxidation gases supplied from the outside, having a gas-permeable chamber lattice in which the chamber lining is made of fire-resistant stones held together by lateral wall elements. A cover region is situated over the chamber lattice for the combustion gases entering into the chamber lattice and for the oxidation gases exiting from the chamber lattice, the chamber cover forming a flow duct together with a further cover segment, connected to the cover, limited by a downward-extending terminating wall that is connected to the burner throat and with the wall element.
Beteiligungen Sorg Gmbh & Co. Kg


07/30/15
20150209767 

Phosphorus-containing ultrastable y-type rare earth molecular sieve and preparation method therefor


Provided is a phosphorus-containing ultrastable y-type rare earth (re) molecular sieve and the preparation method thereof. The method is: based on na y molecular sieve as a raw material, obtaining “one-exchange one-roast” re-na y-type molecular sieve through the steps of exchanging with re, pre-exchanging with dispersing, and the first calcination; and then performing ammonium salt exchange, phosphorus modification, and the second calcination on the “one-exchange one-roast” re-na y-type molecular sieve, wherein the sequence of the re exchange and the pre-exchange with dispersing is unlimited, and the sequence of the ammonium salt exchange and the phosphorus modification is unlimited as well.
Petrochina Company Limited


07/30/15
20150209253 

Oral care and oral hygiene products having photocatalytic activity comprising inorganic particles superficially functionalised with tio2 nanoparticles


The present invention refers to oral care and oral hygiene products having photocatalytic activity comprising particles of a calcium phosphate compound, superficially functionalised with tio2 nanoparticles in crystalline form, said tio2 nanoparticles having: a) a substantially lamellar morphology; b) an aspect ratio (ar) comprised between 5 and 30; c) a surface structure having face (001) as outermost face of the crystalline lattice; and d) wherein the tio2 is in the form of anatase, optionally mixed with rutile and/or brookite.. .
Coswell S.p.a


07/30/15
20150209140 

Stented prosthetic heart valve with variable stiffness and methods of use


A prosthetic heart valve including a stent frame and a valve structure. The valve structure is disposed within a lumen of the stent frame.
Medtronic Vascular Galway


07/23/15
20150208261 

Method and analyzing interference in time-space dimensions


Disclosed herein are a method and apparatus for analyzing interference in the time-space dimensions. The apparatus includes an evaluation area partition unit configured to partition an evaluation area into lattices in order for a receiver to determine whether a permitted interference level at which interference needs to be accepted is satisfied or not and an interference analysis unit configured to spatially evaluate the amount of interference in each of the lattices based on a result of temporal evaluation of the amount of interference in each of the lattices..
Electronics And Telecommunications Research Institute


07/23/15
20150207034 

Semiconductor light emitting device


A semiconductor light emitting device may include a base semiconductor layer formed on a substrate and having defect regions therein; cavities disposed in regions corresponding to the defect regions on the base semiconductor layer; a capping layer disposed to cover at least one region of the base semiconductor layer and the cavities; and a light emitting structure disposed on the capping layer and including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. lattice defects formed in the light emitting structure may be reduced to enhance luminous efficiency..
Samsung Electronics Co., Ltd.


07/23/15
20150207029 

Superlattice structure


A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s).
Sensor Electronic Technology, Inc.


07/23/15
20150206970 

Body-tied, strained-channel multi-gate device and methods of manufacturing same


A fin-fet or other multi-gate transistor is disclosed. The transistor comprises a semiconductor substrate having a first lattice constant, and a semiconductor fin extending from the semiconductor substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.


07/23/15
20150206956 

Semiconductor device and manufacturing the same


A method of manufacturing a semiconductor device includes forming an active pattern protruding from a semiconductor substrate, forming a dummy gate pattern crossing over the active pattern, forming gate spacers on opposite first and second sidewalls of the dummy gate pattern, removing the dummy gate pattern to form a gate region exposing an upper surface and sidewalls of the active pattern between the gate spacers, recessing the upper surface of the active pattern exposed by the gate region to form a channel recess region, forming a channel pattern in the channel recess region by a selective epitaxial growth (seg) process, and sequentially forming a gate dielectric layer and a gate electrode covering an upper surface and sidewalls of the channel pattern in the gate region. The channel pattern has a lattice constant different from that of the semiconductor substrate..
Samsung Electronics Co., Ltd.


07/23/15
20150206939 

Epitaxy in semiconductor structure and menufacuting the same


The present disclosure provides a semiconductor structure having an insulating layer positioning on a substrate; a semiconductor fin partially located in the insulating layer; and a metal gate over the semiconductor fin and the insulating layer. The semiconductor fin includes a first region including a first lattice constant and a second region in proximity to the metal gate, including a second lattice constant.
Taiwan Semiconductor Manufacturing Company Ltd.


07/23/15
20150206760 

Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate


A method of forming a pattern on a substrate comprises forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Sidewall lining is formed over inner and over outer sidewalls of the cylinder-like structures, and that forms interstitial spaces laterally outward of the cylinder-like structures.
Micron Technology, Inc.


07/23/15
20150204924 

Computationally screening the stability of battery electrode materials with mixtures of redox couple elements


A mixture stability criterion asserts that a mixture of at least two redox elements in a crystal lattice will be unstable during charge and discharge cycles unless a set of charged ground state configurations at a specified value of a mixing ratio for the redox elements and a set of discharged ground state configurations at the same value of mixing ratio both consist of the same derivative superstructures. All members of the charged ground state set and all members of the discharged ground state set are within a same energy threshold value of the lowest-energy member of each set.
Samsung Electronics Co., Ltd.


07/23/15
20150204074 

Point-supported element or flat concrete ceiling


The invention relates to a point-supported element or flat concrete ceiling (bd) that comprises a transverse force and punching reinforcement (b) into which a lattice beam (1) that tapers on a support vertical axis (a) is integrated, wherein the lattice beam comprises lower chords (u) and a continuous upper chord (o) or anchoring elements (10) arranged with open spaces (z) between one another and at least one serpentine diagonal strut section (d) with upper and lower bent portions (11, 12) between each two successive diagonal struts (s1, s2), said bent portions being secured in securing points (so, su). The diagonal struts (s1, s2) are angled in the same manner upwards and in the direction of the support (t).
Filigran Tragersysteme Gmbh & Co.kg


07/16/15
20150200321 

Directly bonded, lattice-mismatched semiconductor device


A semiconductor device may include a first subassembly and a second subassembly. The first subassembly may include a first bonding layer.
The Boeing Company


07/16/15
20150200246 

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication


Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


07/16/15
20150200105 

Production method


A production methods includes providing a substrate including a lattice plane that extends in a non-symmetrical manner and such that it is offset at an angle α from at least a first or second main surface region of the substrate, the first and second main surface regions extending parallel to each other; anisotropic etching, starting from the first main surface region, into the substrate so as to obtain an etching structure which includes, in a plane extending perpendicularly to the first main surface region, two different etching angles relative to the first main surface region; arranging a cover layer on the first main surface region, so that the cover layer lies against the etching structure in at least some sections; and removing, section-by-section, the material of the substrate starting from the second main surface region in the area of the deformed cover layer, so that the cover layer is exposed in at least one window region.. .
Fraunhofer-gesellschaft Zur Foerderung Der Angewandten Forschung E.v.


07/16/15
20150199582 

Character recognition apparatus and method


According to one embodiment, a character recognition apparatus includes a first generation unit, an estimation unit, a second generation unit and a search unit. The first generation unit generates a user dictionary that a preferred character is registered.
Kabushiki Kaisha Toshiba


07/16/15
20150198845 

Display device


A display device includes a first base substrate, a second base substrate, pixels, a first polarizer, and a second polarizer. The first base substrate includes light transmitting areas and a light blocking area surrounding each of the light transmitting areas.
Samsung Display Co., Ltd.


07/16/15
20150198764 

High-birefringence hollow-core fibers and techniques for making same


A hollow core fiber has a cladding comprising a matrix of cells, wherein each cell comprises a hole and a wall surrounding the hole. The fiber further has a hollow core region comprising a core gap in the matrix of cells, wherein the core gap spans a plurality of cells and has a boundary defined by the interface of the core gap.
Ofs Fitel, Llc


07/16/15
20150198530 

Method for producing optically stimulated luminescene dosage detection crystal


A method for producing an optically stimulated luminescene (osl) dosage detection crystal is disclosed, where an al2o3 is first covered with carbon. The carbon atoms are diffused then in vacuum into the al2o3 lattices.

07/16/15
20150198477 

Device for detecting single photon available at room temperature and method thereof


Disclosed are a device for detecting a single photon available at a room temperature, which includes: a signal transmitting unit including a first electrode and a second electrode spaced apart from each other and at least one nanostructure disposed between the first electrode and the second electrode, the first electrode receiving a signal from the signal generating unit; a photonic crystal lattice structure for receiving a photon, the photonic crystal lattice structure having an optical waveguide for guiding the received photon to the first electrode, the optical waveguide being formed by a plurality of dielectric structures; and a single photon detector for detecting a photon by analyzing a signal output to the second electrode, and a method for detecting a single photon using the device.. .
Korea Institute Of Science And Technology


07/09/15
20150194985 

Encoding device and generating message matrix


A method for arranging a plurality of message blocks in a lattice form and generating a message matrix includes deciding lengths of rows of the message matrix such that a length difference is equal to or less than a first critical point, deciding lengths of the message blocks such that a length difference is equal to or less than a second critical point, and arranging the message blocks in each row of the message matrix such that a length difference of columns of the message matrix is equal to or less than a third critical point.. .
Korea Advanced Institute Of Science And Technology


07/09/15
20150194972 

Optical lattice clock, clock device and laser light source


Various embodiments improve accuracy by increasing the number of atoms engaged in a clock transitions in an optical lattice clock. An exemplary optical lattice clock an embodiment comprises an optical waveguide, an optical path, a laser light source, and a laser cooler.
Riken


07/09/15
20150194666 

Methods of making metal-doped nickel oxide active materials


Methods of making high-energy cathode active materials for primary alkaline batteries are described. The primary batteries include a cathode having an alkali-deficient nickel(iv)-containing oxide including one or more metals such as co, mg, al, ca, y, mn, and/or non-metals such as b, si, ge or a combination of metal and/or non-metal atoms as dopants partially substituted for ni and/or li in the crystal lattice; an anode; a separator between the cathode and the anode; and an alkaline electrolyte solution..
The Gillette Company


07/09/15
20150194526 

Method for manufacturing semiconductor device with recess, epitaxial growth and diffuson


A semiconductor device including a gate electrode disposed on a semiconductor substrate and source/drain regions disposed at both sides of the gate electrode, the source/drain regions being formed by implanting impurities. The source/drain regions include an epitaxial layer formed by epitaxially growing a semiconductor material having a different lattice constant from that of the semiconductor substrate in a recessed position at a side of the gate electrode, and a diffusion layer disposed in a surface layer of the semiconductor substrate..
Sony Corporation


07/09/15
20150194307 

Strained fin structures and methods of fabrication


Methods for fabricating a strained fin structure are provided which include: providing a virtual substrate material over a substrate structure, the virtual substrate material having a virtual substrate lattice constant and a virtual substrate lattice structure; providing a first material over a region of the virtual substrate material, the first material acquiring a strained first material lattice structure by, in part, conforming to the virtual substrate lattice structure; and etching a first fin pattern into the first material. The method may include providing a second material over a second region of the virtual substrate material, the second material acquiring a strained lattice structure by, in part, conforming to the virtual substrate lattice structure, and etching a fin pattern into the second material.
Globalfoundries Inc.


07/09/15
20150194150 

System and handling repeat queries due to wrong asr output by modifying an acoustic, a language and a semantic model


Disclosed herein are systems, computer-implemented methods, and computer-readable storage media for handling expected repeat speech queries or other inputs. The method causes a computing device to detect a misrecognized speech query from a user, determine a tendency of the user to repeat speech queries based on previous user interactions, and adapt a speech recognition model based on the determined tendency before an expected repeat speech query.
At&t Intellectual Property I, L.p.




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Lattice topics: Semiconductor, Semiconductor Device, Semiconductor Material, Crystallin, Disconnect, Transistors, Replacement Gate, Semiconductor Devices, Dislocations, Dislocation, Image Processing, Coordinates, Surface Plasmon Polariton, Antenna Array

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