|| List of recent Lattice-related patents
|Fusion cage implant with lattice structure|
Various exemplary embodiments relate to a spinal implant for insertion between two vertebrae including one or more of the following: a cage comprising: a frame including a fastener hole, a lattice structure disposed within the frame and exposed on a top and bottom face of the frame to permit bone growth into the lattice structure, and an inner rim disposed between the lattice structure and a through bore extending through the cage; a bone plate comprising a through hole, and a first and a second screw hole, wherein the first and second screw hole are positioned to overlie the vertebrae when the bone plate is attached to the cage and the cage is inserted between the two vertebrae; and a fastener operable to attach the bone plate to the cage when the fastener is inserted through the through hole of the bone plate and into the fastener hole of the frame.. .
The stent of this invention is a self-expanding stent created by a scaffolding lattice. The stent may be made from a nickel-titanium alloy.
|Apparatus for measuring brain local activity|
A magnitude of a current component in x direction, y direction or z direction, or a composite current of the current components in x direction, y direction and z direction, estimated from scalp potentials outputted from sensors mounted on a head of a subject, predetermined coordinates of lattice points preset in a standard brain, and predetermined coordinates of the sensors is determined. A normalized power variance (npv) and its mean value are determined with fourier coefficients determined from the magnitude of the current component or the composite current.
|Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication|
Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.. .
The invention provides a process for preparing a core-shell capsule comprising the steps of (i) mixing a solid active ingredient and/or an oily liquid active ingredient with a polymeric material capable of forming a hydrogel shell around the active ingredient(s), (ii) forming a shell comprising a hydrogel scaffold formed of a polymeric lattice around the core, (iii) optionally cross-linking the polymeric lattice; and (iv) contacting the optionally cross-linked core-shell hydrogel shell with a liquid silica precursor so as to cause precipitation of silica within the scaffold structure thereby forming a composite shell of silica interspersed between the polymeric lattice.. .
|Titanium based ceramic reinforced alloy for use in medical implants|
A titanium based, ceramic reinforced alloy ingot for use in producing medical implants. An ingot is formed from an alloy having comprising from about 5 to about 35 wt.
|Solid-state imaging device, method for manufacturing solid-state imaging device, and electronic apparatus|
A solid-state imaging device with a pixel region in which a plurality of pixels with photoelectric conversion films are arrayed and pixel isolation portions are interposed between the plurality of pixels. The photoelectric conversion film is a chalcopyrite-structure compound semiconductor composed of a copper-aluminum-gallium-indium-sulfur-selenium based mixed crystal or a copper-aluminum-gallium-indium-zinc-sulfur-selenium based mixed crystal, and is disposed on a silicon substrate in such a way as to lattice-match the silicon substrate concerned.
|Strain-inducing semiconductor regions|
A method to form a strain-inducing semiconductor region is described. In one embodiment, formation of a strain-inducing semiconductor region laterally adjacent to a crystalline substrate results in a uniaxial strain imparted to the crystalline substrate, providing a strained crystalline substrate.
|Oxide semiconductor thin film transistor, manufacturing method, and display device thereof|
An oxide semiconductor thin film transistor, a manufacturing method and a display device thereof are disclosed. An oxide semiconductor thin film transistor comprises a gate insulating layer (22), an oxide semiconductor layer (24) and a blocking layer (25), wherein a first transition layer (23) is formed between the gate insulating layer (22) and the oxide semiconductor layer (24), the oxygen content of the first transition layer (23) is higher than the oxygen content of the oxide semiconductor layer (24).
|Electroluminescent light emission device comprising an optical lattice structure and method for manufacturing same|
A light emission device includes a substrate and a layer arrangement applied onto the substrate. The layer arrangement has a first electrode layer made of a conductive material and a second electrode layer made of a conductive material.
|Group iii nitride semiconductor light-emitting element|
A group iii nitride semiconductor light-emitting element provided with: a semiconductor layer obtained by laminating a first semiconductor layer of a first conduction type, a light-emitting layer, and a second semiconductor layer of an opposite second conduction type; a first electrode connected to the first semiconductor layer; and a second electrode provided on the surface of the second semiconductor layer; the light-emitting layer including a first gallium indium nitride layer of a first indium composition, disposed on a side opposite the light extraction direction; a second gallium indium nitride layer of a second indium composition less than the first, disposed on the light extraction direction side from the first gallium indium nitride layer; and an intermediate layer containing a material of a smaller lattice constant than the materials constituting the first and second gallium indium nitride layers, provided between the first and second gallium indium nitride layers.. .
|Plasma etch resistant films, articles bearing plasma etch resistant films and related methods|
The invention includes a plasma etch-resistant film for a substrate comprising a yttria material wherein at least a portion of the yttria material is in a crystal phase having a crystal lattice structure, wherein at least 50% of the yttria material is in a form of a monoclinic crystal system. The film may be treated by exposure to a fluorine gas plasma.
|Phosphor and light emitting device|
A phosphor and a light emitting device including the phosphor may be provided that emits light having a peak wavelength between a green wavelength band and a yellow wavelength band and has a triclinic system crystal structure of which the chemical formula is msi2n2o2, m═caxsryeuz(x+y+z=1), wherein, when three sides of a unit crystal lattice of the crystal structure are a, b and c and corner angles are α, β and γ, the crystal structure has relationships of a≠b≠c and α≠β≠γ, and wherein, in a, b and c, any one of them is more than twice as much as one of the other two, and the values of the other two are so similar that they do not exceed the double of each.. .
|Nitride semiconductor device|
A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor stacked layer, a light-emitting layer and a second type nitride semiconductor layer. The nucleation layer is disposed on the silicon substrate.
|Epitaxial buffer layers for group iii-n transistors on silicon substrates|
Embodiments include epitaxial semiconductor stacks for reduced defect densities in iii-n device layers grown over non-iii-n substrates, such as silicon substrates. In embodiments, a metamorphic buffer includes an alxin1-xn layer lattice matched to an overlying gan device layers to reduce thermal mismatch induced defects.
|Method of hybrid stacked chip for a solar cell|
A method of hybrid stacked chip for a solar cell onto which semiconductor layers of different materials is provided by stacking tunnel layer and bumps in order to solve the problem of lattices mismatch between the layers for further increasing of the efficiency of solar cell. Electric charges (i.e., current) generated by respective solar cells can be outputted by means of contacts.
|Magnetic seed layer|
An apparatus includes a disk substrate and a soft underlayer overlying the disk substrate. A magnetic seed layer overlies the soft underlayer, wherein the magnetic seed layer is formed by a hexagonal close-packed lattice material and has in-plane magnetic anisotropy..
|Image capturing element capturing stereoscopic moving image and planar moving image and image capturing apparatus equipped with the same|
A plurality of pixels 2 are arranged in a square lattice form, the color filters of rgb are arranged in a bayer arrangement and a pair of a first phase difference detection pixel 3 which acquires a captured image signals for a right eye and a second phase difference detection pixel 4 which acquires a captured image signals for a left eye are provided on discrete and periodic positions in the square lattice form, the first phase difference detection pixel 3 is provided among the respective pixels of the square lattice form at 2n+1-pixel (n=1, 2, . .
|Methods of containing defects for non-silicon device engineering|
An apparatus including a device including a channel material having a first lattice structure on a well of a well material having a matched lattice structure in a buffer material having a second lattice structure that is different than the first lattice structure. A method including forming a trench in a buffer material; forming an n-type well material in the trench, the n-type well material having a lattice structure that is different than a lattice structure of the buffer material; and forming an n-type transistor.
A semiconductor apparatus includes: a substrate; a buffer layer formed on the substrate; a strained layer superlattice buffer layer formed on the buffer layer; an electron transit layer formed of a semiconductor material on the strained layer superlattice buffer layer; and an electron supply layer formed of a semiconductor material on the electron transit layer; the strained layer superlattice buffer layer being an alternate stack of first lattice layers including aln and second lattice layers including gan; the strained layer superlattice buffer layer being doped with one, or two or more impurities selected from fe, mg and c.. .
A semiconductor apparatus includes a buffer layer formed on a substrate; an sls (strained layer supperlattice) buffer layer formed on the buffer layer; an electron transit layer formed on the sls buffer layer and formed of a semiconductor material; and an electron supply layer formed on the electron transit layer and formed of a semiconductor material. Further, the buffer layer is formed of algan and includes two or more layers with different al composition ratios, the sls buffer layer is formed by alternately laminating a first lattice layer including aln and a second lattice layer including gan, and the al composition ratio in one of the layers of the buffer layer being in contact with the sls buffer layer is greater than or equal to an al effective composition ratio in the sls buffer layer..
|Method for producing group iii nitride semiconductor light-emitting device|
The present invention provides a method for producing a group iii nitride semiconductor light-emitting device wherein a p-cladding layer has a uniform mg concentration. A p-cladding layer having a superlattice structure in which algan and ingan are alternately and repeatedly deposited is formed in two stages of the former process and the latter process where the supply amount of the mg dopant gas is different.
|Offshore foundation for wind energy installations|
Pursuant to the invention, we propose that the latticework structure (4) be assembled from multiple, prefabricated latticework segments (6, 8, 10, 12), where each latticework segment (6, 8, 10, 12) has six corners (3) that can be attached to the corners (3) of another latticework segment (6, 8, 10, 12).. .
|Nuclear fuel assembly tie plate, upper nozzle and nuclear fuel assembly comprising such a tie plate|
A nuclear fuel assembly tie plate is provided. The nuclear fuel assembly tie plate is formed by intersecting strips delimiting between them tubular guide cells each for allowing a fuel rod to extend through the tie plate.
|Light source device|
A filament of simple structure showing improved conversion efficiency is provided. There is provided a light source device comprising a light-transmitting gas-tight container, a filament disposed in the light-transmitting gas-tight container, and a lead wire for supplying an electric current to the filament, wherein the filament consists of a single crystal.
|Contact structure of semiconductor device|
The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an inter-layer dielectric (ild) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and a metal layer filling a coated opening of the dielectric layer..
A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, ga-face grown, lattice relaxed, and having a composition in1-zalzn (0≦z≦1), a channel layer having a composition of: alxga1-xn (0≦x≦1) or inyga1-yn (0≦y≦1). Or gan provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode..
|Nitride compound semiconductor device and manufacturing method thereof|
A nitride compound semiconductor device includes: a substrate; a buffer layer formed on the substrate and including a plurality of composite layers each layered of: a first layer formed of a nitride compound semiconductor; and a second layer formed of a nitride compound semiconductor containing aluminum and having a lattice constant smaller than a lattice constant of the first layer; a semiconductor operating layer formed on the buffer layer; and a plurality of electrodes formed on the semiconductor operating layer. At least one of the second layers has oxygen added therein..
|Nitride semiconductor wafer, nitride semiconductor device, and method for manufacturing nitride semiconductor wafer|
A nitride semiconductor wafer includes a silicon substrate, a stacked multilayer unit, a silicon-containing unit, and an upper layer unit. The silicon substrate has a major surface.
|Group iii nitride semiconductor light-emitting device and method for producing the same|
The invention provides a group iii nitride semiconductor light-emitting device in which the strain in the light-emitting layer is relaxed, thereby attaining high light emission efficiency, and a method for producing the device. The light-emitting device of the present invention has a substrate, a low-temperature buffer layer, an n-type contact layer, a first esd layer, a second esd layer, an n-side superlattice layer, a light-emitting layer, a p-side superlattice layer, a p-type contact layer, an n-type electrode n1, a p-type electrode p1, and a passivation film f1.
|Hybrid tower structure and method for building the same|
A hybrid tower structure (1), and a method for building the same, which tower structure includes a lower portion (3) in form of a lattice structure (8, 9), an upper portion (5) with continuous outer surface, and an adapter construction (4) between the lower and upper portions, wherein the tower structure (1) further includes plurality of stay cables (6) connected to the tower structure, and that the lower portion (3) of the tower structure has a hollow cross-section through its length where the load bearing lattice structure (8, 9) extends only on the circumference of the cross section, and the lattice structure is formed from hollow steel profiles.. .
|Primary dressing for moist wound healing, and method for producing said primary dressing|
The invention relates to a primary dressing for moist wound healing with a reduced risk of inflammation. The elastic primary dressing according to the invention for moist wound healing is in the form of a lattice or a netting made of elongated elastic bodies, said lattice or netting containing non-resorbable elongated bodies that consist of silicone and optionally at least one additive selected from active pharmacological ingredients, collagens, hydrocolloids, and/or dyes.
|Weather protection device|
The invention relates to a weatherproofing arrangement having a textile sheet material which forms a screen against the effects of weather, in particular against solar radiation and/or rain, and has warp threads and weft threads connected to one another in the manner of latticework. In order to achieve particular protective functions, it is proposed for the warp threads and weft threads to bound elongate-rectangular latticework openings, wherein the length of these openings is at least 10 times the width thereof, and wherein the width of the openings is from between 0.1 and 0.001 mm.
|Method for manufacturing a semiconductor structure|
According to an embodiment, a method for manufacturing a semiconductor structure includes providing a first monocrystalline semiconductor portion having a first lattice constant in a reference direction and forming a second monocrystalline semiconductor portion having a second lattice constant in the reference direction, which is different to the first lattice constant, on the first monocrystalline semiconductor portion.. .
|Method for the production of a lattice part made of metal|
We describe a lattice part made of metal and a method for producing a lattice part made of metal or a metal alloy. The lattice has a thickness of less than 1 mm at a size of the gaps of less than 50 mm2.
|Adaptive two-dimensional channel interpolation|
A method and apparatus for improving channel estimation within an ofdm communication system. Channel estimation in ofdm is usually performed with the aid of pilot symbols.
|Image display device and display unit for image display device|
To provide an image display device in which the number of pixels of arranged light emitting elements or the like can be reduced and the cost can be drastically reduced while image degradation is minimized, and a display unit used therefor. In an image display device in which plural display units including pixels formed by light emitting elements or the like are arranged in a plane, the display unit is configured by two-dimensionally arranging lattice-shaped pixel groups formed by providing pixels in locations corresponding to three lattice points of a square lattice, respectively, and forming a space area in which no pixel exists in a location corresponding to the remaining lattice point..
|Tunable photonic crystal color filters and color image display devices|
Tunable photonic crystal color filters, and color image display devices including the same, include a first electrode, a second electrode facing the first electrode, a medium between the first electrode and the second electrode, nano particles distributed in the medium in a lattice structure and charged, and an ion spread preventing layer over a surface of at least one of the first electrode and the second electrode.. .
|Boolean logic in a state machine lattice|
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable boolean logic cell that may be programmed to perform various logic functions on a data stream.
|Integrated electric field processor emitter matrix & electric field processor emitters & mobile emitters for use in a field matrix|
A plurality of field emitting conductors placed in various matrix, mesh, grid, lattice patterns, and on board pluralities of autonomous vehicular like on wire or unteathered free ranging micro-robots wherein the field emitters are charged and modulated with a plurality of timing algorithms and electric circuitry which produce a three dimensional electric field shape or a plurality of shapes or plurality of duplicate electric field shapes which are animated or moved through space in a sequence, in unison or in wavelike patterns or evolved to different shapes or quickly changed to a new shape. The field emitter voltage can be raised or lowered to depict, render or facilitate motion in a direction or its opposite charge direction.
|Si-ge-sn on reo template|
An electronic device includes iv material grown on a silicon substrate. The device includes a crystalline silicon substrate and a rare earth structure epitaxially grown on the silicon substrate.
|Iv material photonic device on dbr|
A photonic structure including a substrate of either crystalline silicon or germanium and a multilayer distributed bragg reflector (dbr) positioned on the substrate. The dbr includes material substantially crystal lattice matching the dbr to the substrate.
|Nitride semiconductor device|
A nitride semiconductor device used chiefly as an ld and an led element. In order to improve the output and to decrease vf, the device is given either a three-layer structure in which a nitride semiconductor layer doped with n-type impurities serving as an n-type contact layer where an n-electrode is formed is sandwiched between undoped nitride semiconductor layers; or a superlattice structure of nitride.
|Rotating tower crane|
The present invention relates to a tower crane with a tower of at least one tower element, in particular lattice piece, and a structural guying with at least one guy rod for the horizontal anchorage of the tower at a structure, wherein the at least one guy rod of the structural guying is attached or attachable to an attachment point of the tower element.. .
|Collapsible lattice beam, truss and construction including such a beam|
A preassembled lattice beam formed by a lower rib and an upper rib interconnected by at least one diagonal attached such as to be able to pivot between a transport position and a mounting position, said beam having at least one stationary upright connecting the lower and upper ribs at a right angle in said mounting position.. .
|Flexible vascular occluding device|
A vascular occluding device for modifying blood flow in a vessel, while maintaining blood flow to the surrounding tissue. The occluding device includes a flexible, easily compressible and bendable occluding device that is particularly suited for treating aneurysms in the brain.
|Conductive sheet and touch panel|
In this conductive sheet and touch panel, a first conductive pattern has a band-shaped section extending in the y-direction; a second conductive pattern has a plurality of electrode sections that are each connected in the x-direction by a connection section; the first conductive pattern and the second conductive pattern are both configured combining a first lattice and a second lattice (having a size larger than that of the first lattice); the facing portions of each of the band-shaped section of the first conductive pattern and the connection section of the second conductive pattern are configured from a plurality of second lattices; and when seen from the upper surface, the facing portions of the band-shaped section and the connection section have a form combining a plurality of first lattices.. .
|Method of making a golf ball with lattice reinforced layer|
Methods of making a golf ball that includes a lattice reinforced layer, which is a layer made of at least two materials with different properties, includes various injection and compression molding steps. In some embodiments, the lattice reinforced layer is manufactured using a shutoff molding technique so that the entire lattice reinforced layer is molded in the same mold.
|Non-planar device having uniaxially strained semiconductor body and method of making same|
A method and a device made according to the method. The method comprises providing a substrate including a first material, and providing a fin including a second material, the fin being disposed on the substrate and having a device active portion, the first material and the second material presenting a lattice mismatch between respective crystalline structures thereof.
A multijunction photovoltaic device (300) is provided. The multijunction photovoltaic device (300) includes a substrate (301) and one or more intermediate sub-cells (303a-303c) coupled to the substrate (301).
A lattice girder for support of a tunnel structure includes coupling elements arranged on ends of the lattice girder. Each coupling element has two sheet-metal strips having each an end formed with a loop.
|Embedded planar source/drain stressors for a finfet including a plurality of fins|
Fin-defining mask structures are formed over a semiconductor material layer having a first semiconductor material and a disposable gate structure is formed thereupon. A gate spacer is formed around the disposable gate structure and physically exposed portions of the fin-defining mask structures are subsequently removed.
|Emitting device with compositional and doping inhomogeneities in semiconductor layers|
A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells.
|Magnetic recording medium and magnetic recording and reproducing apparatus|
A magnetic recording medium of the present invention includes an under layer formed on a substrate, and a magnetic layer, formed on the under layer, which contains an alloy having an l10-type crystal structure as a main component. The under layer includes, in order from the substrate side, a first under layer with a lattice constant a of 2.87 Å≦a<3.04 Å, a second under layer having a bcc structure with a lattice constant a of 3.04 Å≦a<3.18 Å, a third under layer having a bcc structure with a lattice constant a of 3.18 Å≦a<3.31 Å, and an upper under layer having a nacl-type crystal structure.
|Liquid crystal display device and method of manufacturing the same|
A liquid crystal display device and method of manufacturing a liquid crystal display device are provided. The liquid crystal display device includes: a thin film transistor substrate, a color filter substrate on the thin film transistor substrate, a transparent conductive plate on the color filter substrate, a pad portion on the thin film transistor substrate, a static-electricity transmission electrode on a region of the pad portion adjacent to the color filter substrate, a conductive member configured to electrically connect the transparent conductive plate and the static-electricity transmission electrode to each other, and a plurality of lattice patterns on the static-electricity transmission electrode..
|Conductive sheet and touch panel|
This conductive sheet and touch panel have a plurality of first conductive patterns arrayed in the x-direction. The first conductive patterns have: a band-shaped section extending in the y-direction; and a plurality of jutting sections that jut from the band-shaped section in both directions and are arrayed at a predetermined spacing along the y-direction.
|Conductive sheet and touch panel|
The present invention pertains to a counductive sheet and a touch panel. A first conductive pattern and a second conductive pattern are both configured from the combination of a plurality of first lattices and a plurality of second lattices having a size that is larger than that of the first lattices.
|Handwriting input system|
Dot mark decoding circuitry sets an initial value of a relative position of each of dot marks with respect to a corresponding lattice point; and then sequentially executes, in repetition, a calculation process of calculating a projective transformation matrix based on a position of each dot mark in a pixel coordinate system and a position obtained by adding the relative position to the position of a corresponding lattice point; a transformation process of transforming the position of each dot mark from the position in the pixel coordinate system to a position in a l coordinate system using the projective transformation matrix; a generation process of generating the relative position information based on the post-transformation position of each dot mark and the position of the corresponding lattice point; and an update process of updating the relative position in accordance with the relative position information.. .
|Nitride semiconductor wafer, nitride semiconductor device, and method for manufacturing nitride semiconductor wafer|
According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor.
|Protective cover for supporting mobile terminal in dual direction and multi angle|
A protective cover of a mobile terminal is provided. The protective cover for supporting a mobile terminal in a dual direction and a multi angle includes: the protective cover for housing the mobile terminal at the inside; and a support sheet mounted in a recess formed at an outer surface of the protective cover and spread based on a groove line formed in a lattice and having a portion close contacting with the protective cover and having the remaining portions spread from the protection cover and contacting with the ground and for supporting the mobile terminal.
|Compound semiconductor solar battery and method for manufacturing compound semiconductor solar battery|
A compound semiconductor solar battery including a first compound semiconductor photoelectric conversion cell (40a), a second compound semiconductor photoelectric conversion cell (40b) provided on the first compound semiconductor photoelectric conversion cell (40a), and a compound semiconductor buffer layer (41) provided between the first compound semiconductor photoelectric conversion cell (40a) and the second compound semiconductor photoelectric conversion cell (40b), the first compound semiconductor photoelectric conversion cell (40a) and the compound semiconductor buffer layer (41) being provided adjacent to each other, and a ratio of a difference in lattice constant between the first compound semiconductor photoelectric conversion cell (40a) and a compound semiconductor layer (30) provided in a position closest to the first compound semiconductor photoelectric conversion cell (40a) among compound semiconductor layers constituting the compound semiconductor buffer layer (41) being not less than 0.15% and not more than 0.74%, and a method for manufacturing the same are provided.. .
|Light-conducting component for constructions and buildings and also production process therefor|
A light-conducting component, in particular finished concrete part in the form of a masonry brick, for constructions and building. The component is produced in a casting mold by casting into at least one casting building material and the optical waveguide is made of a light-conducting building material, e.g.
|Interface pressure sensing mattress|
A patient support surface or mattress has a coverlet defining an interior region and a core situated in the interior region. An interface pressure sensing sheet assembly is provided in the interior region.