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Lattice patents



      

This page is updated frequently with new Lattice-related patent applications.




Date/App# patent app List of recent Lattice-related patents
07/21/16
20160211352 
 Method of trimming fin structure patent thumbnailnew patent Method of trimming fin structure
A method of trimming a fin structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy structure cladding the fin structure, in which the epitaxy structure has a first lattice plane with miller index (111), a second lattice plane with miller index (100) and a third lattice plane with miller index (110); and (iii) removing the epitaxy structure and a portion of the fin structure to obtain a trimmed fin structure.. .
Taiwan Semiconductor Manufacturing Co., Ltd.


07/21/16
20160211330 
 High electron mobility transistor patent thumbnailnew patent High electron mobility transistor
A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped aln/gan superlattice structure between the substrate and the transistor epitaxial layer.
National Chiao Tung University


07/21/16
20160211263 
 Non-silicon device heterolayers on patterned silicon substrate for cmos by combination of selective and conformal epitaxy patent thumbnailnew patent Non-silicon device heterolayers on patterned silicon substrate for cmos by combination of selective and conformal epitaxy
A single fin or a pair of co-integrated n- and p-type single crystal electronic device fins are epitaxially grown from a substrate surface at a bottom of one or a pair of trenches formed between shallow trench isolation (sti) regions. The fin or fins are patterned and the sti regions are etched to form a height of the fin or fins extending above etched top surfaces of the sti regions.
Intel Corporation


07/21/16
20160210538 
 Raster processing method and apparatus of transparent form patent thumbnailnew patent Raster processing method and apparatus of transparent form
Provided are a raster processing method and apparatus of a transparent form. The method comprising: determining a reusable transparent form in a page description file; performing syntax interpretation on the transparent form to obtain a reuse type and position information of the transparent form; generating a color block lattice, an alpha block lattice, a shape block lattice and their corresponding block attribute tables and block memory tables for the transparent form, according to the reuse type and the position information, and establishing association relationships between different transparent forms in the page description file; computing on the generated data information to obtain and buffer assembling information of the transparent form, according to the reuse type of the transparent form; determining an assembling manner of the transparent form according to the reuse type of the transparent form and assembling the transparent form into the page to be outputted..
Beijing Founder Electronics Co., Ltd.


07/21/16
20160209967 
 Touch panel patent thumbnailnew patent Touch panel
A touch panel includes a substrate, a first electrode disposed on the substrate, the first electrode including first unit electrodes disposed in a first direction and electrically connected to each other, and a second electrode disposed on the substrate, the second electrode including second unit electrodes disposed in a second direction intersecting the first direction and electrically connected to each other, in which the first unit electrodes and the second unit electrodes include a mesh pattern including irregular polygonal electrodes disposed without a gap therebetween, and the irregular polygonal electrodes include randomly selected candidate points disposed around each lattice point in a virtual regular lattice structure connected by a metal wiring.. .
Samsung Display Co., Ltd.


07/21/16
20160209946 
 Input device patent thumbnailnew patent Input device
There is provided an input device including an optical waveguide that prevents cores from being cracked due to pressing with and movement of a tip input part of an input element. This input device includes an optical waveguide in a rectangular sheet form configured such that linear cores arranged in a lattice form are held between an under cladding layer and an over cladding layer both in a rectangular sheet form.
Nitto Denko Corporation


07/21/16
20160209945 
 Input device patent thumbnailnew patent Input device
An input device includes a rectangular sheet-form optical waveguide in which linear cores arranged in a lattice pattern are held between a rectangular sheet-form under-cladding layer and a rectangular sheet-form over-cladding layer. Dummy patterns are provided in portions surrounded by the lattice-pattern linear cores, and held together with the cores between the sheet-form under-cladding layer and the sheet-form over-cladding layer.
Nitto Denko Corporation


07/21/16
20160209820 
 Radial lattice structures for additive manufacturing patent thumbnailnew patent Radial lattice structures for additive manufacturing
Methods, systems, and apparatus, including medium-encoded computer program products, for designing three dimensional lattice structures include, in one aspect, a method including: creating nodes in a plane normal to an axis in accordance with a spiral, wherein proper subsets of the nodes occur at successive radii positions away from the axis in the plane normal to the axis; repositioning every other one of the proper subsets, from at least a portion of the nodes, in a direction in 3d space along the axis; creating a three dimensional (3d) structure in the 3d space, the 3d structure comprising beams placed between the repositioned and non-repositioned proper subsets; duplicating the 3d structure one or more times to form a lattice in the 3d space; and selecting at least a portion of the lattice for inclusion in a 3d model.. .
Within Technologies Ltd.


07/21/16
20160209586 
 Hollow-core photonic bandgap fibers and methods of manufacturing the same patent thumbnailnew patent Hollow-core photonic bandgap fibers and methods of manufacturing the same
A hollow-core photonic bandgap fiber having a hollow core and a cladding which surrounds the core at a core boundary and comprises a lattice or network of struts and interstitial nodes which together define an array of cavities, wherein a ratio between a difference in a length of a longest and shortest pitch spacing of the nodes at the core boundary to an average pitch spacing at the core boundary is less than about 0.3.. .
University Of Southampton


07/21/16
20160208451 
 Methods and apparatuses for compacting soil and granular materials patent thumbnailnew patent Methods and apparatuses for compacting soil and granular materials
Methods and apparatuses for compacting soil and granular materials are disclosed. In some embodiments, the soil compaction apparatuses include an arrangement of diametric expansion elements that, in their expanded state, form a larger compaction surface.
Geopier Foundation Company, Inc.


07/21/16
20160208413 
new patent

Epitaxial diamond layer and the production thereof


An epitaxial diamond layer and a method for the production thereof can be provided that comprises the following steps: providing a substrate; depositing a metal layer on at least a subarea of the substrate, wherein the metal layer contains, or consists of, at least one period 4, 5 or 6 metal having a melting point of greater than or equal to 1200 k; and depositing a diamond layer on at least a subarea of the metal layer; wherein at least one intermediate layer is deposited between the metal layer and the diamond layer and has a higher lattice constant than undoped crystalline diamond and a lower hardness than undoped crystalline diamond.. .
Fraunhofer-gesellschaft Zur Förderung Der Angewandten Forschung E.v.


07/21/16
20160208372 
new patent

Lattice materials and structures and related methods thereof


A method for treating substrates or components; and substrates or components that have been treated by the associated method. The treatment may be applied to any iron or steel based alloy to create a treated layer that increases the strength of the substrate or component.
University Of Virginia Patent Foundation


07/14/16
20160204873 

Two-level coset coding scheme for gigabit ethernet over plastic optical fiber


An efficient coding and modulation system for transmission of digital data over plastic optical fibers with low latency. In particular, the digital signal is coded by means of a two-level coset coding.
Knowledge Development For Pof, S.l.


07/14/16
20160204435 

Negative electrode material, negative electrode active material, negative electrode and alkali metal ion battery


There is provided a carbonaceous negative electrode material used for an alkali metal ion battery. The average layer plane spacing d002 of a (002) plane obtained using an x-ray diffraction method in which a cukα ray is used as a radiation source is 0.340 nm or greater, and either or both the following condition a and condition b are satisfied.
Sumitomo Bakelite Co., Ltd.


07/14/16
20160204306 

Hybrid heterostructure light emitting devices


Light-emitting devices having a multiple quantum well (mqw) pin diode structure and methods of making and using the devices are provided. The devices are composed of multilayered semiconductor heterostructures.
Wisconsin Alumni Research Foundation


07/14/16
20160204203 

Metal oxide semiconductor having epitaxial source drain regions and a manufacturing same using dummy gate process


A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences.. .
Sony Corporation


07/14/16
20160204037 

Integrating vlsi-compatible fin structures with selective epitaxial growth and fabricating devices thereon


Different n- and p-types of device fins are formed by epitaxially growing first epitaxial regions of a first type material from a substrate surface at a bottom of first trenches formed between shallow trench isolation (sti) regions. The sti regions and first trench heights are at least 1.5 times their width.
Intel Corporation


07/14/16
20160204036 

Making a defect free fin based device in lateral epitaxy overgrowth region


Electronic device fins may be formed by epitaxially growing a first layer of material on a substrate surface at a bottom of a trench formed between sidewalls of shallow trench isolation (sti) regions. The trench height may be at least 1.5 times its width, and the first layer may fill less than the trench height.
Intel Corporation


07/14/16
20160203765 

Organic light-emitting diode display


An organic light-emitting diode display is disclosed. In one aspect, the organic light-emitting diode display includes a plurality of pixels formed in a display area of a substrate, wherein each of the pixels includes a pixel electrode, an emission layer, and a common electrode.
Samsung Display Co., Ltd.


07/14/16
20160202787 

Input device


An input device includes a rectangular sheet-form optical waveguide including a rectangular sheet-form under-cladding layer, a rectangular sheet-form over-cladding layer and linear cores arranged in a lattice pattern and held between the under-cladding layer and the over-cladding layer. A surface portion of the over-cladding layer corresponding to the plurality of linear cores arranged in the lattice pattern is defined as an input region.
Nitto Denko Corporation


07/14/16
20160202414 

Systems and methods for suspended polymer photonic crystal cavities and waveguides


Systems and methods for suspended polymer photonic crystal (sppc) cavities and waveguides are disclosed. In one aspect, photonic crystal cavities are provided.
The Trustees Of Columbia University In The City Of New York


07/14/16
20160202046 

Sheet of colloidal crystals immobilized in resin, displaying structural color using same, detecting unevenness distribution or hardness distribution of subject using same, and structural color sheet


Provided are: a sheet of colloidal crystals immobilized in resin exhibiting intense structural color, enabled to be observed easily from a squarely facing direction against a surface; and use thereof. The sheet of the present invention, assuming a direction perpendicular to part of a surface of a target area including partially the sheet surface is set as a specified axis, satisfies: (1) the target area includes plural inclined back-reflecting crystal-domains crystal domains having colloid particles immobilized in resin and including crystal lattice planes capable of bragg-back reflecting at least some of components in a visible wavelength range of incident light having greater than 0 incident angle with the specified axis; and (2) by defining an azimuth angle around the specified axis, the inclined back-reflecting crystal-domains are so oriented that intensity of reflected light caused by bragg back reflection varies depending on the azimuth angle of the incident light..
National Institute For Materials Science


07/14/16
20160201162 

Activated semiconductor compounds having increased electrochemical reactivity and associated methods thereof


Disclosed are novel compounds which display enhanced reactive properties due, in part, to induced lattice strain. The new compounds demonstrate accelerated leaching of copper under oxidizing conditions.
Flsmidth A/s


07/14/16
20160199878 

Method of modifying a sample surface layer from a microscopic sample


This enables the wet processing of a sample in-situ, thereby enhancing speed and/or avoiding subsequent alteration/contamination of the sample, such as oxidation, etc. The method is particularly useful for etching a lamella after machining the lamella with a (gallium) fib to remove the surface layer where gallium implantation occurred, or where the crystal lattice is disturbed..

07/14/16
20160198933 

Image processing scanning endoscope


An image processing apparatus for scanning endoscope includes: a number-of-interpolations determination section that receives detection signals from a detector for sequentially sampling return light from a subject and determines a number of detection signals used in an interpolation process by an interpolation section based on distances between a coordinate position of a predetermined lattice point in pixel data of a raster scan system and sampling coordinate positions of the detection signals around the coordinate position of the predetermined lattice point; and the interpolation section that generates pixel data of the predetermined lattice point by using signals of the sampling coordinate positions, wherein a number of the signals is equal to the number of detection signals determined by the number-of-interpolations determination section near the sampling coordinate position corresponding to the coordinate position of the predetermined lattice point.. .
Olympus Corporation


07/07/16
20160197306 

Enhancing light extraction of organic light-emitting diodes via nanoscale texturing of electrode surfaces


An organic light emitting device is described, having an oled including an anode, a cathode, and at least one organic layer between the anode and cathode. At least a portion of an electrode surface includes a plurality of scattering structures positioned in a partially disordered pattern resembling nodes of a two dimensional lattice.
The Regents Of The University Of Michigan


07/07/16
20160197233 

Deep ultraviolet light emitting diode


A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers.
Sensor Electronic Technology, Inc.


07/07/16
20160197214 

Light receiving device and image sensor


A light receiving device includes a substrate having a principal surface and a back surface, the substrate containing gasb semiconductor co-doped with a p-type dopant and an n-type dopant; a stacked semiconductor layer disposed on the principal surface of the substrate, the stacked semiconductor layer including an optical absorption layer; and an incident surface provided on the back surface of the substrate that receives an incident light. The optical absorption layer includes a super-lattice structure including a first semiconductor layer and a second semiconductor layer that are alternately stacked.
Sumitomo Electric Industries, Ltd.


07/07/16
20160197213 

Bare quantum dots superlattice photonic devices


Manipulation of the passivation ligands of colloidal quantum dots and use in qd electronics. A multi-step electrostatic process is described which creates bare qds, followed by the formation of qd superlattice via electric and thermal stimulus.
University Of South Florida


07/07/16
20160197164 

Method of producing a semiconductor arrangement


A semiconductor arrangement is produced by providing a semiconductor carrier of a second conduction type and epitaxially growing a first semiconductor zone of a first conduction type on the carrier. The first semiconductor zone includes a semiconductor base material doped with first and second dopants which are made of different substances which are both different from the semiconductor base material.
Infineon Technologies Ag


07/07/16
20160197146 

Superlattice materials and applications


A superlattice cell that includes group iv elements is repeated multiple times so as to form the superlattice. Each superlattice cell has multiple ordered atomic planes that are parallel to one another.
Quantum Semiconductor Llc


07/07/16
20160197050 

Manufacturing semiconductor device and semiconductor device


A manufacturing method of a bga, includes the steps of: providing a semiconductor chip having electrode pads; and removing a natural oxide film formed on the surface of each of the electrode pads. Further, a first film comprised of a conductive member is formed on the surface of the electrode pad exposed by removing the natural oxide film, a wire is connected with the first film, and part of the wire is brought into contact with the electrode pad to form an alloy layer at the interface between the wire and the electrode pad.
Renesas Electronics Corporation


07/07/16
20160197004 

Electrically insulated fin structure(s) with alternative channel materials and fabrication methods


Semiconductor structures and fabrication methods are provided which includes, for instance, fabricating a semiconductor fin structure by: providing a fin structure extending above a substrate, the fin structure including a first fin portion, a second fin portion disposed over the first fin portion, and an interface between the first and the second fin portions, where the first fin portion and the second fin portion are lattice mismatched within the fin structure; and modifying, in part, the fin structure to obtain a modified fin structure, the modifying including selectively oxidizing the interface to form an isolation region within the modified fin structure, where the isolation region electrically insulates the first fin portion from the second fin portion, while maintaining structural stability of the modified fin structure.. .
Globalfoundries Inc.


07/07/16
20160196644 

Magnetic resonance imaging white matter hyperintensities region recognizing method and system


A magnetic resonance imaging white matter hyperintensities region recognizing method and system are disclosed herein. The white matter hyperintensities region recognizing method includes receiving and storing a flair mri image, a spin-lattice relaxation time weighted mri image, and a diffusion weighted mri image.
National Central University


07/07/16
20160194967 

Cooling having tailored flow resistance


The present disclosure includes gas turbine engine components which are cooled internally through the inclusion of lattice structures. Such structures may comprise a network of branches and nodes.
United Technologies Corporation


07/07/16
20160194614 

Protein crystals


A method for producing an ordered protein lattice, the method comprising: (a) providing a first component comprising a subunit of a homooligomeric protein assembly fused to a first subunit of a heterooligomeric protein assembly, and a second component comprising a second subunit of the heterooligomeric protein assembly, wherein the homooligomeric protein assembly and the heterooligomeric protein assembly are each symmetrical in two or three dimensions and share a rotational symmetry axis of the same order; (b) mixing said first monomer and said second monomer to produce a mixture; and (c1) (i) heating the mixture to a temperature about 2° c. To about 10° c.
Crysalin Ltd.


07/07/16
20160194070 

Ventilated aero-structures, aircraft, and associated methods


Ventilated aero-structures include a micro-lattice structure operatively coupled to a honeycomb core. The interface between the honeycomb core and the micro-lattice structure is configured to permit air flow to and from the honeycomb core via the micro-lattice structure.
The Boeing Company


07/07/16
20160193055 

Interbody cage


An interbody cage, which has lattice-like or grid-like areas for better connection/fusion into the area of the vertebra. The cage has especially an outer frame, which includes massive support parts and, and an inner grid body.
Joimax Gmbh


07/07/16
20160192740 

Shoe with lattice structure


An article of footwear includes an upper and a sole coupled to the upper. The sole includes a platform and a lattice.
Under Armour, Inc.


06/30/16
20160190635 

Eletrode material for lithium ion secondary battery, electrode for lithium ion secondary battery, and lithium ion secondary battery


An electrode material for a lithium ion secondary battery of the present invention includes an electrode active material made of lifexmn1-x-ymypo4 (0.05≦x≦0.35, 0.005≦y≦0.14) in which the m is at least one selected from co and zn which are elements that are electrochemically inactive in a voltage range of 1.0 v to 4.3 v and have a smaller ionic radius than mn, a crystal structure is orthorhombic, a space group is pmna, values of crystal lattice constants a, b, and c satisfy 10.28 Å≦a≦10.42 Å, 6.000 Å≦b≦6.069 Å, and 4.710 Å≦c≦4.728 Å, and lattice volume v satisfies 289.00 Å3≦v≦298.23 Å3.. .

06/30/16
20160190583 

Electrode material for lithium ion secondary battery, electrode for lithium ion secondary battery, and lithium ion secondary battery


An electrode material for a lithium ion secondary battery of the present invention includes an electrode active material made of lifexmn1-x-ymypo4 (0.220≦x≦0.350, 0.0050≦y≦0.018) in which the m is either or both of co and zn, the electrode material has an orthorhombic crystal structure, a space group is pnma, values of crystal lattice constants a, b, and c satisfy 10.28 Å≦a≦10.42 Å, 6.000 Å≦b≦6.069 Å, and 4.710 Å≦c≦4.728 Å, and lattice volume v satisfies 289.00 Å3≦v≦298.23 Å3.. .

06/30/16
20160190567 

Lithium secondary battery


Disclosed is a lithium secondary battery, including a cathode, an anode and a non-aqueous electrolyte, wherein the cathode includes a cathode active material containing lithium-metal oxide of which at least one of metals has a concentration gradient region between a core part and a surface part thereof, and the anode includes hard carbon having an average lattice distance (d002) in the range of 3.6 to 3.8 Å and graphite having-an average lattice distance (d002) in the range of 3.356 to 3.360 Å, such that output and high-temperature storage properties may be improved.. .

06/30/16
20160190437 

In-situ annealing to improve the tunneling magneto-resistance of magnetic tunnel junctions


Embodiments are directed to a magnetic tunnel junction (mtj) memory cell that includes a reference layer formed from a perpendicular magnetic anisotropy (pma) reference layer and an interfacial reference layer. The mtj further includes a free layer and a tunnel barrier positioned between the interfacial reference layer and the free layer.

06/30/16
20160190435 

In-situ annealing to improve the tunneling magneto-resistance of magnetic tunnel junctions


Embodiments are directed to a magnetic tunnel junction (mtj) memory cell that includes a reference layer formed from a perpendicular magnetic anisotropy (pma) reference layer and an interfacial reference layer. The mtj further includes a free layer and a tunnel barrier positioned between the interfacial reference layer and the free layer.

06/30/16
20160190403 

Enhanced emission from plasmonic coupled emitters for solid state lighting


There is provided an illumination device (100) comprising an energy source (102) for exciting a photon emitter; a first wavelength conversion layer (104) and a second wavelength conversion layer (106). At least one of the first and second wavelength conversion layer comprises a periodic plasmonic antenna array comprising a plurality of individual antenna elements (108).

06/30/16
20160190387 

Strain-control heterostructure growth


A solution for fabricating a group iii nitride heterostructure and/or a corresponding device is provided. The heterostructure can include a nucleation layer, which can be grown on a lattice mismatched substrate using a set of nucleation layer growth parameters.

06/30/16
20160190378 

Inverted metamorphic multijunction solar cell including a metamorphic layer


A multijunction solar cell includes an upper first solar subcell, a second solar subcell adjacent to the first solar subcell, a third solar subcell adjacent to the second solar subcell, and a graded interlayer adjacent to the third solar subcell. The graded interlayer has a band gap that is greater than the band gap of the third solar subcell and is composed of a compositionally step-graded series of (inxga1-x)y al1-yas layers with monotonically changing lattice constant, with x and y having respective values such that the band gap of the graded interlayer remains constant throughout its thickness, and wherein 0<x<1 and 0<y<1.

06/30/16
20160190376 

Photovoltaic cell with variable band gap


A monolithic photovoltaic cell is proposed. Said cell comprises at least one junction.

06/30/16
20160190321 

Finfet low resistivity contact formation method


The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and wherein a surface of the strained material has received a passivation treatment; an inter-layer dielectric (ild) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; a metal barrier coating an opening of the dielectric layer; and a metal layer filling a coated opening of the dielectric layer..

06/30/16
20160190319 

Non-planar semiconductor devices having multi-layered compliant substrates


Non-planar semiconductor devices having multi-layered compliant substrates and methods of fabricating such non-planar semiconductor devices are described. For example, a semiconductor device includes a semiconductor fin disposed above a semiconductor substrate.

06/30/16
20160190316 

Charge carrier transport facilitated by strain


A semiconductor structure and formation thereof. The semiconductor structure has a first semiconductor layer with a first lattice structure and a second epitaxial semiconductor layer that is lattice-matched with the first semiconductor layer.

06/30/16
20160190238 

Non-planar semiconductor device with aspect ratio trapping


As disclosed herein, a semiconductor device with aspect ratio trapping including, a bulk substrate, a plurality of isolation pillars formed on the bulk substrate, wherein one or more gaps are formed between the isolation pillars, an oxide layer formed by epitaxy on the bulk substrate, between the isolation pillars, wherein the oxide layer partially fills the gaps between the isolation pillars, one or more fins formed over the oxide layer between the isolation pillars, such that the one or more fins fill the gaps between the isolation pillars, wherein the oxide layer electrically isolates the one or more fins from the bulk substrate. The size of the gaps between the isolation pillars is selected to statistically eliminate defects caused by a lattice mismatch between the bulk substrate and the oxide layer.

06/30/16
20160190068 

Contact structure and formation thereof


A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure.

06/30/16
20160188768 

Temperature coupling algorithm for hybrid thermal lattice boltzmann method


A method includes simulating, in a lattice velocity set, transport of particles in a volume of fluid, with the transport causing collision among the particles; and generating a distribution function for transport of the particles, wherein the distribution function comprises a thermodynamic step and a particle collision step, and wherein the thermodynamic step is substantially independent of and separate from the particle collision step.. .

06/30/16
20160186427 

Vacuum insulation panel


This invention concerns a manufactured apparatus formed via a deep drawn stamping process for use within a building as an insulation device applied both to the exterior sheathing of an existing or new edifice and also above the ceiling plane below its roof structure; which consists of two half vessels made from malleable material, each containing similar structural appurtenances on their exterior faces, which when bonded together encase a cruciform rigid plastic grid-like lattice having many apertures therein for the complete removal of air within this subsequently sealed vessel. This complete state of vacuum totally prevents or drastically stops the transmigration of heat energy loss via conduction and convection from the interior of a building's space to the outside environment during the winter months; and vice versa, thus also retarding the gain of ambient heat into said interior space during the hot summer months..

06/30/16
20160185997 

Protective coating compositions


Described are polymer compositions that include lattices (e.g., polymer emulsions or suspensions in an aqueous phase) and that contain a gloss reducing agent and that are useful in various finish compositions such as in floor care compositions.. .

06/23/16
20160182006 

High-selectivity low-loss duplexer


A high-selectivity low-loss duplexing system includes a first duplexer having a first port, a second port, a transmit port and a receive port. A second duplexer has a third port, a fourth port, an inverted transmit port and the receive port.

06/23/16
20160181599 

Lithium secondary battery


Disclosed is a lithium secondary battery, including a cathode, an anode and a non-aqueous electrolyte, wherein the cathode includes a cathode active material containing lithium-metal oxide of which at least one of metals has a concentration gradient region between a core part and a surface part thereof, and the anode includes graphite having an average lattice distance d002 of 3.356 to 3.365 Å, thereby having excellent high-temperature storage and life-span properties.. .

06/23/16
20160181464 

Method of forming an inverted metamorphic multijunction solar cell with dbr layer adjacent to the top subcell


A multijunction solar cell comprising an upper first solar subcell having a first band gap; a middle second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a graded interlayer adjacent to the second solar subcell; the graded interlayer having a third band gap greater than the second band gap; a third solar subcell adjacent to the interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and a distributed bragg reflector (dbr) layer adjacent to the upper first subcell.. .

06/23/16
20160181460 

Avalance photodiode


An avalanche photodiode includes a p-type contact layer, a light absorption layer, a compositionally-graded symmetrical multiplication layer, and an n-type contact layer. The p-type contact layer is connected to the light absorption layer, the light absorption layer is connected to the compositionally-graded symmetrical multiplication layer, and the compositionally-graded symmetrical multiplication layer is connected to the n-type contact layer.

06/23/16
20160181416 

Charge-compensation device


A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a horizontal direction substantially parallel to the first surface, an active area, a peripheral area arranged between the active area and the lateral edge, a drift region, first compensation regions forming respective first pn-junctions with the drift region, and second compensation regions extending from the first surface into the drift region and forming respective second pn-junctions with the drift region. The first compensation regions form in the active area a lattice comprising a first base vector having a first length.

06/23/16
20160181017 

Dielectric film, film capacitor, and electric device


There are provided a dielectric film, a film capacitor and an electric device capable of achieving an increase in relative permittivity without causing a decrease in breakdown field strength. A dielectric film includes an organic resin and ceramic particles contained in the organic resin.

06/23/16
20160179947 

System and lattice-based search for spoken utterance retrieval


A system and method are disclosed for retrieving audio segments from a spoken document. The spoken document preferably is one having moderate word error rates such as telephone calls or teleconferences.

06/23/16
20160179221 

Display panel and display control system


A display panel according to the present disclosure is a display panel with which an optical pen can be used. The display panel includes: a position information pattern layer which causes the optical pen to identify a position on the display panel; a color filter layer including a color filter partitioned by a lattice structure; and a non-visible light reflection layer having a shape which diffuses and reflects a part of a non-visible light emitted from the optical pen.

06/23/16
20160178843 

Terahertz-wave device and terahetz-wave integrated circuits


The thz-wave device comprises: a 2d-pc slab; lattice points periodically arranged in the 2d-pc slab, the lattice points for diffracting the thz waves in pbg frequencies of photonic band structure of the 2d-pc slab in order to prohibit existence in a plane of the 2d-pc; a 2d-pc waveguide disposed in the 2d-pc slab and formed with a line defect of the lattice points; and an rtd device disposed on the 2d-pc waveguide.. .

06/23/16
20160178679 

Capacitance monitoring using x-ray diffraction


A method includes measuring a difference between a primary x-ray diffraction peak and a secondary x-ray diffraction peak, the primary x-ray diffraction peak corresponds to an unstrained portion of a semiconductor substrate and the secondary x-ray diffraction peak corresponds to a strained portion of the semiconductor substrate, the difference between the primary x-ray diffraction peak and the secondary x-ray diffraction peak includes a delta shift peak that corresponds to changes in a crystal lattice caused by a stress applied to the strained portion of the semiconductor substrate, the delta shift peak includes variations in a deep trench capacitance.. .

06/23/16
20160176988 

Dna-nanoparticle conjugates


The bio-programmable crystallization of multi-component functional nanoparticle systems is described, as well as methods for such bio-programmable crystallization, and the products resultant from such methods. Specifically, the systems disclosed and taught herein are directed to improved strategies for the dna-mediated self-assembly of multi-component functionalized nanoparticles into three-dimensional order superlattices, wherein the functionalization of the nanoparticles with dna is independent of either the composition of the material, or the shape of the nanoparticles..

06/23/16
20160174650 

Article of footwear with color change portion and changing color


An article with a color change portion and a method of changing color. The article includes at least one color change portion capable of changing colors.

06/16/16
20160172555 

Semiconductor chip that emits polarized radiation


A radiation emitting semiconductor chip is disclosed. Embodiments provide a semiconductor chip that emits radiation includes a semiconductor body having an active zone, which emits unpolarized radiation having a first radiation component of a first polarization and having a second radiation component of a second polarization.
Osram Opto Semiconductors Gmbh


06/16/16
20160172534 

Iii nitride semiconductor epitaxial substrate and iii nitride semiconductor light emitting device, and methods of producing the same


A iii nitride semiconductor epitaxial substrate having more excellent surface flatness is provided, in which the problems of crack formation and the double peaks in the shape of the el spectrum are mitigated by employing appropriate conditions for si doping on an aln layer on a substrate; a iii nitride semiconductor light emitting device; and methods of producing the same. A iii nitride semiconductor epitaxial substrate has a substrate of which at least a surface portion is made of aln, an undoped aln layer formed on the substrate, an si-doped aln buffer layer formed on the undoped aln layer, and a superlattice laminate formed on the si-doped aln buffer layer.
Dowa Electronics Materials Co., Ltd.


06/16/16
20160172530 

Method for producing semiconductor light receiving device


A method for producing a semiconductor light receiving device includes the steps of growing a stacked semiconductor layer including a light-receiving layer having a super-lattice structure, the super-lattice structure including first and second semiconductor layers stacked alternately; forming a mesa structure by etching the stacked semiconductor layer, the mesa structure having a side surface exposed in an atmosphere; forming a deposited layer on the side surface of the mesa structure by supplying a silicon raw material, the deposited layer containing silicon generated from the silicon raw material; and, after the step of forming the deposited layer, forming a passivation film on the side surface of the mesa structure. The first semiconductor layer contains gallium as a constituent element.
Sumitomo Electric Industries, Ltd.


06/16/16
20160172470 

Isolation structure of fin field effect transistor


A representative fin field effect transistor (finfet) includes a substrate having a major surface; a fin structure protruding from the major surface having a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material. A bottom portion of the upper portion comprises a dopant with a first peak concentration.
Taiwan Semiconductor Manufacturing Company, Ltd.


06/16/16
20160172459 

Active regions with compatible dielectric layers


A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material.

06/16/16
20160172438 

Method of manufacturing semiconductor devices using light ion implantation and semiconductor device


A first doped region is formed in a single crystalline semiconductor substrate. Light ions are implanted through a process surface into the semiconductor substrate to generate crystal lattice vacancies between the first doped region and the process surface, wherein a main beam axis of an implant beam used for implanting the light ions deviates by at most 1.5 degree from a main crystal direction along which channeling of the light ions occurs.
Infineon Technologies Ag


06/16/16
20160172414 

Radiation imaging apparatus, manufacturing the same, and radiation inspection apparatus


A radiation imaging apparatus, comprising a plurality of sensor units each including a plurality of sensors, a support portion having a lattice shape which partitions a region under the plurality of sensor units into a plurality of spaces and configured to support the plurality of sensor units from a side of lower surfaces of the plurality of sensor units, and bonding members respectively arranged in the plurality of spaces and configured to bond the plurality of sensor units and the support portion.. .
Canon Kabushiki Kaisha


06/16/16
20160172411 

Method for producing semiconductor light receiving device and semiconductor light receiving device


A method for producing a semiconductor light receiving device includes the steps of growing a stacked semiconductor layer on a principal surface of a substrate, the stacked semiconductor layer including a light-receiving layer having a super-lattice structure, the super-lattice structure including a first semiconductor layer and a second semiconductor layer that are stacked alternately; forming a mask on the stacked semiconductor layer; forming a mesa structure on the substrate by etching the stacked semiconductor layer using the mask so as to form a substrate product, the mesa structure having a side surface exposed in an atmosphere; forming a fluorinated amorphous layer on the side surface of the mesa structure by exposing the substrate product in fluorine plasma; and after the step of forming the fluorinated amorphous layer, forming a passivation film containing an oxide on the side surface of the mesa structure.. .
Sumitomo Electric Industries, Ltd.


06/16/16
20160172290 

Interposer with lattice construction and embedded conductive metal structures


A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for dielectric fields. Each unit cell is then filled with a dielectric material.
International Business Machines Corporation


06/16/16
20160172288 

Interposer with lattice construction and embedded conductive metal structures


A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for dielectric fields. Each unit cell is then filled with a dielectric material.
International Business Machines Corporation


06/16/16
20160171984 

System and adapting automatic speech recognition pronunciation by acoustic model restructuring


Disclosed herein are systems, computer-implemented methods, and computer-readable storage media for recognizing speech by adapting automatic speech recognition pronunciation by acoustic model restructuring. The method identifies an acoustic model and a matching pronouncing dictionary trained on typical native speech in a target dialect.
At&t Intellectual Property I, Lp


06/16/16
20160171673 

Sub-pixel modification of digital images by locally shifting to an arbitrarily dense supergrid


Methods and systems may provide for receiving an input image having an input pixel density and defining a single filter based on a sub-pixel modification value, wherein the single filter has a working lattice density that is greater than the input pixel density. Additionally, the single filter and the input image may be used to generate an output image.

06/16/16
20160171401 

Layout optimization for interactional objects in a constrained geographical area


The present disclosure describes methods, systems, and computer program products for finding a best location scheme for a set of interactional objects in a constrained geographical area. A geographic region representing a wind farm is partitioned into a plurality of lattices.

06/16/16
20160170099 

Head-up display device


Each of a plurality of optical elements that are arrayed in a lattice pattern in a screen member which diffuses a laser beam incident from a projector to guide the laser beam toward a projection surface has a curved surface on a side thereof, and the curved surface has a common convexly curved shape, and diffuses the laser beam which is emitted from the curved surface toward the projection surface. The respective optical elements include a plurality of reference elements which serve as a reference and a plurality of peripheral elements which are adjacent to the respective reference elements.
Denso Corporation


06/16/16
20160167241 

Intelligent shaving system having sensors


Methods and apparatuses for an intelligent shaving system is disclosed herein. An example intelligent shaving system includes a handle, at least one blade connected to the handle, a microcontroller attached to the handle, a wireless communication unit configured to send and receive data from microcontroller to an external device, a memory configured to store data applicable to the at least one blade, and one or more sensors configured to send sensory data from the one or more sensors to microcontroller.

06/09/16
20160164706 

Pilot symbol patterns for transmit antennas


A method and apparatus for improving channel estimation within an ofdm communication system. Channel estimation in ofdm is usually performed with the aid of pilot symbols.
Apple Inc.




Lattice topics: Semiconductor, Semiconductor Device, Semiconductor Material, Crystallin, Disconnect, Transistors, Replacement Gate, Semiconductor Devices, Dislocations, Dislocation, Image Processing, Coordinates, Surface Plasmon Polariton, Antenna Array

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