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This page is updated frequently with new Lattice-related patent applications. Subscribe to the Lattice RSS feed to automatically get the update: related Lattice RSS feeds. RSS updates for this page: Lattice RSS RSS


Sic single crystal substrate

Mitsui Mining & Smelting

Sic single crystal substrate

Nitride thin film stucture and method of forming the same

Snu R&db Foundation

Nitride thin film stucture and method of forming the same

Date/App# patent app List of recent Lattice-related patents
03/26/15
20150088510
 System and  robust access and entry to large structured data using voice form-filling patent thumbnailnew patent System and robust access and entry to large structured data using voice form-filling
A method, apparatus and machine-readable medium are provided. A phonotactic grammar is utilized to perform speech recognition on received speech and to generate a phoneme lattice.
At&t Intellectual Property Ii, L.p.
03/26/15
20150087507
 Honeycomb ceramic substrates, honeycomb extrusion dies, and methods of making honeycomb ceramic substrates patent thumbnailnew patent Honeycomb ceramic substrates, honeycomb extrusion dies, and methods of making honeycomb ceramic substrates
A honeycomb ceramic substrate, a method of making thereof, and a honeycomb extrusion die configured to extrude a honeycomb ceramic substrate from a batch of ceramic or ceramic-forming material is provided. The substrate may include a lattice of intersecting walls defining a honeycomb network of flow channels extending between an inlet end and an outlet end of the honeycomb substrate.
Corning Incorporated
03/26/15
20150087137
 Nitride thin film stucture and  forming the same patent thumbnailnew patent Nitride thin film stucture and forming the same
Provided are a nitride thin film structure and a method of forming the same. If a nitride thin film is formed on a substrate that is not a nitride, many defects are generated by a difference in lattice constants between the substrate and the nitride thin film.
Snu R&db Foundation
03/26/15
20150086219
 Enhanced optical modulation using slow light patent thumbnailnew patent Enhanced optical modulation using slow light
A photonic integrated circuit (pic) is described. This pic includes a semiconductor-barrier layer-semiconductor diode in an optical waveguide that conveys an optical signal, where the barrier layer is an oxide or a high-k material.
Oracle International Corporation
03/26/15
20150086153
 Optical device having a stepwise or tapered light input/output part and manufacturing method therefor patent thumbnailnew patent Optical device having a stepwise or tapered light input/output part and manufacturing method therefor
In a method of manufacturing an optical device including an optical waveguide having a core, a cladding and a light input/output part through which a light beam is input or output, a substrate is prepared which is provided with a uniform thickness of single-crystalline film having its constituent atoms forming a diamond lattice structure and its surface being neither the (111) plane nor its equivalent planes. In the single-crystalline film, a precursor structure is formed which has a precursor of light input/output part.
Photonics Electronics Technology Research Association
03/26/15
20150084065
 Sic single crystal substrate patent thumbnailnew patent Sic single crystal substrate
A single crystal sic substrate capable of forming a good epitaxial thin film thereon to give a high-quality epitaxial substrate is provided. The single crystal sic substrate has a cmp-treated surface and has 5 or fewer lattice defects measuring 30 nm or more in a direction parallel to the polished surface and 50 nm or more in a direction perpendicular to the polished surface as counted within a depth of 100 nm from the polished surface in a direction perpendicular to the polished surface and a length of 10 μm in a direction parallel to the polished surface when observed in cross-section using a transmission electron microscope under the 00l reflection or the h-h0 reflection, where l and h are each an integer other than 0..
Mitsui Mining & Smelting Co., Ltd.
03/26/15
20150083178
 Seebeck/peltier thermoelectric conversion device having phonon confinement layers of crystalline semiconductor containing angstrom-sized organic groups as semiconductor atoms substituents within the crystal lattice and fabrication process patent thumbnailnew patent Seebeck/peltier thermoelectric conversion device having phonon confinement layers of crystalline semiconductor containing angstrom-sized organic groups as semiconductor atoms substituents within the crystal lattice and fabrication process
Significant phonon migration restraint is achieved within a relatively homogeneous polycrystalline doped semiconductor bulk by purposely creating in the crystal lattice of the semiconductor hydrocarbon bonds with the semiconductor, typically si or ge, constituting effective organic group substituents of semiconductor atoms in the crystalline domains. An important enhancement of the factor of merit z of such a modified electrically conductive doped semiconductor is obtained without resorting to nanometric cross sectional dimensions in order to rely on surface scattering eventually enhanced by making the surface highly irregular and/or creating nanocavities within the bulk of the conductive material.
Consorzio Delta Ti Research
03/26/15
20150083037
 Isoelectronic surfactant induced sublattice disordering in optoelectronic devices patent thumbnailnew patent Isoelectronic surfactant induced sublattice disordering in optoelectronic devices
A method of disordering a layer of an optoelectronic device including; growing a plurality of lower layers; introducing an isoelectronic surfactant; growing a layer; allowing the surfactant to desorb; and growing subsequent layers all performed at a low pressure of 25 torr.. .
The Boeing Company
03/19/15
20150081101
 Engine control device patent thumbnailEngine control device
It is a task of the invention to make it possible to calculate a control target value of one actuator or control target values of a plurality of actuators regarding engine control at a high speed through the use of a multicore processor. With a view to accomplishing this task, a plurality of lattice points that are arranged on a two-dimensional orthogonal coordinate system having axes representing a first operating condition and a second operating condition respectively are associated respectively with at least one or some of a plurality of cores that are arranged in a latticed manner on the multicore processor on one-on-one level on a same line as on the two-dimensional orthogonal coordinate system, and a calculation program for calculating an optimal control value at the associated lattice point or calculation programs for calculating optimal control values at the associated lattice points are allocated respectively to at least one or some of the plurality of the cores.
Toyota Jidosha Kabushiki Kaisha
03/19/15
20150080609
 Process for reducing chloronitrobenzene catalyzed by platinum-nanoparticles stabilized on modified montmorillonite clay patent thumbnailProcess for reducing chloronitrobenzene catalyzed by platinum-nanoparticles stabilized on modified montmorillonite clay
Pt0-nanoparticles in the size range of 0 to 10 nm were prepared in-situ by impregnation of h2ptcl66h2o into the nanopores of modified montmorillonite followed by reduction with different reducing agents like ethylene glycol, sodium citrate, hydrogen, hydrazine and sodium borohydrate. The montmorillonite was modified by activation with mineral acids under controlled condition for generating desired nanopores.
Council Of Scientific & Industrial Research
03/19/15
20150079803

Method of forming strain-relaxed buffer layers


Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top.
Applied Materials, Inc.
03/19/15
20150079770

Selective layer disordering in iii-nitrides with a capping layer


Selective layer disordering in a doped iii-nitride superlattice can be achieved by depositing a dielectric capping layer on a portion of the surface of the superlattice and annealing the superlattice to induce disorder of the layer interfaces under the uncapped portion and suppress disorder of the interfaces under the capped portion. The method can be used to create devices, such as optical waveguides, light-emitting diodes, photodetectors, solar cells, modulators, laser, and amplifiers..
Sandia Corporation
03/19/15
20150079440

Producing electrodes for lead-acid batteries


The invention relates to a method for producing electrodes (14) for lead-acid batteries (30). An electrode (14) that has been produced comprises at least one upper and/or one lower frame element as well as a lattice-shaped region (12) that extends away from said upper or lower frame element (9, 10) and has a plurality of openings, the upper and/or lower frame element (9, 10) being of a greater thickness (d) than the lattice-shaped region (12).
Johnson Controls Autobatterie Gmbh & Co. Kgaa
03/19/15
20150079352

Graphene and hexagonal boron nitride planes and associated methods


Graphene layers made of primarily sp2 bonded atoms and associated methods are disclosed. In one aspect, for example, a method of forming a graphite film can include heating a solid substrate under vacuum to a solubilizing temperature that is less than a melting point of the solid substrate, solubilizing carbon atoms from a graphite source into the heated solid substrate, and cooling the heated solid substrate at a rate sufficient to form a graphite film from the solubilized carbon atoms on at least one surface of the solid substrate.
03/19/15
20150077651

Touch panel substrate and display apparatus


Provided is a touch panel substrate to be used in a touch panel, the touch panel substrate having improved display qualities. A touch panel substrate of one embodiment of the present invention is provided with a first detection electrode having a plurality of first lattice electrodes that are aligned in the lateral direction.
Sharp Kabushiki Kaisha
03/19/15
20150077267

Modular light system and related methods


A modular warning light system for warning aerial vehicles of an obstacle such as a steel lattice tower includes a support, a light structure adjustably mounted onto the support, a warning light coupled to the light structure, and a power system coupled to the light structure. The power system comprises a solar panel and a rechargeable battery.
San Diego Gas & Electric Company
03/19/15
20150076678

Semiconductor device


A partition in lattice form forms a plurality of housing sections. A plurality of circuit blocks including a semiconductor block and a terminal base block are electrically connected one to another in a state of being housed in the housing sections to form a power semiconductor circuit.
Mitsubishi Electric Corporation
03/19/15
20150076558

Semiconductor structure and the manufacturing method thereof


The present disclosure provides a finfet. The finfet includes a silicon-on-insulator (soi) with an insulator; a plurality of fin structures on the insulator; an isolation on the insulator, and between two adjacent fin structures in the plurality of fin structures; and an oxide layer between each of the plurality of fin structures and the insulator, wherein the insulator comprises silicon germanium oxide.
Taiwan Semiconductor Manufacturing Company Ltd.
03/19/15
20150076514

Method to induce strain in finfet channels from an adjacent region


Methods and structures for forming strained-channel finfets are described. Fin structures for finfets may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate.
Stmicroelectronics, Inc.
03/19/15
20150076511

Semiconductor device


A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, ga-face grown, lattice relaxed, and having a composition in1−zalzn (0≦z≦1), a channel layer having a composition of: alxga1−xn (0≦x≦1) or inyga1−yn (0≦y≦1). Or gan provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode..
Renesas Electronics Corporation
03/19/15
20150076449

Semiconductor device and manufacturing method thereof


A semiconductor device includes a superlattice buffer layer formed on a substrate. An upper buffer layer is formed on the superlattice buffer layer.
Fujitsu Limited
03/19/15
20150075613

Solar cell


A solar cell includes: a crystalline silicon substrate of one conductivity type including a first principal surface, and a second principal surface provided on an opposite side from the first principal surface; a first amorphous silicon layer of the other conductivity type provided on the first principal surface side; a second amorphous silicon layer of the one conductivity type provided on the second principal surface side; a contact layer in contact with the second amorphous silicon layer; a magnesium-doped zinc oxide layer in contact with the contact layer; a first electrode layer provided on the first amorphous silicon layer; and a second electrode layer provided on the magnesium-doped zinc oxide layer. A lattice constant of the contact layer is within a range of plus or minus 30% relative to a lattice constant of the magnesium-doped zinc oxide layer..
Sanyo Electric Co., Ltd.
03/12/15
20150073792

Method and system for automatically detecting morphemes in a task classification system using lattices


The invention concerns a method and corresponding system for building a phonotactic model for domain independent speech recognition. The method may include recognizing phones from a user's input communication using a current phonotactic model, detecting morphemes (acoustic and/or non-acoustic) from the recognized phones, and outputting the detected morphemes for processing.
At&t Intellectual Property Ii, L.p.
03/12/15
20150072105

Superimposed composite interior component


A laminated composite interior component, including: a first member that has a predetermined mating surface; and a second member made of an elastically deformable resin material, the second member having a plate-like portion that is substantially parallel to the mating surface and that has multiple protrusions which are formed integrally with plate-like portion and which protrude toward the mating surface such that a space is formed between the mating surface and the plate-like portion, the second member being arranged so as to be laminated on the first member with the protrusions in contact with the mating surface, cushioning characteristics being imparted to the laminated composite interior component when distal ends of the protrusions are pressed against the mating surface and elastically deformed, the laminated composite interior component being configured such that the multiple protrusions have the same shape, the plate-like portion is dotted with the multiple protrusions, bending stiffness of each of the protrusions against a compression load is anisotropic around an axis of the protrusion, and each of the multiple protrusions is configured to be bent and deformed in a specific direction about its axis, and the multiple protrusions are arranged at such locations as to constitute respective sides of each of multiple polygons so that there is formed a lattice pattern in which each of the sides of each of the multiple polygons overlaps with a corresponding one of the sides of an adjacent one of the polygons.. .
Toyoda Iron Works Co., Ltd.
03/12/15
20150069474

Isolation structure of fin field effect transistor


The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material, wherein a bottom portion of the upper portion comprises a dopant with a first peak concentration; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and an isolation structure surrounding the fin structure, wherein a portion of the isolation structure adjacent to the bottom portion of the upper portion comprises the dopant with a second peak concentration equal to or greater than the first peak concentration..
Taiwan Semiconductor Manufacturing Company, Ltd.
03/12/15
20150069465

High percentage silicon germanium alloy fin formation


A layer of a silicon germanium alloy containing 30 atomic percent or greater germanium and containing substitutional carbon is grown on a surface of a semiconductor layer. The presence of the substitutional carbon in the layer of silicon germanium alloy compensates the strain of the silicon germanium alloy, and suppresses defect formation.
International Business Machines Corporation
03/12/15
20150069409

Heterostructure with carrier concentration enhanced by single crystal reo induced strains


A heterostructure grown on a silicon substrate includes a single crystal rare earth oxide template positioned on a silicon substrate, the template being substantially crystal lattice matched to the surface of the silicon substrate. A heterostructure is positioned on the template and defines at least one heterojunction at an interface between a iii-n layer and a iii-iii-n layer.
03/12/15
20150069327

Fin field-effect transistors with superlattice channels


Finfet structures may be formed including superlattice fins. The structure may include a superlattice fin of alternating layers of silicon-germanium with a germanium concentration of approximately 10% to 80% and a second semiconductor material.
International Business Machines Corporation
03/12/15
20150068581

Fabrication multi-junction solar cells


A fabrication method for high-efficiency multi junction solar cells, including: providing a ge substrate for semiconductor epitaxial growth; growing an emitter region over the ge substrate (as the base) to form a first subcell with a first band gap; forming a second subcell with a second band gap larger than the first band gap and lattice matched with the first subcell over the first subcell via mbe; forming a third subcell with a third band gap larger than the second band gap and lattice matched with the first and second subcells over the second subcell via mocvd; and forming a fourth subcell with a fourth band gap larger than the third band gap and lattice matched with the first, second and third subcells over the third subcell via mocvd.. .
Xiamen Sanan Optoelectronics Technology Co., Ltd.
03/12/15
20150068576

Superlattice quantum well thermoelectric generator via radiation exchange and/or conduction/convection


In at least one embodiment a thermoelectric generator is provided. The thermoelectric generator includes a cap and a thermopile.
Ud Holdings, Llc
03/05/15
20150066944

Data processing, apparatus and methods


The invention provides an apparatus for processing data items in a data source, and an equivalent method. More specifically, the apparatus is configured to reduce a lattice representation of data items in a data source.
British Telecommunications Public Limited Company
03/05/15
20150065805

Surgical retractor


A surgical retractor device for retaining and/or moving internal organs during minimally invasive or laparoscopic surgery is provided. The surgical retractor can be a single continuous structure that includes a shaft.
Brigham Young University
03/05/15
20150065332

Methods of preparing novel enhanced high q material compositions


A framework for developing high quality factor (q) material for electronic applications in the radio frequency range is provided. In one implementation, ceramic materials having a tungsten bronze crystal structure is modified by substituting one or more elements at one or more lattice sites on the crystal structure.
Skyworks Solutions, Inc.
03/05/15
20150065314

Gripper wraps


Embodiments of the current invention are directed towards solving the need for weightlifting wraps which prevent slippage, increase rebound potential, allow simpler application, and provide greater stability. An embodiment of the invention comprises: gripper wraps made of stretchable material; the gripper wraps having exposed rubber strands on one outer surface of the gripper wraps; the exposed rubber strands arranged in an offset lattice configuration, wherein the exposed rubber strands have a coefficient of friction sufficient to grip the previous layer of wrap..
03/05/15
20150064823

Method for manufacturing light emitting element


A method for manufacturing a light emitting element that includes preparing a wafer having a substrate and a semiconductor structure, the substrate including a plurality of protrusions at positions corresponding to lattice points on a triangular lattice. The method includes forming a plurality of first modified parts in the substrate by irradiating the substrate with a laser beam along first dividing lines, forming a plurality of second modified parts in the substrate by irradiating the substrate with a laser beam along second dividing lines, and dividing the wafer along the first modified parts and the second modified parts to obtain a plurality of light emitting elements..
Nichia Corporation
03/05/15
20150061935

Method and modeling radio wave environment


A method of modeling a radio wave environment, the method being executed by a radio wave environment modeling apparatus using a group of intelligent robots includes measuring an intensity of radio waves received from at least one follower robot; measuring a distance between the at least one follower robot and a leader robot that belongs to the group of intelligent robots; and estimating an environment parameter using a wave model. Further, the method includes classifying the environment parameter estimated from at least one lattice by comparing the estimated environment parameter with predetermined environment parameters; and analogizing an intensity of radio waves of the at least one follower robot that are received from the at least one lattice..
Electronics And Telecommunications Research Institute
03/05/15
20150061680

Magnet assemblies


There are disclosed magnet arrays and methods for generating magnetic fields. In embodiments magnet arrays comprise a plurality of polyhedral magnets arranged in a lattice configuration and at least partly enclosing a testing volume, the magnet array having an associated magnetic field with a designated field direction {circumflex over (v)}, wherein the magnetization direction {circumflex over (m)} of an individual polyhedral magnet located at a displacement vector {right arrow over (r)} from an origin point in the testing volume is determined by the formula: {circumflex over (m)}=(2({circumflex over (v)}·{right arrow over (r)}){right arrow over (r)}−({right arrow over (r)}·{right arrow over (r)}){circumflex over (v)})/{right arrow over (r)}·{right arrow over (r)}.
Nanalysis Corp.
03/05/15
20150061078

Compound semiconductor structure


A semiconductor structure comprises a substrate comprising a first crystalline semiconductor material, a dielectric layer, above the substrate, defining an opening, a second crystalline semiconductor material at least partially filling the opening, and a crystalline interlayer between the substrate and the second crystalline semiconductor material. The first crystalline semiconductor material and the second crystalline semiconductor material are lattice mismatched, and the crystalline interlayer comprises an oxygen compound.
International Business Machines Corporation
03/05/15
20150061030

Semiconductor structure including metal silicide buffer layers and methods of fabricating the same


Provided are semiconductor structures and methods of fabricating the same. The semiconductor structure includes a silicon substrate, at least one semiconductor layer that is grown on the silicon substrate and has a lattice constant in a range from about 1.03 to about 1.09 times greater than that of the silicon substrate, and a buffer layer that is disposed between the silicon substrate and the semiconductor layer and includes a metal silicide compound for lattice matching with the semiconductor layer.
Samsung Electronics Co., Ltd.
03/05/15
20150060765

Semiconductor device


A semiconductor device includes a superlattice buffer layer formed on a substrate. A first semiconductor layer is formed by a nitride semiconductor on the superlattice buffer layer.
Fujitsu Limited
03/05/15
20150060764

Nitride semiconductor light emitting device and manufacturing the same


A method of manufacturing a nitride semiconductor light emitting device which includes forming an n-type semiconductor layer, forming an active layer on the n-type semiconductor layer, forming a superlattice layer by alternately stacking at least two nitride layers made of inxalyga(1-x-y)n (0≦x≦1, 0≦y≦1, and 0≦x+y≦1) having different energy bandgaps from each other and doped with a p-type dopant, and forming a p-type semiconductor layer on the superlattice layer. The forming of the superlattice layer is performed by adjusting a flow rate of a p-type dopant source gas to reduce the flow rate in a growth termination period of the superlattice layer by no greater than about half of the flow rate in a growth initiation period of the superlattice layer while being doped with the p-type dopant..
Samsung Electronics Co., Ltd.
03/05/15
20150059963

Production scintillator array


A method for producing a scintillator array comprising fixing a scintillator substrate to a support plate via a double-coated adhesive sheet, at least an adhesive surface thereof to be in contact with the scintillator substrate being thermally peelable; providing the scintillator substrate with lattice-patterned grooves to form pluralities of scintillator cells; filling gaps between the scintillator cells with a liquid hardening reflector resin; curing the liquid hardening reflector resin by heating to form a resin-hardened scintillator cell body; and then peeling the double-coated adhesive sheet from the resin-hardened scintillator cell body by heating.. .
Hitachi Metals, Ltd.
03/05/15
20150059840

Solar cells having a transparent composition-graded buffer layer


A solar cell includes a first layer having a first-layer lattice parameter, a second layer having a second-layer lattice parameter different from the first-layer lattice parameter, wherein the second layer includes a photoactive second-layer material; and a third layer having a third-layer lattice parameter different from the second-layer lattice parameter, wherein the third layer includes a photoactive third-layer material. A transparent buffer layer extends between and contacts the second layer and the third layer and has a buffer-layer lattice parameter that varies with increasing distance from the second layer toward the third layer, so as to lattice match to the second layer and to the third layer.
The Boeing Company
03/05/15
20150059214

Article of footwear with color change portion and changing color


An article with a color change portion and a method of changing color. The article includes at least one color change portion capable of changing colors.
Nike, Inc.
03/05/15
20150059129

Production of high purity salt with reduced levels of impurities


The invention discloses an improvement over the existing process of producing solar salt of high purity from seawater and minimizes the need for downstream purification. More particularly, the invention teaches the practical utility of recrystallization of salt in solar salt pans using seawater itself as the dissolving medium.
Council Of Scientific & Industrial Research
02/26/15
20150057995

Data recognition in content


The disclosure relates to recognizing data such as items or entities in content. In some aspects, content may be received and feature information, such as face recognition data and voice recognition data may be generated.
Comcast Cable Communications, Llc
02/26/15
20150056449

Minimal weight composites using open structure


Preforms for open structured (lattice) composite tubular members manufactured from large (i.e. High filament count) prepreg yarns on a conventional maypole braiding machine, and subsequently cured to produce fiber reinforced composites of high strength and light weight..
Auburn University
02/26/15
20150056020

Structures for offshore installations


A structure for mounting offshore installations such as wind turbines or oil and gas platforms. The structure comprises a base, a top piece and a lattice structure connecting the base to the top piece.
Owlc Holdings Ltd.
02/26/15
20150055756

Method of measuring thickness of fe-zn alloy phase of galvannealed steel sheet and measuring the same


A method of measuring a thickness of a fe—zn alloy phase included in the fe—zn alloy coating of the galvannealed steel sheet includes: an x-ray irradiation process of irradiating the galvannealed steel sheet with the incident x-rays; and an x-ray detection process of detecting the diffracted x-rays obtained in the x-ray irradiation process, derived from a Γ·Γ1 phase, a δ1 phase, and a ζ phase included in the fe—zn alloy coating with a crystal lattice spacing d of 1.5 Å or higher.. .
Nippon Steel & Sumitomo Metal Corporation
02/26/15
20150055236

Open architecture structure for trough shaped solar concentrators


The present invention comprises an open architecture lattice geometric structure, aerodynamic provisions to that structure and methods to produce that structure for the manufacture of trough shaped solar concentrators having fresnel reflector elements, such that the wind loading on these trough solar concentrators is substantially reduced compared to traditional trough concentrators with continuous panel structures.. .
02/26/15
20150054529

Electrode structure and capacitance sensor having the same


Provided is an electrode structure for use with a capacitive touch panel to enhance capacitance sensing capability thereof the electrode structure includes electrically conductive fine lines each forming fine line portions, sensing portions, and cross portions. The fine line portions, the sensing portions, and the cross portions together form a latticed pattern.
J Touch Corporation
02/26/15
20150054030

Defect-free sige source/drain formation by epitaxy-free process


Mosfet transistors having localized stressors for improving carrier mobility are provided. Embodiments of the invention comprise a gate electrode formed over a substrate, a carrier channel region in the substrate under the gate electrode, and source/drain regions on either side of the carrier channel region.
Taiwan Semiconductor Manufacturing Company, Ltd.


Popular terms: [SEARCH]

Lattice topics: Semiconductor, Semiconductor Device, Semiconductor Material, Crystallin, Disconnect, Transistors, Replacement Gate, Semiconductor Devices, Dislocations, Dislocation, Image Processing, Coordinates, Surface Plasmon Polariton, Antenna Array

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