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This page is updated frequently with new Lattice-related patent applications. Subscribe to the Lattice RSS feed to automatically get the update: related Lattice RSS feeds. RSS updates for this page: Lattice RSS RSS


Electronic component module

Murata Manufacturing

Electronic component module

Method of providing markings to precious stones including gemstones and diamonds, and markings and marked precious…

Master Dynamic Limited

Method of providing markings to precious stones including gemstones and diamonds, and markings and marked precious…

Method of providing markings to precious stones including gemstones and diamonds, and markings and marked precious…

Acoustiflo

Fan inlet air handling apparatus and methods

Date/App# patent app List of recent Lattice-related patents
04/16/15
20150105241
 Process for the production of non-sintered transition metal carbide and nitride nanoparticles patent thumbnailnew patent Process for the production of non-sintered transition metal carbide and nitride nanoparticles
Transition metal carbide, nitride, phosphide, sulfide, or boride nanoparticles can be made by transforming metal oxide materials coated in a ceramic material in a controlled environment. The coating prevents sintering while allowing the diffusion of reactive gases through the inorganic matrix that can then alter the metal nanoparticle oxidation state, remove oxygen, or intercalate into the lattice to form a carbide, nitride, phosphide, sulfide, or boride..
Massachusetts Institute Of Technology
04/16/15
20150104889
 Semiconductor device, manufacturing  semiconductor device, semiconductor manufacturing and inspecting apparatus, and inspecting apparatus patent thumbnailnew patent Semiconductor device, manufacturing semiconductor device, semiconductor manufacturing and inspecting apparatus, and inspecting apparatus
A semiconductor device having cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (csl) boundary having a grain boundary sigma value 27 or less to all crystal grain boundaries of a cu wiring to 60% or higher.
Renesas Electronics Corporation
04/16/15
20150104294
 Fan inlet air handling apparatus and methods patent thumbnailnew patent Fan inlet air handling apparatus and methods
Particular embodiments of the inventive technology may be described as an air handling shroud for establishment at the inlet area of a fan, the shroud adapted to realign and/or redistribute fan inlet flow so as to reduce fan-generated noise without unacceptably impairing fan efficiency and/or performance. Certain embodiments present a lattice arrangement of cells through which air flows; the shroud may protrude up from an inlet face lying in a plane defined by the fan (e.g., by the fan housing or an inlet cone).
Acoustiflo, Llc
04/16/15
20150103495
 Electronic component module patent thumbnailnew patent Electronic component module
A plating layer of a cu—m-based alloy (m represents ni and/or mn) is formed on an end surface of a connection terminal member at an exposed side, the cu—m-based alloy being capable of generating an intermetallic compound with an sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the cu—m-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer..
Murata Manufacturing Co., Ltd.
04/16/15
20150102465
 Material quality, suspended material structures on lattice-mismatched substrates patent thumbnailnew patent Material quality, suspended material structures on lattice-mismatched substrates
Suspended structures are provided using selective etch technology. Such structures can be protected on all sides when the selective undercut etch is performed, thereby providing excellent control of feature geometry combined with superior material quality..
The Board Of Trustees Of The Leland Stanford Junior University
04/16/15
20150102387
 High electron mobility transistors with minimized performance effects of microcracks in the channel layers patent thumbnailnew patent High electron mobility transistors with minimized performance effects of microcracks in the channel layers
In hemts based on iii-nitrides epitaxial films or gaas, algaas and ingaas epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's.
04/16/15
20150101365
 Method of providing markings to precious stones including gemstones and diamonds, and markings and marked precious stones marked according to such a method patent thumbnailnew patent Method of providing markings to precious stones including gemstones and diamonds, and markings and marked precious stones marked according to such a method
An identifiable mark on a portion of a polished facet of a surface of an article and being identifiable by an optical magnifying viewing device, said identifiable mark comprising a nano-structure formed by a two-dimensional or a three-dimensional lattice of a plurality of discrete nanometer sized recessed or protruded entities, wherein said entities are arranged within a predefined region of said polished facet in a predetermined arrangement in relation to each other and such that an outer interface surface between the facet of the article and air is formed and an inner interface surface between the facet of the article and air is formed. Said predetermined arrangement of said entities is non-uniform and non-periodic arrangement, and wherein said entities are sized and shaped so as to cause optical scattering upon reflection of incident light and the distance from the inner interface surface to the outer interface surface is greater than the amplitude of the non-marked portion of said polished face.
Master Dynamic Limited
04/09/15
20150100316
 System and  advanced turn-taking for interactive spoken dialog systems patent thumbnailSystem and advanced turn-taking for interactive spoken dialog systems
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for advanced turn-taking in an interactive spoken dialog system. A system configured according to this disclosure can incrementally process speech prior to completion of the speech utterance, and can communicate partial speech recognition results upon finding particular conditions.
At&t Intellectual Property I, L.p.
04/09/15
20150100148
 Printing plate manufacturing apparatus and computer-readable non-transitory recording medium storing a data generating program and a control program for a printing plate manufacturing apparatus patent thumbnailPrinting plate manufacturing apparatus and computer-readable non-transitory recording medium storing a data generating program and a control program for a printing plate manufacturing apparatus
A computer readable non-transitory recording medium storing a control program for controlling a manufacturing apparatus which manufactures a printing plate from a thermoplastic porous material and comprises a thermal head with a plurality of heater elements, the control program causing a computer to: acquire print data corresponding to a print pattern and including pixel data, with each item of pixel data corresponding to each area of the surface of the porous material partitioned into a lattice shape; identify, based on the print data, print pixel data that is part of the pixel data and is pixel data comprising the print pattern, and non-print pixel data that is the other part of the pixel data and is pixel data not comprising the print pattern; selectively apply a first heat quantity to a first area corresponding to the non-print pixel data by at least one first heater element, among the plurality of heater elements provided on the thermal head, that makes contact with the first area; and selectively apply a second heat quantity that is smaller than the first heat quantity to a second area by at least one second heater element, among the plurality of heater elements, that makes contact with the second area identified by the control data of the print pixel data, the second area being where ink readily runs.. .
Casio Computer Co., Ltd.
04/09/15
20150099623
 Oxide film and proton conductive device patent thumbnailOxide film and proton conductive device
The present invention provides an oxide film composed of an oxide having a perovskite crystal structure. The oxide is represented by a chemical formula a1-x(e1-ygy)oz.
Panasonic Corporation
04/09/15
20150099350

Enabling high activation of dopants in indium-aluminum-galium-nitride material system using hot implantation and nanosecond annealing


Embodiments of the present disclosure generally relate to doping and annealing substrates. The substrates may be doped during a hot implantation process, and subsequently annealed using a nanosecond annealing process.
Applied Materials, Inc.
04/09/15
20150099300

Use of adipose tissue-derived stromal cells for chondrocyte differentiation and cartilage repair


Methods and compositions for directing adipose-derived stromal cells cultivated in vitro to differentiate into cells of the chondrocyte lineage are disclosed. The invention further provides a variety of chondroinductive agents which can be used singly or in combination with other nutrient components to induce chondrogenesis in adipose-derived stromal cells either in cultivating monolayers or in a biocompatible lattice or matrix in a three-dimensional configuration.
Artecel Sciences Inc.
04/09/15
20150097239

Passivation structure of fin field effect transistor


A finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower fin portion comprising a first semiconductor material having a first lattice constant; an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant; a middle fin portion comprising a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant; and a passivation structure surrounding the fin structure comprising a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material; an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material; and a middle passivation portion surrounding the middle fin portion comprising a third oxynitride of the third semiconductor material.. .
Taiwan Semiconductor Manufacturing Company, Ltd.
04/02/15
20150094847

Error correction amount creating device


In an error correction amount creating device that creates an error correction amount for a five-axis machine controlled by a numerical controller and having three linear axes and two rotation axes, the translation error correction amount and the rotation error correction amount for each lattice point of a lattice region into which a two-dimensional coordinate system space with the rotation axes is divided is obtained from data measured for each position of division of the respective axes and given to the numerical controller.. .
Fanuc Corporation
04/02/15
20150093318

Periodic table group 13 metal nitride crystals and manufacturing periodic table group 13 metal nitride crystals


A periodic table group 13 metal nitride crystals grown with a non-polar or semi-polar principal surface have numerous stacking faults. The purpose of the present invention is to provide a period table group 13 metal nitride crystal wherein the occurrence of stacking faults of this kind are suppressed.
Mitsubishi Chemical Corporation
04/02/15
20150092092

Imaging element and imaging device


An imaging element having a plurality of pixel cells which is arranged in a row direction and a column direction which is perpendicular to the row direction in a lattice, in which two adjacent pixel cells which include photoelectric convening units which detect the same color light form a pair and the pairs are periodically arranged, in each of pixel cell rows in which pixel cells are arranged in the row direction, the micro lenses are arranged such that the micro lenses in odd-numbered pixel cell rows is off-centered in the row direction from the micro lenses in even-numbered pixel cell rows by a half of an arrangement pitch of the micro lenses, and each micro lens which is provided in at least one of the odd-numbered row and the even-numbered row is disposed over two photoelectric converting units which detect different color light.. .
Fujifilm Corporation
04/02/15
20150091599

Semiconductor testing jig and transfer jig for the same


A semiconductor testing jig is provided with a conductive stage including a plurality of mounting portions on which a plurality of vertical semiconductor devices are each individually disposed with lower surface electrodes being in contact with the plurality of mounting portions, an insulating frame portion having a lattice pattern that is disposed on the stage and surrounds each of the plurality of mounting portions in plan view to define each of the mounting portions, and an abrasive layer disposed in a position in the frame portion, the position facing each of the vertical semiconductor devices disposed on the mounting portions.. .
Mitsubishi Electric Corporation
04/02/15
20150091207

Center insulated concrete form


The invention is the manufactured assembly and process of using the concrete/cementous material flow through lattice panels to form and pour a center insulated concrete/cementous material poured wall. The center insulating solid panel, such as rigid insulation foam, is attached on both faces of the insulating solid panel to the flow through lattice panels by connecting cross members, or webs, keeping the concrete flow through lattice panels kept spaced apart and connected parallel to the solid insulation panel.
04/02/15
20150090957

Semiconductor device and manufacturing method thereof


A semiconductor device includes a first superlattice buffer layer formed on a substrate. A second superlattice buffer layer is formed on the first superlattice buffer layer.
Fujitsu Limited
04/02/15
20150090942

Crystals of semiconductor material having a tuned band gap energy and preparation thereof


The present invention provides a semiconductor crystal comprising a semiconductor material having a tuned band gap energy, and methods for preparation thereof. More particularly, the invention provides a semiconductor crystal comprising a semiconductor material and amino acid molecules, peptides, or a combination thereof, incorporated within the crystal lattice, wherein the amino acid molecules, peptides, or combination thereof tune the band gap energy of the semiconductor material..
Technion Research And Development Foundation Ltd.
04/02/15
20150090321

Inverted metamorphic multijunction solar cells with doped alpha layer


A method of forming a multijunction solar cell comprising at least an upper subcell, a middle subcell, and a lower subcell, the method including forming a first alpha layer over said middle solar subcell using a surfactant and dopant including selenium, the first alpha layer configured to prevent threading dislocations from propagating; forming a metamorphic grading interlayer over and directly adjacent to said first alpha layer; forming a second alpha layer using a surfactant and dopant including selenium over and directly adjacent to said grading interlayer to prevent threading dislocations from propagating; and forming a lower solar subcell over said grading interlayer such that said lower solar subcell is lattice mismatched with respect to said middle solar subcell.. .
Emcore Solar Power, Inc.
04/02/15
20150090180

Epitaxial growth of compound semiconductors using lattice-tuned domain-matching epitaxy


A method of epitaxially growing a final film using a crystalline substrate wherein the final film cannot be grown directly on the substrate surface is disclosed. The method includes forming a transition layer on the upper surface of the substrate.
Ultratech, Inc.
03/26/15
20150088510

System and robust access and entry to large structured data using voice form-filling


A method, apparatus and machine-readable medium are provided. A phonotactic grammar is utilized to perform speech recognition on received speech and to generate a phoneme lattice.
At&t Intellectual Property Ii, L.p.
03/26/15
20150087507

Honeycomb ceramic substrates, honeycomb extrusion dies, and methods of making honeycomb ceramic substrates


A honeycomb ceramic substrate, a method of making thereof, and a honeycomb extrusion die configured to extrude a honeycomb ceramic substrate from a batch of ceramic or ceramic-forming material is provided. The substrate may include a lattice of intersecting walls defining a honeycomb network of flow channels extending between an inlet end and an outlet end of the honeycomb substrate.
Corning Incorporated
03/26/15
20150087137

Nitride thin film stucture and forming the same


Provided are a nitride thin film structure and a method of forming the same. If a nitride thin film is formed on a substrate that is not a nitride, many defects are generated by a difference in lattice constants between the substrate and the nitride thin film.
Snu R&db Foundation
03/26/15
20150086219

Enhanced optical modulation using slow light


A photonic integrated circuit (pic) is described. This pic includes a semiconductor-barrier layer-semiconductor diode in an optical waveguide that conveys an optical signal, where the barrier layer is an oxide or a high-k material.
Oracle International Corporation
03/26/15
20150086153

Optical device having a stepwise or tapered light input/output part and manufacturing method therefor


In a method of manufacturing an optical device including an optical waveguide having a core, a cladding and a light input/output part through which a light beam is input or output, a substrate is prepared which is provided with a uniform thickness of single-crystalline film having its constituent atoms forming a diamond lattice structure and its surface being neither the (111) plane nor its equivalent planes. In the single-crystalline film, a precursor structure is formed which has a precursor of light input/output part.
Photonics Electronics Technology Research Association
03/26/15
20150084065

Sic single crystal substrate


A single crystal sic substrate capable of forming a good epitaxial thin film thereon to give a high-quality epitaxial substrate is provided. The single crystal sic substrate has a cmp-treated surface and has 5 or fewer lattice defects measuring 30 nm or more in a direction parallel to the polished surface and 50 nm or more in a direction perpendicular to the polished surface as counted within a depth of 100 nm from the polished surface in a direction perpendicular to the polished surface and a length of 10 μm in a direction parallel to the polished surface when observed in cross-section using a transmission electron microscope under the 00l reflection or the h-h0 reflection, where l and h are each an integer other than 0..
Mitsui Mining & Smelting Co., Ltd.
03/26/15
20150083178

Seebeck/peltier thermoelectric conversion device having phonon confinement layers of crystalline semiconductor containing angstrom-sized organic groups as semiconductor atoms substituents within the crystal lattice and fabrication process


Significant phonon migration restraint is achieved within a relatively homogeneous polycrystalline doped semiconductor bulk by purposely creating in the crystal lattice of the semiconductor hydrocarbon bonds with the semiconductor, typically si or ge, constituting effective organic group substituents of semiconductor atoms in the crystalline domains. An important enhancement of the factor of merit z of such a modified electrically conductive doped semiconductor is obtained without resorting to nanometric cross sectional dimensions in order to rely on surface scattering eventually enhanced by making the surface highly irregular and/or creating nanocavities within the bulk of the conductive material.
Consorzio Delta Ti Research
03/26/15
20150083037

Isoelectronic surfactant induced sublattice disordering in optoelectronic devices


A method of disordering a layer of an optoelectronic device including; growing a plurality of lower layers; introducing an isoelectronic surfactant; growing a layer; allowing the surfactant to desorb; and growing subsequent layers all performed at a low pressure of 25 torr.. .
The Boeing Company
03/19/15
20150081101

Engine control device


It is a task of the invention to make it possible to calculate a control target value of one actuator or control target values of a plurality of actuators regarding engine control at a high speed through the use of a multicore processor. With a view to accomplishing this task, a plurality of lattice points that are arranged on a two-dimensional orthogonal coordinate system having axes representing a first operating condition and a second operating condition respectively are associated respectively with at least one or some of a plurality of cores that are arranged in a latticed manner on the multicore processor on one-on-one level on a same line as on the two-dimensional orthogonal coordinate system, and a calculation program for calculating an optimal control value at the associated lattice point or calculation programs for calculating optimal control values at the associated lattice points are allocated respectively to at least one or some of the plurality of the cores.
Toyota Jidosha Kabushiki Kaisha
03/19/15
20150080609

Process for reducing chloronitrobenzene catalyzed by platinum-nanoparticles stabilized on modified montmorillonite clay


Pt0-nanoparticles in the size range of 0 to 10 nm were prepared in-situ by impregnation of h2ptcl66h2o into the nanopores of modified montmorillonite followed by reduction with different reducing agents like ethylene glycol, sodium citrate, hydrogen, hydrazine and sodium borohydrate. The montmorillonite was modified by activation with mineral acids under controlled condition for generating desired nanopores.
Council Of Scientific & Industrial Research
03/19/15
20150079803

Method of forming strain-relaxed buffer layers


Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top.
Applied Materials, Inc.
03/19/15
20150079770

Selective layer disordering in iii-nitrides with a capping layer


Selective layer disordering in a doped iii-nitride superlattice can be achieved by depositing a dielectric capping layer on a portion of the surface of the superlattice and annealing the superlattice to induce disorder of the layer interfaces under the uncapped portion and suppress disorder of the interfaces under the capped portion. The method can be used to create devices, such as optical waveguides, light-emitting diodes, photodetectors, solar cells, modulators, laser, and amplifiers..
Sandia Corporation
03/19/15
20150079440

Producing electrodes for lead-acid batteries


The invention relates to a method for producing electrodes (14) for lead-acid batteries (30). An electrode (14) that has been produced comprises at least one upper and/or one lower frame element as well as a lattice-shaped region (12) that extends away from said upper or lower frame element (9, 10) and has a plurality of openings, the upper and/or lower frame element (9, 10) being of a greater thickness (d) than the lattice-shaped region (12).
Johnson Controls Autobatterie Gmbh & Co. Kgaa
03/19/15
20150079352

Graphene and hexagonal boron nitride planes and associated methods


Graphene layers made of primarily sp2 bonded atoms and associated methods are disclosed. In one aspect, for example, a method of forming a graphite film can include heating a solid substrate under vacuum to a solubilizing temperature that is less than a melting point of the solid substrate, solubilizing carbon atoms from a graphite source into the heated solid substrate, and cooling the heated solid substrate at a rate sufficient to form a graphite film from the solubilized carbon atoms on at least one surface of the solid substrate.
03/19/15
20150077651

Touch panel substrate and display apparatus


Provided is a touch panel substrate to be used in a touch panel, the touch panel substrate having improved display qualities. A touch panel substrate of one embodiment of the present invention is provided with a first detection electrode having a plurality of first lattice electrodes that are aligned in the lateral direction.
Sharp Kabushiki Kaisha
03/19/15
20150077267

Modular light system and related methods


A modular warning light system for warning aerial vehicles of an obstacle such as a steel lattice tower includes a support, a light structure adjustably mounted onto the support, a warning light coupled to the light structure, and a power system coupled to the light structure. The power system comprises a solar panel and a rechargeable battery.
San Diego Gas & Electric Company
03/19/15
20150076678

Semiconductor device


A partition in lattice form forms a plurality of housing sections. A plurality of circuit blocks including a semiconductor block and a terminal base block are electrically connected one to another in a state of being housed in the housing sections to form a power semiconductor circuit.
Mitsubishi Electric Corporation
03/19/15
20150076558

Semiconductor structure and the manufacturing method thereof


The present disclosure provides a finfet. The finfet includes a silicon-on-insulator (soi) with an insulator; a plurality of fin structures on the insulator; an isolation on the insulator, and between two adjacent fin structures in the plurality of fin structures; and an oxide layer between each of the plurality of fin structures and the insulator, wherein the insulator comprises silicon germanium oxide.
Taiwan Semiconductor Manufacturing Company Ltd.
03/19/15
20150076514

Method to induce strain in finfet channels from an adjacent region


Methods and structures for forming strained-channel finfets are described. Fin structures for finfets may be formed using two epitaxial layers of different lattice constants that are grown over a bulk substrate.
Stmicroelectronics, Inc.
03/19/15
20150076511

Semiconductor device


A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, ga-face grown, lattice relaxed, and having a composition in1−zalzn (0≦z≦1), a channel layer having a composition of: alxga1−xn (0≦x≦1) or inyga1−yn (0≦y≦1). Or gan provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode..
Renesas Electronics Corporation
03/19/15
20150076449

Semiconductor device and manufacturing method thereof


A semiconductor device includes a superlattice buffer layer formed on a substrate. An upper buffer layer is formed on the superlattice buffer layer.
Fujitsu Limited
03/19/15
20150075613

Solar cell


A solar cell includes: a crystalline silicon substrate of one conductivity type including a first principal surface, and a second principal surface provided on an opposite side from the first principal surface; a first amorphous silicon layer of the other conductivity type provided on the first principal surface side; a second amorphous silicon layer of the one conductivity type provided on the second principal surface side; a contact layer in contact with the second amorphous silicon layer; a magnesium-doped zinc oxide layer in contact with the contact layer; a first electrode layer provided on the first amorphous silicon layer; and a second electrode layer provided on the magnesium-doped zinc oxide layer. A lattice constant of the contact layer is within a range of plus or minus 30% relative to a lattice constant of the magnesium-doped zinc oxide layer..
Sanyo Electric Co., Ltd.
03/12/15
20150073792

Method and system for automatically detecting morphemes in a task classification system using lattices


The invention concerns a method and corresponding system for building a phonotactic model for domain independent speech recognition. The method may include recognizing phones from a user's input communication using a current phonotactic model, detecting morphemes (acoustic and/or non-acoustic) from the recognized phones, and outputting the detected morphemes for processing.
At&t Intellectual Property Ii, L.p.
03/12/15
20150072105

Superimposed composite interior component


A laminated composite interior component, including: a first member that has a predetermined mating surface; and a second member made of an elastically deformable resin material, the second member having a plate-like portion that is substantially parallel to the mating surface and that has multiple protrusions which are formed integrally with plate-like portion and which protrude toward the mating surface such that a space is formed between the mating surface and the plate-like portion, the second member being arranged so as to be laminated on the first member with the protrusions in contact with the mating surface, cushioning characteristics being imparted to the laminated composite interior component when distal ends of the protrusions are pressed against the mating surface and elastically deformed, the laminated composite interior component being configured such that the multiple protrusions have the same shape, the plate-like portion is dotted with the multiple protrusions, bending stiffness of each of the protrusions against a compression load is anisotropic around an axis of the protrusion, and each of the multiple protrusions is configured to be bent and deformed in a specific direction about its axis, and the multiple protrusions are arranged at such locations as to constitute respective sides of each of multiple polygons so that there is formed a lattice pattern in which each of the sides of each of the multiple polygons overlaps with a corresponding one of the sides of an adjacent one of the polygons.. .
Toyoda Iron Works Co., Ltd.
03/12/15
20150069474

Isolation structure of fin field effect transistor


The disclosure relates to a fin field effect transistor (finfet). An exemplary finfet comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower portion comprising a first semiconductor material having a first lattice constant; an upper portion comprising the first semiconductor material, wherein a bottom portion of the upper portion comprises a dopant with a first peak concentration; a middle portion between the lower portion and upper portion, wherein the middle portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; and an isolation structure surrounding the fin structure, wherein a portion of the isolation structure adjacent to the bottom portion of the upper portion comprises the dopant with a second peak concentration equal to or greater than the first peak concentration..
Taiwan Semiconductor Manufacturing Company, Ltd.
03/12/15
20150069465

High percentage silicon germanium alloy fin formation


A layer of a silicon germanium alloy containing 30 atomic percent or greater germanium and containing substitutional carbon is grown on a surface of a semiconductor layer. The presence of the substitutional carbon in the layer of silicon germanium alloy compensates the strain of the silicon germanium alloy, and suppresses defect formation.
International Business Machines Corporation
03/12/15
20150069409

Heterostructure with carrier concentration enhanced by single crystal reo induced strains


A heterostructure grown on a silicon substrate includes a single crystal rare earth oxide template positioned on a silicon substrate, the template being substantially crystal lattice matched to the surface of the silicon substrate. A heterostructure is positioned on the template and defines at least one heterojunction at an interface between a iii-n layer and a iii-iii-n layer.
03/12/15
20150069327

Fin field-effect transistors with superlattice channels


Finfet structures may be formed including superlattice fins. The structure may include a superlattice fin of alternating layers of silicon-germanium with a germanium concentration of approximately 10% to 80% and a second semiconductor material.
International Business Machines Corporation
03/12/15
20150068581

Fabrication multi-junction solar cells


A fabrication method for high-efficiency multi junction solar cells, including: providing a ge substrate for semiconductor epitaxial growth; growing an emitter region over the ge substrate (as the base) to form a first subcell with a first band gap; forming a second subcell with a second band gap larger than the first band gap and lattice matched with the first subcell over the first subcell via mbe; forming a third subcell with a third band gap larger than the second band gap and lattice matched with the first and second subcells over the second subcell via mocvd; and forming a fourth subcell with a fourth band gap larger than the third band gap and lattice matched with the first, second and third subcells over the third subcell via mocvd.. .
Xiamen Sanan Optoelectronics Technology Co., Ltd.
03/12/15
20150068576

Superlattice quantum well thermoelectric generator via radiation exchange and/or conduction/convection


In at least one embodiment a thermoelectric generator is provided. The thermoelectric generator includes a cap and a thermopile.
Ud Holdings, Llc
03/05/15
20150066944

Data processing, apparatus and methods


The invention provides an apparatus for processing data items in a data source, and an equivalent method. More specifically, the apparatus is configured to reduce a lattice representation of data items in a data source.
British Telecommunications Public Limited Company
03/05/15
20150065805

Surgical retractor


A surgical retractor device for retaining and/or moving internal organs during minimally invasive or laparoscopic surgery is provided. The surgical retractor can be a single continuous structure that includes a shaft.
Brigham Young University
03/05/15
20150065332

Methods of preparing novel enhanced high q material compositions


A framework for developing high quality factor (q) material for electronic applications in the radio frequency range is provided. In one implementation, ceramic materials having a tungsten bronze crystal structure is modified by substituting one or more elements at one or more lattice sites on the crystal structure.
Skyworks Solutions, Inc.
03/05/15
20150065314

Gripper wraps


Embodiments of the current invention are directed towards solving the need for weightlifting wraps which prevent slippage, increase rebound potential, allow simpler application, and provide greater stability. An embodiment of the invention comprises: gripper wraps made of stretchable material; the gripper wraps having exposed rubber strands on one outer surface of the gripper wraps; the exposed rubber strands arranged in an offset lattice configuration, wherein the exposed rubber strands have a coefficient of friction sufficient to grip the previous layer of wrap..
03/05/15
20150064823

Method for manufacturing light emitting element


A method for manufacturing a light emitting element that includes preparing a wafer having a substrate and a semiconductor structure, the substrate including a plurality of protrusions at positions corresponding to lattice points on a triangular lattice. The method includes forming a plurality of first modified parts in the substrate by irradiating the substrate with a laser beam along first dividing lines, forming a plurality of second modified parts in the substrate by irradiating the substrate with a laser beam along second dividing lines, and dividing the wafer along the first modified parts and the second modified parts to obtain a plurality of light emitting elements..
Nichia Corporation
03/05/15
20150061935

Method and modeling radio wave environment


A method of modeling a radio wave environment, the method being executed by a radio wave environment modeling apparatus using a group of intelligent robots includes measuring an intensity of radio waves received from at least one follower robot; measuring a distance between the at least one follower robot and a leader robot that belongs to the group of intelligent robots; and estimating an environment parameter using a wave model. Further, the method includes classifying the environment parameter estimated from at least one lattice by comparing the estimated environment parameter with predetermined environment parameters; and analogizing an intensity of radio waves of the at least one follower robot that are received from the at least one lattice..
Electronics And Telecommunications Research Institute
03/05/15
20150061680

Magnet assemblies


There are disclosed magnet arrays and methods for generating magnetic fields. In embodiments magnet arrays comprise a plurality of polyhedral magnets arranged in a lattice configuration and at least partly enclosing a testing volume, the magnet array having an associated magnetic field with a designated field direction {circumflex over (v)}, wherein the magnetization direction {circumflex over (m)} of an individual polyhedral magnet located at a displacement vector {right arrow over (r)} from an origin point in the testing volume is determined by the formula: {circumflex over (m)}=(2({circumflex over (v)}·{right arrow over (r)}){right arrow over (r)}−({right arrow over (r)}·{right arrow over (r)}){circumflex over (v)})/{right arrow over (r)}·{right arrow over (r)}.
Nanalysis Corp.
03/05/15
20150061078

Compound semiconductor structure


A semiconductor structure comprises a substrate comprising a first crystalline semiconductor material, a dielectric layer, above the substrate, defining an opening, a second crystalline semiconductor material at least partially filling the opening, and a crystalline interlayer between the substrate and the second crystalline semiconductor material. The first crystalline semiconductor material and the second crystalline semiconductor material are lattice mismatched, and the crystalline interlayer comprises an oxygen compound.
International Business Machines Corporation
03/05/15
20150061030

Semiconductor structure including metal silicide buffer layers and methods of fabricating the same


Provided are semiconductor structures and methods of fabricating the same. The semiconductor structure includes a silicon substrate, at least one semiconductor layer that is grown on the silicon substrate and has a lattice constant in a range from about 1.03 to about 1.09 times greater than that of the silicon substrate, and a buffer layer that is disposed between the silicon substrate and the semiconductor layer and includes a metal silicide compound for lattice matching with the semiconductor layer.
Samsung Electronics Co., Ltd.


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Lattice topics: Semiconductor, Semiconductor Device, Semiconductor Material, Crystallin, Disconnect, Transistors, Replacement Gate, Semiconductor Devices, Dislocations, Dislocation, Image Processing, Coordinates, Surface Plasmon Polariton, Antenna Array

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