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Jitter patents

      

This page is updated frequently with new Jitter-related patent applications.




 Vibratory flow meter and method to generate digital frequency outputs patent thumbnailVibratory flow meter and method to generate digital frequency outputs
A device and method to generate digital serial frequency outputs in a coriolis flow meter is provided. The present invention provides the theoretically lowest jitter for a given input clock, the highest possible pulse count accuracy, the highest possible absolute accuracy, easily implementable other aspects (including quadrature, pulse width, etc.) and requires no specialized external hardware, and is, therefore, implemented with commonly available serial output hardware found in most microcontrollers..
Micro Motion, Inc.


 Circuit for introducing signal jitter patent thumbnailCircuit for introducing signal jitter
A circuit that introduces a calibrated amount of jitter and/or amplitude variation into a signal. By generating a signal with some predetermined amount of variation, signal consuming equipment may be tested to verify that it can properly extract the information from the signal, despite the presence of such variation.
Microsoft Technology Licensing, Llc


 Apparatus and methods for fractional-n phase-locked loops with multi-phase oscillators patent thumbnailApparatus and methods for fractional-n phase-locked loops with multi-phase oscillators
Apparatus and methods for fractional-n synthesizer phase-locked loops with multi-phase oscillators are provided. In certain configurations, a fractional-n pll includes a time-to-digital converter (tdc), a digital loop filter, a multi-phase oscillator, and fractional division circuitry.
Analog Devices, Inc.


 Noise reduction in non-linear signal processing patent thumbnailNoise reduction in non-linear signal processing
A method for reducing the jitter introduced into a digital signal by a non-linear processing element involves applying an input word representing the digital signal to a first signal path comprising a first non-linear processing element, and a complementary version of the input word to a second signal path comprising a second non-linear processing element. A common mode dither signal is injected into each signal path upstream of the non-linear processing elements.
Microsemi Semiconductor Ulc


 Techniques to dynamically configure jitter buffer sizing patent thumbnailTechniques to dynamically configure jitter buffer sizing
Techniques to dynamically configure jitter buffer sizing are described. In one embodiment, an apparatus may comprise a streaming component operative to perform a streaming network connection for a media stream; a media playback component operative to playback the media stream; and a media buffer component operative to maintain a jitter buffer for a streaming network connection on a client device; generate a media frame distribution based on at least one of media frame retrieval from the jitter buffer by the media playback component and media frame addition to the jitter buffer by the streaming component; determine a jitter buffer target size based on the media frame distribution; and apply the jitter buffer target size to the maintaining of the jitter buffer for the streaming network connection.
Whatsapp Inc.


 Circuit and  creating additional data transitions patent thumbnailCircuit and creating additional data transitions
When a data path includes cmos circuitry, such circuitry may introduce jitter into the data signal. Embodiments are described in which additional data transitions are made to occur, and these additional data transitions may change the characteristics of the data frequency content transferred to the power supply so that such noise may be better filtered.
Inphi Corporation


 Frequency jittering control circuit and the method thereof patent thumbnailFrequency jittering control circuit and the method thereof
A control method of frequency jittering with a switching mode power supply, comprising: turning on and off a power switch of the switching mode power supply alternatively; updating a peak current signal of the switching mode power supply at a beginning of an on time of the power switch according to a length of a switching period before the beginning of the on time of the power switch, wherein the peak current signal varies as the length of the switching period changes.. .
Monolithic Power Systems, Inc.


 System and  testing data channel bandwidth, packet loss, latency and jitter patent thumbnailSystem and testing data channel bandwidth, packet loss, latency and jitter
A system and method for testing a data channel are provided. In one embodiment, the method includes: (1) transmitting groups of increasing numbers of probing packets of a uniform load over successive time periods over the data channel and (2) determining a bandwidth of the data channel based on receive times and loads of at least some of successfully received ones of the groups..
Nvidia Corporation


 Selection of message passing collectives in presence of system noise patent thumbnailSelection of message passing collectives in presence of system noise
Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms.
International Business Machines Corporation


 Selection of message passing collectives in presence of system noise patent thumbnailSelection of message passing collectives in presence of system noise
Consideration of system jitter in selecting a “message passing collectives algorithm” used in a message passing interface. A set of multiple message passing collectives algorithms are ranked against each other with at least some consideration of relative jitter-related performance as between the algorithms.
International Business Machines Corporation


Load transient and jitter of dc-dc converter

A circuit includes an inductor that receives a switched input voltage to provide an output for driving a load. A driver circuit drives the switched input voltage to the inductor in response to input pulses.
Texas Instruments Incorporated

Semiconductor device, embedded capacitor unit, semiconductor package, and manufacturing embedded capacitor unit

jitter that becomes a problem in a semiconductor part which performs high-speed signal processing is reduced. A semiconductor device includes a heat-resistant metal plate, a capacitor part having a lower electrode, a sintered dielectric part, and an upper electrode that are formed on one or more surfaces of the heat-resistant metal plate, a semiconductor chip fixed on the capacitor part, a wire for electrically connecting a lead frame to the semiconductor chip and the upper electrode, and a mold part in which at least the capacitor part and the semiconductor chip are buried.
Panasonic Intellectual Property Management Co., Ltd.

Method and retention of consumers of network games and services

The disclosure pertains to methods and apparatus for identifying patterns that occur in game play of online games or consumption of other online services, such as massively multiplayer online role playing games (mmorpgs), that tend to lead to a person abandoning the game or service, detecting the occurrence of such patterns during play or consumption, and taking remedial actions to incentivize continued playing of the game or consumption of the service. The patterns may comprise one or a combination of game play events (e.g., losing a game or the players avatar dying) and network events (e.g., jitter)..
Interdigital Technology Corporation

Dynamic jitter buffer size adjustment

A method includes storing data packets in a buffer at a receiving terminal the data packets are received by the receiving terminal from a transmitting terminal the method also includes determining a dropped packet rate at the receiving terminal, a packet transmission latency between the receiving terminal and the transmitting terminal, a signal quality at the receiving terminal, and a use application at the receiving terminal the method further includes dynamically adjusting a size of the buffer based on the dropped packet rate, based on the packet transmission latency, based on the signal quality, and based on the use application.. .
At&t Mobility Ii Llc

Nesting using rigid body simulation

Embodiments of the invention provide systems and methods for nesting objects in 2d sheets and 3d volumes. In one embodiment, a nesting application simplifies the shapes of parts and performs a rigid body simulation of the parts dropping into a 2d sheet or 3d volume.
Autodesk, Inc.

Integrated circuit having receiver jitter tolerance ("jtol") measurement

An integrated circuit capable of on-chip jitter tolerance measurement includes a jitter generator circuit to produce a controlled amount of jitter that is injected into at least one clock signal, and a receive circuit to sample an input signal according to the at least one clock signal. The sampled data values output from the receiver are used to evaluate the integrated circuit's jitter tolerance..
Rambus Inc.

Mitigating electromigration, in-rush current effects, ir-voltage drop, and jitter through metal line and via matrix insertion

Integrated circuits and methods of manufacturing such circuits are disclosed herein that feature metal line-via matrix insertion after place and route processes are performed and/or completed for the integrated circuit's layout. The metal line-via matrix consists of one or more additional metal lines and one or more additional vias that are inserted into the integrated circuit's layout at a specific point to lower the current and current density through a first conductive path that has been determined to suffer from electromigration, ir-voltage drop, and/or jitter.
Qualcomm Incorporated

Methods and systems for virtual conference system using personal communication devices

A method for managing jitter includes determining, by a processor of a master device, at least one of device capabilities of at least one satellite device, device capabilities of the master device, or channel conditions; determining, by the processor of the master device, a de-jitter buffer size based on the at least one of the device capabilities of the at least one satellite device, the device capabilities of the master device, or the channel conditions; and applying, by the processor of the master device, de-jitter buffer having the determined de-jitter buffer size.. .
Qualcomm Incorporated

Internet of things end-to-end service layer quality of service management

Methods, system, and apparatuses may support end-to-end (e2e) quality of service (qos) through the use of service layer (sl) sessions. For example, an application can communicate with a targeted device based on application specified schedule, latency, jitter, error rate, throughput, level of security, and cost requirements..
Convida Wireless, Llc

Injection-locked oscillator and controlling jitter and/or phase noise

Various aspects of an injection-locked oscillator and method for controlling jitter and/or phase noise are disclosed herein. In accordance with an embodiment, an injection-locked oscillator includes one or more circuits that are configured to receive a pair of complementary phase output signals from one or more gain stages of the injection-locked oscillator.
Sony Corporation

Reducing transmitter encoding jitter in a c-phy interface using multiple clock phases to launch symbols

Apparatus, systems and methods for error detection in transmissions on a multi-wire interface are disclosed. One method includes providing a plurality of launch clock signals, including launch clock signals having a different phase shifts, determining a type of transition in signaling state that will occur on each wire of the 3-wire interface at a boundary between two consecutively transmitted symbols, and selecting one of the plurality of launch clock signals to initiate the transition of signaling state on each wire of the 3-phase interface.
Qualcomm Incorporated

Jitter buffer control based on monitoring of delay jitter and conversational dynamics

Some implementations involve analyzing audio packets received during a time interval that corresponds with a conversation analysis segment to determine network jitter dynamics data and conversational interactivity data. The network jitter dynamics data may provide an indication of jitter in a network that relays the audio data packets.
Dolby Laboratories Licensing Corporation

Collaborative clock and data recovery

A receiver serial data streams generates a local timing reference clock from an approximate frequency reference clock by phase-aligning the local clock to transitions in the data stream. This process is commonly known as clock and data recovery (cdr).
Rambus Inc.

Switching power supply control circuit and switching power supply

A jitter control circuit, which reduces conducted emi noise by giving jitter (frequency diffusion) to the operating frequency for driving a switching element, determines an operating frequency fc (e.g., 40 khz) at which reduction effects change from a feedback voltage that represents magnitude of a load. The jitter control circuit causes a, for example, 8-bit counter that generates a modulation frequency to operate with, for example, 8 bits when 40 khz≦fc and 7 bits when fc<40 khz.
Fuji Electric Co., Ltd.

Correcting coordinate jitter in touch screen displays due to forceful touches

An electronic device includes a processor that acquires touch data values corresponding to different locations of a touch display, and identifies an island in the touch data that has touch data values acquired from adjacent locations of the touch display that indicate a potential touch. A first area of the island is determined from touch data values that exceed a first threshold value, and a second area of the island is determined from touch data values that exceed a second threshold value.
Stmicroelectronics Asia Pacific Pte Ltd

Vehicle with hyperlapse video and social networking

A vehicle is described that includes a video camera configured to record video, a processor configured to process the recorded video from the video camera into hyperlapse video, and an input/output device to link the hyperlapse video with a social network associated with at least one of a driver of the vehicle and the vehicle. The processor may be configured to receive video data from the video camera and to create the hyperlapse video by reconstructing a video stream from the video data, planning a smooth path through the video stream, and rendering the video data along the smooth path into the hyperlapse video that has a faster speed and less jitter than the video stream.
Ford Global Technologies, Llc

Jitter buffer level estimation

Some implementations involve controlling a jitter buffer size during a teleconference according to a jitter buffer size estimation algorithm based, at least in part, on a cumulative distribution function (cdf). The cdf may be based, at least in part, on a network jitter parameter.
Dolby Laboratories Licensing Corporation

System and jitter-aware bandwidth estimation

A receiver and method for estimating an available bandwidth of a data channel streaming video data are provided. In one embodiment, the receiver includes: (1) a physical interface configured to receive the video data from a network, (2) a packet memory configured to store frames of the video data, (3) a dispersed packet time calculator configured to calculate a total time for one of the frames to go through the data channel, and (4) a bandwidth estimator configured to determine the available bandwidth of the data channel based on a number of data units received for the one frame and the total time..
Nvidia Corporation

Nutritional supplement and administering the same

A nutritional supplement that improves energy levels in a human being and a method of administering the same to provide enhanced energy is described. The nutritional supplement comprises fat, caffeine, vitamins and minerals enveloped and surrounded in an edible protective coating.
Nrg Innovations Llc

Delta sigma modulator for shaping noise and audio codec having the same

A delta-sigma modulator includes a loop filter, a quantizer configured to change an analog output signal into a digital signal, and a digital-to-analog converter configured to receive the digital signal and including a first capacitor and a second capacitor. In a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage.
Research & Business Foundation, Sungkyunkwan University

Apparatuses and methods for reducing switching jitter

Described are apparatuses and methods for reducing channel physical layer (c-phy) switching jitter. An apparatus may include a pattern dependent delay circuit to detect a switching pattern of at least three data signals on respective wires and adaptively change delays of the at least three data signals based on the switching pattern.
Intel Corporation

Frequency jittering control circuit and a pfm power supply

A frequency jittering control circuit for a pfm power supply includes a pulse frequency modulator to generate a frequency jittering control signal to switch a power switch to generate an output voltage. The frequency jittering control circuit jitters an input signal or an on-time or off-time of the pulse frequency modulator to jitter the switching frequency of the power switch to thereby improve emi issue..
Richtek Technology Corporation

Tunable optical phase filter

An embodiment provides a 850 nm vcsel transmitter that includes an active region having: one or more quantum wells having ingaas material; and two or more quantum well barriers having algaas or gaasp materials adjacent to the one or more quantum wells. An in-phase or anti-phase, step or ring surface relief structure depth control is made on either (i) the topmost gaas surface/contact layers by either dry or wet etching, or (ii) with the help of pecvd made thin sin layer made on gaas layer with wet etching for tunable static and dynamic characteristics such as output power, slope efficiency, and resonance oscillation bandwidth, photon lifetime through its damping, rise/fall times of eye-opening, over shooting, and jitter respectively.
Sae Magnetics (h.k.) Ltd.

Channel coding for real time wireless traffic

Techniques and devices for channel coding real time wireless traffic are described herein. The techniques include initiating communication in an opportunistic network, receiving network performance metrics indicating a quality of service or a quality of experience, determining a channel coding based on the network performance metrics, and transmitting channel coded data.
T-mobile Usa, Inc.

Data communication using bandwidth modulation

Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.. .
Raytheon Company

Methods and data communication using bandwidth modulation

Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.. .
Raytheon Company

Audio clocking apparatus, system, and method

Aspects of the present disclosure involve an audio clocking device including high-frequency crystal oscillators capable of consistent low jitter and phase noise. The audio clocking device ensures that any low-jitter and low-noise signals are maintained as the signal propagates through circuitry of the audio clocking device..
Black Lion Audio, Inc.

Command and control interface for uavs communication through a mobile wireless network

A command and control gateway may implement a command and control interface for uavs that are connected to a wireless network. In one implementation, the command and control gateway may communicate with the uavs using network traffic that is assigned a high priority.
Verizon Patent And Licensing Inc.

Information processing device, information processing method, recording medium, calculation processing device, calculation processing method

The present invention resolves the problems of os jitter and cache pollution, as well as the loss of versatility and increases in development cost. An information processing apparatus includes a control core on which an operating system is installed, and at least one calculation core which is controlled by the control core and performs a predetermined calculation process.
Nec Corporation

Split loop timing recovery

Various embodiments provide systems and methods for performing clock recovery on a received signal using a split loop architecture. A split loop timing recovery apparatus is provided comprising a first path configured for performing frequency offset tracking on a signal by adjusting a receiver clock frequency to match a remote transmitter frequency associated with the signal and a second path configured for tracking random jitter on the signal..
Applied Micro Circuits Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Gravity gradiometer system with spherical air bearing based platform

A non-contacting spherical air bearing-based stable platform for use by a gravity gradiometer instrument (ggi) is provided by attaching a spherical ball-shaped bearing to a rotational stage of the ggi and integrating a concave spherical cup in the linear stage and mounting base assembly of the ggi which is fixedly attached to a host vehicle or platform. The spherical cup supports the spherical ball-shaped bearing on a thin cushion of air provided by a source of compressed air or gas at the concave surface of the spherical cup.
Lockheed Martin Corporation

On-chip jitter measurement

An apparatus for jitter measurement includes a first delay circuit, a second delay circuit, and a control circuit. The first delay circuit imposes a preliminary phase delay on an input signal to generate a delayed input signal.
Faraday Technology Corp.

Method and synchronization of slave clock to master clock

Existing synchronization methods can be inefficient in hardware-assisted implementations because of the effects of various jittery events. Thus, a method and an apparatus are provided to synchronize a slave device's clock to a master device's clock for a hardware-assisted implementation.
Analog Devices Global

Jitter improvement in serializer-deserializer (serdes) transmitters

Systems and methods are provided for jitter improvement in serializer-deserializer (serdes) transmitters. One or more adjustments may be applied in serdes transmitter circuitry to reduce jitter in a serial output of the serdes transmitter circuitry, which may occur as a result of processing of input data.
Maxlinear, Inc.

Jitter control circuit within chip and associated jitter control method

A jitter control circuit within a chip comprises an adaptive pdn, a current generator and a jitter generator. The adaptive pdn is capable of being controlled/modulated to provide difference impedances.
Mediatek Inc.

Load responsive jitter

A controller for use in a power converter includes a comparator to compare a current sense signal with a current limit to generate a comparator output signal representative of whether a switch current has reached the current limit. A drive circuit controls switching of a power switch to regulate an output of the power converter in response to a feedback signal and the comparator output signal.
Power Integrations, Inc.

Controlling emission of an optical pulse from a laser

A method for use in controlling emission of an optical pulse from a laser comprises pumping a gain medium of a laser at a rate which is limited so that free-running passive q-switching of the laser is prevented regardless of a duration of pumping of the gain medium. The method further comprises triggering a saturable absorber of the laser so as to reduce a laser cavity loss below a laser cavity gain and cause an optical pulse to be emitted from the laser at a desired emission time.
Thales Holdings Uk Plc



Jitter topics:
  • Duty Cycle Correction
  • Differential Amplifier
  • Duty Cycle
  • Frequency Detector
  • Photosensitive Drum
  • Simulation
  • Cell Phone
  • Data Packet
  • Mean Opinion Score
  • Network Communication
  • Signal Processing
  • Sequencing
  • Transmitter
  • Asynchronous
  • High Performance Serial Bus


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    This listing is a sample listing of patent applications related to Jitter for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Jitter with additional patents listed. Browse our RSS directory or Search for other possible listings.


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