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Jitter patents

      

This page is updated frequently with new Jitter-related patent applications.




 Delta sigma modulator for shaping noise and audio codec having the same patent thumbnailnew patent Delta sigma modulator for shaping noise and audio codec having the same
A delta-sigma modulator includes a loop filter, a quantizer configured to change an analog output signal into a digital signal, and a digital-to-analog converter configured to receive the digital signal and including a first capacitor and a second capacitor. In a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage.
Research & Business Foundation, Sungkyunkwan University


 Apparatuses and methods for reducing switching jitter patent thumbnailApparatuses and methods for reducing switching jitter
Described are apparatuses and methods for reducing channel physical layer (c-phy) switching jitter. An apparatus may include a pattern dependent delay circuit to detect a switching pattern of at least three data signals on respective wires and adaptively change delays of the at least three data signals based on the switching pattern.
Intel Corporation


 Frequency jittering control circuit and  a pfm power supply patent thumbnailFrequency jittering control circuit and a pfm power supply
A frequency jittering control circuit for a pfm power supply includes a pulse frequency modulator to generate a frequency jittering control signal to switch a power switch to generate an output voltage. The frequency jittering control circuit jitters an input signal or an on-time or off-time of the pulse frequency modulator to jitter the switching frequency of the power switch to thereby improve emi issue..
Richtek Technology Corporation


 Tunable optical phase filter patent thumbnailTunable optical phase filter
An embodiment provides a 850 nm vcsel transmitter that includes an active region having: one or more quantum wells having ingaas material; and two or more quantum well barriers having algaas or gaasp materials adjacent to the one or more quantum wells. An in-phase or anti-phase, step or ring surface relief structure depth control is made on either (i) the topmost gaas surface/contact layers by either dry or wet etching, or (ii) with the help of pecvd made thin sin layer made on gaas layer with wet etching for tunable static and dynamic characteristics such as output power, slope efficiency, and resonance oscillation bandwidth, photon lifetime through its damping, rise/fall times of eye-opening, over shooting, and jitter respectively.
Sae Magnetics (h.k.) Ltd.


 Channel coding for real time wireless traffic patent thumbnailChannel coding for real time wireless traffic
Techniques and devices for channel coding real time wireless traffic are described herein. The techniques include initiating communication in an opportunistic network, receiving network performance metrics indicating a quality of service or a quality of experience, determining a channel coding based on the network performance metrics, and transmitting channel coded data.
T-mobile Usa, Inc.


 Data communication using bandwidth modulation patent thumbnailData communication using bandwidth modulation
Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.. .
Raytheon Company


 Methods and  data communication using bandwidth modulation patent thumbnailMethods and data communication using bandwidth modulation
Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.. .
Raytheon Company


 Audio clocking apparatus, system, and method patent thumbnailAudio clocking apparatus, system, and method
Aspects of the present disclosure involve an audio clocking device including high-frequency crystal oscillators capable of consistent low jitter and phase noise. The audio clocking device ensures that any low-jitter and low-noise signals are maintained as the signal propagates through circuitry of the audio clocking device..
Black Lion Audio, Inc.


 Command and control interface for uavs communication through a mobile wireless network patent thumbnailCommand and control interface for uavs communication through a mobile wireless network
A command and control gateway may implement a command and control interface for uavs that are connected to a wireless network. In one implementation, the command and control gateway may communicate with the uavs using network traffic that is assigned a high priority.
Verizon Patent And Licensing Inc.


 Information processing device, information processing method, recording medium, calculation processing device, calculation processing method patent thumbnailInformation processing device, information processing method, recording medium, calculation processing device, calculation processing method
The present invention resolves the problems of os jitter and cache pollution, as well as the loss of versatility and increases in development cost. An information processing apparatus includes a control core on which an operating system is installed, and at least one calculation core which is controlled by the control core and performs a predetermined calculation process.
Nec Corporation


Split loop timing recovery

Various embodiments provide systems and methods for performing clock recovery on a received signal using a split loop architecture. A split loop timing recovery apparatus is provided comprising a first path configured for performing frequency offset tracking on a signal by adjusting a receiver clock frequency to match a remote transmitter frequency associated with the signal and a second path configured for tracking random jitter on the signal..
Applied Micro Circuits Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Digital phase locked loop for low jitter applications

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator.
International Business Machines Corporation

Gravity gradiometer system with spherical air bearing based platform

A non-contacting spherical air bearing-based stable platform for use by a gravity gradiometer instrument (ggi) is provided by attaching a spherical ball-shaped bearing to a rotational stage of the ggi and integrating a concave spherical cup in the linear stage and mounting base assembly of the ggi which is fixedly attached to a host vehicle or platform. The spherical cup supports the spherical ball-shaped bearing on a thin cushion of air provided by a source of compressed air or gas at the concave surface of the spherical cup.
Lockheed Martin Corporation

On-chip jitter measurement

An apparatus for jitter measurement includes a first delay circuit, a second delay circuit, and a control circuit. The first delay circuit imposes a preliminary phase delay on an input signal to generate a delayed input signal.
Faraday Technology Corp.

Method and synchronization of slave clock to master clock

Existing synchronization methods can be inefficient in hardware-assisted implementations because of the effects of various jittery events. Thus, a method and an apparatus are provided to synchronize a slave device's clock to a master device's clock for a hardware-assisted implementation.
Analog Devices Global

Jitter improvement in serializer-deserializer (serdes) transmitters

Systems and methods are provided for jitter improvement in serializer-deserializer (serdes) transmitters. One or more adjustments may be applied in serdes transmitter circuitry to reduce jitter in a serial output of the serdes transmitter circuitry, which may occur as a result of processing of input data.
Maxlinear, Inc.

Jitter control circuit within chip and associated jitter control method

A jitter control circuit within a chip comprises an adaptive pdn, a current generator and a jitter generator. The adaptive pdn is capable of being controlled/modulated to provide difference impedances.
Mediatek Inc.

Load responsive jitter

A controller for use in a power converter includes a comparator to compare a current sense signal with a current limit to generate a comparator output signal representative of whether a switch current has reached the current limit. A drive circuit controls switching of a power switch to regulate an output of the power converter in response to a feedback signal and the comparator output signal.
Power Integrations, Inc.

Controlling emission of an optical pulse from a laser

A method for use in controlling emission of an optical pulse from a laser comprises pumping a gain medium of a laser at a rate which is limited so that free-running passive q-switching of the laser is prevented regardless of a duration of pumping of the gain medium. The method further comprises triggering a saturable absorber of the laser so as to reduce a laser cavity loss below a laser cavity gain and cause an optical pulse to be emitted from the laser at a desired emission time.
Thales Holdings Uk Plc

Dual path timing wander removal

A more cost effective wander jitter filter utilizes an excursion detector that receives a timing difference between a first signal and a second signal and supplies a first adjustment amount if a magnitude of the timing difference is above a predetermined threshold and otherwise supplies a second adjustment amount of zero. A summing circuit adjusts a magnitude of the timing difference by the first or second adjustment amount.
Silicon Laboratories Inc.

Dual path timing jitter removal

A gap detector detects when a phase difference between a feedback signal and a clock signal is larger than a gap threshold. If the phase difference is larger than the gap threshold, then the phase difference is modified by subtracting a gap value from the phase difference.
Silicon Laboratories Inc.

Facilitation of handover coordination based on voice activity data

A more efficient network can be achieved by leveraging an adaptive dejitter buffer. The dejitter buffer can be dynamically adjusted based off a network data analysis.
At&t Mobility Ii Llc

Facilitation of adaptive dejitter buffer between mobile devices

A more efficient network can be achieved by leveraging an adaptive dejitter buffer. The dejitter buffer can be dynamically adjusted based off a network data analysis.
At&t Mobility Ii Llc

Method and securing timing packets over untrusted packet transport network

Methods, devices, systems, techniques, and computer program products are provided to secure timing synchronization to network nodes connected over an inherently insecure best effort public network with mechanisms to improve accuracy of timing protocols such as a statistically estimated edge timestamp offset encoded into the timing message to account for network jitter and processing latency variances incurred due to the security packet processing and encryption; to ensure slave network nodes shall only accept timing messages from trusted timing sources; to establish a secure tunnel with a trusted timing source for exchange of timing packets; to provide authentication and security for timing packets over the insecure public network; and to enhance message anonymity with variable payload padding.. .
Nokia Solutions And Networks Oy

Facilitation of adaptive dejitter buffer

A more robust and efficient flow of voice or other content packets can be achieved by leveraging an adaptive dejitter buffer. The dejitter buffer can be dynamically adjusted according to network conditions including handover.
At&t Mobility Ii Llc

Method for performing a bandwidth test for communications from a first network station to a second network station of a communication network and corresponding apparatuses for performing the method steps and corresponding computer program products

The disclosure describes a method for performing a bandwidth test for communications from a first network station (20) to a second network station (21) of a communication network. Such bandwidth test is based on the so-called prm model (in words probe rate model) in which iteratively a train of probe sample packets is transmitted from first station (20) to the second station (21) with a constant packet rate per iteration.
Hochschule Anhalt

Dfe margin test methods and circuits that decouple sample feedback timing

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (isi).
Rambus Inc.

Synchronous transfer of streaming data in a distributed antenna system

Method and apparatus for generating a jitter reduced clock signal from signal transmitted over a communication medium includes receiving, with high speed data interface circuitry, a modulated signal that includes a binary encoded data stream. A recovered clock signal is generated from the modulated signal and tracks the long-term drift in the modulated signal.
Commscope Technologies Llc

Dynamic calibration of data patterns

A system for dynamically calibrating operational parameters of a device under test (dut) includes a signal generator for generating a data pattern, a dut structured to generate a clock signal, an oscilloscope structured to measure margins of the generated clock signal compared to an eye-diagram produced on the oscilloscope from the data pattern, and a calibration unit. The calibration unit can produce a candidate a jitter value for the signal generator, receive a determination from the oscilloscope whether the data pattern generated with the candidate jitter value causes the dut to produce the generated clock signal within a pre-determined tolerance level, and modify the jitter value accordingly.
Tektronix, Inc.

Positioning photographic and video imaging and recording and system utilizing the same

A method and device are provided for positioning a mounted camera. The device includes a holding element that secures the mounted camera to the device, a wireless linkage at which remote attitude commands representing attitude changes of a remote driver are received, a local controller that interprets the remote attitude commands and generates local attitude commands that move the camera to mimic an orientation of the remote driver, and an attitude sensing element that senses a local attitude of the device.
Gopro, Inc.

Multiple transmitter controlling impedances of multiple transmitter system

A system includes a first transmitter, a second transmitter, a third transmitter and a controller, where the first transmitter is arranged for transmitting a first signal to a first transmission line, the second transmitter is arranged for transmitting a second signal to a second transmission line, and the third transmitter is arranged for transmitting a third signal to a third transmission line. The controller is coupled to the first transmitter, the second transmitter and the third transmitter, and is arranged for setting impedances of the first transmitter, the second transmitter and the third transmitter according to a coding jitter determination result..
Mediatek Inc.

Reducing errors due to non-linearities caused by a phase frequency detector of a phase locked loop

A phase frequency detector (pfd) includes a first circuit portion and a second circuit portion. The first circuit portion receives a reference signal and activates a first error signal if the phase of the reference frequency leads the phase of a feedback signal.
Aura Semiconductor Pvt. Ltd

System and determining the orientation of an inertial measurement unit (imu)

A system and method are provided for determining the orientation of an inertial measurement unit (imu). The method calculates a gyroscopic quaternion, and when the imu accelerometer reading is about equal to gravity (1 g), a field quaternion is calculated using imu accelerometer readings.
Sharp Laboratories Of America (sla), Inc.

Method of establishing an oscillator clock signal

A hybrid numeric-analog clock synchronizer, for establishing a clock or carrier locked to a timing reference. The clock may include a framing component.

Signal synchronization and latency jitter compensation for audio transmission systems

Techniques related to input and output signal synchronization and latency jitter compensation for audio systems are discussed. Such techniques may include determining a number of virtually buffered samples based on a detected latency between an audio capture thread and an audio playback thread and synchronizing an audio input signal and an audio output signal based on the number of virtually buffered samples..
Intel Corporation

Phase gradient optical coherence tomography angiography

Disclosed are methods of imaging vascular flow using optical coherence tomography. The methods involve calculating an oct phase difference and an oct phase gradient from interference fringes acquired from b-scans.
Oregon Health & Science University

De-jitter buffer update

A device includes a de-jitter buffer configured to receive a packet, the packet including first data and second data. The first data includes a partial copy of first frame data corresponding to a first frame of a sequence of frames.
Qualcomm Incorporated

Data processing

In a telecommunications network including at least a user device and a network node separated by at least a packet-switched part of the telecommunications network, the user device including a primary jitter buffer having a constant packet play-out rate, the network node including a secondary jitter buffer, incoming packets destined for the user device are received and passed through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device. The departure times of packets passing through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device are monitored.
Metaswitch Networks Ltd

System and object tracking anti-jitter filtering

Object tracking anti-jitter filtering systems and methods. A plurality of raw location points for a tracking tag attached to a tracked object is received.
Isolynx, Llc

System and a mems sensor

A measurement method includes generating, by a sensor, a response signal in response to an excitation signal. The method also includes generating a sampling clock signal in accordance with a pseudo-random jitter, and sampling the response signal in accordance with the sampling clock signal to determine a plurality of digital samples.
Infineon Technologies Ag

Video smoothing

The present disclosure provides a method and an apparatus for smoothing videos. With the solution above according to the present disclosure, if the player starts playing, then the vsync event detecting thread is initiated, if the vsync event detecting thread is resumed (awoken), then whether a frame of videos to be played which satisfies a predetermined condition is stored in the first queue is detected (checked) according to the timestamps corresponding to the frames of videos to be played in the first queue, and if the frame of videos to be played which satisfies the predetermined condition is detected, then the frame of videos to be played is rendered, which can which can reduce the jitter phenomena of videos in the process of playing the videos..
Le Shi Xin Electronic Technology (tianjin) Limited

Photographing dual-lens device and dual-lens device

A photographing method for a dual-lens device may include acquiring a first image collected at a first moment by a first image sensor and a second image collected at the first moment by a second image sensor; performing scene recognition on the first image and/or the second image, and performing depth estimation on the first image and the second image to determine a photographing environment; and when an instruction for a photographing operation is received, generating a picture using the multi-frame algorithm. When photographing is performed using a multi-frame algorithm, two frames of images can be collected at the same time using a dual-lens device, which can reduce impact caused by a jitter of the device or a motion of a target object, so that ghost detection and an elimination algorithm are not required, thereby reducing a photographing time..
Huawei Device Co., Ltd.

Crossbar switch and recursive scheduling

A crossbar switch has n input ports, m output ports, and a switching matrix with n×m crosspoints. In an embodiment, each crosspoint contains an internal queue (xq), which can store one or more packets to be routed.

Load responsive jitter

A controller for a power converter that may sense whether the power converter is in a light load condition. If the power converter is a light load condition, the switching frequency may be within the audible noise range.
Power Integrations, Inc.

Frequency generator

A frequency generator for providing one or more clock signals with reduced phase jitter can include a phase-locked loop (ni) configured to couple with a crystal and to provide a first clock signal, a multiplier circuit configured to receive the first clock signal and to provide a second dock signal, the second clock signal having a higher frequency than the first clock signal, wherein the multiplier circuit includes a second pll, and wherein the second clock signal is an output frequency signal of the frequency generator.. .
Intel Deutschland Gmbh

Systems and methods for reducing electromagnetic interference using switching frequency jittering

System and method are provided for regulating a power converter. The system includes a signal processing component configured to receive a first input signal and a second input signal, process information associated with the first input signal and the second input signal, and output a drive signal to a switch based on at least information associated with the first input signal and the second input signal.
On-bright Electronics (shanghai) Co., Ltd.

Automatic device operation and object tracking based on learning of smooth predictors

The disclosure provides an approach for predicting trajectories for real-time capture of video and object tracking, while adhering to smoothness constraints so that predictions are not excessively jittery. In one embodiment, a temporally consistent search and learn (tc-searn) algorithm is applied to train a regressor for camera planning.
Disney Enterprises, Inc.

Systems and methods for providing fast video channel switching

A video decoding device receives video images encoded as video signal data for a selected one of multiple channels, for example provided by a cable tv or satellite tv service. Responsive to a request to switch from viewing a previously-selected channel to viewing a newly-selected channel, the video decoding device enters a first mode for displaying a preview representation of the video signal data received for the newly-selected channel.
Entropic Communications, Llc

Cascaded camera motion estimation, rolling shutter detection, and camera shake detection for video stabilization

An easy-to-use online video stabilization system and methods for its use are described. Videos are stabilized after capture, and therefore the stabilization works on all forms of video footage including both legacy video and freshly captured video.
Google Inc.

Communication method and communication apparatus

The present disclosure provides an orthogonal codes based code division multiplexing method of performing the code division multiplexing of demodulation reference signals in multiple layers of resource blocks by using orthogonal matrices, the method comprising: changing the order of chips in particular rows of a first orthogonal matrix to obtain a second orthogonal matrix with the changed order of chips; and multiplying the chips in respective rows of the second orthogonal matrix by the demodulation reference signals in corresponding layers of resource blocks correspondingly in the time direction to obtain code division multiplexing signals. The technical scheme of the present disclosure can improve the power jitter situation of downlink signals on the time, thereby the usage efficiency of the power amplifier at the base station side can be improved..
Sun Patent Trust



Jitter topics:
  • Duty Cycle Correction
  • Differential Amplifier
  • Duty Cycle
  • Frequency Detector
  • Photosensitive Drum
  • Simulation
  • Cell Phone
  • Data Packet
  • Mean Opinion Score
  • Network Communication
  • Signal Processing
  • Sequencing
  • Transmitter
  • Asynchronous
  • High Performance Serial Bus


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    This listing is a sample listing of patent applications related to Jitter for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Jitter with additional patents listed. Browse our RSS directory or Search for other possible listings.


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