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Jitter

Jitter-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Method and system for enhancing accuracy in location and proximity determination
Hong Kong Applied Science And Technology Research Institute Company Limited
April 05, 2018 - N°20180098301

A system comprising beacon-generating clusters for enabling a mobile computing device to perform location or proximity determination is provided. Each cluster comprises a primary station for broadcasting a primary beacon, and an offset-assisted station, positioned from the primary station by an offset distance along a direction, for broadcasting a secondary beacon. The offset distance and the direction are unique for ...
Apparatus and method for mitigating interference in an automotive radar system
Autoliv Asp, Inc.
April 05, 2018 - N°20180095162

A system and method for mitigating interference in a frequency-modulated continuous-wave radar processing system is defined. Random inter-pulse jitter is implemented in a transmitted radar signal to prevent identification of false tracks due to interfering radar signals. Random intra-pulse jitter of time and/or frequency is implanted to create spreading of false targets and provide a method to distinguish false ...
Methods and systems for virtual conference system using personal communication devices
Qualcomm Incorporated
March 29, 2018 - N°20180091560

A method for managing jitter includes determining, by a processor of a master device, at least one of device capabilities of at least one satellite device, device capabilities of the master device, or channel conditions; determining, by the processor of the master device, a de-jitter buffer size based on the at least one of the device capabilities of the at ...
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Jitter Patent Applications
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  • 96+ full patent PDF documents of Jitter-related inventions.
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Techniques to determine and mitigate latency in virtual environments
March 29, 2018 - N°20180088977

Embodiments may be generally directed to techniques to cause communication of one or more packets from one or more network interfaces to one or more other network interfaces through a virtual machine monitor, determine at least one of latency and jitter for the virtual machine monitor based, at least in part, on each of the one or more packets communicated ...
Method and system for determining postural balance of a person
Tata Consultancy Services Limited
March 29, 2018 - N°20180085045

A method and system for determining postural balance of the person is provided. The disclosure provides a single limb stance body balance analysis system which will aid medical practitioners to analyze crucial factor for fall risk minimization, injury prevention, fitness and rehabilitation. Skeleton data was captured using kinect. Two parameters vibration-jitter and force per unit mass (fpum) are derived for ...
Method and apparatus for source-synchronous signaling
Rambus Inc.
March 22, 2018 - N°20180083642

A low-power, high-performance source-synchronous chip interface which provides rapid turn-on and facilitates high signaling rates between a transmitter and a receiver located on different chips is described in various embodiments. Some embodiments of the chip interface include, among others: a segmented “fast turn-on” bias circuit to reduce power supply ringing during the rapid power-on process; current ...
Jitter Patent Pack
Download 96+ patent application PDFs
Jitter Patent Applications
Download 96+ Jitter-related PDFs
For professional research & prior art discovery
inventor
  • 96+ full patent PDF documents of Jitter-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Switched mode power converter controller with ramp time modulation with jitter frequency
Power Integrations, Inc.
March 22, 2018 - N°20180083540

A controller for use in a power converter includes a drive circuit coupled to generate a drive signal to control switching of a power switch to control a transfer of energy from a power converter input to a power converter output. An input is also included to receive an enable signal including enable events responsive to the power converter output. ...
Composite hamr media structure for high areal density
Seagate Technology Llc
March 22, 2018 - N°20180082713

A heat-assisted magnetic recording media structure with exchange-coupled composite layer structure may be utilized in a data storage device. The heat-assisted magnetic recording disk structure can have a fept-based layer as a storage layer and a fept-based or a copt-based magnetic layer with higher curie temperature as a write layer. The interface between the write layer and the storage layer ...
Data stream monitoring
Viavi Solutions Inc.
March 15, 2018 - N°20180075106

A first device for determining measurement information for a network may include one or more processors. The first device may identify one or more data streams of frames for monitoring. The first device may modify the frames of the one or more identified streams to identify the frames as one or more of count frames to be used to identify ...
Modulating jitter frequency as switching frequency approaches jitter frequency
Power Integrations, Inc.
March 15, 2018 - N°20180074531

A controller for use in a power converter includes a jitter generator circuit coupled to receive a drive signal from a switch controller and generate a jitter signal. The switch controller is coupled to a power switch coupled to an energy transfer element. The switch controller is coupled to receive a current sense signal representative of a drain current through ...
Method and apparatus for clock skew control with low jitter in an integrated circuit
International Business Machines Corporation
March 08, 2018 - N°20180069540

An apparatus of performing a clock skew adjustment between at least first and second clock signals includes first and second skew sensors and a skew controller. The first skew sensor receives a third clock signal obtained by delaying the first clock signal by a first delay and a fourth clock signal obtained by delaying the second clock signal by a ...
Injecting cpu time jitter to improve entropy quality for random number generator
International Business Machines Corporation
March 08, 2018 - N°20180067726

Aspects of present disclosure relate to random number generator, a method and a computer program product of improving entropy quality of the random number generator. The method may include: receiving, at an input/output interface module of the random number generator, a request to generate a random number having a predetermined number of random bits, and starting a random bit ...
System and method for generation of a tachometer signal and reduction of jitter
Green Power Monitoring Systems, Llc
March 01, 2018 - N°20180059135

A system and method for generating a tachometer signal from a vibration sensor is disclosed in which an approximately idealized band pass filter is used along with a fast fourier transform (fft) to create a sufficient analytic signal to derive the tachometer signal for a shaft or other rotating component. In addition, jitter in the generated tachometer signal, or any ...
Jitter Patent Pack
Download 96+ patent application PDFs
Jitter Patent Applications
Download 96+ Jitter-related PDFs
For professional research & prior art discovery
inventor
  • 96+ full patent PDF documents of Jitter-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Clock and data recovery having shared clock generator
Rambus Inc.
February 22, 2018 - N°20180054293

This disclosure provides a clock recovery circuit for a multi-lane communication system. Local clocks are recovered from the input signals using respective local cdr circuits, and associated cdr error signals are aggregated or otherwise combined. A global recovered clock for shared use by the local cdr circuits is generated at a controllable oscillation frequency as a function of a combination ...
Voltage regulator with jitter control
Altera Corporation
February 22, 2018 - N°20180054110

A voltage regulator package includes a voltage regulator module that outputs a voltage signal of a particular voltage level through an output terminal is provided. The voltage regulator module may be switched on according to a periodic signal having a periodic signal frequency as a variable. The periodic signal frequency may be tuned to reduce impedance, jitter, or noise.
Collecting entropy from diverse sources
Oracle International Corporation
February 22, 2018 - N°20180052662

Methods and systems are disclosed for generating more random data or ensuring more random data than provided by single sources. Entropy is gathered among multiple random or pseudo-random sources at different frequencies. The entropy is pushed, pulled, or otherwise presented to a pseudo-random number generator when there is enough entropy. The determination of enough entropy can be through a modified ...
Integrated circuit having receiver jitter tolerance ("jtol") measurement
Rambus Inc.
February 22, 2018 - N°20180052194

An integrated circuit capable of on-chip jitter tolerance measurement includes a jitter generator circuit to produce a controlled amount of jitter that is injected into at least one clock signal, and a receive circuit to sample an input signal according to the at least one clock signal. The sampled data values output from the receiver are used to evaluate the ...
Digital phase locked loop for low jitter applications
International Business Machines Corporation
February 15, 2018 - N°20180048321

A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of ...
Shielding real-time workloads from os jitter due to expedited grace periods
International Business Machines Corporation
February 15, 2018 - N°20180046521

A technique for shielding real-time workloads from operating system (os) jitter due to expedited read-copy update (rcu) grace periods. In accordance with the disclosed technique, a kernel parameter is set to indicate that expedited rcu grace periods are to be suppressed. The kernel parameter is checked to see if it is set. A normal non-expedited rcu grace period is invoked ...
Shielding real-time workloads from os jitter due to expedited grace periods
International Business Machines Corporation
February 15, 2018 - N°20180046468

A technique for shielding real-time workloads from operating system (os) jitter due to expedited read-copy update (rcu) grace periods. In accordance with the disclosed technique, a kernel parameter is set to indicate that expedited rcu grace periods are to be suppressed. The kernel parameter is checked to see if it is set. A normal non-expedited rcu grace period is invoked ...
Jitter and eye contour at ber measurements after dfe
Tektronix, Inc.
February 15, 2018 - N°20180045761

A method of employing a decision feedback equalizer (dfe) in a test and measurement system. The method includes obtaining an input signal data associated with an input signal suffering from inter-symbol interference (isi). A bit sequence encoded in the input signal data is determined to support assigning portions of the input signal data into sets based on the corresponding bit ...
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