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Frequency Detector patents



      
           
This page is updated frequently with new Frequency Detector-related patent applications. Subscribe to the Frequency Detector RSS feed to automatically get the update: related Frequency RSS feeds. RSS updates for this page: Frequency Detector RSS RSS


Clock recovery using quantized phase error samples using jitter frequency-dependent quantization thresholds and loop…

Lsi

Clock recovery using quantized phase error samples using jitter frequency-dependent quantization thresholds and loop…

Local oscillator frequency calibration

Cambridge Silicon Radio Limited

Local oscillator frequency calibration


Date/App# patent app List of recent Frequency Detector-related patents
07/16/15
20150200768 
 Multi-lane re-timer circuit and multi-lane reception system patent thumbnailMulti-lane re-timer circuit and multi-lane reception system
A multi-lane re-timer circuit includes: a clock generation circuit to generate a base clock; and reception circuits to generate a reception clock and receive input data signals from lanes, wherein each of the reception circuits includes: a phase frequency detector to generate phase difference signal and frequency difference signal between the input data signal and the reception clock; a clock data regeneration controller to generate a control signal based on the phase difference signal; a phase rotator to generate the reception clock from the base clock; and a decision circuit to receive the input data signal, and wherein the clock generation circuit includes: an input selector to select a signal; a charge pump to generate a charge signal; a loop filter to remove a high frequency component from the charge signal to output a voltage control signal; and a voltage controlled oscillator to generate the reception clock.. .
Fujitsu Limited


07/02/15
20150188551 
 Clock recovery using quantized phase error samples using jitter frequency-dependent quantization thresholds and loop gains patent thumbnailClock recovery using quantized phase error samples using jitter frequency-dependent quantization thresholds and loop gains
A clock and data recovery device includes a phase detector, a quantizer, and a loop filter. The phase detector produces a phase error samples at an output representing a phase difference between a phase-adjusted clock and an input data signal.
Lsi Corporation


07/02/15
20150185263 
 Local oscillator frequency calibration patent thumbnailLocal oscillator frequency calibration
A frequency locked loop for generating a clock signal, comprising: a controllable oscillator configured to, in dependence on a control signal, generate an oscillator signal having an oscillator signal frequency; a frequency divider coupled to the controllable oscillator configured to reduce the oscillator signal frequency to form a divided oscillator signal frequency; and a frequency detector coupled to the frequency divider and configured to generate the control signal in dependence on a reference signal frequency; wherein the frequency divider comprises a first counter and a second counter, the first counter configured to be clocked by the oscillator signal and to produce a first counter output signal, and the second counter configured to be clocked by the first counter output signal.. .
Cambridge Silicon Radio Limited


06/18/15
20150171873 
 Stacked cmos phase-locked loop patent thumbnailStacked cmos phase-locked loop
A phase-locked loop includes a first semiconductor layer and a second semiconductor layer spaced apart from the first semiconductor layer. The first semiconductor layer has formed thereon a phase frequency detector circuit having a reference frequency input, a feedback frequency input, an up output and a down output, a charge pump circuit having a first input coupled to the up output and a second input coupled to the down output, and an output, and a loop filter circuit coupled to the charge pump.
Taiwan Semiconductor Manufacturing Co., Ltd.


06/18/15
20150171602 
 Non-invasive  resonant frequency detection in corona ignition systems patent thumbnailNon-invasive resonant frequency detection in corona ignition systems
A corona ignition system including a corona igniter, an energy supply, and a frequency detector is provided. The energy supply provides energy to the corona igniter during corona events which are spaced from one another by idle periods, during which no energy is provided to the corona igniter.
Federal-mogul Ignition Company


05/21/15
20150137782 
 Systems and methods to monitor current in switching converters patent thumbnailSystems and methods to monitor current in switching converters
Various embodiments of the invention increase current monitoring accuracy in switching converters. In particular, certain embodiments of the invention allow reduce noise associated with transients that are typically generated at transitions when power fets are turn on and off and allow to accurately sense inductor dc current of switching converters, thereby, increase current monitoring accuracy without requiring any blanking circuitry.
Maxim Integrated Products, Inc.


05/14/15
20150131392 
 Semiconductor integrated circuit and  testing the semiconductor integrated circuit patent thumbnailSemiconductor integrated circuit and testing the semiconductor integrated circuit
A semiconductor integrated circuit includes a memory having bit cells; and a frequency detector outputting a switching signal to switch a test mode from first to second test modes. Further, the memory includes an internal clock generator generating an internal clock in synchronization with the external clock; a writing part writing data into the bit cells based on the internal clock; a delayed clock generator generating a delayed clock by adding a designated delay to the internal clock; a first selector inputting the internal clock and the delayed clock, and, when the frequency of the high-speed clock is less than a designated frequency, selecting the delayed clock based on the switching signal; and a reading part reading the data of the bit cells based on the delayed clock..

05/07/15
20150121709 
 Axle alignment sensor assembly for steering system of a machine patent thumbnailAxle alignment sensor assembly for steering system of a machine
An axle alignment sensor assembly, which includes an enclosure, an oscillator, a frequency detector, an output switch driver, a ferrite component, and an electrostatic discharge (esd) protection component, is disclosed. The oscillator is positioned at the sensing end and is configured to generate a magnetic field.
Caterpillar Inc.


04/30/15
20150116016 
 Dead-zone free charge pump phase-frequency detector patent thumbnailDead-zone free charge pump phase-frequency detector
A charge-pump phase-frequency detector includes first and second flip-flops first and second delay circuits, a charge pump circuit and a reset gate. The flip-flops each have a respective data input connected to a fixed logic level, a reset input, a data output, and a clock input.
Keysight Technologies, Inc.


04/23/15
20150110233 
 Jitter mitigating phase locked loop circuit patent thumbnailJitter mitigating phase locked loop circuit
Systems and methods for efficient jitter mitigation or removal from a gapped signal. A phase mitigation module is employed to generate discrete correction values for modifying phase error signals detected between a gapped signal and a feedback signal of the pll.
Applied Micro Circuits Corporation


03/19/15
20150077164 

Pll frequency synthesizer with multi-curve vco implementing closed loop curve searching using charge pump current modulation


A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (vco) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to perform a closed loop curve search operation to select one of the operating curves in the multi-curve vco and to perform a curve tracking operation using the selected operating curve, the selected operating curve being used by the vco to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop.
Micrel, Inc.


03/05/15
20150067392 

Clock data recovery device and display device including the same


A clock data recovery device includes a clock recovery device for separating a recovery clock signal and a data signal from an input signal and generating a clock fail signal in response to noise of the input signal; a clock generator for receiving a control voltage to generate one or more delay clock signals, delaying the recovery clock signal to generate the delay clock signals in a first mode, delaying the generated delay clock signal to generate the delay clock signal in a second mode, and switching the first mode to the second mode in response to the clock fail signal; and a phase frequency detector for comparing at least one of the delay clock signals with the recovery clock signal to generate a voltage adjusting signal; and a control voltage generator for receiving the voltage adjusting signal to generate the control voltage.. .
Samsung Electronics Co., Ltd.


02/26/15
20150054491 

System and detecting a fundamental frequency of an electric power system


A system and method to detect the fundamental frequency of an electric input signal using a feedback control loop including a phase error detector, a loop controller, and a digitally controlled oscillator. The frequency detector may detect the fundamental frequency of an electric input signal and produce an output signal representing the fundamental frequency of the electric input signal.
Analog Devices, Inc.


02/19/15
20150052378 

Connecting interface unit and memory storage device


A connecting interface unit and a memory storage device without a crystal oscillator are provided and include a frequency detector, a phase detector, an oscillator, a sampling circuit and a transmitter circuit. The frequency detector and the phase detector respectively detect frequency difference and phase difference between an input signal from a host system and a reference signal to generate a frequency signal and a phase signal.
Phison Electronics Corp.


02/12/15
20150043616 

Circuits and methods for pulse radio receivers


Circuits and methods comprising: a radio frequency amplifier that powers off in response to an enable signal; a demodulator that outputs an rz signal; an all-digital clock and data recovery circuit comprising: a phase detector that includes a tri-state phase frequency detector for use when in an acquisition mode and a hogge phase detector for use when in a communication mode, that receives the rz signal, and that outputs a phase detector output from the tri-state phase frequency detector when in the acquisition mode and from the hogge phase detector when in the communication mode, a loop filter that receives the phase detector output from the phase detector and produces a loop filter output that is the sum of a proportional path of the loop filter and an integral path of the loop filter, and a numerical controlled oscillator that receives the loop filter output and produces the enable signal.. .

01/29/15
20150033060 

Clock data recovery circuit, timing controller including the same, and driving the timing controller


Provided is a clock data recovery circuit including a phase-frequency detector configured to detect a frequency and phase of a reference clock signal and control a frequency and phase of an internal clock signal based on the detected frequency, a frequency detector configured to detect a frequency of a data signal and, based on the detected frequency of the data signal, adjust the frequency of the internal clock signal; and a phase detector configured to detect a phase of the data signal based on the detected frequency of the data signal and adjust the phase of the internal clock signal. Accordingly, a timing controller that includes the clock data recovery circuit is capable of establishing data communication at high speeds when the system is powered on/off to reduce power consumption.

01/15/15
20150015239 

Apparatus and real time harmonic spectral analyzer


In one embodiment, a measuring device may comprise two oscillators. The first oscillator may generate a local reference signal in a frequency detector to detect a fundamental frequency of the ac.
Analog Devices, Inc.


01/08/15
20150008961 

Phase detector, phase-frequency detector, and digital phase locked loop


A phase detector includes a phase comparing circuit configured to detect and output a phase difference between a first clock signal and a second clock signal, a latch circuit configured to latch an output signal of the phase comparing circuit and output a phase detection signal, and an initial voltage control circuit configured to control an initial voltage of an input terminal of the latch circuit according to a control signal.. .
Industry-university Cooperation Foundation Hanyang University


01/01/15
20150006602 

Fast filter calibration apparatus


A method comprises generating a calibration signal by a clock generator, feeding the calibration signal to a first filter through a first switch unit, comparing an output of the first filter with the calibration signal through a frequency detector and a phase comparator and generating a first updated bandwidth code to adjust a bandwidth frequency of the first filter.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


01/01/15
20150002172 

Conductive thin film detector


The invention is directed to products used to detect and methods for detecting conductive materials in the presence of non-conductive materials, including non-conductive materials having dielectric properties. Specifically, the product is a conductive thin film detector, which is, preferably, a hand-held device designed to detect the presence of metal in, on, or under an object.
United States Of America As Represented By The Federal Bureau Of Investigation, Dept. Of Justic


12/04/14
20140354336 

Digital pll with hybrid phase/frequency detector and digital noise cancellation


Digital phase-locked loop (pll) with dynamic hybrid (mixed analog/digital signal) delta-sigma (ΔΣ) phase/frequency detector (ΔΣ pfd). A hybrid 2nd-order ΔΣ pfd may be implemented based on a continuous-time 1st-order ΔΣ analog-to-digital converter (adc) enhanced to 2nd-order via closed loop frequency detection.

12/04/14
20140354335 

Digital phase locked loop with hybrid delta-sigma phase/frequency detector


A pll includes independent frequency-locking and phase-locking operational modes. In addition, the pll includes a hybrid (e.g., mixed-analog/digital signal) 2nd-order delta-sigma (ds) phase/frequency detector.

10/30/14
20140320183 

Pll frequency synthesizer with multi-curve vco implementing closed loop curve searching using charge pump current modulation


A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (vco) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve vco, the selected operating curve being used by the vco to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop.

10/30/14
20140320182 

Geographic locating remote endpoint monitor device, system, and methodology thereof


A phase-locked loop frequency synthesizer includes an l-state pulse width modulator configured to receive a reference frequency signal and at least one entry from a frequency table, and to output at least one n/n+1 modulus signals corresponding to the at least one entry from the frequency table. The synthesizer includes a divide by n/n+1 controllable modulus divider configured to receive the at least one n/n+1 modulus signals and to divide the output frequency signal by the at least one n/n+1 modulus signals to generate a second reference frequency signal.

10/30/14
20140320112 

Current detecting device


A current detecting device includes an exciting coil (3) wound around a magnetic core (2) enclosing a conductor through which flows a measurement current, and an oscillator circuit (4) that generates a square wave voltage which is supplied to the exciting coil (3). Furthermore, the current detecting device includes a duty detector circuit (5) that detects the measurement current based on variation in the duty ratio of the square wave voltage output from the oscillator circuit (4), a frequency detector circuit (7) that detects an overcurrent of the measurement current based on the frequency of the square wave voltage output from the oscillator circuit (4), and an oscillation amplitude detector circuit (6) that detects an overcurrent of the measurement current based on the magnitude of the square wave voltage output from the oscillator circuit (4)..

10/23/14
20140314192 

Method and smoothing jitter generated by byte stuffing


Systems and methods for smoothing jitter generated by byte stuffing. A frequency synthesizer comprises a smoothing logic coupled with a pll.

10/16/14
20140306741 

Phase-locked loop system and operation


A phase-locked loop system has a controlled oscillator that provides an output clock signal based on a oscillator control signal, a feedback path configured to provide a feedback signal based on the output clock signal, a phase detector configured to provide a phase dependent signal based on the feedback signal and a reference clock signal, a phase evaluation block configured to provide the oscillator control signal based on the phase dependent signal, a frequency detector that determines whether the frequency ratio between the output clock signal and the reference clock signal has a desired value, and a control logic. The control logic is configured to, during a start-up period, disable the phase evaluation block upon determination of the desired value of the frequency ratio; detect, after disabling the phase evaluation block, a subsequent clock edge of the reference clock signal; and enable, in response to the detection of the subsequent clock edge, the phase evaluation block..

10/09/14
20140303688 

Energy harvesting cochlear implant


The invention is related to a totally implantable cochlear implant having a transducer which is a piezoelectric vibration energy harvester to be mounted on the ossicular chain or the tympanic membrane to detect the frequency of oscillations and generate the required voltage to stimulate the relevant auditory nerves. The invention enables patients' continuous access to sound, since it eliminates the outside components of conventional cochlear implants.

10/02/14
20140290366 

Method and system for detecting an airborne trigger


An apparatus includes a cantilevered element including a coating material having an affinity for at least one compound. The apparatus further includes a first capacitive plate and a second capacitive plate that are each spaced from and capacitively coupled to the cantilevered element.

09/18/14
20140263288 

Magnetic induction feedback mechanism for a heating system and the method using the same


A heating system for heating a magnetic inducible container is disclosed, wherein the heating system includes a frequency detector for detecting the frequency of the current through an inductor coil and a control unit coupled to the frequency detector to adjust the heat generated by the heating system according to the variation of the frequencies detected by the frequency detector.. .

09/18/14
20140260609 

Microelectromechanical device having an oscillating mass and a forcing stage, and controlling a microelectromechanical device


A microelectromechanical device includes: a body; a movable mass, elastically coupled to the body and oscillatable with respect to the body according to a degree of freedom; a frequency detector, configured to detect a current oscillation frequency of the movable mass; and a forcing stage, capacitively coupled to the movable mass and configured to provide energy to the movable mass through forcing signals having a forcing frequency equal to the current oscillation frequency detected by the frequency detector, at least in a first transient operating condition.. .

09/11/14
20140253754 

Method and system for detecting flicker


An image processing system includes a plurality of active pixels and a plurality of flicker pixels. The active pixels output active pixel signals at a first readout frequency, and the flicker pixels output flicker pixel signals at a second readout frequency greater than the first readout frequency.

09/04/14
20140247170 

Method and closed loop control of supply and/or comparator common mode voltage in a successive approximation register analog to digital converter


A method and apparatus for controlling supply voltage for a successive approximation register analog to digital converter and comparator common mode voltage. The method comprises: measuring a successive approximation register conversion time; comparing the successive approximation register conversion time with a desired conversion time; and if necessary, performing a closed loop adjustment of at least one of the supply and/or comparator common mode voltage.

08/28/14
20140241467 

Phase locked loop frequency synthesizer with reduced jitter


A phase locked loop frequency synthesizer has a controlled oscillator for generating an output signal at a desired frequency, a phase/frequency detector module for comparing a feedback signal derived from the controlled oscillator with a reference signal to generate an error signal, a loop filter for processing said at least one error signal from said phase/frequency detector module to generate a combined control signal for the controlled oscillator. The gain of the phase/frequency detector module can be adjusted, preferably by varying the pulse width and pulse cycle, to maintain the overall gain of the phase locked loop within a given range and thereby maximize signal to noise ratio..

08/28/14
20140239938 

Line frequency detector


A line frequency detector receives an input signal representing a power source and detects a line frequency of the power source based on the input signal. The line frequency detector includes a first band pass filter having a pass band centered at an upper end of an expected frequency range of the power source and a second band pass filter having a pass band centered at a lower end of the expected frequency range.

08/14/14
20140226705 

Adaptive real-time control of de-emphasis level in a usb 3.0 signal conditioner based on incoming signal frequency range


An apparatus comprises a differential equalizer having: a) a first differential input, b) a second differential input, c) a first differential output, and d) a second differential output; a frequency detector coupled to the first and second differential inputs; an amplifier coupled to a first differential output and a second differential output of the differential equalizer; and a logical combiner having a first input coupled to an output of the frequency detector and an output coupled to a control input of the amplifier, wherein the logical combiner can mask at least one received de-emphasis parameter.. .

08/07/14
20140218049 

Apparatus for measuring moisture content amount and/or coating amount of coating layer of sheet-shaped base material


A first isolator, which is disposed in a direction where a signal is transmitted only to an antenna direction, is connected directly to a connector portion of an antenna on an oscillation side without a cable, and a second isolator 15b, which is disposed in a direction where a signal is transmitted only to a receiver direction, is connected directly to the connector portion of the antenna on a receiver side without a cable. A data processing apparatus includes a peak level detector, a resonant frequency detector, and an arithmetic part for calculating a moisture content amount and a coating amount of a coating layer of a sample based on the detection values detected by these detectors..

07/24/14
20140203853 

Phase frequency detector and charge pump for phase lock loop fast-locking


The present invention provides for a solution to reduce locking time with satisfactory performance without the need for significant footprint area for the phase lock loop (pll) circuits by boosting phase frequency detector (pfd) and charge pump (cp) gains through various circuitry configurations that employ one or more flip-flops, delay elements and advanced circuitry techniques.. .

07/10/14
20140191815 

Integrated circuit with calibrated pulling effect correction


A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal.

07/10/14
20140191812 

Integrated circuit with calibrated pulling effect correction


A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal.

07/10/14
20140191787 

Phase locked loop circuit


A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal..

07/10/14
20140191786 

Phase frequency detector circuit


A phase-frequency detector (pfd) circuit is disclosed. The pfd circuit includes a pfd portion adapted to detect frequency and phase difference of two input signals and to generate control signals according to the detected frequency and phase difference and a delay and reset portion adapted to delay the generated control signals, to generate reset signals for resetting the pfd portion based on a combination of the control signals and the delayed control signals, and to provide the generated reset signals to the pfd portion..

07/03/14
20140184274 

Fractional-n frequency synthesizer with low quantization noise


A fractional-n frequency synthesizer with low quantization noise includes a phase frequency detector, a charge pump, a loop filter, a voltage controlled oscillator a divider and a delta-sigma modulator. The delta-sigma modulator computes “n” to the loop filter in the output current of the charge pump.

06/12/14
20140159805 

Sub-gate delay adjustment using digital locked-loop


A delay locked loop (dll) includes a delay line that delays a clock signal to generate a delayed clock signal, a phase frequency detector (pfd) for detecting a phase and/or frequency difference between the clock signal and the delayed clock signal, and a charge pump having an adjustable bias current for converting the phase and/or frequency difference taking into account a bias current adjustment into a control voltage, in which the control voltage controls an amount of delay in the delayed clock signal.. .

05/29/14
20140147134 

Monitoring a condition of a solid state charge device in electrostatic printing


An apparatus to monitor a condition of a solid state charge device (sscd)) useful in electrostatic printing includes a power supply and a frequency detector. The power supply provides current to the sscd, and includes a resonant controller.

05/01/14
20140118037 

Phase-locked loop


The pll includes a voltage-controlled oscillator (vco), a frequency down conversion circuit, a phase-frequency detector (pfd), and an adjusting circuit. The vco is configured to generate an output dock signal.

04/17/14
20140103961 

Phase frequency detector circuit


A phase frequency detector circuit includes an edge detector circuit, a plurality of phase frequency detector sub-circuits, and a decision circuit. The edge detector circuit is configured to receive a first input signal and a second input signal.

04/03/14
20140091954 

Sub-gate delay adjustment using digital locked-loop


A delay locked loop (dll) includes a delay line that delays a clock signal to generate a delayed clock signal, a phase frequency detector (pfd) for detecting a phase and/or frequency difference between the clock signal and the delayed clock signal, and a charge pump having an adjustable bias current for converting the phase and/or frequency difference taking into account a bias current adjustment into a control voltage, in which the control voltage controls an amount of delay in the delayed clock signal.. .

04/03/14
20140091864 

Apparatus and methods for tuning a voltage controlled oscillator


Apparatus and methods for tuning a voltage controlled oscillator (vco) are provided. In one aspect, a method of auto-tuning in a phase-locked loop includes generating a vco clock signal using a vco coupled to a capacitor array, dividing the vco clock signal to generate a divided clock signal using a prescaler circuit having a selectable division ratio, controlling a value of the selectable division ratio using a first counter and a second counter of a counter module, generating a phase-frequency detector feedback signal based on a division control signal m and the divided clock signal using the counter module, counting a number of cycles of the divided clock signal that occur during a calibration interval using a cycle counter of a digital processing logic circuit, and determining the value of a capacitor array control signal based on the number of cycles counted during the calibration interval..

03/27/14
20140086593 

Phase locked loop


An optical phase-locked loop (opll) comprising a phase-frequency detector; first and second lasers; a local oscillator; a detector and a low pass filter connected in a circuit comprising a feedback path. The opll can also include a pre-scaler, a second local oscillator and a mixer..

03/27/14
20140086472 

X-ray diagnostic apparatus and storage medium storing x-ray diagnostic program


An x-ray diagnostic apparatus includes a peak frequency detector detecting a peak frequency of a first harmonic in a moiré pattern of a grid in an image; a harmonic remover removing the first harmonic and a second harmonic in the moiré pattern from the image in accordance with the peak frequency of the first harmonic to obtain a first and second harmonic removed image; a harmonic extracting-filter generating unit calculating a peak frequency of a third harmonic in the moiré pattern in accordance with the peak frequency of the first harmonic to generate a harmonic extracting filter to extract the third harmonic; a harmonic extracting unit extracting the third harmonic from the first and second harmonic removed image based on the harmonic extracting filter; and a harmonic subtracting unit subtracting the extracted third harmonic from the first and second harmonic removed image to obtain a third harmonic removed image.. .

03/27/14
20140084974 

Phase locked loop with burn-in mode


A phase locked loop having a normal mode and a burn-in mode. The logic portion is coupled to a logic power supply terminal and includes a clock receiver coupled to a phase frequency detector.

03/20/14
20140077887 

Apparatus and method to detect frequency difference


An all-digital frequency detector is provided, which includes a phase-frequency detector receiving a reference clock and an input clock, two sample/hold circuits sampling the phase-frequency detector outputs responsive to a ninety-degree phase shifted reference clock and a ninety-degree phase shifted input clock, a plurality of logical operators to generate an output frequency detection signal and a output clock responsive to the difference between the reference clock and the input clock.. .

03/20/14
20140077841 

Phase frequency detector


Described is an apparatus comprising: a first phase frequency detector (pfd) to determine a coarse phase difference between a first clock signal and a second clock signal, the first pfd to generate a first output indicating the coarse phase difference; and a second pfd, coupled to the first pfd, to determine a fine phase difference between the first clock signal and the second clock signal, the second pfd to generate a second output indicating the fine phase difference.. .

03/13/14
20140070856 

Hybrid phase-locked loop architectures


Phase locked loop (pll) architectures are provided such as hybrid pll architectures having separate digital integrating control paths and analog proportional control paths. An analog proportional control path can be implemented with a charge pump circuit that includes resistors in series with cmos switches to generate control currents (e.g., up/down control currents) which are used to adjust a control voltage applied to a digitally controlled oscillator.

03/13/14
20140070855 

Hybrid phase-locked loop architectures


Phase locked loop (pll) architectures are provided such as hybrid pll architectures having separate digital integrating control paths and analog proportional control paths. An analog proportional control path can be implemented with a charge pump circuit that includes resistors in series with cmos switches to generate control currents (e.g., up/down control currents) which are used to adjust a control voltage applied to a digitally controlled oscillator.

03/06/14
20140064037 

Wearable device with acoustic user input and same


An electronic device (100) includes a component portion (101) and a strap (102). The strap defines an air chamber (402) therein having a corresponding volume.

02/20/14
20140049302 

Phase-locked loop and clock delay adjustment


In a phase frequency detector, a control signal is generated in accordance with a phase difference and a frequency difference between the output clock signal and a feedback signal generated by a voltage controlled oscillator coupled to the phase frequency detector. The control signal is then fed through a charge pump and a loop filter to generate a voltage control signal according to the control signal.

02/13/14
20140042947 

Control circuit for fan


A control circuit for a fan includes a fan controller, a switch controller, and a frequency detector. When a pulse-width modulation (pwm) signal output pin of the fan controller outputs pwm signals, the frequency detector outputs a high level signal, connecting an input pin of the switch controller to an output pin of the switch controller.

02/06/14
20140036972 

Transceiver system having phase and frequency detector and method thereof


A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter.

12/12/13
20130331050 

Integrated circuit device, electronic device and frequency detection


An integrated circuit comprises a frequency detector. The frequency detector comprises a timer state machine unit operably couplable to a timer and arranged to receive an incoming carrier signal; determine whether the incoming carrier signal comprises a valid frequency; generate a valid carrier indication when the incoming carrier signal is determined as having a valid frequency; and adjust the timer between at least a first timing mode of operation and a second timing mode of operation of the frequency detector in response to the determination..

12/05/13
20130322576 

Accelerated carrier acquisition a digital communication receiver


A method of accelerated carrier signal acquisition for a digital communication receiver, the method comprising receiving a carrier signal by a receiver comprising a carrier recovery loop (crl), setting the crl to an open loop setting using a processor. Setting a numerically controlled oscillator (nco) within the crl at a center frequency of the nco, determining, by the processor, one or more initial parameters of the crl, calculating an estimate and polarity for a sign frequency detection frequency using a sign frequency detector while simultaneously estimating a fast fourier transform (fft) frequency by running an fft using the processor, comparing polarities of the estimates of the sign frequency detection frequency and fft frequency and determining a frequency offset using the processor, and adjusting one or more parameters of the crl based on the frequency offset using the processor..

11/21/13
20130308735 

Circuits and methods for eliminating reference spurs in fractional-n frequency synthesis


Disclosed are circuits and method for reducing or eliminating reference spurs in frequency synthesizers. In some implementations, a phase-locked loop (pll) such as a frac-n pll of a frequency synthesizer can include a phase frequency detector (pfd) configured to receive a reference signal and a feedback signal.

11/14/13
20130300471 

Phase-locked loop circuit


A phase-locked loop (pll) circuit is provided. The pll circuit includes a phase frequency detector (pfd), a first charge pump (cp), a second cp, a first loop component set, a second loop component set, a voltage control oscillator (vco) and a frequency divider.

11/07/13
20130293315 

High-linearity phase frequency detector


A phase frequency detector realizes a highly linear conversion from noise-shaped ΣΔ modulation into charge quantities without degradation of phase-locked loop (pll) phase noise. The phase frequency detector may feature a construction of an up signal output and a down signal output, in which the up signal rises when a divided vco input rises, an up signal falls when the divided vco input falls, a down signal rises when the divided vco input rises, and a down signal falls when a reference input rises.

10/31/13
20130285752 

Reference-less frequency detector


Embodiments provide a reference-less frequency detector that overcomes the “dead zone” problem of conventional circuits. In particular, the frequency detector is able to accurately resolve the polarity of the frequency difference between the vco clock signal and the data signal, irrespective of the magnitude of the frequency difference and the presence of vco clock jitter and/or isi on the data signal..

10/31/13
20130285723 

Phase locked loop circuit


A phase locked loop circuit includes a phase frequency detector, a control circuit, a charge pump, a loop filter, a supply circuit, a ring oscillator, a frequency divider and a voltage detector. The phase frequency detector generates a frequency-increasing signal and a frequency-decreasing signal according to a phase difference between an input signal and a feedback signal.

10/24/13
20130278311 

Phase-frequency detection method


The present invention relates to a method and device for phase-frequency detection in a phase-lock loop circuit. The method comprises receiving compare edge of a reference clock signal and compare edge of a feedback clock signal, maintaining a phase/frequency detector, pfd, state machine with three pfd states, up, down, and idle, based on the received compare edges of the reference and feedback clock signals, recording current and previous time the state machine stays in up or down states, generating an up or down signal based on transition of pfd states and the comparison between recorded current time and recorded previous time; and outputting a digital control signal to a feedback frequency control device based on the up or down signal.

10/17/13
20130275636 

Accessing peripheral devices


A hardware system comprises a master device and a slave device that are coupled by a signal line. A frequency generator in the master device places a selected frequency signal on the signal line.

10/10/13
20130265893 

Apparatus for analyzing interference of wireless communication device, and analyzing interference using the same


An apparatus for analyzing interference of a wireless communication device includes a frequency detector configured to detect a frequency signal in a low frequency band that is generated in a wireless communication device; and a band-pass filter configured to extract an interference signal reflecting auditory sensitivity at each frequency, in an audible frequency band of the detected frequency signal. Further, the apparatus includes a voltmeter configured to measure a magnitude of the extracted interference signal at each frequency; and an interference determination block configured to determine whether there is an influence of interference of the wireless communication device on an audio device by comparing an interference level of the measured interference signal with a preset interference reference value..

10/03/13
20130257495 

Loop filter


A delay lock loop includes a phase frequency detector, a loop filter, and a voltage controlled delay circuit. The phase frequency detector is used for outputting an upper switch signal or a lower switch signal according to a reference clock and a feedback clock.

09/19/13
20130239680 

Microelectromechanical gyroscope with calibrated synchronization of actuation and actuating a microelectromechanical gyroscope


A gyroscope includes a body, a driving mass, which is mobile according to a driving axis, and a sensing mass, which is driven by the driving mass and is mobile according to a sensing axis, in response to rotations of the body. A driving device forms a microelectromechanical control loop with the body and the driving mass and maintains the driving mass in oscillation with a driving frequency.

09/12/13
20130238265 

Method and measuring radio-frequency energy


A method and apparatus is disclosed herein for measuring radio-frequency energy. In one embodiment, the apparatus comprises one or more antennas, a wideband radio frequency detector (e.g., a logarithmic amplifier (logamp)) coupled to the one or more antennas to measure ambient rf energy, wherein the wideband radio frequency detector has an analog output indicative of rf input power received by the one or more antennas, and an analog-to-digital converter coupled to the wideband radio frequency detector to convert the analog output to a digital value, the digital value being applied to a calibration function, to provide a number representing rf energy..

09/05/13
20130229213 

Capacitor leakage compensation for pll loop filter capacitor


An output portion of a charge pump receives control signals from a phase frequency detector and in response outputs positive current pulses and negative current pulses to a loop filter. A current control portion of the charge pump controls the output portion such that the magnitudes of the positive and negative current pulses are the same.

08/08/13
20130200922 

Phase frequency detector and charge pump for phase lock loop fast-locking


The present invention provides for a solution to reduce locking time with satisfactory performance without the need for significant footprint area for the phase lock loop (pll) circuits by boosting phase frequency detector (pfd) and charge pump (cp) gains through various circuitry configurations that employ one or more flip-flops, delay elements and advanced circuitry techniques.. .

08/01/13
20130195040 

Geographic locating remote endpoint monitor device, system, and methodology thereof


A phase-locked loop frequency synthesizer includes an l-state pulse width modulator configured to receive a reference frequency signal and at least one entry from a frequency table, and to output at least one n/n+1 modulus signals corresponding to the at least one entry from the frequency table. The synthesizer includes a divide by n/n+1 controllable modulus divider configured to receive the at least one n/n+1 modulus signals and to divide the output frequency signal by the at least one n/n+1 modulus signals to generate a second reference frequency signal.

07/25/13
20130187690 

Capacitive multiplication in a phase locked loop


A frequency synthesizer circuit is disclosed. The frequency synthesizer circuit includes a phase and frequency detector.

07/25/13
20130187689 

Phase-locked loop with two negative feedback loops


A phase-locked loop with two negative feedback loops including: a phase frequency detector which includes phase difference between the input clock and the feedback clock in a frequency-phase-locked loop and outputting up or down signals based on the phase difference; a charge pump outputting the current proportional to the up and down signals outputted from the phase frequency detector; a loop filter outputting the voltage by filtering the current outputted from the charge pump; a voltage controlled oscillator outputting the frequency based on the voltage outputted from the loop filter; a divider dividing the frequency outputted from the voltage controlled oscillator and feedbacking to the phase frequency detector; a frequency-voltage converter generating the voltage corresponding to the frequency outputted from the voltage controlled oscillator, and suppressing noise of the voltage controlled oscillator by feedbacking the generated voltage to the voltage controlled oscillator.. .

07/18/13
20130181760 

Method and generating on-chip clock with low power consumption


A fully on-chip clock generator on an integrated circuit (“ic”) includes a frequency detector for receiving a reference current and providing a first voltage; an error integrator for receiving the first voltage from the frequency detector, comparing it with a reference voltage, and providing a control voltage; a voltage controlled oscillator (“vco”) for receiving the control voltage from the error integrator, and providing an output clock; and a logic controller on the ic, coupled between the vco and the frequency detector, and generating logic control signals for controlling the frequency detector. The fully on-chip clock generator requires no external crystal, but its power consumption is significantly lower than a relaxation oscillator that generates the same clock frequency..

07/04/13
20130169268 

Schottky diode radio frequency detector probe with amplitude linearity compensation


A passive radio frequency probe that can detect low level rf signals is disclosed. Schottky diodes are used in the probe to convert alternating current (ac) signals to direct current (dc) signals on a one-to-one basis within a given tolerance.

07/04/13
20130168960 

Method and pole-slip detection in synchronous generators


A system and method for predicting a pole slip in a synchronous generator is provided. The system includes a stator voltage frequency detector to determine the frequency of the stator voltage, a mechanical frequency detector to determine the rotational speed of the rotor and a prediction unit that is operative to disconnect the generator from a power grid if it determines that that a pole slip is likely based on comparison of the frequency of the stator voltage and the rotational speed of the rotor..

06/27/13
20130162356 

Methods and oscillator frequency calibration


In one general aspect, an apparatus can include a phase frequency detector configured to produce a plurality of indicators of relative differences between a frequency of a target oscillator signal and a frequency of a reference oscillator signal. The apparatus can also include a pulse generator configured to produce a plurality of pulses based on the plurality of indicators.

06/20/13
20130156088 

Adaptive real-time control of de-emphasis level in a usb 3.0 signal conditioner based on incoming signal frequency range


An apparatus comprises a differential equalizer having: a) a first differential input, b) a second differential input, c) a first differential output, and d) a second differential output; a frequency detector coupled to the first and second differential inputs; an amplifier coupled to a first differential output and a second differential output of the differential equalizer; and a logical combiner having a first input coupled to an output of the frequency detector and an output coupled to a control input of the amplifier, wherein the logical combiner can mask at least one received de-emphasis parameter.. .

06/20/13
20130156076 

Circuits and methods for a combined phase detector


Circuits and methods for a combined phase detector are provided. In some embodiments, circuits for a combined phase detector are provided, the circuits comprising: a tri-state phase frequency detector and charge pump that receives a reference signal and a first input signal, and that produces a first output signal; and a sub-sampling phase detector that receives the reference signal and a second input signal, and that outputs a second output signal, wherein the first output signal and the second output signal are coupled together..

06/20/13
20130154701 

Charge pump, phase frequency detector and charge pump methods


A phase/frequency detector for control signal to controlling a charge pump includes: a core circuit arranged to output a first phase signal and a second phase signal according to a phase/frequency difference between a reference clock signal and an input clock signal; and a timing circuit coupled to the core circuit and arranged to generate a first control signal and a second control signal for controlling the charge pump according to the first phase signal and the second phase signal, wherein only one of the first control signal and the second control signal is indicative of an enabled operation when the reference clock signal and the input clock signal are substantially identical in phase.. .

06/13/13
20130147531 

Digital phase locked loop device and method in wireless communication system


A digital phase locked loop (pll) in a wireless communication system is provided. The pll includes a digitally controlled oscillator (dco), a divider, a phase frequency detector (pfd), a time to digital converter (tdc), a delay comparator, and a level scaler.

06/06/13
20130141028 

Motor controlling apparatus


A motor controlling apparatus includes a first target torque value calculator, a frequency detector, a second target torque value calculator, a torque command value calculator, a torque limiter, and a controller. The first target torque value calculator calculates a first target torque value, which is a target value of an output torque of a motor.

05/30/13
20130135098 

Method and system for detecting an airborne trigger


An apparatus includes a cantilevered element including a coating material having an affinity for at least one compound. The apparatus further includes a first capacitive plate and a second capacitive plate that are each spaced from and capacitively coupled to the cantilevered element.

05/30/13
20130135011 

Phase frequency detector circuit


A phase frequency detector circuit includes an edge detector circuit, a plurality of phase frequency detector sub-circuits, and a decision circuit. The edge detector circuit is configured to receive a first input signal and a second input signal.

05/09/13
20130116004 

Method for suppression of spurs from a free running oscillator in frequency division duplex (fdd) and time division duplex (tdd) wireless systems


Embodiments of this disclosure include methods in which spurs generated by the drifting of an oscillation frequency of an oscillation signal provided by a free-running oscillator may be minimized and/or eliminated from an output signal of a phase locked loop (pll). Methods include minimizing the mixing gain between the oscillation signal and a power signal provided to the pll.

05/09/13
20130113484 

Apparatus for automatically testing and tuning radio frequency coil


In one embodiment, an apparatus for automatically testing and tuning a rf coil is provided. The apparatus comprises a digital frequency generator for generating a stimulus, the stimulus comprising a range of radio frequency signals having different frequencies, a radio frequency coupler configured for applying the stimulus to the rf coil so as to enable the rf coil to generate a reflected signal in response to the stimulus applied, a radio frequency detector for detecting the reflected signal and a signal processing unit for processing the reflected signal, so as to identify the tuned resonant frequency of the rf coil and further configured for calculating return loss at the rf coil based on the reflected signal..

05/02/13
20130108001 

Clock and data recovery (cdr) architecture and phase detector thereof


A clock and data recovery (cdr) architecture which includes a frequency detector, a phase detector, a phase charge pump circuit, a frequency charge pump circuit and a voltage controlled oscillator is provided. The phase detector is configured to only include four and gates to receive and evaluate the intermediate signals, generated by the frequency detector, and accordingly generate a phase control signal.

05/02/13
20130106805 

Method, system, and rfid driven bi-stable display element


A rfid device configured to drive a display element. The rfid device may have a reader capable of sending and receiving radio frequency signals and a rfid tag in communication with the rfid reader.

04/25/13
20130099839 

Segmented fractional-n pll


A fractional-n pll includes a phase frequency detector module receiving a first clock and a second clock that is associated with a feedback path arrangement. A coarse phase adjustment module receives a coarse phase component and an output signal associated with a divider module used in the feedback path arrangement and performs a coarse phase adjustment.

03/21/13
20130071230 

System and detecting abnormal movement in a gas turbine shaft


A sensor element for use in a backing sensor to monitor a gas turbine shaft. The sensor includes an oscillator circuit 30 having an oscillator and a resonance circuit 42, and a frequency detector 31 for monitoring the frequency of the ossilation circuit.

03/21/13
20130070835 

Cdr with digitally controlled lock to reference


In described embodiments, a receiver includes a clock and data recovery (cdr) circuit with a voltage control oscillator (vco) having proportional and integral loop control, and a lock to reference (l2r) mode circuit using phase and frequency detector (pfd) control of the vco during the absence of input data to the cdr. A regular cdr second order loop incorporating pfd control of the vco during the absence of input data to the cdr achieves relatively rapid lock to reference when compared to counter-based lock to reference mode of operation..

03/14/13
20130064319 

Method and a device for controlling the level of a pulsed high-frequency signal


A method and a device for controlling the level of a pulsed high-frequency signal amplify or respectively attenuate an un-pulsed high-frequency signal with an amplification or attenuation element adjustable with regard to its amplification or attenuation factor. A pulsed high-frequency signal is generated by a pulse modulator controlled by a pulse signal from the un-pulsed high-frequency signal.

01/10/13
20130010979 

Transmitter


Where information is to be conveyed as acoustic waves, embodiments of the present invention provide a transmitter capable of causing acoustic waves that convey information to be not easily perceived by the human ear. A transmitter, being an apparatus that converts various types of encoded information into acoustic wave(s) in the audible spectrum and carries out transmission thereof, comprises microphone(s) that cause ambient sound(s) from location(s) at which acoustic wave(s) is/are transmitted to be input as ambient sound signal(s); peak frequency detector(s) that detect, within ambient sound signal(s), peak frequency or frequencies of major constituent(s) of ambient sound(s); carrier wave generator(s) that generate carrier waves at a plurality of frequencies that are natural number multiples of peak frequency or frequencies and that can be used to mask ambient sound(s); and modulator(s) that modulate a plurality of carrier waves with baseband signal(s)..



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Frequency Detector topics: Frequency Detector, Loop Filter, Reference Voltage, Frequency Divider, Generates A Frequency, Feedback Signal, State Machine, Peripheral Devices, Synthesizer, Calibration, Frequency Band, Wireless Communication Device, Low Frequency, Synchronization, Phase Shift

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