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Duc patents



      
           
This page is updated frequently with new Duc-related patent applications. Subscribe to the Duc RSS feed to automatically get the update: related Duc RSS feeds. RSS updates for this page: Duc RSS RSS


Pattern-forming composition and pattern-forming method using the same

Electronics And Telecommunications Research Institute

Pattern-forming composition and pattern-forming method using the same

Electronic device

Renesas Electronics

Electronic device

Electronic device

Semikron Elektronik & Kg

Power semiconductor module comprising module-internal load and auxiliary connection devices of low-inductance…


Date/App# patent app List of recent Duc-related patents
08/20/15
20150237744 
 Electrical switch assembly patent thumbnailElectrical switch assembly
An electrical switch assembly for an electrical appliance having an electrical load such as a motor, includes a housing with an opening, switch terminals, and an on/off mechanical switching module. The switch assembly includes an electronic control module operable with a semiconductor switching device to control operation of the load, and a heat sink in thermal contact with the switching device for dissipating heat.
Defond Components Limited


08/20/15
20150237739 
 Pattern-forming composition and pattern-forming method using the same patent thumbnailPattern-forming composition and pattern-forming method using the same
The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises cu powders, a solder for electrically coupling the cu powders, a polymer resin, a curing agent and a reductant.
Electronics And Telecommunications Research Institute


08/20/15
20150237731 
 Electronic device patent thumbnailElectronic device
To improve electric characteristics of an electronic device. An electronic device includes a semiconductor device and a three-terminal capacitor mounted on the upper surface of a mounting substrate, the semiconductor device includes a power supply pad and a ground pad, the power supply pad and the ground pad are electrically connected with a power supply land and a ground land, respectively, and the power supply land and the ground land are allocated to a land line in an outermost periphery of the semiconductor device, then, the power supply land and the ground land are electrically connected to the three-terminal capacitor by wirings formed on the upper surface of the mounting substrate..
Renesas Electronics Corporation


08/20/15
20150237727 
 Power semiconductor module comprising module-internal load and auxiliary connection devices of low-inductance configuration patent thumbnailPower semiconductor module comprising module-internal load and auxiliary connection devices of low-inductance configuration
A power semiconductor module comprising internal load and auxiliary connection devices embodied as wire bonding connections. A substrate has a plurality of load and auxiliary potential areas, wherein a power switch is arranged on a first load potential area, said power switch being embodied as a plurality of controllable power subswitches arranged in series.
Semikron Elektronik Gmbh & Co., Kg


08/20/15
20150237718 
 Power semiconductor device patent thumbnailPower semiconductor device
A circuit board having a power semiconductor element mounted thereon includes an insulating plate, a bonding pattern, a circuit pattern, and a pad plate. The insulating plate is made of aluminum nitride ceramic and has a first surface and a second surface opposite to the first surface.
Mitsubishi Electric Corporation


08/20/15
20150237711 
 Stretchable and foldable electronic devices patent thumbnailStretchable and foldable electronic devices
Disclosed herein are stretchable, foldable and optionally printable, processes for making devices and devices such as semiconductors, electronic circuits and components thereof that are capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Strain isolation layers provide good strain isolation to functional device layers.
Northwestern University


08/20/15
20150237682 
 Wireless cooking appliance operated on an induction heating cooktop patent thumbnailWireless cooking appliance operated on an induction heating cooktop
The present invention relates to a cooking appliance (1) suitable to be operated wirelessly on an induction heating cooktop (17) that has one or more than one induction coil (18), comprising a base (2) of ferromagnetic properties, enabling the appliance (1) to be heated from the bottom with the magnetic energy transferred by the induction coil (18), a control unit (3) having a microcontroller providing the controlling of the operating parameters like temperature, motor speed and communication with the cooktop (17) and the monitoring and communication means like the user interface, display, rfid and a receiver coil (4) that partially receives the power generated by the induction coil (18), providing the required energy for operating the control unit (3) and the additional components like the sensor, mixer motor placed thereon depending on the intended use of the appliance (1). The receiver coil (4) has one or more windings in a spiral form with gaps (a) there-between, the windings being embedded in one or more channel (6) of a coil casing (7)..
Arcelik Anomim Sirketi


08/20/15
20150237680 
 Induction heating system, induction heating method, output monitoring apparatus, output monitoring method, and induction heating apparatus patent thumbnailInduction heating system, induction heating method, output monitoring apparatus, output monitoring method, and induction heating apparatus
An induction heating system includes induction heating apparatuses, each including a high-frequency current transformer, a low-frequency current transformer and a heating coil, a high-frequency input switch connected to the high-frequency current transformer, a low-frequency input switch connected to the low-frequency current transformer, a first power source to output a high-frequency electric power and a low frequency electric power, a second power source, a first power source output switch connectable to the first power source, a second power source output switch connectable to the second power source, and a switch controller. Each induction heating apparatus includes a heater controller to send a signal to the switching controller to turn on one of the first power source output switch and the second power source output switch, to turn off the other, and to switch on or off each of the high-frequency input switch and the low-frequency input switch..
Neturen Co., Ltd.


08/20/15
20150237440 
 Portable device with enhanced bass response patent thumbnailPortable device with enhanced bass response
Apparatus comprising: at least one transducer configured to generate at least one lower frequency acoustic signal for output by a surface when in contact with the apparatus and at least one higher frequency acoustic signal for output by air conduction.. .
Nokia Corporation


08/20/15
20150237426 
 Supplementary earpiece for moving display patent thumbnailSupplementary earpiece for moving display
A method and system for providing a moving-screen sound system for a portable communication device such as a cell phone employs a fixed, pivoted, or hinged display screen driven directly or indirectly by an audio actuator. While the frequency response of the screen may have defects that would negatively impact overall sound quality from the device, in embodiments a supplemental audio transducer is placed adjacent the screen or elsewhere on the device so as to supplement or correct the frequency response of the screen.
Google Technology Holdings Llc


08/20/15
20150237423 

Acoustic bandgap structures for integration of mems resonators


Example acoustic bandgap devices provided that can be fabricated in a semiconductor fabrication tool based on design check rules. An example device includes a substrate lying in an x-y plane and defining an x-direction and a y-direction, an acoustic resonant cavity over the substrate, and a phononic crystal disposed over the acoustic resonant cavity by generating the phononic crystal as a plurality of unit cells disposed in a periodic arrangement.

08/20/15
20150237401 

Reproducing device, reproducing method, receiving apparatus, and reproducing system for specifying viewing record of program content remotely viewed by user


A smart phone having a control section is provided. The control section remotely accesses a television, which is connected with a home lan, so as to obtain a program content from the television, and reproduces the program content thus obtained.
Sharp Kabushiki Kaisha


08/20/15
20150237281 

Semiconductor integrated circuit and image sensor


According to an embodiment, a semiconductor integrated circuit includes an amplification unit, a comparison unit and a control unit. The amplification unit is configured to amplify a pixel value with an amplification factor that is set in a variable manner, the pixel value being according to an intensity of light irradiated on a pixel.
Kabushiki Kaisha Toshiba


08/20/15
20150237276 

Image sensor array with external charge detection circuitry


An image sensor may include an array of pixels that, do not include any source follower, reset, or addressing transistors, which helps to increase pixel well capacity, reduces or eliminates random telegraph signal (rts) noise, and reduces undesirable dark current. Charge to voltage conversion may be performed by charge detection circuitry that is external to the array of pixels.
Semiconductor Components Industries, Llc


08/20/15
20150237271 

Solid-state image capturing apparatus and camera


A solid-state image capturing apparatus, comprising a plurality of photoelectric conversion portions disposed in a first semiconductor region of a first conductivity type, a first portion of the first conductivity type disposed in the first semiconductor region and configured to supply a first potential to the first semiconductor region, and a second semiconductor region of a second conductivity type configured to receive a second potential, wherein the first portion is disposed between first and second photoelectric conversion portions neighboring each other, and the second semiconductor region is disposed between the first portion and each of the first and second photoelectric conversion portions.. .
Canon Kabushiki Kaisha


08/20/15
20150236794 

Method to control optical receiver implemented with semiconductor optical amplifier and method to control optical communication


A method to control an optical receiver implemented with a semiconductor optical amplifier (soa) is disclosed. The soa has a p-n junction operable in a pd mode when it is supplied with a zero or reverse bias.
Sumitomo Electric Device Innovations, Inc.


08/20/15
20150236712 

Solid-state imaging apparatus and semiconductor device


The present invention provides a small-sized inexpensive solid-state imaging apparatus. A d/a converter included in a successive comparison type a/d converter of the solid-state imaging apparatus includes a multiplexer which selects any of reference voltages vr0 to vr16 and sets it as an analog reference signal when coarse a/d conversion is performed, and which selects reference voltages vr (n−1) to vr (n+2) of the reference voltages vr0 to vr16 when fine a/d conversion is performed, and a capacitor array which generates an analog reference signal, based on the reference voltages vr (n−1) to vr (n+2) when the fine a/d conversion is performed.
Renesas Electronics Corporation


08/20/15
20150236711 

Capacitor array, ad converter and semiconductor device


A capacitor array includes a plural capacitors provided separated at intervals from each other. A first wiring line is connected to the first electrode of each of the plurality of capacitors, and is provided so as to pass through the intervals between the plurality of capacitors.
Fujitsu Semiconductor Limited


08/20/15
20150236706 

Delay locked loop and semiconductor apparatus


A delay locked loop includes: a variable delay unit configured to delay a reference clock signal in response to a delay code and generate a delay locked loop clock signal; a delay model unit configured to delay the delay locked loop clock signal by a modeled delay value and output delayed delay locked loop clock signal as a feedback clock signal; a calculation code generation unit configured to convert a phase of the reference clock signal and a phase of the feedback clock signal into a first code and a second code, respectively, and perform a calculation on the first and second codes so as to generate a calculation code; and a delay code generation unit configured to control the delay code in response to the calculation code.. .
Sk Hynix, Inc.


08/20/15
20150236692 

Driving signal generating circuit and power semiconductor device driving apparatus including the same


There are provided a driving signal generating circuit and a power semiconductor device driving apparatus including the same. The driving signal generating circuit for generating driving signals provided to first and second transistors driving a power semiconductor device includes: a first driving signal generating unit generating a first driving signal including a high level signal and a low level signal and providing the first driving signal to a gate of the first transistor; a detecting unit detecting a detection voltage depending on a current flowing in the power semiconductor device; a second driving signal generating unit generating a second driving signal in inverse proportion to the detection voltage; and a switching unit performing a switching operation depending on the first driving signal to transfer the second driving signal to a gate of the second transistor..
Samsung Electro-mechanics Co., Ltd.


08/20/15
20150236687 

Semiconductor device and display device


A semiconductor device is provided with an oxide semiconductor thin-film transistor (tft); a calibration electrode that is positioned so as to face an oxide semiconductor layer with an insulating layer therebetween, and, when viewed from the direction of the substrate normal line, overlaps at least part of a gate electrode with the oxide semiconductor layer interposed therebetween; and a calibration voltage setting circuit that determines the voltage to be applied to the calibration electrode. The calibration voltage setting circuit is provided with: a monitor tft that is configured using a second oxide semiconductor layer, which is substantially the same as the oxide semiconductor layer of the oxide semiconductor tft; a detection circuit that is configured so as to be able to measure the device characteristics of the monitor tft; and a voltage determination circuit that determines the voltage to be applied to the calibration electrode on the basis of the measured device characteristics..
Sharp Kabushiki Kaisha


08/20/15
20150236679 

Semiconductor device and controlling the same


A semiconductor device includes: a first signal generation section configured to generate an activation signal having a variable duty ratio; and a first processing section configured to perform intermittent operation, based on the activation signal.. .
Sony Corporation


08/20/15
20150236678 

Semiconductor integrated circuit


There are provided: a first buffer circuit which includes buffers being circuits to be measured connected in series, whose output and input are connected to a first input terminal and a second output terminal of a control circuit, respectively; a second buffer circuit which includes buffers being circuits to be measured connected in series whose number is the same as a number of the buffers included in the first buffer circuit, whose output and input are connected to a second input terminal and a first output terminal of the control circuit, respectively; and the control circuit which makes the entire circuit is a negative logic when a first operation is set, and simultaneously outputs signals with different logics from the output terminals at a time of a start of an oscillation operation and makes the entire circuit is a positive logic when a second operation is set.. .
Fujitsu Semiconductor Limited


08/20/15
20150236675 

Semiconductor apparatus and operating method thereof


A sense amplifier control circuit of a semiconductor apparatus includes a driving unit configured to apply a first voltage to a sense amplifier in response to a first driving signal. The driving unit may also be configured to apply a second voltage to the sense amplifier in response to a second driving signal.
Sk Hynix Inc.


08/20/15
20150236649 

High-frequency power amplifier and manufacturing the same


A high-frequency power amplifier includes: a semiconductor substrate; transistor cells separated from each other and located on the semiconductor substrate; and testing electrodes respectively connected to individual transistor cells, wherein an electrical signal and power to individually operate each corresponding transistor cell are supplied to each transistor cell, independently, from outside, using the testing electrodes.. .
Mitsubishi Electric Corporation


08/20/15
20150236631 

System and rotor time constant online identification in an ac induction machine


A system and method for determining a rotor time constant of an ac induction machine is disclosed. During operation of the induction motor, a flux signal is injected into a rotor flux command so as to generate a time-variant rotor flux.
Eaton Corporation


08/20/15
20150236619 

Vibratory generator device and power source module


The vibration power generator (100) includes a plurality of electrostatic induction generation devices (1001 to 100n); and a power combiner, the power combiner combining a generated output from each of the electrostatic induction generation devices. Each of the electrostatic induction generation devices includes a fixed electrode; a movable electrode disposed opposite to the fixed electrode so as to be movable relatively with respect to the fixed electrode; and an electret disposed on a side of the movable electrode opposite to the fixed electrode or a side of the fixed electrode opposite to the movable electrode..

08/20/15
20150236617 

Zvs voltage source inverter with reduced output current ripple


Systems, methods, and devices relating to dc/ac converters. A circuit including a full bridge inverter is provided.

08/20/15
20150236616 

System comprising a control semiconductor switches of an inverter and actuating an inverter


A system, comprising a control regulation system, an inverter, a dc link capacitor, which is coupled to input connections of the inverter, at least one control apparatus, which is coupled to semiconductor switches of a half-bridge of the inverter, wherein the control apparatus is configured to actuate the semiconductor switch on the basis of a control signal from the control regulation system, at least one temperature sensor, which is configured to determine a change in temperature of the semiconductor switches in the half-bridge of the inverter, and a voltage sensor, which is configured to determine the voltage at the dc link capacitor is disclosed.. .
Robert Bosch Gmbh


08/20/15
20150236609 

Power conversion device


A control section for controlling a 3-level power conversion circuit. The control section calculates on voltage error based on time ratios of three potentials in a predetermined certain period and a current value from a current detection section for detecting current outputted from the 3-level power conversion circuit, corrects a voltage command value based on a voltage correction amount for correcting the on voltage error, and performs on/off control for semiconductor switching elements of the 3-level power conversion circuit based on the corrected voltage command value..
Mitsubishi Electric Corporation


08/20/15
20150236579 

Current generation circuits and semiconductor devices including the same


Semiconductor devices are provided. The semiconductor device may include a current generation circuit and an internal circuit.
Sk Hynix Inc.


08/20/15
20150236575 

Magnetic shield for hybrid motors


A magnetic flux shield is described for employment within a hybrid permanent magnet/induction motor, allowing for both synchronous and asynchronous operation. A hybrid rotor comprises coaxially nested halbach cylinders each with an attached induction rotor and a magnetic flux shield.

08/20/15
20150236574 

Single-phase induction motor, hermetic compressor, and refrigeration cycle device


The single-phase induction motor includes a stator fixed in a cylindrical frame by shrink-fitting or press-fitting, a main winding wire and an auxiliary winding wire provided on the stator, and a rotor provided on an inner circumferential side of the stator, in which an arc-shaped arc portion and a linear cutout portion are formed on an outer circumference of the stator, the arc portion is arranged on the outer circumference of the stator in a direction of the main winding wire magnetic pole with respect to the center of the stator, and a relief portion for reducing a contact area between the arc portion and an inner circumferential surface of the frame is formed on the arc portion.. .
Mitsubishi Electric Corporation


08/20/15
20150236566 

Integrated two-axis lift-rotation motor center pedestal in multi-wafer carousel ald


Apparatus and methods for processing a semiconductor wafer including a two-axis lift-rotation motor center pedestal with vacuum capabilities. Wafers are subjected to a pressure differential between the top surface and bottom surface so that sufficient force prevents the wafer from moving during processing, the pressure differential generated by applying a decreased pressure to the back side of the wafer through interface with the motor assembly..
Applied Materials, Inc.


08/20/15
20150236539 

Mobile terminal


A mobile terminal is provided that includes a body to be mountable to a first charging apparatus, a current generator to generate an induction current by using a current of the first charging apparatus, and a wireless charger between the current generator and the battery to charge the battery by converting the induction current into a direct current. The mobile terminal may also include a connection port to be electrically connected to the battery and being connectable to a power supply terminal of a second charging apparatus, and a power charging controller to disconnect an electrically connected status between the wireless charger and the battery when the power supply terminal is electrically connected to the connection port..
Lg Electronics Inc.


08/20/15
20150236530 

Semiconductor device for battery control and battery pack


A semiconductor device for battery control includes a cpu, a first bus coupled to the cpu, a second bus not coupled to the cpu, and a protective function circuit for protecting a battery from stress applied thereto. The semiconductor device also includes a non-volatile memory storing trimming data, a trimming circuit to perform trimming required to allow the protective function circuit to exert a protective function, and a bus control circuit capable of selectively coupling the first bus and the second bus to the non-volatile memory.
Renesas Electronics Corporation


08/20/15
20150236502 

Circuit breaker


A circuit breaker comprising a superconducting fault current limiter and a circuit breaker module, wherein the superconducting fault current limiter and the circuit breaker module are connected in series. The circuit breaker module includes a disconnector, a first semiconductor switch unit, and a second semiconductor switch unit, wherein the disconnector is connected in series with the first semiconductor switch unit, and also connected in series with the superconducting fault current limiter, and the second semiconductor switch unit is connected in parallel with the disconnector and first semiconductor switch unit that are connected in series.
Ge Energy Power Conversion Technology Ltd


08/20/15
20150236500 

Semiconductor device


A semiconductor device includes a rectifier coupled between a circuit ground and a terminal for coupling to an external circuit, a transistor-enhanced current path coupled to the rectifier, and a switching circuit coupled to the transistor-enhanced current path and coupled between the terminal and the circuit ground. The switching circuit is configured to turn off the transistor-enhanced current path during normal operation, and turn on the transistor-enhanced current path when an electrostatic discharge occurs at the terminal..
Macronix International Co., Ltd.


08/20/15
20150236479 

Laser beam-combining optical device


A laser beam-combining optical device according to the present invention includes a plurality of semiconductor laser arrays, and a reflective element that reflects a laser light beam emitted from at least one semiconductor laser array of the plurality of semiconductor laser arrays. When laser light beams emitted from respective ones of the plurality of semiconductor laser arrays are focused on a single focus point, the laser light beam emitted from the at least one semiconductor laser array is reflected by the reflective element, and is then focused on the focus point..
Mitsubishi Electric Corporation


08/20/15
20150236477 

Semiconductor optical device and manufacturing method thereof


To provide a semiconductor optical device with device resistance reduced for optical communication. The semiconductor optical device includes an active layer (306) for emitting light through recombination of an electron and a hole; a diffraction grating (309) having a pitch defined in accordance with an output wavelength of the light emitted; a first semiconductor layer (311) including at least al, made of in and group-v compound, and formed on the diffraction grating; and a second semiconductor layer (307) including mg, made of in and group-v compound, and formed on the first semiconductor layer (311)..
Oclaro Japan, Inc.


08/20/15
20150236474 

Semiconductor laser device assembly


Disclosed is a semiconductor laser device assembly including a semiconductor laser device; and a dispersion compensation optical system, where a laser light exited from the semiconductor laser device is incident and exits to control a group velocity dispersion value of the laser light exited from the semiconductor laser device per wavelength.. .
Sony Corporation


08/20/15
20150236473 

Reflective optical source device


Disclosed is an optical source device. The optical source device includes: a mode converter configured to be optically coupled with an optical fiber; a semiconductor optical amplifier coupled with the mode converter, and configured to amplify an optical signal input through the optical fiber; and an electro absorption modulator coupled to the optical amplifier, and configured to modulate the amplified optical signal and output the modulated optical signal, in which each of the semiconductor optical amplifier and the optical absorption modulator includes a heater..
Electronics And Telecommunications Research Institute


08/20/15
20150236393 

Multilayer circuit substrate


A multilayer circuit substrate includes: a first signal line and a first ground conductor formed in a first conductive layer; and a second signal line and a second ground conductor formed in a second conductive layer, the second conductive layer facing the first conductive layer across an insulating layer. The first signal line intersects with the second signal line in a plan view of the multilayer circuit substrate, a space between the first ground conductor and first signal line is smaller in an intersection area of the first and second signal lines than a space in a non-intersection area, a space between the second ground conductor and second signal line is smaller in the intersection area than a space in the non-intersection area, and the first signal line is formed at a smaller line width in the intersection area than in the non-intersection area..
Taiyo Yuden Co., Ltd.


08/20/15
20150236366 

Flexible fuel cell and fabricating thereof


Provided is a flexible fuel cell. The flexible fuel cell includes: an anode including an anode end plate structure made of a polymer material and having a hydrogen flow channel formed therein, and a current collector having a conductive layer deposited on the structure; a cathode including a cathode end plate structure made of a polymer material and having an air flow channel formed therein, and a current collector deposited on the structure; and a membrane electrode assembly (mea) including a polymer electrolyte membrane having a catalyst layer attached to the surface thereof, and provided with a gas diffusion layer (gdl) on at least one surface thereof, wherein the polymer material includes an adhesive polymer and a curing agent mixed at a ratio of 4:1-20:1, and the membrane electrode assembly is interposed between the anode and the cathode and subjected to compression, wherein the compression is carried out while the ends of the membrane electrode assembly, anode and cathode are bent and tensile stress is applied thereto or compressive stress is applied thereto..
Global Frontier Center For Multiscale Energy Systems


08/20/15
20150236287 

Excitonic energy transfer to increase inorganic solar cell efficiency


The present disclosure relates to a photosensitive optoelectronic device comprising two electrodes, an inorganic subcell positioned between the two electrodes, wherein the inorganic subcell comprises at least one inorganic semiconductor material having a band gap energy (eg), and an organic sensitizing window layer disposed on the inorganic subcell. In one aspect, the organic sensitizing window layer comprises a singlet fission material.
University Of Southern California


08/20/15
20150236285 

Ambipolar synaptic devices


Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots.
International Business Machines Corporation


08/20/15
20150236283 

Ambipolar synaptic devices


Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots.
International Business Machines Corporation


08/20/15
20150236270 

Organic semiconductor material


Compounds useful as organic semiconductor materials, and semiconductor devices containing such organic semiconductor materials are described.. .
E.t.c. S.r.l.


08/20/15
20150236269 

Organic semiconductor solution and organic semiconductor film


The present invention provides an organic semiconductor solution that can produce an organic semiconductor film having acceptable semiconductor properties while endowed with improved film-forming properties due to substantial polymer content. This organic semiconductor solution contains an organic solvent as well as a polymer and an organic semiconductor precursor dissolved in the organic solvent.
Teijin Limited


08/20/15
20150236259 

Switching components and memory units


Some embodiments include a switching component which includes a selector region between a pair of electrodes. The selector region contains silicon doped with one or more of nitrogen, oxygen, germanium and carbon.
Micron Technology, Inc.


08/20/15
20150236245 

Semiconductor package and method thereof


A semiconductor package and manufacturing method thereof are disclosed. The semiconductor package includes a package carrier, a chip, a film, a first shielding metal plate and an encapsulating material.
Chipmos Technologies, Inc.


08/20/15
20150236238 

Elastic wave element and ladder filter using same


Methods and apparatus for reducing electric loss in an elastic wave element. In one example, the elastic wave element includes a piezoelectric body having a upper surface, an interdigital transducer (idt) electrode disposed on the piezoelectric body, a connection wiring disposed on the piezoelectric body and electrically connected to the idt electrode, the connection wiring having a lower connection wiring and an upper connection wiring provided above the lower connection wiring, and a reinforcement electrode provided above the connection wiring, the reinforcement electrode being in contact with and electrically connected to the lower connection wiring..

08/20/15
20150236236 

Ultrasound wave generating apparatus


In one embodiment, there is provided in an ultrasound wave generating apparatus a low output impedance transistor based driver circuit that has the ability to apply a drive signal at a frequency corresponding to an ultrasound transducer's resonant frequency. The low output impedance of the driver circuit allows for a substantial portion of the energy to be delivered to the ultrasound transducer and converted to ultrasound energy.
Cornell University


08/20/15
20150236235 

Systems and methods for fabrication of superconducting circuits


In one aspect, fabricating a superconductive integrated circuit with a josephson junction includes applying oxygen or nitrogen to at least part of a structure formed from an outer superconductive layer to passivate an artifact, if any, left from removing the portion of the outer superconductive layer. In another aspect, a first superconductive layer is deposited, a second superconductive layer is deposited on the first superconductive layer, an oxide layer is formed on the first superconductive layer, a dielectric layer is deposited on the oxide layer, a portion of the dielectric layer is removed, a first portion of the oxide layer is removed, a second oxide portion is formed in place of the first portion of the oxide layer, and a third superconductive layer is deposited on the dielectric layer and the second oxide portion..
D-wave Systems Inc.


08/20/15
20150236231 

Semiconductor light-emitting device


A semiconductor light-emitting device includes a lead frame, a semiconductor light-emitting element mounted on the top surface of the bonding region, and a case covering part of the lead frame. The bottom surface of the bonding region is exposed to the outside of the case.
Rohm Co., Ltd.


08/20/15
20150236223 

Optoelectronic component


A method of producing an optoelectronic component includes providing at least one optoelectronic semiconductor chip; arranging a starting layer on the semiconductor chip, wherein the starting layer is present in the form of a film and includes a first phosphor; arranging a conversion element on the starting layer, wherein the conversion element includes a second phosphor; and curing the starting layer to form a connection layer.. .
Osram Opto Semiconductors Gmbh


08/20/15
20150236222 

Semiconductor structure having nanocrystalline core and nanocrystalline shell with insulator coating


Semiconductor structures having a nanocrystalline core and corresponding nanocrystalline shell and insulator coating are described. In an example, a semiconductor structure includes an anisotropic nanocrystalline core composed of a first semiconductor material and having an aspect ratio between, but not including, 1.0 and 2.0.

08/20/15
20150236221 

Gauusian surface lens quantum photon converter and methods of controlling led colour and intensity


This invention is a photon-interactive gaussian surface lens method means that converts incident photons from a single or a plurality of wide band gap semiconductor class light emitting diode dies, into a secondary emission of photons emanating from a composite photon transparent colloidal stationary suspension of quantum dots, high efficiency phosphors, a combination of quantum dots and high efficiency phosphors and nano-particles of metal, silicon or similar semiconductors from the iiib and ivb group of the periodic table and any nano-material and/or micro/nano spheres that responds to rayleigh scattering and/or mie scattering; and a plurality of quantum dots in communication with said nano-particles in said suspension. The apparatus and methods according to the present invention provides in improved narrow pass-band of red, green, and blue photon efficiency over phosphor based conversion.

08/20/15
20150236219 

Light emitting diode package and fabricating same


An led package comprising a submount having a top and bottom surface with a plurality of top electrically and thermally conductive elements on its top surface. An led is included on one of the top elements such that an electrical signal applied to the top elements causes the led to emit light.
Cree, Inc.


08/20/15
20150236215 

Semiconductor light emitting device


The present disclosure relates to a semiconductor light emitting device, which comprises a plurality of semiconductor layers; a contact area where a first semiconductor layer is exposed as a result of the partial removal of a second semiconductor layer and an active layer; a non-conductive reflective film adapted to cover the second semiconductor layer and the contact area, such that light from the active layer is reflected towards the first semiconductor layer on the side of a growth substrate; a finger electrode extending between the non-conductive reflective film and the plurality of semiconductor layers; an electrical connection adapted to pass through the non-conductive reflective film and be electrically connected with the finger electrode; and a direct-connection type electrical connection adapted to pass through the non-conductive reflective film and be electrically connected with the plurality of semiconductor layers.. .
Semicon Light Co., Ltd.


08/20/15
20150236214 

Electronic devices with yielding substrates


In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.. .

08/20/15
20150236212 

Semiconductor light emitting device


Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a first semiconductor layer, a second semiconductor layer, an active layer formed between the first semiconductor layer and the second semiconductor layer, a first reflective electrode on the first semiconductor layer to reflect incident light, and a second reflective electrode on the second semiconductor layer to reflect the incident light..
Lg Innotek Co., Ltd.


08/20/15
20150236211 

Semiconductor light emitting device


According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting layer, a dielectric layer, a first electrode, a second electrode and a support substrate. The first layer has a first and second surface.
Kabushiki Kaisha Toshiba


08/20/15
20150236210 

Light emitting diode chip having electrode pad


Disclosed herein in an led chip including electrode pads. The led chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad located on the second conductive type semiconductor layer opposite to the second conductive type semiconductor layer, a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer, a second electrode pad electrically connected to the second conductive type semiconductor layer, and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer.
Seoul Viosys Co., Ltd.


08/20/15
20150236209 

Optoelectronic semiconductor chip and production thereof


An optoelectronic semiconductor chip includes a semiconductor body and a carrier, on which the semiconductor body is arranged. The semiconductor body has a semiconductor layer sequence with an active region provided for generating or receiving radiation, a first semiconductor layer and a second semiconductor layer.
Osram Opto Semiconductors Gmbh


08/20/15
20150236208 

Light-emitting devices


A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of protruding structures; a plurality of beveled trenches in the semiconductor layer sequence and respectively accommodating the plurality of protruding structures; a dielectric layer on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches, wherein the dielectric layer comprises a surface perpendicular to a thickness direction of the semiconductor layer sequence; a metal layer formed along the inner sidewall of the plurality of beveled trenches and extending to the surface of the dielectric layer, wherein the metal layer is insulated from the second semiconductor layer by the dielectric layer; and a first electrode formed on the plurality of protruding structures.. .
Epistar Corporation


08/20/15
20150236207 

Semiconductor light emitting element


The present disclosure relates to a semiconductor light emitting element. The semiconductor light emitting element has a first conductivity type layer, a light emitting layer, and a second conductivity type layer that are laminated; a first pad electrode provided to the first conductivity type layer; and second pad electrodes provided to the second conductivity type layer.
Nichia Corporation


08/20/15
20150236206 

Optoelectronic semiconductor chip, and light source comprising the optoelectronic semiconductor chip


An optoelectronic semiconductor chip (10) is specified, comprising a semiconductor layer sequence (20) having at least two active regions (21, 22) arranged one above another, wherein the active regions (21, 22) each have a first semiconductor region (3) of a first conduction type, a second semiconductor region (5) of a second conduction type and a radiation-emitting active layer (4) arranged between the first semiconductor region (3) and the second semiconductor region (5). The optoelectronic semiconductor chip (10) comprises a mirror layer (6), which is arranged at a side of the semiconductor layer sequence (20) facing away from a radiation exit surface (13), and at least two electrical contacts (11, 12) which are arranged at a side of the mirror layer (6) facing away from the radiation exit surface (13).
Osram Opto Semiconductors Gmbh


08/20/15
20150236204 

Light-emitting device


A light-emitting device comprises: a light-emitting semiconductor stack; and an electrode on the light-emitting semiconductor stack comprising a base material and a contact material different from the base material and capable of forming an ohmic contact with semiconductor material; wherein the contact material is distributed over a part of the light-emitting device and has a largest concentration in the electrode.. .
Epistar Corporation


08/20/15
20150236202 

Nanostructure semiconductor light emitting device


A nanostructure semiconductor light emitting device may include a first conductivity-type semiconductor base layer, a mask layer disposed on the base layer and having a plurality of openings exposing portions of the base layer, a plurality of light emitting nanostructures disposed in the plurality of openings, and a polycrystalline current suppressing layer disposed on the mask layer. At least a portion of the polycrystalline current suppressing layer is disposed below the second conductivity-type semiconductor layer.
Samsung Electronics Co., Ltd.


08/20/15
20150236201 

Optical device


An optical device and method for fabricating an optical device. The optical device comprising: a semiconductor material comprising an active layer configured to emit light when an electrical current is applied to the device and/or to generate an electrical current when light is incident on the active layer, wherein the semiconductor material comprises a first surface and an opposed second surface, from which light is emitted from and/or received by the device, and wherein the first surface defines a first structure comprising the active layer and configured to reflect light emitted from the active layer toward the second surface and/or to reflect light received by the device toward the active layer, and the second surface defines a second structure configured to permit light incident on the second surface at an angle outside a critical angle range to the planar normal to pass therethrough..
Infiniled Limited


08/20/15
20150236200 

Semiconductor light emitting device, nitride semiconductor layer growth substrate, and nitride semiconductor wafer


According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer.
Kabushiki Kaisha Toshiba


08/20/15
20150236199 

Optoelectronic component and producing an optoelectronic component


The invention relates to an optoelectronic component (101, 301, 501), comprising a substrate (103, 303, 503), on which a semiconductor layer sequence (105, 305, 505) has been placed, wherein the semiconductor layer sequence (105, 305, 505) has at least one identifier (115, 315) for identifying the component (101, 301, 501). The invention also relates to a method for producing an optoelectronic component (101, 301, 501)..
Osram Opto Semiconductors Gmbh


08/20/15
20150236198 

Group iii nitride semiconductor light-emitting device and production method therefor


The present invention provides a group iii nitride semiconductor light-emitting device exhibiting improved emission performance. A light-emitting layer has a mqw structure in which a plurality of layer units are repeatedly deposited, each layer unit comprising a well layer, a protective layer, and a barrier layer sequentially deposited.
Toyoda Gosei Co., Ltd.


08/20/15
20150236197 

Semiconductor light emitting device and manufacturing the same


According to one embodiment, a semiconductor light emitting device includes first and second semiconductor layers, and a light emitting unit. The light emitting unit is provided between the first and second semiconductor layers and includes well layers and barrier layers.
Kabushiki Kaisha Toshiba


08/20/15
20150236194 

Method of manufacturing microarray type nitride light emitting device


A method of manufacturing a microarray type nitride light emitting device includes forming a light emitting semiconductor layer by sequentially laminating a buffer layer, an n-type nitride contact layer, an active layer, and a p-type nitride contact layer on a substrate, forming a first transparent contact layer on the formed light emitting semiconductor layer, dividing a microarray type light emitting region through heat treatment of the first transparent contact layer through formation of a pattern, and connecting the divided light emitting regions by a second transparent contact layer.. .
Electronics And Telecommunications Research Institute


08/20/15
20150236193 

Method for producing group iii nitride semiconductor light-emitting device


The present techniques provide a method for producing a group iii nitride semiconductor light-emitting device, with suppression of an increase in polarity inversion defect density. The production method includes an n-type semiconductor layer formation step, a light-emitting layer formation step, and a p-type semiconductor layer formation step.
Toyoda Gosei Co., Ltd.


08/20/15
20150236186 

Nano avalanche photodiode architecture for photon detection


An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material.
Northrop Grumman Systems Corporation


08/20/15
20150236183 

Solar cell and fabricating same


A solar cell device and a method of fabricating the device is described. The solar cell is fabricated by providing a substrate, depositing a back contact over the substrate, depositing an absorber over the back contact, depositing a front contact over the absorber, and embedding a highly thermally conductive material within the solar cell.
Tsmc Solar Ltd.


08/20/15
20150236179 

Filtering defects with strain-compensated multi-layer quantum dots


The invention disclosed an approach of fabricating high quality semiconductor layers during the epitaxial growth by utilizing strain-compensated multiple layers of quantum dots to block the dislocation propagation and trap the defects. Such strain compensation scheme is achieved by inserting the inverse strained layer into the quantum dot dislocation filters.

08/20/15
20150236178 

Semiconductor film, producing semiconductor film, solar cell, light-emitting diode, thin film transistor, and electronic device


Wherein, in formula (a), x1 represents —sh, —nh2, or —oh; and each of a1 and b1 independently represents a hydrogen atom or a substituent having from 1 to 10 atoms; provided that when a1 and b1 are both hydrogen atoms, x1 represents —sh or —oh; in formula (b), x2 represents —sh, —nh2, or —oh; and each of a2 and b2 independently represents a hydrogen atom or a substituent having from 1 to 10 atoms; and in formula (c), a3 represents a hydrogen atom or a substituent having from 1 to 10 atoms.. .

08/20/15
20150236176 

Solar cell


A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant.
Lg Electronics Inc.


08/20/15
20150236175 

Amorphous silicon passivated contacts for back contact back junction solar cells


Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions.
Solexel, Inc.


08/20/15
20150236174 

Single passivated contacts for back contact back junction solar cells


Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions.
Solexel, Inc.


08/20/15
20150236173 

Photovaltaic device conducting layer


A multilayered structure may include a doped buffer layer on a transparent conductive oxide layer.. .
First Solar, Inc.


08/20/15
20150236172 

Schottky device and manufacture


A schottky device includes a barrier height adjustment layer in a portion of a semiconductor material. In accordance with an embodiment, the schottky device is formed from a semiconductor material of a first conductivity type which has a barrier height adjustment layer of a second conductivity type that extends from a first major surface of the semiconductor material into the semiconductor material a distance that is less than a zero bias depletion boundary.
Semiconductor Components Industries, Llc


08/20/15
20150236171 

Organic molecular memory


An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including variable-resistance molecular chains or charge-storage molecular chains, the variable-resistance molecular chains or the charge-storage molecular chains having electron-withdrawing substituents.. .
Kabushiki Kaisha Toshiba


08/20/15
20150236170 

Semiconductor device


The performances of a semiconductor device are improved. Between a memory gate electrode and a p type well, and between a control gate electrode and the memory gate electrode of a split gate type nonvolatile memory, an insulation film having a charge accumulation layer therein is formed.
Renesas Electronics Corporation


08/20/15
20150236169 

Semiconductor device and manufacturing the same


Provided is a semiconductor device using a p-type oxide semiconductor layer and a method of manufacturing the same. The device includes the p-type oxide layer formed of at least one oxide selected from the group consisting of a copper(cu)-containing copper monoxide, a tin(sn)-containing tin monoxide, a copper tin oxide containing a cu—sn alloy, and a nickel tin oxide containing a ni—sn alloy.
Faculty Of Science And Technology New University Of Lisbon


08/20/15
20150236168 

Semiconductor device


A highly reliable semiconductor device the yield of which can be prevented from decreasing due to electrostatic discharge damage is provided. A semiconductor device is provided which includes a gate electrode layer, a first gate insulating layer over the gate electrode layer, a second gate insulating layer being over the first gate insulating layer and having a smaller thickness than the first gate insulating layer, an oxide semiconductor layer over the second gate insulating layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236167 

Semiconductor device and manufacturing the same


One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer..
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236166 

Semiconductor device and manufacturing method thereof


Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236165 

Semiconductor device


Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236164 

Semiconductor device structures and arrays of vertical transistor devices


A semiconductor device structure is disclosed. The semiconductor device structure includes a mesa extending above a substrate.
Micron Technology, Inc.


08/20/15
20150236163 

Voltage regulator circuit


A transistor includes a gate, a source, and a drain, the gate is electrically connected to the source or the drain, a first signal is input to one of the source and the drain, and an oxide semiconductor layer whose carrier concentration is 5×1014/cm3 or less is used for a channel formation layer. A capacitor includes a first electrode and a second electrode, the first electrode is electrically connected to the other of the source and the drain of the transistor, and a second signal which is a clock signal is input to the second electrode.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236162 

Oxide, semiconductor device, module, and electronic device


To provide a crystalline oxide semiconductor which can be used as a semiconductor of a transistor or the like. The crystalline oxide semiconductor is an oxide over a surface and includes a plurality of flat-plate-like in—ga—zn oxides.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236161 

Thin film transistor


A thin film transistor includes: a gate electrode; a source electrode; a drain electrode facing the source electrode; an oxide semiconductor layer disposed between the gate electrode and the source electrode or between the gate electrode and the drain electrode; and a gate insulating layer disposed between the gate electrode and the source electrode or between the gate electrode and the drain electrode, wherein when a signal applied to the gate electrode is a turnoff signal, a voltage applied to the gate electrode has a negative value.. .
Samsung Display Co., Ltd.


08/20/15
20150236159 

Work function metal fill for replacement gate fin field effect transistor process


A method of forming a semiconductor device that includes forming a sacrificial gate structure on a channel portion of a fin structure, wherein the angle at the intersection of the sidewall of the sacrificial gate structure and an upper surface of the channel portion of the fin structure is obtuse. Epitaxial source and drain region structures are formed on a source region portion and a drain region portion of the fin structure.
International Business Machines Corporation


08/20/15
20150236158 

Method for fabricating semiconductor device, and semiconductor device made thereby


A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity.
United Microelectronics Corp.


08/20/15
20150236157 

Transistor strain-inducing scheme


A transistor device includes a gate structure disposed over a channel region of a semiconductor substrate. A source/drain recess is arranged in the semiconductor substrate alongside the gate structure.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/20/15
20150236156 

Semiconductor device


A semiconductor device includes a misfet. The semiconductor device also includes a silicon nitride film 12 and a silicon nitride film 10 arranged on the silicon nitride film 12.
Renesas Electronics Corporation


08/20/15
20150236155 

Semiconductor device and formation thereof


A semiconductor device and method of forming the same are described. A semiconductor device includes an active area adjacent a gate structure.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236154 

Anti-fuse and forming the same


An anti-fuse includes a first gate structure disposed in a semiconductor substrate and a second gate structure that is spaced apart from the first gate structure by a distance and disposed in the semiconductor substrate. The first and second gate structures have different depths from each other in the semiconductor substrate..
Sk Hynix Inc.


08/20/15
20150236152 

Semiconductor device


A semiconductor device includes a pillar-shaped silicon layer. A sidewall having a laminated structure including an insulating film and silicon resides on an upper sidewall of the pillar-shaped silicon layer.
Unisantis Electronics Singapore Pte. Ltd.


08/20/15
20150236151 

Silicon carbide semiconductor devices, and methods for manufacturing thereof


A semiconductor device is presented. The device includes a semiconductor layer including silicon carbide, and having a first surface and a second surface.
General Electric Company


08/20/15
20150236150 

Semiconductor device and operating method thereof


Provided is a semiconductor device including a p-type substrate, a p-type first well region, an n-type second well region, a gate, n-type source and drain regions, a dummy gate and an n-type deep well region. The first well region is in the substrate.
United Microelectronics Corp.


08/20/15
20150236149 

Semiconductor device and manufacturing


A semiconductor device includes a gate structure, and a source region and a drain region on opposite sides of the gate structure. The source region comprises a first region of a first conductivity type, and a second region of a second conductivity type, the second conductivity type opposite to the first conductivity type.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236148 

Silicon carbide semiconductor device and manufacturing same


A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, a gate electrode, an interlayer insulating film, and a gate interconnection. The silicon carbide substrate includes: a first impurity region; a second impurity region provided on the first impurity region; and a third impurity region provided on the second impurity region so as to be separated from the first impurity region.
Sumitomo Electric Industries, Ltd.


08/20/15
20150236147 

Graphene transistor with a sublithographic channel width


Silicon-carbon alloy structures can be formed as inverted u-shaped structures around semiconductor fins by a selective epitaxy process. A planarization dielectric layer is formed to fill gaps among the silicon-carbon alloy structures.
International Business Machines Corporation


08/20/15
20150236145 

Semiconductor structures and methods for multi-level band gap energy of nanowire transistors to improve drive current


A semiconductor device is provided having a channel formed from a nanowire with multi-level band gap energy. The semiconductor device comprises a nanowire structure formed between source and drain regions.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236143 

Semiconductor device and rc-igbt with zones directly adjoining a rear side electrode


A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state.
Infineon Technologies Ag


08/20/15
20150236142 

Semiconductor device with insert structure at a rear side and manufacturing


A cavity is formed in a first semiconductor layer that is formed on a semiconducting base layer. The cavity extends from a process surface of the first semiconductor layer to the base layer.
Infineon Technologies Ag


08/20/15
20150236140 

Current switching transistor


An electronic device and a method of fabricating an electronic device are disclosed. The device includes a body of semiconductor material, and a conductive material defining at least three conducting contacts to form respective terminals.
Pst Sensors (proprietary) Limited


08/20/15
20150236138 

Semiconductor device and manufacturing the same


A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in s value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236137 

Manufacturing oxide semiconductor thin film transistor


A manufacturing method of an oxide semiconductor thin film transistor according to the disclosure includes the following. A source and a drain are formed.
Chunghwa Picture Tubes, Ltd.


08/20/15
20150236135 

Method to improve reliability of replacement gate device


A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.. .
Globalfoundries Inc.


08/20/15
20150236134 

Method of manufacturing semiconductor device


A method of manufacturing a finfet semiconductor device is provided, wherein the semiconductor fins are formed in a parallel arrangement which intersects the gates arranged in parallel. The polycrystalline silicon layer is deposited and then converted into a single crystal silicon layer such that the single crystal silicon layer and the semiconductor fins are integrated in essence, i.e., the source/drain region in the semiconductor fins is raised and the top area of the semiconductor fins is extended.
Institute Of Microelectronics, Chinese Academy Of Sciences


08/20/15
20150236133 

Devices and methods of forming higher tunability finfet varactor


Devices and methods for forming semiconductor devices with wider finfets for higher tunability of the varactor are provided. One method includes, for instance: obtaining an intermediate semiconductor device; applying a spacer layer over the semiconductor device; etching the semiconductor device to remove at least a portion of the spacer layer to expose the plurality of mandrels; removing the mandrels; etching the semiconductor device to remove a portion of the dielectric layer; forming at least one fin; and removing the spacer layer and the dielectric layer.
Globalfoundries Inc.


08/20/15
20150236129 

Semiconductor device and manufacturing the same


An object is to reduce the number of photomasks used for manufacturing a transistor and manufacturing a display device to less than the conventional one. The display device is manufactured through, in total, three photolithography steps including one photolithography step which serves as both a step of forming a gate electrode and a step of forming an island-like semiconductor layer, one photolithography step of forming a contact hole after a planarization insulating layer is formed, and one photolithography step which serves as both a step of forming a source electrode and a drain electrode and a step of forming a pixel electrode..
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236128 

Thin-film transistor and manufacturing the same, tft array substrate and display device


The present invention discloses a method for manufacturing a thin-film transistor, comprising the steps of: forming a semiconductor active layer, and a doped semiconductor active layer; forming a source-drain metal layer; forming a channel region; and implanting ions for lowering the tft leakage current into the surface of the semiconductor active layer in the channel region via ion implantation after forming the channel region. The invention further relates to a thin-film transistor, a tft array substrate and a display device.
Beijing Boe Display Technology Co., Ltd.


08/20/15
20150236127 

Silicon carbide semiconductor device and manufacturing the same


In a method of manufacturing a silicon carbide semiconductor device including a vertical switching element having a trench gate structure, with the use of a substrate having an off angle with respect to a (0001) plane or a (000-1) plane, a trench is formed from a surface of a source region to a depth reaching a drift layer through a base region so that a side wall surface of the trench faces a (11-20) plane or a (1-100) plane, and a gate oxide film is formed without performing sacrificial oxidation after formation of the trench.. .
Denso Corporation


08/20/15
20150236126 

Semiconductor device having vertical channel, resistive memory device including the same, and manufacturing the same


A semiconductor device, a resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device includes a pillar extending substantially perpendicular from a semiconductor substrate, the pillar including an inner portion and an outer portion surrounding the inner portion.
Sk Hynix Inc.


08/20/15
20150236125 

Semiconductor device and manufacturing method thereof


A method of manufacturing a semiconductor device is provided. The method includes forming a plurality of trenches in a semiconductor substrate, on opposite sides of a gate electrode of a p-type metal-oxide-semiconductor (pmos) disposed on the semiconductor substrate.
Semiconductor Manufacturing International (shanghai) Corporation


08/20/15
20150236124 

Epitaxy in semiconductor structure and manufacturing method thereof


A semiconductor structure including a semiconductor substrate is provided. The semiconductor substrate includes a surface.
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150236123 

Gate structure of field effect transistor with footing


In some embodiments, an field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure includes a channel region, and a source region and a drain region.
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150236121 

Semiconductor device and forming the same


A semiconductor device comprising a substrate, a channel layer over the substrate, an active layer over the channel layer and a laminate layer in contact with the active layer. The active layer has a band gap discontinuity with the channel layer..
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236120 

Nanowire transistor structures with merged source/drain regions using auxiliary pillars


A nanowire transistor structure is fabricated by using auxiliary epitaxial nucleation source/drain fin structures. The fin structures include semiconductor layers integral with nanowires that extend between the fin structures.
International Business Machines Corporation


08/20/15
20150236119 

Silicon-carbide semiconductor device and manufacturing method thereof


A silicon-carbide semiconductor device that relaxes field intensity in a gate insulating film, and that has a low on-resistance. The silicon-carbide semiconductor device includes: an n-type silicon-carbide substrate; a drift layer formed on a topside of the n-type silicon-carbide substrate; a trench formed in the drift layer and that includes therein a gate insulating film and a gate electrode; a p-type high-concentration well region formed parallel to the trench with a spacing therefrom and that has a depth larger than that of the trench; and a p-type body region formed to have a depth that gradually increases when nearing from a position upward from the bottom end of the trench by approximately the thickness of the gate insulating film at the bottom of the trench toward the lower end of the p-type high-concentration well region..
Mitsubishi Electric Corporation


08/20/15
20150236116 

Method of forming a fin-like bjt


A bipolar junction transistor (bjt) formed using a fin field-effect transistor (finfet) complimentary metal-oxide-semiconductor (cmos) process flow is provided. The bjt includes an emitter fin, a base fin, and a collector fin formed on a substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236115 

Low temperature spacer for advanced semiconductor devices


Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (bn) spacer on a gate stack, such as a gate stack of a planar fet or finfet. The boron nitride spacer is fabricated using atomic layer deposition (ald) and/or plasma enhanced atomic layer deposition (peald) techniques to produce a boron nitride spacer at relatively low temperatures that are conducive to devices made from materials such as silicon (si), silicon germanium (sige), germanium (ge), and/or iii-v compounds.
International Business Machines Corporation


08/20/15
20150236114 

Semiconductor device and formation thereof


A semiconductor device and method of formation are provided herein. A semiconductor device includes a barrier including carbon over a fin, the fin including a doped region.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236113 

Semiconductor device for compensating internal delay, methods thereof, and data processing system having the same


A method of manufacturing a field effect transistor using a gate last process includes providing the field effect transistor which includes a high-k dielectric formed between an elevated source and an elevated drain and surrounding a metal gate, and performing a chemical mechanical planarization (cmp) process on an upper surface of the elevated source, and in which a height of the metal gate becomes lower than a height of the elevated source according to the cmp process.. .
Samsung Electronics Co., Ltd.


08/20/15
20150236112 

Transistor, semiconductor device and manufacturing the same


A semiconductor device including a central region, side regions located in both sides of the central region, and conductive layers including a first barrier pattern formed in the central region, a material pattern formed in the first barrier pattern and having an etch selectivity with respect to the first barrier pattern, and a second barrier pattern formed in the material pattern; and insulating layers alternately stacked with the conductive layers.. .
Sk Hynix Inc.


08/20/15
20150236110 

Split gate cells for embedded flash memory


In a method of forming a split gate memory cell, a sacrificial spacer is formed over a semiconductor substrate. A first layer of conductive material is formed over a top surface and sidewalls of the sacrificial spacer.
Taiwan Semiconductor Manufacturing Co., Ltd.


08/20/15
20150236108 

Semiconductor device having stable gate structure and manufacturing the same


Disclosed are a semiconductor device having a stable gate structure, and a manufacturing method thereof, in which a gate structure is stabilized by additionally including a plurality of gate feet under a gate head in a width direction of the gate head so as to serve as supporters in a gate structure including a fine gate foot having a length of 0.2 μm or smaller, and the gate head having a predetermined size. Accordingly, it is possible to prevent the gate electrode of the semiconductor device from collapsing, and improve reliability of the semiconductor device during or after the process of the semiconductor device..
Electronics And Telecommunications Research Institute


08/20/15
20150236107 

Ultra high voltage semiconductor device with electrostatic discharge capabilities


A semiconductor device comprises a semiconductor substrate, a first layer over the semiconductor substrate, and a drain region in the first layer. The drain region comprises a drain rectangular portion having a first end and a second end, a first drain end portion contiguous with the drain rectangular portion and extending from the first end of the drain rectangular portion away from a center of the drain region, and a second drain end portion contiguous with the drain rectangular portion and extending from the second end of the drain rectangular portion away from the center of the drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236105 

Semiconductor device with vertical transistors having a surrounding gate and a work-function metal around an upper sidewall


A method of manufacturing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer, a first insulating film around the fin-shaped semiconductor layer, and a pillar-shaped semiconductor layer on the fin-shaped semiconductor layer. A second step forms a gate insulating film around the pillar-shaped semiconductor layer, a gate electrode around the gate insulating film, and a gate line.
Unisantis Electronics Singapore Pte. Ltd.


08/20/15
20150236104 

Semiconductor device


According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.. .
Kabushiki Kaisha Toshiba


08/20/15
20150236103 

Nitride-based semiconductor device and manufacturing the same


The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped alxga1-xn (0≦x<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type alyga1-yn (0<y≦1, x<y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7..
Kabushikikaisha Toshiba


08/20/15
20150236102 

Semiconductor wafer structure having si material and iii-n material on the (111) surface of the si material


A semiconductor wafer structure includes a substrate, si material on the substrate, the si material having a thickness of 100 μm or less and a (111) surface facing away from the substrate, and iii-n material on the (111) surface of the si material. The substrate has a coefficient of thermal expansion more closely matched to that of the iii-n material than the si material.
Infineon Technologies Austria Ag


08/20/15
20150236100 

Field effect transistor with narrow bandgap source and drain regions and fabrication


A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer.
Intel Corporation


08/20/15
20150236099 

Semiconductor device and manufacturing the same


A semiconductor device according to an embodiment includes: a semiconductor substrate; an n-type sic layer provided on one side of the semiconductor substrate; a p-type first sic region provided in the n-type sic layer; a metallic second sic region provided in the p-type first sic region, the second sic region containing at least one element selected from the group of mg, ca, sr, ba, sc, y, la, and lanthanoid; a gate electrode; a gate insulating film provided between the gate electrode and the n-type sic layer, the gate insulating film provided between the gate electrode and the first sic region; a first electrode provided on the second sic region; and a second electrode provided on a side of the semiconductor substrate opposite to the n-type sic layer.. .
Kabushiki Kaisha Toshiba


08/20/15
20150236098 

Semiconductor device and manufacturing the same


A semiconductor device according to an embodiment includes: a first electrode; a sic semiconductor layer including n-type semiconductor; and a second electrode including a sic metallic region made of metal in contact with the sic semiconductor layer, the sic metallic region provided on a side of the sic semiconductor layer opposite to the first electrode, the sic metallic region containing at least one element selected from the group of mg (magnesium), ca (calcium), sr (strontium), ba (barium), sc (scandium), y (yttrium), la (lanthanum), and lanthanoid (ce, pr, nd, pm, sm, eu, gd, tb, dy, ho, er, tm, yb, lu).. .
Kabushiki Kaisha Toshiba


08/20/15
20150236097 

Semiconductor device and manufacturing the same


A semiconductor device of an embodiment includes a p-type first diamond semiconductor layer, a p-type second diamond semiconductor layer disposed on the first diamond semiconductor layer, a plurality of n-type third diamond semiconductor layers disposed on the second diamond semiconductor layer, and a first electrode disposed on the second diamond semiconductor and the third diamond semiconductor layers. The p-type second diamond semiconductor layer has a p-type impurity concentration lower than a p-type impurity concentration of the first diamond semiconductor layer and has oxygen-terminated surfaces.
Kabushiki Kaisha Toshiba


08/20/15
20150236095 

Semiconductor device


A semiconductor device and a method of making the same. The device includes a semiconductor substrate having an algan layer on a gan layer.
Taiwan Semiconductor Manufacturing Company Ltd.


08/20/15
20150236094 

Dual vertical channel


Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a first channel region and a second channel region that are formed according to at least one of a vertical channel configuration or a dual channel configuration.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236092 

Semiconductor structures and methods for multi-level work function and multi-valued channel doping of nanowire transistors to improve drive current


A semiconductor device with multi-level work function and multi-valued channel doping is provided. The semiconductor device comprises a nanowire structure and a gate region.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236091 

Porous insulation film, and a semiconductor device including such porous insulation film


The deposition rate of a porous insulation film is increased, and the film strength of the porous insulation film is improved. Two or more organic siloxane raw materials each having a cyclic sio structure as a main skeleton thereof, and having mutually different structures, are vaporized, and transported with a carrier gas to a reactor (chamber), and an oxidant gas including an oxygen atom is added thereto.
Renesas Electronics Corporation


08/20/15
20150236090 

Transistor with reducted parasitic


Parasitic thyristor action may be mitigated in semiconductor devices by placement of minority carrier traps, illustratively in the base(s) of bipolar transistors or the well of a cmos transistor pair. The minority carrier traps include adjacent n and p regions which may be connected by a conductor..
Nxp B.v.


08/20/15
20150236089 

Manufacturing semiconductor device and semiconductor device


A manufacturing method of a junction field effect transistor includes the steps of: (a) forming an n+-type source layer on a surface of an n−-type drift layer formed on an n+-type sic substrate; (b) forming a plurality of shallow trenches disposed at predetermined intervals by etching the surface of the n−-type drift layer with a silicon oxide film formed on the n−-type drift layer used as a mask; (c) forming an n-type counter dope layer by doping the n−-type drift layer below each of the shallow trenches with nitrogen by using a vertical ion implantation method; (d) forming a sidewall spacer on each sidewall of the silicon oxide film and the shallow trenches; and (e) forming a p-type gate layer by doping the n−-type drift layer below each of shallow trenches with aluminum by using the vertical ion implantation method.. .
Renesas Electronics Corporation


08/20/15
20150236088 

Semiconductor device


A semiconductor device is provided. On one main surface side of an n-type semiconductor substrate, a p-type diffusion region to serve as an anode of a diode is formed.
Mitsubishi Electric Corporation


08/20/15
20150236087 

Semiconductor devices including a guard ring and related semiconductor systems


Semiconductor devices are provided. The semiconductor devices may include a substrate and a transistor on the substrate.
Samsung Electronics Co., Ltd.


08/20/15
20150236086 

Semiconductor structures and methods for multi-level work function


A semiconductor structure is provided comprising a vertical channel structure extending from a substrate and formed as a channel between a source region and a drain region. The semiconductor structure further comprises a metal gate that surrounds a portion of the vertical channel structure.
Taiwan Semiconductor Manufacturing Company Limited


08/20/15
20150236084 

Semiconductor devices having hybrid capacitors and methods for fabricating the same


A semiconductor device includes a plurality of capacitors disposed on a substrate and a support pattern supporting upper portions and lower portions of the capacitors. Each of the capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower and upper electrodes.
Samsung Electronics Co., Ltd.


08/20/15
20150236083 

Thin film transistor array


A thin film transistor array includes thin film transistors each including a gate electrode formed on an insulation substrate, a source electrode and a drain electrode formed on the gate electrode via a gate insulation film and a semiconductor layer formed on a portion of the gate electrode surrounded by at least the source electrode and the drain electrode; capacitors each including a capacitor electrode formed on the insulation substrate and a pixel electrode which is formed on the capacitor electrode via the gate insulation film and connected to the drain electrode, the capacitors and the thin film transistors being positioned in a matrix along a first direction and a second direction perpendicular to the first direction; and connection lines that connect semiconductor layers of the thin film transistors positioned in the first direction. The connection lines each have a width smaller than a width of the semiconductor layer..
Toppan Printing Co., Ltd.


08/20/15
20150236079 

Organic light emitting display apparatus and manufacturing the same


An organic light emitting display includes a pixel circuit to supply current to an organic light emitting device. The pixel circuit includes a switching transistor and a driving transistor.
Samsung Display Co., Ltd.


08/20/15
20150236072 

Semiconductor memory device


A semiconductor memory device comprises: a memory cell array comprising first wiring lines, second wiring lines extending crossing the first wiring lines, and memory cells at intersections of the first and second wiring lines, the memory cells being stacked perpendicularly to a substrate, each memory cell comprising a variable resistance element; a first select transistor layer comprising a first select transistor operative to select one of the first wiring lines; a second select transistor layer comprising a second select transistor operative to select one of the second wiring lines; and a peripheral circuit layer on the substrate, the peripheral circuit layer comprising a peripheral circuit that controls a voltage applied to one of the memory cells. The first select transistor layer is provided below the memory cell array perpendicularly to the substrate.
Kabushiki Kaisha Toshiba


08/20/15
20150236070 

Radiation-emitting semiconductor chip


A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation and is arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region facing away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer, in the emission region, electrically conductively connects to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; the second semiconductor layer, in the emission region, electrically conductively connects to a second connection layer.. .
Osram Opto Semiconductors Gmbh


08/20/15
20150236069 

Method of manufacturing semiconductor apparatus


A method of manufacturing a semiconductor apparatus, comprising forming a structure including an insulating layer on a substrate, and an electrode on the structure, forming an insulating first film covering the electrode and the structure, forming an opening in a projection, of the first film, formed by a step between upper faces of the electrode and the structure, to expose part of the upper face of the electrode as a first portion, forming a second film covering the first film and the first portion, forming a protective film in the opening by processing the second film, the protective film covering a side face defining the opening and the first portion and being not formed on an upper face of the projection, and forming a third film on the first film and the protective film by spin coating.. .
Canon Kabushiki Kaisha


08/20/15
20150236067 

Grids in backside illumination image sensor chips and methods for forming the same


A device includes a semiconductor substrate having a front side and a backside, a photo-sensitive device disposed on the front side of the semiconductor substrate, and a first and a second grid line parallel to each other. The first and the second grid lines are on the backside of, and overlying, the semiconductor substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236063 

Image sensor and electronic device


An image sensor includes a first semiconductor chip, a second semiconductor chip and connecting portions configured to connect the first semiconductor chip and the second semiconductor chip. The first semiconductor chip includes a photoelectric conversion portion, a capacitor, a reset transistor, and an amplification transistor.
Canon Kabushiki Kaisha


08/20/15
20150236061 

Semiconductor device and driving method thereof


A semiconductor device including photosensor capable of imaging with high resolution is disclosed. The semiconductor device includes the photosensor having a photodiode, a first transistor, and a second transistor.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236058 

Image sensor pixel cell with switched deep trench isolation structure


A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material to accumulate image charge. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region.
Omnivision Technologies, Inc.


08/20/15
20150236057 

Semiconductor device


A semiconductor device used for a semiconductor relay includes: a first diode; a second diode; an electric field shield film for covering the second semiconductor island region, where the second diode is formed; and a wiring for electrically connecting the first diode to the second diode. The wiring is arranged so as to cross above a silicon oxide film surrounding the second semiconductor island region.
Renesas Electronics Corporation


08/20/15
20150236054 

Display device


A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with schottky junction.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236051 

Semiconductor device including groups of stacked nanowires and related methods


A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material.
Stmicroelectronics, Inc.


08/20/15
20150236050 

Semiconductor device including groups of nanowires of different semiconductor materials and related methods


A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material..
Stmicroelectronics, Inc.


08/20/15
20150236049 

Semiconductor device


An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode.
Semiconductor Energy Laboratory Co., Ltd.


08/20/15
20150236048 

Display device


A display device includes a substrate, a display region, a peripheral region, an insulating layer which is disposed on a gate signal line and a conductor, a conductive layer which is disposed on the insulating layer and crosses a plurality of gate signal lines and the conductor in the peripheral region, a first semiconductor film which is disposed between the insulating layer and the conductive layer, and a second semiconductor film which is disposed between the insulating layer and the conductive layer and which is separated from the first semiconductor film. The conductive layer is connected to the plurality of gate signal lines via a plurality of diodes, and the plurality of gate signal lines are arranged in the display region and the peripheral region.
Panasonic Liquid Crystal Display Co., Ltd.


08/20/15
20150236044 

Thin film transistor array panel


A thin film transistor array panel includes: a substrate; gate lines on the substrate, each of the gate lines including a gate electrode; a semiconductor layer on the substrate; an etching stopper on the semiconductor layer; a data wiring layer on the substrate and including a data line, a source electrode connected to the data line, and a drain electrode; and a passivation layer covering the source electrode, the drain electrode, and the etching stopper, where the etching stopper includes an etching prevention portion between the source electrode and the drain electrode, a shortest distance a between an upper side and a lower side of an overlap area where the etching prevention portion and the semiconductor layer overlap one another is represented by a straight line in a plane view, and a width of a channel portion of the semiconductor layer is greater than the shortest distance a.. .
Samsung Display Co., Ltd.


08/20/15
20150236040 

Diode biased body contacted transistor


Approaches for body contacted transistors are provided. A method of manufacturing a semiconductor structure includes forming a field effect transistor (fet) including a channel and a gate.
International Business Machines Corporation


08/20/15
20150236038 

Multilevel memory stack structure and methods of manufacturing the same


A first stack of alternating layers including first electrically conductive layers and first electrically insulating layers is formed with first stepped surfaces and a first dielectric material portion thereupon. Dielectric pillar structures including a dielectric metal oxide can be formed through the first stepped surfaces.
Sandisk Technologies Inc.


08/20/15
20150236037 

Nonvolatile memory device and fabricating the same


A non-volatile memory device in accordance with one embodiment of the present invention includes a substrate including a p-type impurity-doped region, a channel structure comprising a plurality of interlayer insulating layers that are alternately stacked with a plurality of channel layers on the substrate, a p-type semiconductor pattern that contacts sidewalls of the plurality of channel layers, wherein a lower end of the p-type semiconductor pattern contacts the p-type impurity-doped region, and source lines that are disposed at both sides of the p-type semiconductor pattern and contact the sidewalls of the plurality of channel layers.. .
Sk Hynix Inc.


08/20/15
20150236036 

Semiconductor device and methods of manufacturing and operating the same


A semiconductor device includes a memory cell array including a vertical channel layer, two or more selection transistors, and a plurality of memory cells formed along the vertical channel; a peripheral circuit suitable for programming the two or more selection transistors and the memory cells; and a control circuit suitable for controlling the peripheral circuit to decrease a pass voltage applied to one word line adjacent to two or more selection lines coupled to the respective selection transistors, during a program operation in which the peripheral circuit applies a program voltage to the two or more selection lines and applies the pass voltage to a plurality of word lines connected to the memory cells.. .
Sk Hynix Inc.


08/20/15
20150236032 

Methods for fabricating integrated circuits with a high-voltage mosfet


Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate.
Globalfoundries Singapore Pte. Ltd.


08/20/15
20150236028 

Semiconductor devices and methods of manufacturing the same


A semiconductor device including a substrate having a trench formed therein, a plurality of gate structures, an isolation layer pattern and an insulating interlayer pattern. The substrate includes a plurality of active regions defined by the trench and spaced apart from each other in a second direction.
Samsung Electronics Co., Ltd.


08/20/15
20150236025 

Semiconductor device


A well voltage supply cell includes third gate electrode group (including a third gate electrode corresponding to a first gate electrode) located symmetrically to first gate electrode group (including the first gate electrode constituting an access transistor) of a first sram cell, fourth gate electrode group (including a fourth gate electrode corresponding to a second gate electrode) located symmetrically to second gate electrode group (including the second gate electrode constituting an access transistor) of a second sram cell. A p-type impurity diffusion region located on a p well between the third gate electrode and the fourth gate electrode located opposite to each other, a first n-type impurity diffusion region located on the side of the third gate electrode closer to the first sram cell, and a second n-type impurity diffusion region located on the side of the fourth gate electrode closer to the second sram cell..
Renesas Electronics Corporation


08/20/15
20150236024 

Semiconductor structure having buried conductive elements


Embodiments for the present invention provide a semiconductor device and methods for fabrication. In an embodiment of the present invention, a semiconductor structure comprises a first conductor horizontally formed on a semiconductor substrate.
International Business Machines Corporation


08/20/15
20150236022 

Semiconductor device and manufacturing method thereof


Disclosed herein is a semiconductor device that includes: a semiconductor substrate; a well of a first conductive type that is formed in the semiconductor substrate; an element isolation region embedded in the semiconductor substrate so as to define an active region of the well; first and second gate electrodes each including a side surface and a bottom surface that are covered with the well such that the first and second gate electrodes are formed to traverse the active region, and a peak depth of the well corresponding to the active region is equal to or shallower than a peak depth of the well corresponding to the element isolation region.. .
Ps4 Luxco S.a.r.l.


08/20/15
20150236020 

Cmos transistors including gate spacers of the same thickness


A dielectric material layer is deposited on gate structures of first and second semiconductor material portions. The dielectric material layer is anisotropically etched to form a first gate spacer on a first semiconductor material portion, while being protected above the second semiconductor material portion.
International Business Machines Corporation


08/20/15
20150236019 

Cmos transistors including gate spacers of the same thickness


A dielectric material layer is deposited on gate structures of first and second semiconductor material portions. The dielectric material layer is anisotropically etched to form a first gate spacer on a first semiconductor material portion, while being protected above the second semiconductor material portion.
International Business Machines Corporation


08/20/15
20150236018 

Fabrication of insulating fence fins


A semiconductor structure may be formed by forming a first semiconductor fin and a second inactive semiconductor fin above a substrate; depositing a masking layer above the first semiconductor fin and the second semiconductor fin; etching a trench in the masking layer exposing the second semiconductor fin while the first semiconductor fin remains covered by the masking layer; removing the second semiconductor fin to form a fin recess beneath the trench; filling the fin recess with an insulating material to form an insulating fence fin; and removing the masking layer to expose the first semiconductor fin and the insulating fence fin. A third semiconductor fin separating the first semiconductor fin from the second semiconductor fin may also be formed prior to depositing the masking layer and covered by the masking layer.
International Business Machines Corporation


08/20/15
20150236017 

Method of manufacturing precise semiconductor contacts


A first dielectric layer including a first opening is provided on a first surface of a semiconductor layer. A second dielectric layer is provided on top of the first dielectric layer in the first opening.
Cree, Inc.


08/20/15
20150236016 

Contact structure of semiconductor device


A method of fabricating a semiconductor device comprises forming a fin structure extending from a substrate, the fin structure comprising a first fin, a second fin, and a third fin between the first fin and the second fin. The method further comprises forming germanide over a first facet of the first fin, a second facet of the second fin, and a substantially planar surface of the third fin, wherein the first facet forms a first acute angle with a major surface of the substrate and is substantially mirror symmetric with the second facet, and wherein the substantially planar surface of the third fin forms a second acute angle smaller than the first acute angle with the major surface of the substrate..
Taiwan Semiconductor Manufacturing Company, Ltd.


08/20/15
20150236014 

Stacked metal oxide semiconductor (mos) and metal oxide metal (mom) capacitor architecture


A device includes a first stacked capacitor comprising a first mos capacitance and a first mom capacitance, the first mos capacitance coupled to a first node, the first node configured to receive a first bias voltage, and a second stacked capacitor comprising a second mos capacitance and a second mom capacitance, the second mos capacitance coupled to the first node.. .
Qualcomm Incorporated


08/20/15
20150236012 

Semiconductor device


In a semiconductor device having a built-in schottky barrier diode as a reflux diode, a maximum unipolar current is increased in a reflux state and a leakage current is reduced in an off state. A schottky electrode is provided in at least a part of a surface between adjacent well regions of a second conductivity type disposed on a surface layer side of a drift layer of a first conductivity type, and an impurity concentration of a first conductivity type in a first region provided in a lower part of the schottky electrode and provided between the adjacent well regions is set to be higher than a first impurity concentration of a first conductivity type in the drift layer and to be lower than a second impurity concentration of a second conductivity type in the well region..
Mitsubishi Electric Corporation


08/20/15
20150236011 

Direct connected silicon controlled rectifier (scr) having internal trigger


In one aspect, a direct connected silicon control rectifier (dcscr) includes a substrate having a semiconductor surface, a parasitic pnp bipolar transistor and a parasitic npn bipolar transistor formed in the semiconductor surface. The parasitic pnp bipolar transistor includes a p+ emitter, an nbase and a pcollector and the parasitic npn bipolar includes an n+ emitter, a pbase and an ncollector.
Allegro Microsystems, Llc


08/20/15
20150236007 

Display device


A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with schottky junction.
Semiconductor Energy Laboratory., Ltd.


08/20/15
20150236005 

Method of hybrid packaging a lead frame based multi-chip semiconductor device with multiple interconnecting structures


A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure.. .
Alpha And Omega Semiconductor Incorporated


08/20/15
20150236004 

Implementing inverted master-slave 3d semiconductor stack


A method and apparatus are provided for implementing an enhanced three dimensional (3d) semiconductor stack. A chip carrier has an aperture of a first length and first width.
International Business Machines Corporation


08/20/15
20150236003 

Method of manufacturing semiconductor device


A method of manufacturing a semiconductor device obtained by laminating a first semiconductor chip and a second semiconductor chip with different planar sizes when seen in a plan view on a wiring board via an adhesive material, in which the second semiconductor chip with a relatively larger planar size is mounted on the first semiconductor chip with a relatively smaller planar size. Also, after the first and second semiconductor chips are mounted, the first and second semiconductor chips are sealed with resin.
Renesas Electronics Corporation


08/20/15
20150236001 

Implementing inverted master-slave 3d semiconductor stack


A method and apparatus are provided for implementing an enhanced three dimensional (3d) semiconductor stack. A chip carrier has an aperture of a first length and first width.
International Business Machines Corporation




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