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Duc patents



      
           
This page is updated frequently with new Duc-related patent applications. Subscribe to the Duc RSS feed to automatically get the update: related Duc RSS feeds. RSS updates for this page: Duc RSS RSS


Method of fabricating a thin-film device

Nlt Technologies Ltd

Method of fabricating a thin-film device

Ultrasound diagnostic device, ultrasound diagnostic method and ultrasound diagnostic program storage medium

Fijifilm

Ultrasound diagnostic device, ultrasound diagnostic method and ultrasound diagnostic program storage medium

Ultrasound diagnostic device, ultrasound diagnostic method and ultrasound diagnostic program storage medium

Via Technologies

Core-specific fuse mechanism for a multi-core die

Date/App# patent app List of recent Duc-related patents
02/26/15
20150058878
 Receiving audio/video content patent thumbnailnew patent Receiving audio/video content
An audio/video content receiver configured to receive media content by a broadcast data path, the media content includes a host module having a tuner configured to assign logical channel indices to media channels to allow selection, at the host module, of the media channels for reproduction by selecting the corresponding logical channel index, the host module storing channel association data associating the logical channel indices with the received media channels. A removable conditional access module (cam) includes an access controller decoding access-controlled encoded broadcast content, the host module and the removable cam to provide an encrypted communication link for decoded access-controlled encoded broadcast content between the cam and the host module.
Sony Europe Limited
02/26/15
20150058817
 Semiconductor overlay production system and method patent thumbnailnew patent Semiconductor overlay production system and method
Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.. .
Taiwan Semiconductor Manufacturing Company, Ltd.
02/26/15
20150058813
 Multi-model metrology patent thumbnailnew patent Multi-model metrology
Disclosed are apparatus and methods for characterizing a plurality of structures of interest on a semiconductor wafer. A plurality of models having varying combinations of floating and fixed critical parameters and corresponding simulated spectra is generated.
Kla-tencor Corporation
02/26/15
20150058712
 Method for assisting website design using keywords patent thumbnailnew patent Method for assisting website design using keywords
Systems and methods for automating search engine optimization of a website may include obtaining a set of keywords using a computer network. The keywords may be relevant to a business and may be obtained from the website of identified local competitors to the business.
Go Daddy Operating Company, Llc
02/26/15
20150058695
 Correctable configuration data compression and decompression system patent thumbnailnew patent Correctable configuration data compression and decompression system
An apparatus has a shared fuse array and a plurality of microprocessor cores. The shared fuse array is disposed on a die, the shared fuse array having a plurality of semiconductor fuses programmed with compressed configuration data and error checking and correction (ecc) codes.
Via Technologies, Inc.
02/26/15
20150058685
 Method and system of testing semiconductor memory patent thumbnailnew patent Method and system of testing semiconductor memory
A method of testing a semiconductor memory includes generating a logical value of a test pattern through an algorithm pattern generator included in a field programmable gate array. The generated logical value is programmed in a dut under the control of a dq signal responding to a dq enable signal that is generated from automatic test equipment and is then transferred to the field programmable gate array.
Samsung Electronics Co., Ltd.
02/26/15
20150058668
 Optimal test flow scheduling within automated test equipment for minimized mean time to detect failure patent thumbnailnew patent Optimal test flow scheduling within automated test equipment for minimized mean time to detect failure
The present invention describes a method and system for optimizing a test flow within each ate (automated test equipment) station. The test flow includes a plurality of test blocks.
International Business Machines Corporation
02/26/15
20150058654
 Semiconductor device, battery pack and personal data assistant patent thumbnailnew patent Semiconductor device, battery pack and personal data assistant
A semiconductor device includes a voltage measurement unit that measures a voltage of a battery, a current measurement unit that measures charging and discharging currents of the battery, a data processing control unit, and a current detection unit. The voltage measurement unit and the current measurement unit are able to measure the voltage and the discharging current of the battery in case that the current detection unit detects that the discharging current exceeds a predetermined threshold.
Renesas Electronics Corporation
02/26/15
20150058610
 Core-specific fuse mechanism for a multi-core die patent thumbnailnew patent Core-specific fuse mechanism for a multi-core die
An apparatus including a plurality of cores and a fuse array. The plurality of cores is disposed on a die.
Via Technologies, Inc.
02/26/15
20150058609
 Apparatus and  storage and decompression of configuration data patent thumbnailnew patent Apparatus and storage and decompression of configuration data
An apparatus includes a plurality of cores and a fuse array. The plurality of cores is disposed on a die.
Via Technologies, Inc.
02/26/15
20150058598
new patent

Apparatus and configurable redundant fuse banks


An apparatus is contemplated for storing and providing configuration data to an integrated circuit device, the apparatus has a fuse array and a plurality of cores. The fuse array is disposed on a die.
Via Technologies, Inc.
02/26/15
20150058588
new patent

Semiconductor device and memory protection method


According to one embodiment, a semiconductor device includes a processor, and a memory device. The memory device has a nonvolatile semiconductor storage device and is configured to serve as a main memory for the processor.
Kabushiki Kaisha Toshiba
02/26/15
20150058566
new patent

Semiconductor memory apparatus


A semiconductor memory apparatus includes a column address decoding unit configured to decode a column address and generate a column select signal; a row address decoding unit configured to decode a row address and generate a word line select signal; a driving driver unit configured to provide different voltages to a plurality of resistive memory elements in response to the column select signal; a sink current control unit configured to generate a plurality of sink voltages with different voltage levels in response to the word line select signal; and a plurality of current sink units configured to flow current from the plurality of respective resistive memory elements to a ground terminal in response to the plurality of sink voltages.. .
Sk Hynix Inc.
02/26/15
20150058565
new patent

Apparatus and compression of configuration data


An apparatus includes a device programmer, coupled to a plurality of semiconductor fuses disposed on a die, configured to program the plurality of semiconductor fuses with compressed configuration data for a plurality of cores disposed separately on the die. The device programmer has a virtual fuse array and a compressor.
Via Technologies, Inc.
02/26/15
20150058564
new patent

Apparatus and extended cache correction


An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is programmed the configuration data.
Via Technologies, Inc.
02/26/15
20150058563
new patent

Multi-core fuse decompression mechanism


An apparatus is contemplated for storing and decompressing configuration data in a multi-core microprocessor. The apparatus includes a shared fuse array and a plurality of microprocessor cores.
Via Technologies, Inc.
02/26/15
20150058339
new patent

Method for automating search engine optimization for websites


Systems and methods for automating search engine optimization of a website may include obtaining a set of keywords using a computer network. The keywords may be relevant to a business and may be obtained from the website of identified local competitors to the business.
Go Daddyoperating Company, Llc
02/26/15
20150058336
new patent

Personalized content recommendations


Methods, systems and computer program products for providing personalized educational content recommendations are disclosed. A computer-implemented method may include receiving information describing a body of content, receiving data describing an interaction of a user with one or more elements of the body of content, receiving a context that includes one or more criteria associated with the body of content, generating a list of modules from the body of content based on the data describing the interaction of the user with the one or more elements of the body of content in view of the context, and providing the generated list of modules to an interested party..
Knewton, Inc.
02/26/15
20150058240
new patent

Method and system for providing a virtual job market


The present invention relates to a method for providing a virtual job market on a network comprising an application server and clients and/or electronic message systems allowing to input and output information, wherein the method comprises the following steps: providing primary dimensions information on industries, career levels and functional areas; providing secondary dimensions information on salary ranges and/or geo-data and/or educational information and/or languages and/or special expertises, entering the primary and secondary dimensions information in a three dimensional data base on the application server; collecting information chunks of open jobs and candidate profiles, and placing the information chunks in a distinct cell or number of cells in the three dimensional database. Further, the present invention relates to a system for providing a virtual job market on a network comprising an application server and clients and/or electronic message systems including at least a first database comprising candidate profiles, a second database comprising salary information and a third database comprising job information, wherein the information available in the three databases is matched in a three dimensional database model..
Experteer Gmbh
02/26/15
20150058095
new patent

Method and system for measuring and improving marketing capability


A computerized method and system for assessing and improving the capability of a marketing organization creates output that allows for quick visualization of gaps in marketing organization maturity. Binary questions are employed to ensure inter-coder reliability for the assessment.
Acxiom Corporation
02/26/15
20150058001
new patent

Microphone and corresponding digital interface


Analog signals are received from a sound transducer. The analog signals are converted into digitized data.
Knowles Electronics, Llc
02/26/15
20150057979
new patent

System and processing nmr signals


There is disclosed an nmr signal processing method for accurately estimating the intensities of p peaks of interest in an nmr spectrum by the use of a mathematical model that represents a time-domain, free induction decay (fid) signal obtained by an nmr measurement as a sum of q signal components. First, q parameters (each being a combination of a pole and a complex intensity) defining q signal components are estimated for each value of the estimation order q of the mathematical model while varying the value of the estimation order q (s34).
Jeol Ltd.
02/26/15
20150057940
new patent

Modifying a cosmetic product based on a microbe profile


Systems and methods are described for modifying a cosmetic product based on a microbe profile including an ingredient-microbe interaction dataset including information associated with interactions between reference cosmetic ingredients and types of reference microbes; and a computing device including circuitry configured to receive information associated with the microbe profile of an individual, receive information associated with an ingredient list of the cosmetic product, compare the microbe profile of the individual and the ingredient list of the cosmetic product to the ingredient-microbe interaction dataset, identify an interaction between at least one cosmetic ingredient in the ingredient list of the cosmetic product and at least one of the one or more types of microbes in the microbe profile of the individual, recommend a modification to the ingredient list in response to an identified interaction, and report to a user the recommended modification.. .
Elwha Llc
02/26/15
20150057939
new patent

Modifying a cosmetic product based on a microbe profile


Systems and methods are described for modifying a cosmetic product based on a microbe profile including an ingredient-microbe interaction dataset including information associated with interactions between reference cosmetic ingredients and types of reference microbes; and a computing device including circuitry configured to receive information associated with the microbe profile of an individual, receive information associated with an ingredient list of the cosmetic product, compare the microbe profile of the individual and the ingredient list of the cosmetic product to the ingredient-microbe interaction dataset, identify an interaction between at least one cosmetic ingredient in the ingredient list of the cosmetic product and at least one of the one or more types of microbes in the microbe profile of the individual, recommend a modification to the ingredient list in response to an identified interaction, and report to a user the recommended modification.. .
Elwha Llc, A Limited Liability Company Of The State Of Delaware
02/26/15
20150057879
new patent

Method and monitoring an electromagnetic hydraulic valve for a variable valve timing system


A method monitors an electromagnetic hydraulic valve for controlling a hydraulically adjustable valve gear of a reciprocating piston engine. The hydraulic valve includes an electromagnetic coil and a moving armature configured to connect a control port hydraulically to a high-pressure port or a low-pressure port, depending on an energization of the coil.
Dr. Ing. H.c.f. Porsche Aktiengesellschaft
02/26/15
20150057805
new patent

Robotic activity system using position sensing


The robotic activity system described herein provides for efficient communications between the robotic device and the board without the establishment of a wired or radio-frequency connection. In particular, through the simulation of touch events by the robotic device on the touch display of the board using capacitive elements on the robotic device, information/data may be communicated from the robotic device to the board, including the location of the robotic device relative to the touch display, the orientation of the robotic device relative to the touch display, status information of the robotic device (e.g., battery level, motor voltages, or wheel speed), and/or other similar pieces of information.
Evollve, Inc.
02/26/15
20150057764
new patent

Access arbitration system for semiconductor fabrication equipment and methods for using and operating the same


An access arbitration module includes a plurality of active component communication ports for communicating with a plurality of active components, and includes a passive component communication port for communicating with a passive component. The access arbitration module also includes switching logic defined to control transmission of access communication protocol signals between each of the plurality of active component communication ports and the passive component communication port, such that an authorized one of the plurality of active component communication ports is connected in communication with the passive component communication port at a given time, and such that non-authorized ones of the plurality of active component communication ports are prevented from communication with the passive component communication port at the given time..
Brooks Automation, Inc.
02/26/15
20150057701
new patent

Systems and methods for the treatment of eye conditions


Systems, methods, and devices used to treat eyelids, meibomian glands, ducts, and surrounding tissue are described herein. In some embodiments, an eye treatment device is disclosed, which includes a scleral shield positionable proximate an inner surface of an eyelid, the scleral shield being made of, or coated with, an energy-absorbing material activated by a light energy, and an energy transducer positionable outside of the eyelid, the energy transducer configured to provide light energy at one or more wavelengths, including a first wavelength selected to heat the energy-absorbing material..
02/26/15
20150057681
new patent

Devices and methods for lumen occlusion


A system may include an introducer sheath including a retention member configured to anchor the introducer sheath in a natural body lumen having a wall. The system may also have an elongate member extending along a longitudinal axis through a working channel of the introducer sheath.
Boston Scientific Scimed, Inc.
02/26/15
20150057547
new patent

Capacitive transducer and manufacturing the same


A method for manufacturing a capacitive transducer is provided having a structure in which a vibrating film is supported to be able to vibrate. The method includes forming a sacrificial layer on a first electrode; forming a layer on the sacrificial layer, the layer forming at least part of the vibrating film; removing the sacrificial layer, including forming etching holes to communicate with the sacrificial layer; forming a sealing layer for sealing the etching holes; and etching at least part of the sealing layer.
Canon Kabushiki Kaisha
02/26/15
20150057543
new patent

Ultrasound diagnostic device, ultrasound diagnostic method and ultrasound diagnostic program storage medium


An ultrasound diagnostic device includes an ultrasound probe including ultrasound transducers that transmit ultrasound toward an imaging subject, receive ultrasound reflected from the imaging subject, and output ultrasound detection signals; an alteration unit that alters a transmission frequency of the transmitted ultrasound or a reception frequency of the received ultrasound, from a frequency for converting amplitudes, of the ultrasound detection signals outputted from the ultrasound probe, into an intensity distribution of brightnesses and displaying the distribution, to a frequency for carrying out diagnosis of tissue characteristics; and a calculation unit that calculates an index for diagnosing tissue characteristics, based on a relationship between received signals, at a time when the transmission frequency or the reception frequency is altered to a frequency at which diagnosis of tissue characteristics is carried out, at two or more different ultrasound transducers at the ultrasound probe.. .
Fijifilm Corporation
02/26/15
20150057542
new patent

Ultrasound diagnostic device, ultrasound diagnostic method and ultrasound diagnostic program storage medium


An ultrasound diagnostic device includes an ultrasound probe including plural ultrasound transducers that transmit ultrasound toward an imaging subject, receive ultrasound reflected from the imaging subject, and output ultrasound detection signals; an alteration unit that alters transmission frequencies of the ultrasound transmitted from the ultrasound probe or reception frequencies of the ultrasound received by the ultrasound probe; and a calculation unit that calculates an index for diagnosing a tissue characteristic based on a relationship between reception signals of at least two different ultrasound transducers for at least two different frequencies of the transmission frequencies or reception frequencies altered by the alteration unit.. .
Fujifilm Corporation
02/26/15
20150057515
new patent

Sweat simulation, collecting and sensing systems


Biological chemicals, potentially found in blood are measured by collecting sweat and determining the concentration or meaning of the selected chemical in sweat. The sweat can be collected using a time based, interval collector and analyzed using an external device.
University Of Cincinnati
02/26/15
20150057465
new patent

Control of growth-induction-production phases


The present invention provides various combinations of genetic modifications to a transformed host cell that provide increase conversion of carbon to a chemical product. The present invention also provides methods of fermentation and methods of making various chemical products..
Opx Biotechnologies, Inc.
02/26/15
20150057441
new patent

Sequence-determined dna fragments encoding acetohydroxyacid synthase proteins


The present invention provides dna molecules that constitute fragments of the genome of a plant, and polypeptides encoded thereby. The dna molecules are useful for specifying a gene product in cells, either as a promoter or as a protein coding sequence or as an utr or as a 3′ termination sequence, and are also useful in controlling the behavior of a gene in the chromosome, in controlling the expression of a gene or as tools for genetic mapping, recognizing or isolating identical or related dna fragments, or identification of a particular individual organism, or for clustering of a group of organisms with a common trait..
Ceres, Inc.
02/26/15
20150057319
new patent

Novel choline cocrystal of epalrestat


The invention relates to a novel choline cocrystal of 5-[(1z,2e)-2-methyl-3-phenylpropenylidene]-4-oxo-2-thioxo-3-thiazolidineacetic acid. The preparation and characterization of the novel choline cocrystal according to various embodiments of the invention is described.
Bionevia, Llc
02/26/15
20150057180
new patent

Methods and kits for analyzing biomarkers in a signal transduction pathway


Provided are methods and kits for analyzing biomarkers in one or more signal transduction pathways in a cell. In some embodiments, the methods and kits of the invention permit simultaneous analysis of more than one biomarker and/or more than one signal transduction pathway.
Bioscale, Inc.
02/26/15
20150056907
new patent

Actuator, particularly for a heating, ventilation and/or air-conditioning installation


The invention relates to an electric actuator able to drive a component of a heating, ventilation and/or air-conditioning installation of a vehicle. The electric actuator comprises a housing accommodating at least an electric motor driving a drive shaft extending along a first axis, a speed reducer driven by the drive shaft and setting in motion an output stub intended to drive the component.
Valeo Systems Thermique
02/26/15
20150056823
new patent

Laser processing method and laser processing apparatus


A display device is manufactured by forming a semiconductor film over a substrate and irradiating the film with laser light. The laser light is generated from an oscillator, passes through an attenuator that includes a filter, and passes through an optical system after passing through the attenuator.
Semiconductor Energy Laboratory Co., Ltd.
02/26/15
20150056822
new patent

Compositions and methods using same for flowable oxide deposition


Described herein are compositions or formulations for forming a film in a semiconductor deposition process, such as without limitation, a flowable chemical vapor deposition of silicon oxide. Also described herein is a method to improve the surface wetting by incorporating an acetylenic alcohol or diol surfactant such as without limitation 3,5-dimethyl-1-hexyn-3-ol, 2,4,7,9-tetramethyl-5-decyn-4,7-diol, 4-ethyl-1-octyn-3-ol, and 2,5-dimethylhexan-2,5-diol, and other related compounds..
Air Products And Chemicals, Inc.
02/26/15
20150056819
new patent

Variable frequency microwave (vfm) processes and applications in semiconductor thin film fabrications


Methods and apparatus for processing a substrate are described herein. A vacuum multi-chamber deposition tool can include a degas chamber with both a heating mechanism and a variable frequency microwave source.
Applied Materials, Inc.
02/26/15
20150056817
new patent

Semiconductor device manufacturing method


A direction change of space formed in an etching target layer can be suppressed while maintaining an etching selectivity for the etching target layer against a mask. A semiconductor device manufacturing method mt includes exciting a first gas by supplying the first gas containing a fluorocarbon gas, a fluorohydrocarbon gas and an oxygen gas into a processing chamber 12 (st2); and exciting a second gas by supplying the second gas containing an oxygen gas and a rare gas into the processing chamber (st3), and a cycle including the exciting of the first gas (st2) and the exciting of the second gas (st3) is repeated multiple times..
Tokyo Electron Limited
02/26/15
20150056816
new patent

Semiconductor device manufacturing method and computer-readable storage medium


A semiconductor device manufacturing method for etching a substrate having a multilayer film formed by alternately stacking a first film and a second film, and a photoresist layer to form a step-shaped structure is provided. The step-shaped structure is formed by repeatedly performing a first step of plasma-etching the first film by using the photoresist layer as a mask, a second step of exposing the photoresist layer formed on the substrate to a plasma generated from a processing gas containing argon gas and hydrogen gas by applying a high frequency power to a lower electrode while applying a negative dc voltage to an upper electrode, a third step of trimming the photoresist layer, and a fourth step of plasma-etching the second film..
Tokyo Electron Limited
02/26/15
20150056813
new patent

Self-assembled monolayer for pattern formation


The present disclosure relates to a method of forming a pattern on a semiconductor substrate. One or more layers are formed over the semiconductor substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.
02/26/15
20150056812
new patent

Method of semiconductor integrated circuit fabrication


A method of fabricating a semiconductor integrated circuit (ic) is disclosed. The method includes providing a substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.
02/26/15
20150056810
new patent

Method for semiconductor cross pitch doubled patterning process


The present invention provides a method of cross double pitch patterning for forming a contact printing mask. First, a first, a second and a third layer a successively deposited; a photoresist is deposited on the third layer, and then trimmed into a first pre-pattern, on which an oxide layer is deposited.
Nanya Technology Corp.
02/26/15
20150056807
new patent

Semiconductor device and manufacturing method thereof


According to one embodiment, a semiconductor device includes a semiconductor substrate including semiconductor elements formed thereon, a graphene wiring structure stuck on the substrate with a connection insulating film disposed therebetween and including graphene wires, and through vias each formed through the graphene wiring structure and connection insulating film to connect part of the semiconductor elements to the graphene wires.. .
Kabushiki Kaisha Toshiba
02/26/15
20150056805
new patent

Methods of forming semiconductor device using bowing control layer


A bowing control pattern is formed on an intermediate layer. A hardmask pattern is formed on the bowing control layer.
02/26/15
20150056804
new patent

Bottom-up plating of through-substrate vias


According to one embodiment of the present invention, a method of plating a tsv hole in a substrate is provided. The tsv hole may include an open end terminating at a conductive pad, a stack of wiring levels, and a plurality of chip interconnects.
International Business Machines Corporation
02/26/15
20150056801
new patent

Semiconductor device with air gap


A method of fabricating a semiconductor device may include forming isolation structures that include openings, over a substrate; forming sacrificial spacers on sidewalks of the openings; forming, on the sacrificial spacers, first conductive patterns that are recessed in the openings; removing the sacrificial spacers, and defining air gaps; forming a liner layer that caps the first conductive patterns and the air gaps; forming second conductive patterns through silicidation of the liner layer; and forming third conductive patterns over the second conductive patterns.. .
Sk Hynix Inc.
02/26/15
20150056800
new patent

Self-aligned interconnects formed using substractive techniques


A method of forming an interconnect structure for semiconductor or mems structures at a 10 nm node (16 nm hpcd) down to 5 nm node (7 nm hpcd), or lower, where the conductive contacts of the interconnect structure are fabricated using solely subtractive techniques applied to conformal layers of conductive materials.. .
02/26/15
20150056797
new patent

Semiconductor device and manufacturing the same


A semiconductor device includes a channel region extending in a vertical direction perpendicular to a substrate and having a nitrogen concentration distribution, a plurality of gate electrodes arranged on a side wall of the channel region and separated from each other in a vertical direction, and a gate dielectric layer disposed between the channel region and the gate electrodes. The nitrogen concentration distribution has a first concentration near an interface between the channel region and the gate dielectric layer..
Samsung Electronics Co., Ltd.
02/26/15
20150056796
new patent

Method for forming a semiconductor device having a metal gate recess


Provided are approaches of forming a semiconductor device (e.g., transistor such as a finfet or planar device) having a gate metal recess. In one approach, a liner layer and a metal layer (e.g., w) are applied in a trench (e.g., via cvd and/or ald).
Globalfoundries Inc.
02/26/15
20150056795
new patent

Method of manufacturing semiconductor device


A method of manufacturing a semiconductor devices includes providing a semiconductor substrate that includes a channel region. The method includes forming a gate electrode material film including a stepped portion on the channel region.
Samsung Electronics Co., Ltd
02/26/15
20150056794
new patent

Method for forming a semiconductor device with an integrated poly-diode


A method for forming a field effect power semiconductor device includes providing a semiconductor body comprising a main horizontal surface and a conductive region arranged next to the main horizontal surface, forming an insulating layer on the main horizontal surface, and etching a narrow trench through the insulating layer so that a portion of the conductive region is exposed, the narrow trench comprising, in a given vertical cross-section, a maximum horizontal extension. The method further includes forming a vertical poly-diode structure comprising a horizontally extending pn-junction.
Infineon Technologies Austria Ag
02/26/15
20150056792
new patent

Finfet and fabrication


An improved finfet and method of fabrication is disclosed. Embodiments of the present invention take advantage of the different epitaxial growth rates of {110} and {100} silicon.
Intemational Business Machines Corporation
02/26/15
20150056791
new patent

Depression filling method and processing apparatus


A depression filling method for filling a depression of a workpiece including a semiconductor substrate and an insulating film formed on the semiconductor substrate is provided. The depression penetrating the insulating film is configured so as to extend to the semiconductor substrate.
Tokyo Electron Limited
02/26/15
20150056790
new patent

Chemical vapor deposition with elevated temperature gas injection


A chemical vapor deposition reactor and method. Reactive gases, such as gases including a group iii metal source and a group v metal source, are introduced into the chamber (10) of a rotating-disc reactor and directed downwardly onto a wafer carrier (32) and substrates (40) which are maintained at an elevated substrate temperature, typically above about 400° c.
Veeco Instruments Inc.
02/26/15
20150056789
new patent

Method for creating semiconductor junctions with reduced contact resistance


Embodiments of the invention relate generally to creating semiconductor junctions with reduced contact resistance. In one embodiment, the invention provides a method of forming a composition of material, the method comprising: providing at least two populations of semiconducting materials; layering the at least two populations of semiconducting materials to form at least two layers; and consolidating the at least two populations of semiconducting materials, wherein the consolidating creates an electrical connection between the at least two layers..
Evident Technologies
02/26/15
20150056788
new patent

Semiconductor device with a passivation layer


A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact electrode. The passivation layer includes a layer stack with an amorphous semi-insulating layer on the first surface, a first nitride layer on the amorphous semi-insulating layer, and a second nitride layer on the first nitride layer..
Infineon Technologies Ag
02/26/15
20150056787
new patent

Device for depositing a layer on a semiconductor wafer by means of vapour deposition


Uniformity of vapor deposited coatings on semiconductor wafers is improved by employing an apparatus having a gas distributor head below a susceptor onto which the wafer is placed, the gas distributor head directing a fan of cooling gas at the rear side of the susceptor. The ratio of the diameter of the cooled section of the susceptor to the diameter d of the wafer is preferably from 0.1 to 0.4..
Siltronic Ag
02/26/15
20150056786
new patent

Fabrication silicon carbide semiconductor apparatus and silicon carbide semiconductor apparatus fabricated thereby


Process (a) of preparing a silicon carbide substrate of a first conductivity type; process (b) of forming an epitaxial layer of the first conductivity type on one principal surface of the silicon carbide substrate; process (c) of forming on another principal surface of the silicon carbide substrate, a first metal layer; process (d) of heat treating the silicon carbide substrate after the process (c) to form an ohmic junction between the first metal layer and the other principal surface of the silicon carbide substrate, and a layer of a substance (10) highly cohesive with another metal on the first metal layer; and a process (e) of removing impurities and cleaning a surface of the first metal layer (8) on the other principal surface of the silicon carbide substrate (d), are performed. The heat treatment at process (d) is executed at a temperature of 1,100 degrees c.
Fuji Electric Co., Ltd.
02/26/15
20150056785
new patent

Substrate dividing method


A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness..
Hamamatsu Photonics K.k.
02/26/15
20150056784
new patent

Method for manufacturing a semiconductor device by thermal treatment with hydrogen


A semiconductor device is manufactured by forming semiconductor elements extending between a front surface and a rear side of a semiconductor layer. This includes forming a porous area at a surface of a semiconductor body that includes a porous structure in the porous area, forming the semiconductor layer on the porous area by epitaxial growth so as to have a thickness in a range of 5 μm to 200 μm, and forming semiconductor regions including source, drain, body, emitter, base and/or collector regions in a front surface of the semiconductor layer by ion implantation.
Infineon Technologies Austria Ag
02/26/15
20150056782
new patent

Method of manufacturing a super junction semiconductor device with overcompensation zones


According to an embodiment, a super junction semiconductor device may be manufactured by introducing impurities of a first impurity type into an exposed surface of a first semiconductor layer of the first impurity type, thus forming an implant layer. A second semiconductor layer of the first impurity type may be provided on the exposed surface and trenches may be etched through the second semiconductor layer into the first semiconductor layer.
Infineon Technologies Austria Ag
02/26/15
20150056781
new patent

Gate length independent silicon-on-nothing (son) scheme for bulk finfets


Methods for fabricating integrated circuits and finfet transistors on bulk substrates with active channel regions isolated from the substrate with an insulator are provided. In accordance with an exemplary embodiment, a method for fabricating an integrated circuit includes forming fin structures overlying a semiconductor substrate, wherein each fin structure includes a channel material and extends in a longitudinal direction from a first end to a second end.
Globalfoundries, Inc.
02/26/15
20150056779
new patent

Semiconductor device and manufacturing the same


A semiconductor device includes a semiconductor substrate divided into a cell region and a peripheral circuit region defined in a first direction, wherein the peripheral circuit region is divided into a first region and a second region defined in a second direction substantially orthogonal to the first direction; gate lines formed over the semiconductor substrate in the cell region and arranged in the second direction; and a capacitor including lower electrodes over the semiconductor substrate, a dielectric layer and an upper electrode, wherein the lower electrodes in the first and second regions, separated from each other in the first direction and coupled to each other in the first region, the dielectric layer is formed along surfaces of the lower electrodes in the second region, and the upper electrode is formed over the dielectric layer.. .
Sk Hynix Inc.
02/26/15
20150056778
new patent

Semiconductor device and manufacturing method therefor


A semiconductor device includes: a multilayer wiring layer located over a substrate and in which multiple wiring layers configured by a wiring and an insulating layer are stacked; a memory circuit which is formed in a memory circuit region in the substrate and has a capacitance element embedded in a concave part located in the multilayer wiring layer; a logic circuit which is formed in a logic circuit region in the substrate; an upper part coupling wiring which is stacked over the capacitance element configured by a lower part electrode, a capacitor insulating film and an upper part electrode; and a cap layer which is formed on the upper surface of the wiring configuring the logic circuit. The upper surface of the upper part coupling wiring and the upper surface of the cap film are provided on the same plane..
Renesas Electronics Corporation
02/26/15
20150056777
new patent

Device isolation with improved thermal conductivity


A method of making a semiconductor structure includes forming a trench through a shallow trench isolation (sti) structure and into a substrate, and forming a liner including an electrical insulator material on sidewalls of the trench. The method also includes forming a core including a high thermal conductivity material in the trench and on the liner, and forming a cap in the trench and on the core..
International Business Machines Corporation
02/26/15
20150056776
new patent

Method of manufacturing mos-type semiconductor device


A method of manufacturing a mos-type semiconductor device capable of increasing the thickness of a gate oxide film and obtaining high gate withstanding power and reduced switching loss without increasing a gate threshold voltage vth is provided. A p-type well region is selectively formed on one principle surface of a semiconductor substrate having an n-type low impurity concentration layer by using an oxide film as a mask.
Fuji Electric Co., Ltd.
02/26/15
20150056775
new patent

Non-volatile memory structure and manufacturing method thereof


A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first sio layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first sio layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second sio layer covering sidewalls of the cavity and a third sio layer covering a surface of the substrate, forming a first sin layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first sin layer to form a sin structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.. .
United Microelectronic Corp.
02/26/15
20150056773
new patent

Semiconductor device manufacturing method


A semiconductor device manufacturing method includes exciting a processing gas containing a hbr gas and a cl2 gas within a processing chamber that accommodates a target object including a substrate, regions made of silicon, which are protruded from the substrate and arranged to form a gap, a metal layer formed to cover the regions, a polycrystalline silicon layer formed on the metal layer, and an organic mask formed on the polycrystalline silicon layer. The cl2 gas is supplied at a flow rate of about 5% or more to about 10% or less with respect to a flow rate of the hbr gas in the processing gas..
Tokyo Electron Limited
02/26/15
20150056772
new patent

Semiconductor device comprising buried gate and fabricating the same


The present invention provides a semiconductor device including a buried gate and a method for fabricating the same, in which the width of a contact plug may not exceed a predetermined width. The method including forming a plurality of trenches over a substrate using the mask pattern, forming a gate insulating film in each of the plurality of trenches, forming a plurality of gate electrodes filling portions of the plurality of trenches, removing an exposed gate insulating film formed over each of the plurality of gate electrodes in each of the plurality of the trenches, forming a plurality of sealing films filling remaining portions of the plurality of trenches, and forming a plurality of contact plugs over the substrate between the trenches..
Sk Hynix Inc.
02/26/15
20150056771
new patent

Method for fabricating semiconductor device with super junction structure


A semiconductor device with a super-junction structure is provided, including: a semiconductor substrate having a first conductivity type; an epitaxial layer having the first conductivity type formed over the semiconductor substrate; a first doping region having the first conductive type formed in a portion of the epitaxial layer; a second doping region having a second conductivity type formed in a portion of the of the epitaxial layer; a third doping region having the second conductivity type formed in a portion of the of the epitaxial layer, wherein the doping region partially comprises doped polysilicon materials having the second conductivity type; a gate dielectric layer formed over the epitaxial layer, partially overlying the well region; and a gate electrode formed over a portion of the gate dielectric layer.. .
Vanguard International Semiconductor Corporation
02/26/15
20150056770
new patent

Vertical power mosfet and methods of forming the same


A device includes a semiconductor layer of a first conductivity type, and a first and a second body region over the semiconductor layer, wherein the first and the second body regions are of a second conductivity type opposite the first conductivity type. A doped semiconductor region of the first conductivity type is disposed between and contacting the first and the second body regions.
Taiwan Semiconductor Manufacturing Company, Ltd.
02/26/15
20150056769
new patent

Semiconductor device and manufacturing the same


A semiconductor device includes a substrate, and a gate line, located over the substrate, which includes a first conductive layer and one or more second conductive pattern layers located in the first conductive layer. The second conductive pattern layer comprises a metal layer to thus reduce resistance of a gate line..
Sk Hynix Inc.
02/26/15
20150056768
new patent

Method for fabricating semiconductor device


A method of fabricating a semiconductor device is disclosed. The method includes the steps of: sequentially forming agate dielectric layer and a first gate layer on a semiconductor substrate, wherein the gate dielectric layer is between the first gate layer and the semiconductor substrate; forming at least an opening in the first gate layer; forming a first dielectric layer conformally on the semiconductor substrate wherein the first dielectric layer covers the first gate layer; and forming a second gate layer filling the opening and overlapping the first gate layer..
United Microelectronics Corp.
02/26/15
20150056765
new patent

Semiconductor device and manufacturing the same


A semiconductor device which provides compactness and enhanced drain withstand voltage. The semiconductor device includes: a gate electrode; a source electrode spaced from the gate electrode; a drain electrode located opposite to the source electrode with respect to the gate electrode in a plan view and spaced from the gate electrode; at least one field plate electrode located between the gate and drain electrodes in a plan view, provided over the semiconductor substrate through an insulating film and spaced from the gate electrode, source electrode and drain electrode; and at least one field plate contact provided in the insulating film, coupling the field plate electrode to the semiconductor substrate.
Renesas Electronics Corporation
02/26/15
20150056763
new patent

Selective deposition of diamond in thermal vias


A method for fabricating a semiconductor device, such as a gan high electron mobility transistor (hemt) device, including etching a thermal via into a back-side of a semiconductor substrate and depositing a diamond nucleation seed layer across the back-side of the substrate. The method further includes coating the diamond nucleation with a mask layer and removing mask material outside of the thermal via on the planar portions of the back-side of the substrate.
02/26/15
20150056762
new patent

Semiconductor device manufacturing method


The present invention makes it possible to lower the on resistance of a semiconductor element without hindering the function of a diffusion prevention film in a semiconductor device having the semiconductor element that uses a wire in a wiring layer as a gate electrode and has a gate insulation film in an identical layer to the diffusion prevention film. A first wire and a gate electrode are embedded into the surface layer of an insulation layer comprising a first wiring layer.
Renesas Electronics Corporation
02/26/15
20150056760
new patent

Semiconductor device having diffusion barrier to reduce back channel leakage


A semiconductor-on-insulator (soi) substrate comprises a bulk semiconductor substrate, a buried insulator layer formed on the bulk substrate and an active semiconductor layer formed on the buried insulator layer. Impurities are implanted near the interface of the buried insulator layer and the active semiconductor layer.
International Business Machines Corporation
02/26/15
20150056759
new patent

Pixel, a storage capacitor, and a forming the same


A pixel, a storage capacitor, and a method for forming the same. The storage capacitor formed on a substrate comprises a semiconductor layer, a first dielectric layer, a first conductive layer, a second dielectric layer and a second conductive layer.
Au Optronics Corporation
02/26/15
20150056755
new patent

Electronic device packages having bumps and methods of manufacturing the same


An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.. .
Sk Hynix Inc.
02/26/15
20150056753
new patent

Semiconductor die having fine pitch electrical interconnects


A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to “bleed” laterally is mitigated and contact or overlap of adjacent traces is avoided.
Invensas Corporation
02/26/15
20150056752
new patent

Substrateless power device packages


A substrate-less composite power semiconductor device may be fabricated from a vertical conductive power semiconductor device wafer that includes a top metal layer located on a top surface of the wafer by a) forming solder bumps on top of the top metal layer; b) forming wafer level molding around the solder bumps such that the solder bumps are exposed through a top of the wafer level molding; c) grinding a back side of the device wafer to reduce a total thickness of a semiconductor material portion of the device wafer to a final thickness; and d) forming a back metal on a back surface of the wafer.. .
Alpha And Omega Semiconductor Incorporated
02/26/15
20150056751
new patent

Die edge sealing structures and related fabrication methods


Die structures for electronic devices and related fabrication methods are provided. An exemplary die structure includes a diced portion of a semiconductor substrate that includes a device region having one or more semiconductor devices fabricated thereon and an edge sealing structure within the semiconductor substrate that circumscribes the device region.
02/26/15
20150056750
new patent

Manufacturing semiconductor device


A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating.
Semiconductor Energy Laboratory Co., Ltd.
02/26/15
20150056747
new patent

Method of fabricating a thin-film device


A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers.
Nlt Technologies Ltd
02/26/15
20150056746
new patent

Diketopyrrolopyrrole polymers for use in organic field effect transistors


The present invention relates to polymers comprising a repeating unit of the formula i, or iii and their use as organic semiconductor in organic devices, especially an organic field effect transistor (ofet), or a device containing a diode and/or an organic field effect transistor. The polymers according to the invention have excellent solubility in organic solvents and excellent film-forming properties.
Basf Se
02/26/15
20150056744
new patent

Thin film structures and devices with integrated light and heat blocking layers for laser patterning


Selective removal of specified layers of thin film structures and devices, such as solar cells, electrochromics, and thin film batteries, by laser direct patterning is achieved by including heat and light blocking layers in the device/structure stack immediately adjacent to the specified layers which are to be removed by laser ablation. The light blocking layer is a layer of metal that absorbs or reflects a portion of the laser energy penetrating through the dielectric/semiconductor layers and the heat blocking layer is a conductive layer with thermal diffusivity low enough to reduce heat flow into underlying metal layer(s), such that the temperature of the underlying metal layer(s) does not reach the melting temperature, tm, or in some embodiments does not reach (tm)/3, of the underlying metal layer(s) during laser direct patterning..
Applied Materials, Inc.
02/26/15
20150056743
new patent

Manufacturing solar cell


A manufacturing method of a solar cell includes a protection-film forming step of forming a protection film on one surface side of a semiconductor substrate, a first processing step of forming a plurality of first openings having a shape close to a desired opening shape and a size smaller than a target opening size in the protection film by a method having relatively high processing efficiency, a second processing step of forming second openings in the protection film by expanding the first openings up to the target opening size by a method having relatively high processing accuracy, and an etching step of forming an asperity structure having the a concave portion in an inverted pyramid shape on the one surface side of the semiconductor substrate by performing anisotropic wet etching on the semiconductor substrate in a region under the second openings via the second openings.. .
Mitsubishi Electric Corporation
02/26/15
20150056742
new patent

Annealing for damage free laser processing for high efficiency solar cells


Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers..
Solexel, Inc.
02/26/15
20150056741
new patent

Method of manufacturing semiconductor apparatus


A method of manufacturing a semiconductor apparatus comprising forming an electrode on a structure provided on a substrate, the structure including a wiring pattern and an interlayer insulation film, forming a first film covering the electrode and the structure, forming an opening in a portion of the first film inside an outer edge of a convex portion formed by steps between upper faces of the electrode and the structure so as to expose a first portion as a portion of the upper face of the electrode, forming a second film covering the first film and the first portion, forming a protective film covering the first portion, the convex portion, and a periphery of the convex portion by patterning the second film, and forming a third film on the first film and the protective film by spin coating.. .
Canon Kabushiki Kaisha
02/26/15
20150056739
new patent

Image sensor trench isolation with conformal doping


Provided is a semiconductor image sensor device. The image sensor device includes a substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.
02/26/15
20150056731
new patent

Light emitting regions for use with light emitting devices


A light emitting device comprises a first layer having an n-type group iii-v semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more v-pits at a density between about 1 v-pit/μm2 and 30 v-pits/μm2.
Kabushiki Kaisha Toshiba
02/26/15
20150056730
new patent

Semiconductor device and manufacturing the same


According to an example of the invention, a method for manufacturing a semiconductor device, the method comprising: forming a light emitting semiconductor device layer that emits light by current injection; and forming at least one metal layer with etch barrier plated thereon on the semiconductor device layer, wherein the at least one metal layer provides mechanical support to the semiconductor device, wherein the etch barrier is plated on the at least one metal layer in a direction that the etch barrier can prevent side wall under-cut when the street lines are separated by wet chemical etching.. .
02/26/15
20150056729
new patent

Method for manufacturing semiconductor light emitting apparatus and semiconductor light emitting apparatus


A method for manufacturing a semiconductor light emitting apparatus having first semiconductor layer and second semiconductor layer sandwiching a light emitting layer, first and second electrodes provided on respective major surfaces of the first semiconductor and second semiconductor layers to connect thereto, stacked dielectric films having different refractive indexes provided on portions of the major surfaces not covered by the first and second electrodes, and a protruding portion erected on at least a portion of a rim of at least one of the first and second electrodes. The mounting member includes a connection member connected to at least one of the first and second electrodes.
Kabushiki Kaisha Toshiba
02/26/15
20150056727
new patent

Method of inspecting semiconductor device, fabricating semiconductor device, and inspection tool


A method of inspecting a semiconductor device includes attaching an inspection tool on a back surface of a semiconductor substrate including the semiconductor device, the inspection tool including a sheet and a holding frame, the sheet being larger than the semiconductor substrate and being provided with an opening in a center portion of the sheet, the opening being smaller than the semiconductor substrate, the holding frame holding an outer periphery of the sheet, and a supporting substrate being attached on a front surface of the semiconductor substrate, removing the supporting substrate attached on the front surface of the semiconductor substrate, and measuring electrical characteristics of the semiconductor device.. .
Kabushiki Kaisha Toshiba
02/26/15
20150056670
new patent

Microorganism producing 4-hydroxybutyrate and a producing 4-hydroxybutyrate in anaerobic condition using the same


A genetically modified microorganism comprising a polynucleotide encoding α-ketoglutarate synthase or a mutant thereof, and a polynucleotide encoding pyruvate carboxylase or a mutant thereof; wherein the genetically modified microorganism has decreased malate quinone oxidoreductase activity and/or decreased phosphoenolpyruvate carboxykinase activity compared to an unmodified microorganism of the same type, and wherein the genetically modified microorganism produces 4-hydroxybutyrate.. .
Samsung Electronics Co., Ltd.
02/26/15
20150056655
new patent

Expression constructs and methods for expressing polypeptides in eukaryotic cells


The invention relates to an expression construct for the expression of polypeptides in host cells using alternative splicing. The expression construct can be used for the expression of polypeptides such as antibodies, antibody fragments and bispecific antibodies by expressing the gene products required for protein expression at the ratio leading to the highest titres or the best product quality profile..
Glenmark Pharmaceuticals S.a.
02/26/15
20150056653
new patent

Protein production method


Provided herein are methods of producing a heterologous polypeptide and compositions comprising same.. .
Georgia State University Research Foundation, Inc.
02/26/15
20150056599
new patent

Write erasable component system


A series of devices that allow for embedding of an image as a background while also affording the user the ability to write and print on the surface, with erasable capabilities, thus providing a multifunctional product for use in numerous industries. The devices are manufactured from predominately corrugated plastic.
02/26/15
20150056596
new patent

Automated course deconstruction into learning units in digital education platforms


An educational course is automatically deconstructed into discrete learning units. Content related to the course that has been stored by an integrated education platform is analyzed, and distinct concepts are extracted from the content.
Chegg, Inc.
02/26/15
20150056594
new patent

Systems and methods for measuring educational inputs


A computer-implemented method for measuring educational inputs is described. A plurality of educational inputs are obtained.
02/26/15
20150056575
new patent

Dental device, and linking physical and digital data for diagnostic, treatment planning, patient education, communication, manufacturing, and data transfer purposes


A dental device and/or process include at least one scaled and shaped linking component (26) to be supported by a dental model (28) or an imaging template (40). The process includes scaling, aligning, and orienting data (50, 56) from different data acquisition sources (44, 48, 54) with the scaled and shaped linking component (26), and combining the data (50, 56) from different data acquisition sources into a master data file (52).
02/26/15
20150056541
new patent

Blank masks for extreme ultra violet lithography, methods of fabricating the same, and methods of correcting registration errors thereof


A blank mask includes a substrate having a first surface and a second surface which are opposite to each other. The substrate includes a trench having a predetermined depth from the second surface.
Sk Hynix Inc.
02/26/15
20150056380
new patent

Ion source of an ion implanter


An ion source uses at least one induction coil to generate ac magnetic field to couple rf/vhf power into a plasma within a vessel, where the excitation coil may be a single set of turns each turn having lobes or multiple separate sets of windings. The excitation coil is positioned outside and proximate that side of the vessel that is opposite to the extraction slit, and elongated parallel to the length dimension of the extraction slit.
Advanced Ion Beam Technology , Inc.
02/26/15
20150056337
new patent

System and producing bread products


An improved system and method for the production of a bread product is disclosed. The method may comprise the steps of (a) mixing a first set of ingredients into a first dough component; (b) forming the first dough component into a dough base in a fixture in a molding operation; (c) forming a distinct cavity in the base with a cavity-forming operation; (d) finishing the bread product.
Elwha Llc
02/26/15
20150056335
new patent

System and producing bread products


An improved system and method to produce a bread product is disclosed. Bread products that produced with the system and method are also disclosed.
Elwha Llc
02/26/15
20150056232
new patent

Recombinant bacterium for induction of cellular immune response


The present invention provides a recombinant bacterium and methods of using the recombinant bacterium to induce a cellular immune response.. .
The Arizona Board Of Regents For And On Behalf Of Arizona State University
02/26/15
20150056184
new patent

Protein belonging to the tnf superfamily involved in signal transduction, nucleic acids encoding same and methods of use thereof


A method of modulating immune response in an animal is disclosed. Such a method interacting the immature dendritic cells from the animal with an antigen ex vivo so that the immature dendritic cells present the antigen on their surfaces, inducing maturation of the immature dendritic cells ex vivo, and contacting the mature dendritic cells ex vivo with a modulator comprising trance, conservative variants thereof, fragments thereof, analogs or derivatives thereof, or a fusion protein comprising the amino acid sequence of trance, conservative variants thereof, or fragments thereof.
The Rockefeller University
02/26/15
20150056130
new patent

Continuous production hydrogen


The present invention provides a continuous production method of hydrogen which is able to produce hydrogen, which is clean energy, simply and continuously without using ammonia. The invention of the continuous production method of hydrogen includes a hydrogen production step comprising introducing mayenite (ca12al14o33) and calcium hydroxide [ca(oh)2] into water and allowing them to react with water, thereby generating hydrogen and also forming katoite [ca3al2(oh)12]; a regeneration step comprising baking the formed katoite to regenerate mayenite and calcium hydroxide; and a circulation step comprising returning the regenerated mayenite and calcium hydroxide into the hydrogen production step.
Hitachi Zosen Corporation
02/26/15
20150056118
new patent

Flue gas stream bypass during selective catalytic reduction in a power plant


A system includes a selective catalytic reactor and a bypass line. The selective catalytic reactor is located downstream of a furnace that generates flue gases.
Alstom Technology Ltd


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