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Digital Logic patents



      
           
This page is updated frequently with new Digital Logic-related patent applications. Subscribe to the Digital Logic RSS feed to automatically get the update: related Digital RSS feeds. RSS updates for this page: Digital Logic RSS RSS


Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform

Wideband sonar with pulse compression

Date/App# patent app List of recent Digital Logic-related patents
08/28/14
20140240022
 Charge measurement patent thumbnailCharge measurement
An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output.
08/21/14
20140236490
 Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform patent thumbnailBioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit connected with an electronic data source for receiving reads of genomic data.
08/21/14
20140233355
 Wideband sonar with pulse compression patent thumbnailWideband sonar with pulse compression
A sonar transmitter includes digital logic that controls switches coupled to a primary coil of a transformer. The switches are driven to produce at least one voltage pulse across a secondary coil for the transformer to produce a series of voltage pulses approximating the desired signal.
07/31/14
20140211210
 Fiber optic gyroscope mixed signal application specific integrated circuit patent thumbnailFiber optic gyroscope mixed signal application specific integrated circuit
A system comprising a fiber optic gyroscope and a mixed signal application specific integrated circuit (asic) connected to the gyroscope is provided. The mixed signal asic comprises a digital logic unit, a relative intensity noise (rin) analog-to-digital converter (adc) coupled to the digital logic unit and configurable to receive a signal from a rin detector, and a rate adc coupled to the digital logic unit and configurable to receive a signal from a rate detector.
07/17/14
20140200166
 Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform patent thumbnailBioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit connected with an electronic data source for receiving reads of genomic data.
07/17/14
20140198597
 Dynamic random access memory for communications systems patent thumbnailDynamic random access memory for communications systems
An integrated circuit may comprise a digital logic circuit, a memory refresh circuit, a first one or more dynamic random access memory (dram) cells, and a second one or more dram cells. The first dram cell(s) may be refreshed by the memory refresh circuit whereas the second dram cell(s) is not refreshed by any memory refresh circuit.
07/17/14
20140197895
 Variability and aging sensor for integrated circuits patent thumbnailVariability and aging sensor for integrated circuits
A ring-oscillator-based on-chip sensor (ocs) includes a substrate having a semiconductor surface upon which the ocs is formed. The ocs includes an odd number of digital logic stages formed in and on the semiconductor surface including a first stage and a last stage each including at least one nor gate including a first gate stack and/or a nand gate including a second gate stack.
07/10/14
20140194037
 Spring ball toy patent thumbnailSpring ball toy
A spring ball toy includes spherical core and a plurality of spring arms radiating from the spherical core. The distal end of each spring arm is fitted with one of a selection of different types of spring feet.
06/26/14
20140181605
 Asynchronous programmable jtag-based interface to debug any system-on-chip states, power modes, resets, clocks, and complex digital logic patent thumbnailAsynchronous programmable jtag-based interface to debug any system-on-chip states, power modes, resets, clocks, and complex digital logic
An asynchronous debug interface is disclosed that allows tag agents, jtag-based debuggers, firmware, and software to debug, access, and override any functional registers, interrupt registers, power/clock gating enables, etc., of core logic being tested. The asynchronous debug interface works at a wide range of clock frequencies and allows read and write transactions to take place on a side channel, as well as within the on chip processor fabric without switching into a debug or test mode.
06/19/14
20140169801
 Semiconductor package with optical port patent thumbnailSemiconductor package with optical port
Described herein are technologies related to a semiconductor package that is installed in a portable device for data communications. More particularly, the semiconductor package that contains a memory, a digital logic chip, and an optical port in a single module or mold is described..
06/19/14
20140167837
Charge distribution control for secure systems
Advantageous analog and/or digital logic cells and methods of powering circuit blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply.
06/19/14
20140167830
Delay time adjusting circuit, method, and integrated circuit
A delay time adjusting circuit is described, in which a reference signal circuit generates at least one reference signal to an a/d conversion circuit, an input signal circuit generates an input signal to the a/d conversion circuit, the a/d conversion circuit compares the input signal with the at least one reference signal to output a digital signal to a digital logic chip, and the digital logic chip determines a delay time based on the digital signal. In this way, the delay time can be determined digitally, and an adjusting accuracy of the delay time can be increased; and also, the delay time can be adjusted through changing the level of the input signal, thus reducing circuit losses and costs.
05/22/14
20140143745
Techniques for segmenting of hardware trace and verification of individual trace segments
A logic verification program, method and system that segments simulation results and then processes the resulting segments separately, and optionally in parallel, reduces memory and other system requirements and improves efficiency of verification of digital logic designs. The verification process fixes up event dependency check for past-directed checkers by including additional information with each segment after an initial segment that describes at least a portion of a state of the logic design, so that resultant events in the current segment that are caused by events in the previous segment(s) can be traced back to those events.
05/22/14
20140140445
Apparatus and method for demodulation of fsk signals
An apparatus and method for demodulation of fsk signals are provided. Digital pulses of the fsk signals can be processed to detect digital data contained in the fsk frequencies by converting the fsk frequencies from a frequency signal to a digital logic signal and vice versa..
05/15/14
20140132337
Clocked charge domain logic
Advantageous digital logic cells and methods of powering logic blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply.
05/08/14
20140125399
Charge measurement
An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output.
05/08/14
20140125307
Synchronized self-referenced high voltage alternating current power saving regenerator switch system
A method and apparatus for self-referenced alternating current (ac) voltage chopping using non-linear dual switches configured in series with the load to regulate voltage according to a positive or negative instantaneous voltage value and a positive going or negative going state is disclosed. Power applied to inductive loads is conserved by automatically tracking the current demand of the load and reusing the reactive energy held by the load.
04/03/14
20140092951
Jitter tolerant receiver
An embodiment of the invention includes a receiver with reduced error terms and incoming jitter tracking that improves jitter tolerance. An embodiment provides these benefits based on a voltage integrator that recovers data and clock information from incoming signals without use of a pll, pi, cdr, and the like.
02/27/14
20140055254
Collision avoidance system for vehicles
A continuous exterior perimeter monitoring system for collision avoidance by vehicles with exterior objects is provided utilizing microelectronic digital logic circuits and techniques to produce a visual three-digit numerical display, a discrete multi-color display and a multi-level sound warning system, indicating precise and range of distances of exterior objects from vehicles which could collide therewith within pre-selected distances. The system displays many types of vehicle information but prioritizes and acts on collision avoidance data before displaying or acting on non-collision avoidance related information.
01/02/14
20140003169
Configuration of data strobes
Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data.
11/07/13
20130291672
Detecting a relative shaft position on geared shafts
A system for determining a relative position of a secondary gear includes a gear assembly including a phonic wheel fixed to a primary gear and a secondary gear rotatably engaged to the first gear, a sensor configured to output a signal upon detecting a tooth of the phonic wheel, and a digital logic circuit configured to detect a revolution of the phonic wheel, to generate a primary gear tooth pulse at intervals corresponding to intervals of teeth of the primary gear based on the detected revolution of the phonic wheel, and to generate a secondary gear revolution signal at an interval corresponding to a revolution of the secondary gear based on the primary gear tooth pulse.. .
10/24/13
20130278302
Clock signal generator
Embodiments of the present invention provide a clock signal generator, and the clock signal generator is applied to a physical layer subsystem supporting data transmission at multiple baud rates. The clock signal generator includes: a source clock signal generator, and two or more processors connected to an output end of the source clock signal generator; where the source clock signal generator outputs multiple source clock signals with the same frequency according to a reference signal of a reference clock in the subsystem; the processors perform frequency dividing processing on the multiple source clock signals through a digital logic circuit according to an oversampling technology, to obtain a synchronous clock signal corresponding to a baud rate of data transmission in the subsystem, so as to implement timing and transceiving functions when data is transmitted at the baud rate..
10/17/13
20130271201
System on chip for power inverter
According to an exemplary implementation, an integrated circuit (ic) includes a logic circuit monolithically formed on the ic. The logic circuit is configured to generate modulation signals for controlling power switches of a power inverter.
10/03/13
20130261743
System controller for variable-optic electronic ophthalmic lens
A system controller for an ophthalmic lens comprising an electronic system which actuates a variable-focus optic is disclosed herein. The system controller is part of an electronic system incorporated into the ophthalmic lens.
10/03/13
20130259269
Button-press detection and filtering
The disclosure provides a button-press detection and filtering method, related circuit, and button-press detection chip for a external device. A button-press signal from a wire control apparatus is coupled to the button-press detection chip for the external device.
08/29/13
20130221488
Semiconductor devices with graded dopant regions
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved.
08/15/13
20130211788
Method and system for providing data communication in continuous glucose monitoring and management system
Method and apparatus for providing a data stream generator that generates a data stream associated with a monitored analyte level, and a radio frequency logic portion operatively coupled to the data stream generator, the radio frequency logic portion configured to generate a radio frequency data stream based on the data stream generated from the data stream generator, the radio frequency logic portion further including one or more finite state machines and a plurality of discrete digital logic circuits, the one or more finite state machines configured to control the plurality of digital logic circuits to generate the radio frequency data stream for wireless communication are provided. Systems and kits incorporating the same are also provided..
07/25/13
20130187697
Multi-level high voltage pulser integrated circuit using low voltage mosfets
A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary mosfets is controlled by the digital control interface circuit.
07/18/13
20130181295
Analog signal compatible cmos switch as an integrated peripheral to a standard microcontroller
At least one analog signal compatible complementary metal oxide semiconductor (cmos) switch circuit is incorporated with digital logic circuits in an integrated circuit. The integrated circuit may further comprise a digital processor and memory, e.g., microcontroller, microprocessor, digital signal processor (dsp), programmable logic array (pla), application specific integrated circuit (asic), etc., for controlling operation of the at least one analog signal compatible cmos switch for switching analog signals, e.g., audio, video, serial communications, etc.
04/18/13
20130093505
On-chip voltage regulator
A digital logic controller for regulating a voltage of a soc includes a first input for receiving a reference signal having a first property that is constant over a range of operating conditions of the soc, and a second input for receiving a second signal that has a second property that is indicative of an operating condition of the soc. The second property may vary over a range of operating conditions of the soc.
03/21/13
20130069688
Digital test system and method for value based data
Embodiments of the present invention provide an inequality indication system (iis). The iis provides built in test support which enables evaluation, in an on-chip digital logic circuit, of digital values as inequalities, with either a single pass/fail bit expressed on a device i/o or a readable register containing inequality evaluation results.
03/14/13
20130064043
Compact, energy-efficient ultrasound imaging probes using cmut arrays with integrated electronics
A cmut on cmos imaging chip is disclosed. The imaging chip can use direct connection, cmos architecture to minimize both internal and external connection complexity.
01/31/13
20130028446
Orientation adjusting stereo audio output system and method for electrical devices
Arrangements described herein relate to systems and methods for adjusting the audio output from an electrical device based on the orientation of the device to provide proper stereo audio output for more than one orientation of the device. The audio output system includes at least two speakers.


Popular terms: [SEARCH]

Digital Logic topics: Digital Logic, Integrated Circuit, State Machine, Semiconductor, Power Management, Physical Layer, Synchronous, Modulation, Voltage Level Shifter, Level Shift, System On Chip, Level Shifter, Voltage Level Shift, Electronic Device, Ophthalmic

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