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Decision Feedback Equalizer
Intersymbol Interference
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Decision Feedback Equalizer patents



      
           
This page is updated frequently with new Decision Feedback Equalizer-related patent applications. Subscribe to the Decision Feedback Equalizer RSS feed to automatically get the update: related Decision RSS feeds. RSS updates for this page: Decision Feedback Equalizer RSS RSS


Offset and decision feedback equalization calibration

Date/App# patent app List of recent Decision Feedback Equalizer-related patents
08/28/14
20140241477
 Decision feedback equalizer for highly spectrally efficient communications patent thumbnailnew patent Decision feedback equalizer for highly spectrally efficient communications
One or more embodiments describe a decision feedback equalizer for highly spectrally efficient communications. A method may be performed in a decision feedback equalizer (dfe).
08/14/14
20140226707
 Offset and decision feedback equalization calibration patent thumbnailOffset and decision feedback equalization calibration
A decision feedback equalizer is calibrated to compensate for estimated inter-symbol interference in a received signal and offsets of sampling devices. The decision feedback equalizer is configured so that an output signal of a sampling circuit represents a comparison between an input signal and a reference of the sampling circuit under calibration.
06/26/14
20140177697
 Decision feedback equalizer using current mode processing with cmos compatible output level patent thumbnailDecision feedback equalizer using current mode processing with cmos compatible output level
A decision feedback equalizer system is disclosed. The decision feedback equalizer system includes a current summer core that in current mode, removes inter-symbol interference from a signal, and, a cmos latch component, that is coupled to the current summer core, that receives a current mode signal and outputs a cmos compatible signal.
05/29/14
20140146868
 Decision feedback equalizers and operating methods thereof patent thumbnailDecision feedback equalizers and operating methods thereof
A decision feedback equalizer (dfe) includes a sampler for receiving a first input signal and comparing an amplitude of the first input signal with a first predetermined voltage level and a second predetermined voltage level. The dfe includes a dfe logic circuit for receiving at least one first sign signal based on comparison results, and for selectively updating a tap coefficient based on the at least one first sign signal.
05/29/14
20140146867
 Receiver with parallel decision feedback equalizers patent thumbnailReceiver with parallel decision feedback equalizers
Described embodiments apply equalization to an input signal to a receiver such as a serial-deserializer. The receiver has an analog-to-digital converter (adc), an m-way parallelizer, n serial buffers, n prefix buffers, and n decision feedback equalizers (dfes), where m and n are greater than one.
05/15/14
20140133544
 Compensation factor reduction in an unrolled decision feedback equalizer patent thumbnailCompensation factor reduction in an unrolled decision feedback equalizer
An unrolled decision feedback equalizer (dfe) as disclosed herein has a reduced number of compensation factors while keeping a suitable performance level for a given application. The kn possible dfe correction levels are reduced or compressed into fewer levels (r), merging together the levels that are the closest together where k represents the number of possible symbols in each baud, or the number of bits encoded into each baud, and n represents the dfe depth in number of bauds.
04/17/14
20140105268
 Decision feedback equalizer utilizing symbol error rate biased adaptation function for highly spectrally efficient communications patent thumbnailDecision feedback equalizer utilizing symbol error rate biased adaptation function for highly spectrally efficient communications
One or more embodiments describe a decision feedback equalizer utilizing symbol error rate biased adaptation function for highly spectrally efficient communications. A method may be performed in a decision feedback equalizer (dfe).
04/03/14
20140092952
 Equalization effort-balancing of transmit finite impulse response and receive linear equalizer or receive decision feedback equalizer structures in high-speed serial interconnects patent thumbnailEqualization effort-balancing of transmit finite impulse response and receive linear equalizer or receive decision feedback equalizer structures in high-speed serial interconnects
Methods and apparatus for provision of equalization effort-balancing of transmit (tx) finite impulse response (fir) and receive (rx) linear equalizer (le) or rx decision feedback equalizer (dfe) structures in high-speed serial interconnects are described. In some embodiments, data corresponding to a plurality of transmit equalization values and a plurality of receive equalization values for each lane of a link having a plurality of lanes is detected.
04/03/14
20140092948
 Automated erasure slicer threshold control and modification of symbol estimates to be erased patent thumbnailAutomated erasure slicer threshold control and modification of symbol estimates to be erased
Methods and systems to vary an erasure slicer threshold based on a measure computed from prior soft and/or hard symbol decisions, identify reliable symbol estimates based on the threshold, identify unreliable symbol estimates for erasure based on the threshold, modify the identified symbol estimates, output the reliable symbol estimates and the modified symbol estimates as erasure slicer decisions, and filter the decisions in a feedback filter of a decision feedback equalizer (dfe). The erasure slicer threshold may be based on signal-to-noise ratio (snr) or mean-squared-error (mse).
03/27/14
20140086300
 Interference channel equalizer patent thumbnailInterference channel equalizer
An interference channel equalizer for receiving and processing at least two distinct rf data signals transmitted over the same frequency to a single receiving station that has at least one receiver for each distinct transmitted rf data signal. Each receiver processes an rf data signal received by its antenna and outputs an output data signal which corresponds to one of the distinct transmitted rf data signals.
03/06/14
20140062597
External programmable dfe strength
A decision feedback equalizer is disclosed. The decision feedback equalizer comprises an amplifier circuit and a latch.
02/27/14
20140056346
High-speed parallel decision feedback equalizer
A decision-feedback equalizer (dfe) can be operated at higher frequencies when parallelization and pre-computation techniques are employed. Disclosed herein is a dfe design suitable for equalizing receive signals with bit rates above 10 ghz, making it feasible to employ decision feedback equalization in silicon-based optical transceiver modules.
02/27/14
20140056345
Decision feedback equalizers with high-order continuous time feedback
Equalization techniques are provided for high-speed data communications and, more specifically, dfe (decision feedback equalizer) circuits and methods are provided which implement a high-order continuous time filter in a dfe feedback path to emulate structured elements of a channel response.. .
02/27/14
20140056344
Decision feedback equalizers with high-order continuous time feedback
Equalization techniques are provided for high-speed data communications and, more specifically, dfe (decision feedback equalizer) circuits and methods are provided which implement a high-order continuous time filter in a dfe feedback path to emulate structured elements of a channel response.. .
01/30/14
20140029662
Fast generalized decision feedback equalizer precoder implementation for multi-user multiple-input multiple-output wireless transmission systems
A technique is used to realize a generalized decision feedback equalizer (gdfe) precoder for multi-user multiple-input multiple-output (mu-mimo) systems, which significantly reduces the computational cost while resulting in no capacity loss. The technique is suitable for improving the performance of various mu-mimo wireless systems including future 4g cellular networks.
01/23/14
20140024327
Quarter-rate speculative decision feedback equalizer
According to an aspect of an embodiment of the present disclosure, a method of relaxing a timing constraint associated with reducing inter-symbol interference (isi) of input data includes adding an isi cancellation value to input data received at a first clock rate to generate first speculative data. The method further includes subtracting the isi cancellation value from the input data to generate second speculative data.
12/26/13
20130346811
Decision feedback equalizer
A circuit includes a summation circuit for receiving an input data signal and a feedback signal including a previous data bit. The summation circuit is configured to output a conditioned input data signal to a clock and data recovery circuit.
12/26/13
20130342240
Partial response decision feedback equalizer with selection circuitry having hold state
A partial response decision feedback equalizer (prdfe) includes a receiver including at least first and second comparators operative to compare an input signal representing a sequence of symbols against respective thresholds and to respectively generate first and second receiver outputs. A first selection stage is provided to select (a) between the first comparator output and a first resolved symbol according to a first timing signal, and (b) between the second comparator output and the first resolved symbol according to the first timing signal, to produce respective first and second selection outputs.
12/05/13
20130322512
Receiver with four-slice decision feedback equalizer
A decision feedback equalizer (dfe) slice for a receiver includes a plurality of non-speculative dfe taps; and 3 speculative dfe taps, wherein the 3 speculative dfe taps comprise first and second multiplexer stages, each of the first and second multiplexer stages including 4 comparator latches, each of the 4 comparator latches having a programmable offset; and a multiplexer that receives 4 comparator latch outputs from the 4 comparator latches and outputs a multiplexer stage output, wherein the multiplexer is controlled by previous symbol decisions dn-2 and dn-3; and wherein the 3 speculative taps further comprise a 2:1 decision multiplexer stage that receives the multiplexer stage outputs of the first and second multiplexer stages and is controlled by a previous symbol decision dn-1 to output a slice output signal dn.. .
11/21/13
20130308694
Decision feedback equalizer
A decision feedback equalizer that can operate at higher speed is provided. The decision feedback equalizer includes a weighting addition circuit (adder 21, coefficient units tap1a, tap2 to tapn) that sums an input signal to weighted versions of feedback signals fb1 to fbn, n being an integer not less than 2.
10/31/13
20130287089
Circuits and methods for dfe with reduced area and power consumption
A 1/n-rate decision feedback equalizer (dfe) and method include a plurality of branches. Each branch includes a summer circuit configured to add a feedback signal to a received input, and a latch configured to receive an output of the summer circuit in accordance with a clock signal.
09/19/13
20130243071
Predictive selection in a fully unrolled decision feedback equalizer
Described embodiments provide a non-uniformly quantized analog-to-digital converter (adc) for generating a value for each sample of a received signal. The adc includes arrays of decision comparators, each comparator provided the received signal.
09/19/13
20130243070
Tap adaptation with a fully unrolled decision feedback equalizer
Described embodiments adapt one or more taps of a decision feedback equalizer of a receiver by setting a reference voltage for each of one or more data recovery comparators to a corresponding predetermined initial value. The data recovery comparators generate a bit value for each sample of a received signal.
09/19/13
20130243066
Decision feedforward equalization
In described embodiments, a decision feed forward equalizer (dffe) comprises a hybrid architecture combining features of a feed forward equalizer (ffe) and a decision feedback equalizer (dfe). An exemplary dffe offers relatively improved noise and crosstalk immunity than an ffe implementation alone, and relatively lower burst error propagation than a dfe implementation alone.
09/05/13
20130230091
Extension of ethernet phy to channels with bridged tap wires
In one embodiment, receiving an ethernet signal over a channel, the ethernet signal comprising a preamble frame, an idle frame, and a data frame, the preamble frame comprising one or more preamble codes; synchronizing to the ethernet signal based on the preamble frame; replicating the one or more preamble codes; and training a decision feedback equalizer (dfe) based on the one or more replicated codes, the training enabling the dfe to use decision values at the dfe output to track channel variations.. .
09/05/13
20130229236
Optical receiver based on a decision feedback equalizer
An optical receiver, a method of operating an optical receiver, a correction based transimpedance amplifier circuit, and a method of adjusting an output of a transimpedance amplifier. In one embodiment, the optical receiver comprises an optical-to-electrical converter, a transimpedance amplifier, and a correction circuit.
06/20/13
20130156087
A decision feedback equalization scheme with minimum correction delay
A decision feedback equalizer includes a correction circuit to correct a sampled value of an incoming bit based on intersymbol interference of at least one preceding bit, and to generate a received bit. The correction circuit includes a first multiplexer and a first pair of latches coupled thereto.
06/13/13
20130148712
Conditional adaptation of linear filters in a system having nonlinearity
Described embodiments adjust configurable parameters of at least one filter of a communication system. The method includes conditioning, by an analog front end (afe) of a receiver in the communication system, an input signal applied to the receiver.
05/16/13
20130121396
Decision feedback equalizer having programmable taps
A decision feedback equalizer (dfe) with programmable taps includes a summer configured to receive a dfe input signal. Delay elements are coupled to the summer.
05/02/13
20130107935
Receiver with decision feedback equalizer
A receiver includes a front-end amplifier, a sampler, and a decision-feedback equalizer. The front-end amplifier provides for amplifying a received input signal to yield an amplified input signal.
04/25/13
20130101011
Data receiver circuit and method of adaptively controlling equalization coefficients using the same
Provided are a data receiver circuit and a method of adaptively controlling an equalization coefficient using the same. The data receiver circuit includes n sampling receivers, n decision feedback equalizer (dfe) circuits, and a data recovery circuit.
04/25/13
20130101010
Method and apparatus for joint decoding and equalization
The current application is directed to joint decoding and equalization using a decision feedback equalizer. An example method to which the current application and certain of the current claims are directed uses joint trellis decoding and decision feedback equalization to efficiently estimate non-contiguous symbols using non-contiguous equalizer outputs.
04/18/13
20130094561
Techniques for adaptively adjusting decision levels of a pam-n decision feedback equalizer
A pam-n decision feedback equalizer (dfe) comprises a coefficient computation unit; a feedback unit that mitigates, using computed feedback coefficients, effects of interference from data symbols; an error-and-decision unit for at least computing a least error value respective to one of a plurality of decision levels, wherein the least error value indicates a difference of a pseudo equalized input pam-n data symbol from an optimal position of the one of the plurality of decision levels, wherein the one of the plurality of decision levels corresponds to a modulation level used to modulate data in the input pam-n data symbol; and a calibration unit for adaptively setting the plurality of decision levels based, in part, on the least error value, thereby enabling for compensating for gain changes resulted by a cable on which the input pam-n data symbol is received and further compensating for embedded offsets of the error-and-decision unit.. .
03/28/13
20130077669
Method of compensating for nonlinearity in a dfe-based receiver
A receiver has an input and a decision feedback equalizer (dfe). The dfe couples to the receiver input and has at least one tap coefficient.
03/21/13
20130070834
Method and apparatus for single burst equalization of single carrier signals in broadband wireless access systems
A receiver implementing a single carrier single burst equalization (sc-sbe) method is capable of achieving near optimal reception of individual single carrier rf bursts by making an accurate estimate of the burst's propagation channel impulse response (cir). The sc-sbe method uses a cir based coefficient computation process to obtain filter coefficients for a minimum mean square error decision feedback equalizer (mmse-dfe).
03/14/13
20130064281
Techniques for setting feedback coefficients of a pam-n decision feedback equalizer
A decision feedback equalizer (dfe) for equalizing pam-n signals comprises a coefficient setting unit for setting a first group of most significant feedback coefficients of the dfe to a predefined value selected from a group of predefined values; a coefficients computation unit coupled to the coefficient setting unit for computing values of feedback coefficients of a second group of feedback coefficients other than the first group of most significant feedback coefficients; a feedback (fb) unit for mitigating, using a complete group of feedback coefficients, effects of interference from data symbols that are adjacent in time to an input data symbol, wherein most significant feedback coefficients of the first group are set to an optimal value computed during an initialization of the dfe and feedback coefficients of the second group are computed by the coefficients computation unit.. .
01/31/13
20130028313
Partial response decision feedback equalizer with distributed control
A multi-phase partial response equalizer is disclosed. The equalizer includes receiver circuitry to receive a data symbol over n bit intervals and to generate n sets of samples in response to n clock signals having different phases.
01/31/13
20130028312
Joint decision feedback equalizer and trellis decoder
The present invention is directed to joint decision feedback equalizer (dfe) and trellis decoder adaptable to an ethernet transceiver. A trellis coded modulation (tcm) decoder includes a one-dimensional branch metric unit (1d-bmu) configured to calculate 1d branch metrics; a four-dimensional branch metric unit (4d-bmu) configured to combine the 1d branch metrics to generate 4d branch metrics; an add-compare-select unit (acsu) configured to perform add, compare and select (acs) operations on the 4d branch metrics for each state to obtain path metrics; and a survivor memory unit (smu) configured to store and keep track of symbols.
01/31/13
20130028311
Recoverable ethernet receiver
The present invention is directed to a recoverable ethernet receiver. A joint decision feedback equalizer (dfe) and trellis decoder is configured to decode a receiving signal to result in a received symbol, and configured to generate a check-idle value which is used to indicate an idle mode.
01/31/13
20130028299
Adaptive ethernet transceiver with joint decision feedback equalizer and trellis decoder
An adaptive ethernet transceiver is disclosed. A joint decision feedback equalizer (dfe) and trellis decoder is configured to decode a receiving signal.
01/24/13
20130021074
Decision feedback equalizer operable with multiple data rates
Decision feedback equalization (dfe) circuitry and method for equalizing data signals over a wide range of data rates. By using delayed and controlled versions of the recovered data clock to retime the equalized data signal for feedback via the dfe taps, correct feedback signal timing is maintained and jitter tolerance is increased at high data rates..


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Decision Feedback Equalizer topics: Decision Feedback Equalizer, Intersymbol Interference, Intersymbol, Feedback Signal, Hybrid Architecture, Feed Forward Equalizer, Exponential, Reference Voltage, Interleave, Multiplexing, Transimpedance Amplifier, Electrical Signal, Amplifier Circuit, Data Frame, Communication System

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