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Deasserted topics
Deasserted
Enable Signal
Storage Device
Transistors
Power Controller
Leakage Current
Controlled Variable
Refresh Rate
Gating Circuit

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Deasserted patents



      
           
This page is updated frequently with new Deasserted-related patent applications. Subscribe to the Deasserted RSS feed to automatically get the update: related Deasserted RSS feeds. RSS updates for this page: Deasserted RSS RSS


Method and apparatus for adaptive timing write control in a memory

Date/App# patent app List of recent Deasserted-related patents
08/21/14
20140232955
 Display circuitry with reduced pixel parasitic capacitor coupling patent thumbnailDisplay circuitry with reduced pixel parasitic capacitor coupling
A touch screen display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (tft) layer.
08/07/14
20140219002
 Method and apparatus for adaptive timing write control in a memory patent thumbnailMethod and apparatus for adaptive timing write control in a memory
A bit line, which is coupled to a resistive element of a memory cell is set to a first voltage level. The memory cell may be an mram cell or an rram cell.
06/12/14
20140159614
 Methods and apparatus for improving backlight driver efficiency patent thumbnailMethods and apparatus for improving backlight driver efficiency
An electronic device may be provided with display circuitry that includes a display timing controller, a backlight driver, a light source, and other associated backlight structures. The backlight control circuitry may generate a control signal having an adjustable duty cycle to the backlight driver.
02/13/14
20140043919
 Apparatus and method for hidden-refresh modification patent thumbnailApparatus and method for hidden-refresh modification
A system and method for modifying a hidden-refresh rate for dynamic memory cells includes monitoring a control signal from a processor and performing a hidden-refresh of dynamic data at a first refresh rate when the control signal is asserted. The dynamic data is refreshed at a second refresh rate when the control signal is deasserted for a predetermined duration.
11/07/13
20130294459
 Forward error correction decoder patent thumbnailForward error correction decoder
A method for determining an initial alignment for a frame of input data is provided. A frame for the input data is set, and the frame is synchronized.
08/22/13
20130216198
 Method and apparatus for automatic time-shifting for a content recorder patent thumbnailMethod and apparatus for automatic time-shifting for a content recorder
A content player includes a pausable mass storage device player that can be used to record and play content. The pausable mass storage device can become paused in response to an assertion of a pause signal.
03/07/13
20130057352
 Oscillators and clock generation patent thumbnailOscillators and clock generation
Oscillator circuitry having a switching inverting amplifier arranged in a ring oscillator configuration of at least two stages. A bias generator for supplying the amplifiers of neighboring stages, is responsive to an enable signal to supply the amplifiers only when the enable signal is asserted.
02/07/13
20130033184
 Power contollers and control methods patent thumbnailPower contollers and control methods
Disclosure has power controllers and control methods used therein. A disclosed power controller is adapted for a power converter to power at least one light emitting diode.
01/10/13
20130009697
 Pipeline power gating patent thumbnailPipeline power gating
Leakage current is reduced in a plurality of gates coupled between source storage elements and destination storage elements by waking the plurality of gates to allow current flow in response to assertion of any source clock enable signals that enable clocking of the source storage elements. The gates are slept to reduce leakage current in the plurality of gates, in response to assertion of a destination clock enable signal and all of the one or more source clock enable signals being deasserted, the destination clock enable signal enabling clocking of the destination storage elements..
01/03/13
20130007080
 Multi-mode combined rotator patent thumbnailMulti-mode combined rotator
A system and method for efficiently rotating data in a processor for multiple operand sizes. A processor comprises a rotator configured to support multiple operand sizes.


Popular terms: [SEARCH]

Deasserted topics: Deasserted, Enable Signal, Storage Device, Transistors, Power Controller, Leakage Current, Controlled Variable, Refresh Rate, Gating Circuit

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This listing is a sample listing of patent applications related to Deasserted for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Deasserted with additional patents listed. Browse our RSS directory or Search for other possible listings.
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