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Compiler

Compiler-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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Selective generation of multiple versions of machine code for source code functions for execution on ...
Oracle International Corporation
April 12, 2018 - N°20180101370

Utilities for use in generation of a single executable (e. G., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively ...
Scalable floating body memory cell for memory compilers and method of using floating body memories ...
Zeno Semiconductor, Inc.
April 05, 2018 - N°20180096721

A floating body sram cell that is readily scalable for selection by a memory compiler for making memory arrays is provided. A method of selecting a floating body sram cell by a memory compiler for use in array design is provided.
Processor that includes a special store instruction used in regions of a computer program where ...
International Business Machines Corporation
March 29, 2018 - N°20180088918

Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. The processor defines a special store instruction that is different from a regular store instruction. The special store instruction is used in regions of the computer program where memory aliasing may occur. Because the hardware can detect and correct ...
Compiler Patent Pack
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Compiler Patent Applications
Download 129+ Compiler-related PDFs
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  • 129+ full patent PDF documents of Compiler-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Link time program optimization in presence of a linker script
Qualcomm Innovation Center, Inc.
March 22, 2018 - N°20180081650

A method for optimizing source code comprises optimizing the source code of files from a computer program at link-time, and receiving, at a linker, a customized linker script defining output sections for files of an executable version of the files of the computer program. The method comprises adding, to intermediate representation files having global or local symbols, metadata comprising default ...
Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occurs
International Business Machines Corporation
March 22, 2018 - N°20180081647

Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The result is code that is more ...
Cloud-based network tool optimizers for server cloud networks
Keysight Technologies Singapore (holdings) Pte. Ltd.
March 15, 2018 - N°20180077071

Network tool optimizers for server cloud networks and related methods are disclosed. In part, master filters are defined to segregate and control user traffic, and user filters are defined to forward the user traffic to cloud-based network tools or tool instances. A master user interface and user interfaces for each user are provided so that the master filters and user ...
Compiler Patent Pack
Download 129+ patent application PDFs
Compiler Patent Applications
Download 129+ Compiler-related PDFs
For professional research & prior art discovery
inventor
  • 129+ full patent PDF documents of Compiler-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Data compiler for true random number generation and related methods
March 08, 2018 - N°20180067725

Implementations of data compilers may include: a physical device including a physical parameter, the physical parameter including at least three states. The data compiler may also include a data stream generated from the physical parameter. The data stream may include a plurality of bits. Each bit may be coded with one of a 0, a 1, and an x; the 0, the 1, and ...
Profile guided indirect function call check for control flow integrity
Qualcomm Incorporated
March 01, 2018 - N°20180060209

Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing profile guided indirect jump checking on a computing device, including encountering an indirect jump location of implementing an indirect jump during execution of a program, identifying an indirect jump target of the indirect jump, determining whether the indirect jump location and the indirect jump target are associated ...
Compiler optimizations for vector operations that are reformatting-resistant
International Business Machines Corporation
February 22, 2018 - N°20180052670

An optimizing compiler includes a vector optimization mechanism that optimizes vector operations that are reformatting-resistant, such as source instructions that do not have a corresponding reformatting operation, sink instructions that do not have a corresponding reformatting operation, a source instruction that is a scalar value, a sink instruction that may produce a scalar value, and an internal operation that depends ...
Safety-relevant computer system
Siemens Aktiengesellschaft
February 15, 2018 - N°20180046531

A safety-relevant computer system, in particular a railway safety system, contains at least two hardware channels. A memory check results of the channels are fed to at least one comparator, which triggers an error response if the memory check results are not equal. In order to be able to use diverse software programs created by compilers, memory check results of ...
System and method of configuring a data store for tracking and auditing real-time events across ...
Fmr Llc
February 15, 2018 - N°20180046455

Various embodiments are disclosed to configure a data store for tracking and auditing real time events associated with an end-to-end development lifecycle of a software product across different types of software development tools in agile development environments. The data store may be configured to store vast numbers of records containing metadata that describe different types of real time events using ...
Flow control for language-embedded programming in general purpose computing on graphics processing units
February 15, 2018 - N°20180046440

The present invention discloses a method of flow control in a computing device, for processing of flow control statements to adapt a data structure of a program running on the computing device and a computer program product storing the method. The invention thereby allows the integration of the kernels into the main program when compiling. The whole parsing of the ...
Quantum circuit synthesis using deterministic walks
February 08, 2018 - N°20180039903

There is provided a method for implementing an algorithm for forming, or synthesizing, quantum circuits on a system capable of performing the quantum circuit synthesis by using a deterministic walk (i. E. A pseudo-random walk with a random or pseudo-random starting point). In one implementation, the deterministic walk is performed using a parallel search algorithm. In an implementation of the ...
Compiler Patent Pack
Download 129+ patent application PDFs
Compiler Patent Applications
Download 129+ Compiler-related PDFs
For professional research & prior art discovery
inventor
  • 129+ full patent PDF documents of Compiler-related inventions.
  • Exact USPTO filing data with full-text, images, drawings & claims.
  • Index pages: Table View and Image-Grid View layouts. All images in each PDF.
Primitive culling using automatically compiled compute shaders
Advanced Micro Devices, Inc.
February 01, 2018 - N°20180033184

Techniques for culling primitives are provided herein. The techniques involve automatic generation of shader programs to be executed by an accelerated processing device. A just-in-time compiler automatically generates the shader programs based on a vertex shader program that is provided for use in the vertex shader stage of the graphics processing pipeline. The automatically generated shader programs include instructions from ...
Debugging tool for a jit compiler
Microsoft Technology Licensing Llc.
February 01, 2018 - N°20180032420

A jit compiler is debugged by comparing the native code it generates with the native code generated from a reliable jit compiler. The different compilations are performed using the same input data. The input data is recorded by intercepting the communication exchanges between a runtime environment and the reliable jit compiler during the compilation of a program. The input data ...
Computer-implemented method for allowing modification of a region of original code
Fujitsu Limited
February 01, 2018 - N°20180032320

A computer-implemented method for allowing modification of a region of original code of a computer program, the method comprising: annotating a region of original code for extraction with a compiler directive; and compiling code including the original code and the compiler directive, wherein the compiler directive causes the annotated region of the original code to be extracted, stored in a ...
Software code debugger for quick detection of error root causes
T Komp Tomasz Kruszewski
January 25, 2018 - N°20180024911

Example methods, apparatuses, and systems are presented for a software code debugger tool. The code debugger tool may be configured to access source code intended to be examined for debugging. The debugger tool may compile the source code using a specially designed compiler that incorporates state recording functionality and other debugging functionality directly into the source code. When the source ...
Parallel processing apparatus and node-to-node communication method
Fujitsu Limited
January 25, 2018 - N°20180024865

A cross compiler generates a logical communication area number for first identifying information that is assigned to each of multiple processes contained in parallel processing. An area converter and an address acquisition unit keep correspondence information that makes it possible to, on the basis of the first identifying information and second identifying information representing the parallel processing, specify a memory ...
Adaptive routing to avoid non-repairable memory and logic defects on automata processor
Micron Technology, Inc.
January 25, 2018 - N°20180024841

Systems and methods for utilizing a defect map to configure an automata processor in order to avoid defects when configuring the automata processor. A system includes automata processor having a state machine lattice. The system also includes a non-volatile memory having a defect map stored thereon and indicating logical defects found on the automata processor. By including the defect map, ...
Partial connection of iterations during loop unrolling
International Business Machines Corporation
January 25, 2018 - N°20180024822

A method and system for partial connection of iterations during loop unrolling during compilation of a program by a compiler. Unrolled loop iterations of a loop in the program are selectively connected, including redirecting, to the head of the loop, undesirable edges of a control flow from one iteration to a next iteration of the loop. Merges on a path ...
Linear-time algorithm to determine the maximum number of iterations of the iterative algorithm for data-flow ...
Texas Instruments Incorporated
January 25, 2018 - N°20180024820

A compiler converts a human readable high level program into a corresponding machine language program. This invention improves data-flow analysis. A compiler implementing data-flow analysis typically relies on an iterative algorithm for data-flow analysis. According to the prior art determination of the exact number of loop iterations required for convergence was believed impractical. The prior art selected a maximum number ...
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