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This page is updated frequently with new Chip-related patent applications.




 Camera case with removable carrier, filter receiver, external battery and supplemental memory storage patent thumbnailCamera case with removable carrier, filter receiver, external battery and supplemental memory storage
The present invention is a supplemental waterproof housing that completely surrounds a camera device, and it encloses an integrated and removable supplemental external battery and supplemental memory storage inside the external housing, and provides for a mounting point for lenses, filters or adaptors and handles attached to outside to the external housing. The internal compartment of the housing encloses an inner housing that holds the camera, and allows easy connections to the removable memory chips and removable battery packs through coupling adapters, connectors and bridges, which is all integrated into and enclosed by the external housing.
Avant Technology, Inc.


 Semiconductor device with a magnetic shield patent thumbnailSemiconductor device with a magnetic shield
A semiconductor device includes a substrate, a magnetoresistive memory chip disposed on the substrate, and a sealing resin layer that seals the magnetoresistive memory chip. The magnetoresistive memory chip includes a magnetoresistive memory element layer and an organic resin layer that covers at least a portion of the magnetoresistive memory element layer and contains magnetic particles..
Kabushiki Kaisha Toshiba


 Light-emitting apparatus, illumination apparatus, and  manufacturing light-emitting apparatus patent thumbnailLight-emitting apparatus, illumination apparatus, and manufacturing light-emitting apparatus
A light-emitting apparatus includes: a substrate; targets to be connected (led chips and wiring), mounted on the substrate and arranged linearly; wires that individually connect adjacent ones of the targets to each other; and a sealing member provided on the substrate and sealing the targets and the wires. At least one of the wires in a region of the sealing member corresponding to one of ends of a line of the targets is a first wire, at least one of the wires in a region of the sealing member corresponding to the other of the ends is a second wire, and each of the first and second wires has a standing portion attached to one of the targets that is the inner one in the sealing member, and an inclined portion attached to the other of the targets that is the outer one in the sealing member..
Panasonic Intellectual Property Management Co., Ltd.


 Light-emitting apparatus and illumination apparatus patent thumbnailLight-emitting apparatus and illumination apparatus
A light-emitting apparatus includes: a substrate; a first light-emitting element (a first led chip) mounted on the substrate; a second light-emitting element (a second led chip) having a light-emission peak wavelength longer than a light-emission peak wavelength of the first light-emitting element; a first sealing member sealing the first light-emitting element and containing a phosphor that emits fluorescent light when illuminated by light from the first light-emitting element; and a second sealing member sealing the second light-emitting element and having at least a portion between the first sealing member arid the second light-emitting element. The second scaling member has an absorbance lower than an absorbance of the first sealing member with respect to light emitted from the second light-emitting element..
Panasonic Intellectual Property Management Co., Ltd.


 Model-based runtime detection of insecure behavior for system on chip with security requirements patent thumbnailModel-based runtime detection of insecure behavior for system on chip with security requirements
A runtime classifier hardware circuit is incorporated into an electronic device for implementing hardware security by storing a support vector model in memory which is derived from pre-silicon verification data to define secure behavior for a first circuit on the electronic device; monitoring input and/or output signals associated with the first circuit using the runtime classifier hardware circuit which compares the input and/or output signals to the support vector model to detect an outlier input signal and/or outlier output signal for the first circuit; and blocking the outlier input and/or output signal from being input to or output from the first circuit.. .
Freescale Semiconductor, Inc.


 Game engine on a chip patent thumbnailGame engine on a chip
An electronic chip and a chip assembly are described. The electronic chip comprises one or more processing cores and at least one hardware interface coupled to at least one of the one or more processing cores.
Calay Venture S.à R.l.


 Integrated circuit chip with multiple cores patent thumbnailIntegrated circuit chip with multiple cores
An integrated circuit (ic) chip can include a given core at a position in the ic chip that defines a given orientation, wherein the given core is designed to perform a particular function. The ic chip can include another core designed to perform the particular function.
Texas Instruments Incorporated


 Column manager with a multi-zone thermal system for use in liquid chromatography patent thumbnailColumn manager with a multi-zone thermal system for use in liquid chromatography
A thermal system for use in a column manager of a liquid chromatography system comprises a plurality of spatially separated individually controlled thermoelectric chips. A column module houses a plurality of thermally conductive troughs.
Waters Technologies Corporation


 Working  nfc token patent thumbnailWorking nfc token
A working method of an nfc token. The method comprises: a micro control unit in a token performing system initialization; resetting a near field communication chip in the token and sending a near field communication chip setting instruction to the near field communication chip; waiting to receive a near field communication chip setting instruction return value; upon receiving the near field communication chip setting instruction return value, sending a first preset instruction to the near field communication chip; waiting to receive a first preset instruction return value; and upon receiving the first preset instruction return value, sending a second preset instruction comprising a dynamic password to the near field communication chip.
Feitian Technologies Co., Ltd.


 Display device patent thumbnailDisplay device
A display device is provided. The display device includes a first substrate; a first transistor and a second transistor disposed over the first substrate; a common electrode disposed over the first substrate; and a light-emitting diode chip (led chip) disposed over the first substrate and disposed corresponding to the first transistor and the second transistor.
Innolux Corporation


Resin molded body with rfic package incorporated therein and manufacturing same

A resin molded body with an rfic package incorporated therein is insert-molded incorporating therein a metal core material and an rfic element connected to the metal core material. The rfic element includes a ceramic multi-layer substrate that incorporates therein a coil conductor, and an rfic chip mounted on a mounting surface of the multi-layer substrate.
Murata Manufacturing Co., Ltd.

System on package

A system on package includes a first package and a second package stacked on the first package and electrically connected to one another through metal contacts. The first package includes a first printed circuit board (pcb), a system on chip which is connected to the first pcb through bumps, and a first memory device which is connected to the system on chip through micro bumps connected to vias in the system on chip.
Samsung Electronics Co., Ltd.

Memory card with communication function

A memory card provided with a communication function has a substrate having a first mounting surface and a second mounting surface on a side opposite to the first mounting surface, a memory chip mounted on the first mounting surface or the second mounting surface, a proximity wireless communication circuit on the first mounting surface or the second mounting surface, a circuit pattern which is disposed on at least one of a first area of the first mounting surface and a second area of the second mounting surface located opposite to the first area, the substrate being between the first area and the second area, and which is connected with the memory chip and the proximity wireless communication circuit, and a chip antenna mounted on a third area of the first mounting surface or a fourth area of the second mounting surface.. .
Kabushiki Kaisha Toshiba

Local power gate (lpg) interfaces for power-aware operations

Technologies for local power gate (lpg) interfaces for power-aware operations are described. A system on chip (soc) includes a first functional unit, a second functional unit, and local power gate (lpg) hardware coupled to the first functional unit and the second functional unit.
Intel Corporation

Fiber coupling device for coupling of at least one optical fiber

A fiber coupling device for coupling of at least one optical fiber is disclosed. The fiber coupling device comprises at least one opto-electronic and/or photonic chip comprising at least one opto-electronic and/or photonic integrated element capable of emitting and/or detecting electromagnetic radiation.
Ccs Technology, Inc.

Microfluidic devices with integrated resistive heater electrodes including controlling and measuring the temperatures of such heater electrodes

The invention relates to methods and devices for control of an integrated thin-film device with a plurality of microfluidic channels. In one embodiment, a microfluidic device is provided that includes a microfluidic chip having a plurality of microfluidic channels and a plurality of multiplexed heater electrodes, wherein the heater electrodes are part of a multiplex circuit including a common lead connecting the heater electrodes to a power supply, each of the heater electrodes being associated with one of the microfluidic channels.
Canon U.s. Life Sciences, Inc.

Light source module

A light source module of the present disclosure is provided with a light source, e.g., led chips and a control circuit to control light emission of the light source. The light source module includes a light source mounting unit to be mounted with the light source, and a control mounting unit to be mounted with the control circuit.
Koito Manufacturing Co., Ltd.

Nanochannel arrays and their preparation and use for high throughput macromolecular analysis

Nanochannel arrays that enable high-throughput macromolecular analysis are disclosed. Also disclosed are methods of preparing nanochannel arrays and nanofluidic chips.
The Trustees Of Princeton University

Multilayer hydrodynamic sheath flow structure

A microfabricated sheath flow structure for producing a sheath flow includes a primary sheath flow channel for conveying a sheath fluid, a sample inlet for injecting a sample into the sheath fluid in the primary sheath flow channel, a primary focusing region for focusing the sample within the sheath fluid and a secondary focusing region for providing additional focusing of the sample within the sheath fluid. The secondary focusing region may be formed by a flow channel intersecting the primary sheath flow channel to inject additional sheath fluid into the primary sheath flow channel from a selected direction.
Cytonome/st, Llc

Non-invasive monitoring cancer using integrated microfluidic profiling of circulating microvesicles

A microfluidic exosome profiling platform integrating exosome isolation and targeted proteomic analysis is disclosed. This platform is capable of quantitative exosomal biomarker profiling directly from plasma samples with markedly enhanced sensitivity and specificity.
Kansas State University Research Foundation

Hand-held blender

A hand-held blender includes a housing and a body. The body is disposed in the housing, and the body comprises a microprocessor, a pressure sensor, a pressure button, a driving device, a coupling, a stirring rod, a power switch and a safety protection device; the coupling is connected with the stirring rod and driving device, respectively; the microprocessor is connected with the driving device.
Huiyang Allan Plastic & Electric Industries Co., Limited

Bra having movable chip insertion device

A bra having a movable chip insertion device includes two bra cups. The bra cups each have an inner side.
Ghi Fu Int'l Technology Co., Ltd.

Qos in a system with end-to-end flow control and qos aware buffer allocation

The present disclosure is directed to quality of service (qos) and handshake protocols to facilitate endpoint bandwidth allocation among one or more agents in a network on chip (noc) for an endpoint agent. The qos policy and handshake protocols may involve the use of credits for buffer allocation which are sent to agents in the noc to compel the acceptance of data and the allocation of an appropriate buffer.
Netspeed Systems

Heterogeneous soc ip core placement in an interconnect to optimize latency and interconnect performance

Systems and methods described herein are directed to solutions for network on chip (noc) interconnects that automatically and dynamically determines the position of hosts of various size and shape in a noc topology based on the connectivity, bandwidth and latency requirements of the system traffic flows and certain performance optimization metrics such as system interconnect latency and interconnect cost. The example embodiments selects hosts for relocation consideration and determines a new possible position for them in the noc based on the system traffic specification, shape and size of the hosts and by using probabilistic function to decide if the relocation is carried out or not.
Netspeed Systems

System and grouping of network on chip (noc) elements

Aspects of the present disclosure are directed to systems, methods and computer readable medium for reducing the number of unique routers/network elements/module instances on a network on chip to get a simplified noc rtl without effecting the behavior and performance of noc. According to an example implementation of the present disclosure, plurality of noc elements of a given noc can be grouped together to form one or more groups, and one or more superset noc elements/module instances encompassing capabilities/functionalities of plurality of individual noc elements of said one or more groups can be determined/created for each of the said one or more groups.
Netspeed Systems

Configurable router for a network on chip (noc)

Example implementations described herein are directed to a configurable building block, such as a router, for implementation of a network on chip (noc). The router is parameterized by a software layer, which can include the number of virtual channels for a port, the number of ports, the membership information of the virtual channels, clock domain, and so forth.
Netspeed Systems

Clock gating for system-on-chip elements

An aspect of the present disclosure provides a hardware element in a network on chip (noc), wherein the hardware element includes a clock gating circuit configures one or more neighboring hardware elements to activate before receiving new incoming data and to sleep after a defined number of cycles, wherein the defined number of cycles can be counted from a cycle having non-receipt of incoming data and/or having a clearance of all data within an input queue of a source hardware element.. .
Netspeed Systems

Outdoor multifunctional solar energy foldable table

An outdoor multifunctional solar energy foldable table includes a table plate, a foldable stand connected beneath the table plate, a vertical column for supporting the foldable stand, and table legs fixed to a lower end of the vertical column. The table plate includes an exterior frame with a control panel, an interior frame inside the exterior frame, a wireless charger positioned on a support on an internal side of the interior frame, inclined support tubes that intersect and connect to the internal side of the interior frame, fixed tubes connected to the inclined support tubes to form a framework structure, a photovoltaic chip positioned on the framework structure, a glass table plate for covering the photovoltaic chip, and a circuit cable box connected to a fixed tube.

Light-emitting apparatus and illumination apparatus

A light-emitting apparatus includes: a substrate; a plurality of led chips disposed on the substrate and including a plurality of blue led chips which emit blue light and a plurality of red led chips which emit red light; and a sealing member that contains a yellow phosphor and seals the plurality of led chips together. The plurality of led chips include: a first led chip group made up of the blue led chips; a second led chip group made up of the red led chips and disposed around the first led chip group in an annular shape centered on an optical axis; and a third led chip group made up of the blue led chips and disposed around the second led chip group in an annular shape centered on the optical axis..
Panasonic Intellectual Property Management Co., Ltd.

Semiconductor light emitting device package and light source module using same

A semiconductor light emitting device package may include: a light emitting diode (led) chip having a first surface on which a first electrode and a second electrode are provided, a second surface opposite the first surface, and a plurality of side surfaces, a lateral wavelength conversion layer disposed on a side surface of the plurality of side surfaces of the led chip, the lateral wavelength conversion layer comprising a wavelength conversion material, and a reflective layer covering the second surface of the led chip, the reflective layer being configured to reflect light emitted by the led chip back towards the led chip.. .
Samsung Electronics Co., Ltd.

Slim led package

Disclosed herein is a slim led package. The slim led package includes first and second lead frames separated from each other, a chip mounting recess formed on one upper surface region of the first lead frame by reducing a thickness of the one upper surface region below other upper surface regions of the first lead frame, an led chip mounted on a bottom surface of the chip mounting recess and connected with the second lead frame via a bonding wire, and a transparent encapsulation material protecting the led chip while supporting the first and second lead frames..
Seoul Semiconductor Co., Ltd.

Implementing magnetic memory integration with cmos driving circuits

A magnetic memory integrated with complementary metal oxide semiconductor (cmos) driving circuits and a method for implementing magnetic memory integrated with complementary metal oxide semiconductor (cmos) driving circuits for use in solid-state drives (ssds) are provided. A complementary metal oxide semiconductor (cmos) wafer is provided, and a magnetic memory is formed on top of the cmos wafer providing a functioning magnetic memory chip..
Hgst Netherlands B.v.

Semiconductor device having features to prevent reverse engineering

It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques.
Verisiti, Inc.

Rendering system and method

A rendering system includes: a ray generator configured to generate a ray; a memory chip configured to store information about objects in three-dimensional (3d) space; an intersection tester embedded in the memory chip and configured to perform an intersection test between the ray and the objects by using the information about the objects and information about the ray; and a shader configured to perform pixel shading based on a result of the intersection test.. .
Samsung Electronics Co., Ltd.

Automatic pipelining of noc channels to meet timing and/or performance

Systems and methods for automatically generating a network on chip (noc) interconnect architecture with pipeline stages are described. The present disclosure includes example implementations directed to automatically determining the number and placement of pipeline stages for each channel in the noc.
Netspeed Systems

System level simulation in network on chip architecture

Systems and methods for performing multi-message transaction based performance simulations of soc ip cores within a network on chip (noc) interconnect architecture by accurately imitating full soc behavior are described. The example implementations involve simulations to evaluate and detect noc behavior based on execution of multiple transactions at different rates/times/intervals, wherein each transaction can contain one or more messages, with each message being associated with a source agent and a destination agent.
Netspeed Systems

Semiconductor system and controlling method thereof

A semiconductor system may include a controller, a buffer chip electrically coupled to the controller, and a plurality of memory chips electrically coupled to the buffer chip, each memory chip including at least one chip data terminal. The buffer chip may be configured to perform logic operations on data output from at least one pair of chip data terminals among the plurality of memory chips, and to output the logic operation results to the controller or provide the logic operation results to other chip data terminals among the plurality of memory chips other than the at least one pair of chip data terminals which output the data..
Sk Hynix Inc.

Memory system and operating method thereof

A memory system may include: a memory device including: a plurality of pages each including a plurality of memory cells coupled to a plurality of word lines and suitable for storing read data and write data requested from a host; a plurality of memory blocks each including the pages; a plurality of planes each including the memory blocks; and a plurality of memory chips each including the planes; and a controller suitable for checking the write data corresponding to a command received from the host, programming the write data to pages of memory blocks included in planes of a first memory chip, and programming first data for the write data to pages of memory blocks included in planes of a second memory chip.. .
Sk Hynix Inc.

Hardware and software enabled implementation of power profile management instructions in system on chip

Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a soc/noc that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the soc/noc to generate and execute power profile management instructions for different segments or regions of the soc/noc for efficient and safe working thereof..
Netspeed Systems

Solid state drive apparatus

A solid state drive apparatus includes a housing having a first accommodation space and a second accommodation space; a substrate mounted in the first accommodation space, wherein at least one non-volatile memory chip is mounted on the substrate; and a heat dissipation member mounted in the second accommodation space and including an isolation barrier that defines a boundary between the second accommodation space and the first accommodation space and a plurality of fin portions that extend from the isolation barrier away from the first accommodation space, wherein a plurality of through air holes are provided in a side of the housing adjacent the second accommodation space.. .
Samsung Electronics Co., Ltd.

Led strip, backlight and display device

An led strip comprises: a support plate (15) provided with a circuit layer (c), the support plate (15) including a first plate portion (24) and a second plate portion (16) connecting and intersecting with each other; a plurality of led chips (13) disposed on a first side and a second side of the second plate portion (16) of the support plate (15), the respective led chips (13) being respectively electrically connected with the circuit layer (c); and a transparent protective layer (12) for encapsulating the plurality of led chips (13) on the second plate portion (16) of the support plate (15). A backlight (22) and a display device are further provided.
Beijing Boe Chatani Electronics Co., Ltd.

Led module and light fixture with the same

An led module includes light sources that are disposed on a surface of a circuit substrate and each of which has led chips and a wavelength conversion member covering the led chips. The light sources include first light sources and second light sources.
Panasonic Intellectual Property Management Co., Ltd.

Broadcast lighting device capable of adjusting color temperature

Disclosed is a broadcast lighting device capable of adjusting a color temperature. The light broadcast lighting device includes a plurality of straight-type led lamps controlled through a control unit and connected to a front surface of a casing through a set of main sockets, respectively, and each straight-type led lamp includes a frame having mounting parts provided on at least two surfaces thereof, a substrate connected to the mounting part of the frame and mounted thereon with led chips having mutually different color temperatures, a cover plate to cover at least a portion of the frame, and a unit socket having at least two terminals protruding for electrical connection of at least one substrate and supporting both end portions of the cover plate, thereby realizing various color temperatures..
Bardwell & Mcalister Inc.

Micro peristaltic pump

A circular arc shaped flow path (21) is formed as a microfluidic flow path in a sheet-like microfluidic chip (20). A roller (15) on a rotor (10) is pressed against the circular arc shaped flow path (21) in the microfluidic chip (20), the rotor (10) is rotary-driven by a driving motor 4, and the circular arc shaped flow path (21) is caused to make a peristaltic motion by rotation of the rotor (10), to send a liquid in the flow path.
Takasago Electric, Inc.

Electrocardiogram (ecg) sensor chip, system on chip (soc), and wearable appliance

An ecg sensor chip used in a wearable appliance includes; a switch controlled by a switching signal, an amplifier that amplifies a difference between first and second ecg signals, and a location indicator that generates the switching signal. The switch passes either a first ecg signal or second ecg signal in response to the switching signal..

Multi-chip structure having flexible input/output chips

A multi-chip structure comprises a switch system on chip (switch soc), a plurality of serializer/deserializer (serdes) chips positioned around the switch soc, and a plurality of inter-chip interfaces for connecting the switch soc to the plurality of serdes chips, respectively.. .
Mediatek Inc.

Signaling system with adaptive timing calibration

A signaling system is disclosed. The signaling system includes a first integrated circuit (ic) chip to receive a data signal and a strobe signal.
Rambus Inc.





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This listing is a sample listing of patent applications related to Chip for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Chip with additional patents listed. Browse our RSS directory or Search for other possible listings.


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