|| List of recent Chip-related patents
The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a raid group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data..
|Fcoc (flip chip on chip) package and manufacturing method thereof|
A manufacturing method for flip chip on chip (fcoc) package based on multi-row quad flat no-lead (qfn) package is provided wherein the lower surface of plate metallic base material are half-etched to form grooves. Insulation filling material is filled in the half-etched grooves.
|Multiple heterogeneous noc layers|
Systems and methods described herein are directed to solutions for network on chip (noc) interconnects that automatically and dynamically determines the topology of different noc layers and maps system traffic flows to various routes in various noc layers that satisfies the latency requirements of the flows. The number of layers and their topology is dynamically allocated and optimized by performing load balancing of the traffic flows between the channels and routes of different noc layers and updating the topology of the noc layers as they are mapped.
|Multi-array led chip for embodying cut-off line and head lamp having the same|
The present invention relates to a multi-array led chip for embodying a cut-off line, and the multi-array led chip includes: a plurality of led modules which emits light; and at least one low beam led module which emits light, in which the led module and the low beam led module are disposed to match a cut-off line, and the led module and the low beam led module are individually turned on and off such that a low beam is emitted. Accordingly, a direct type of light is emitted, and thus a low beam, which complies with regulations regarding the cut-off line, is embodied, and light efficiency does not deteriorate..
|Easily assembled led tube lamp structure|
An led tube lamp structure includes a heat-transferring and light-pervious glass tube; a slightly curved elongated heat-dissipation metal base internally bonded to the glass tube via a thermal adhesive; an led chip circuit board fitted to a front side of the heat-dissipation metal base; and two electrode covers fitted on two open ends of the glass tube and respectively having a fixing dummy pin and a through hole. The heat-dissipation metal base has two end portions inserted into insertion sections in the electrode covers to generate an upward tension for tightly contacting with the glass tube; and the led chip circuit board has two contact pins at two ends for extending through the through holes.
|Light emitting diode, manufacturing method thereof, light emitting diode module, and manufacturing method thereof|
A manufacturing method of a light emitting diode (led) and a manufacturing method of an led module are provided. The manufacturing method of the led may include manufacturing a plurality of led chips, manufacturing a phosphor pre-form including a plurality of mounting areas for mounting the plurality of led chips, applying an adhesive inside the phosphor pre-form, mounting each of the plurality of led chips in each of the plurality of mounting areas, and cutting the phosphor pre-form to which the plurality of led chips are mounted, into units including individual led chips..
|Light emitting diode package|
A light emitting diode (led) package including a substrate unit, a light emitting unit and an encapsulant. The substrate unit includes a metal substrate and a circuit board.
According to one embodiment, a memory chip, which is connected to a controller that controls reading and writing of data in response to a request from an external device, includes: a memory including a special area that is a predetermined data storage area; a key storage unit that stores therein a second key that corresponds to a first key used by the external device to convert the data; a converting unit that receives, from the controller, data to be written into the special area and generates converted data by converting the data to be written using the second key; and a writing unit that writes the converted data into the special area.. .
|Electronic circuit for and method of executing an application program stored in a one-time-programmable (otp) memory in a system on chip (soc)|
A method and apparatus for executing an application program stored in an one-time-programmable, otp, memory in a system on chip (soc) is described. The soc has ram, a cpu and an otp controller.
|Nucleic acid ligand diagnostic biochip|
A nucleic acid ligand “biochip” is disclosed, consisting of a solid support to which one or more specific nucleic acid ligands is attached in a spatially defined manner. Each nucleic acid ligand binds specifically and avidly to a particular target molecule contained within a test mixture, such as a bodily fluid.
|Method of manufacturing light-emitting device|
A method of manufacturing a light-emitting device includes providing a case including an annular sidewall and an led chip including a chip substrate and a crystal layer and mounted in a region surrounded by the sidewall of the case, and dripping a droplet of an electrically-charged phosphor-containing resin so as to fill a space between the sidewall and the led chip. The droplet is attracted toward the sidewall by an electrostatic force during the dripping..
|Fetal red blood cell detection|
A device for analyzing a maternal blood sample for quantification of the percentage of fetal red blood cells present with respect to the number of maternal red blood cells includes reagents for mixing with the biological sample, a microfluidic chip, 5 fluid reservoirs, a pumping system, an image acquisition system, an image analysis system, and an electronic control board. The microfluidic channel can confine the objects of interest to a monolayer, and may trap them in an organized array for analysis.
|Cartridge interface module|
A cartridge interface module (cim), configured to engage with a removable microfluidic cartridge in a nucleic acid analyzer system can include a fluidics component, which is configured to initiate and support a liquid extraction of nucleic acids from a biological sample contained in the removable microfluidic cartridge. The cim also includes a polymerase chain reaction (pcr) assembly component which can be configured to initiate and support amplification of the extracted nucleic acids.
A biochip includes a flat carrier and an array of spots containing catcher molecules which are arranged on the carrier. Each spot is associated with a microelectrode arrangement for impedance spectroscopic detection of binding events occurring between the catcher molecules and the target molecules applied via an analyte solution.
|Image forming apparatus|
The image forming apparatus (1) includes a toner cartridge (71) between a front frame (78) or an front inside cover (79) and a front housing, and a cartridge attaching section (65) includes a shutter stopping section (65i) for opening a shutter (71c) by attachment of the toner cartridge (71) to the toner cartridge attaching section (65), and an ic chip fitting section (65c) to which an ic chip (75) is attached.. .
|Image blurring avoiding method and image processing chip thereof|
An image blurring avoiding method for a camera includes obtaining a motion data of the camera; and capturing a picture only when the camera is substantially motionless according to the motion data.. .
|Memory with refresh logic to accomodate low-retention storage rows|
An apparatus is disclosed that includes a memory controller chip and memory chips packaged with the memory controller chip. Each memory chip includes normal-retention storage rows that exhibit retention times greater or equal to a first time interval, and having been tested to generate information identifying low-retention storage rows that exhibit retention times less than the first time interval.
|Ink cartridge and method of producing the same|
An ink cartridge includes a cartridge body defining an ink chamber, an ink supply portion provided at the cartridge body, an air flow path provided in the cartridge body, a cover, and a memory chip disposed on the cover. The cartridge body has an outer surface oriented in a first direction and an air communication port opened on the outer surface.
|Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem|
A graphics processing chip includes multiple graphics pipeline cores and multi-pipeline core logic circuitry to process graphic data streams received from a processor and to drive multiple gpus on the multiple graphics pipeline cores.. .
|Method of driving led chips of different specifications|
A method of driving led chips, wherein the led chips have different specifications, includes the steps of: a. Defining a plurality of setting currents; b.
|Driving apparatus for led chips of different specifications|
A driving apparatus for led chips includes: a driving unit, a voltage measuring unit, and a feedback control module. The driving unit provides a driving voltage and a driving current to a led chip; the voltage measuring unit measures the driving voltage; the feedback control module is built-in with a default power; according to the driving voltage measured by the voltage measuring unit and the default power, the feedback control module controls the driving unit to maintain the driving current at a working current, wherein the working current matches the rated current of the led chip.
|Light emitting diode device and method for manufacturing same|
An led device includes a substrate having a top surface and a bottom surface. The substrate defines a through hole at a center thereof.
|Light emitting diode device|
A light emitting diode (led) device includes: a substrate having a central portion; an led chip unit formed on the central portion of the substrate; a circuit pattern having a positive electrode and a negative electrode that are formed on the substrate, each of the positive electrode and the negative electrode including an arc portion and at least one extending portion that extends from the arc portion toward the central portion; a wire unit connecting the led chip unit to the extending portions; a glass layer disposed on the substrate, covering the arc portions and including an opening unit that is aligned with the central portion of the substrate; a dam structure formed on the glass layer and extending along the arc portions; and an encapsulated body disposed substantially within the dam structure to cover the extending portions, the wire unit and the led chip unit.. .
|Phosphor film, method of manufacturing the same, coating method of phosphor layer, method of manufacturing led package and led package manufactured thereby|
There are provided a phosphor film, a method of manufacturing the same, and a method of coating an led chip with a phosphor layer. The phosphor film includes: a base film; a phosphor layer formed on the base film and obtained by mixing phosphor particles in a partially cured resin material; and a cover film formed on the phosphor layer to protect the phosphor layer..
|Rfid tag, rfid system, and package including rfid tag|
Disclosed is an rfid tag to be attached to a metal member including a slit, the rfid tag including conductive members attached to a surface of the metal member at corresponding sides of the slit in a width direction of the slit through an isolator; and an ic chip that receives power through the conductive members. When a frequency of radio waves is f, the power induced between the sides the slit is wa, voltage induced between the sides of the slit is v, an area of each of the conductive members is s, thickness of the isolator is d, a dielectric constant of the isolator is ∈r, a dielectric constant of vacuum is ∈0, and a minimum value of the power required for the ic chip to operate is wmin, an inequality wmin≦wa−4πf·s·∈0·∈r·v2/d is satisfied..
|Method of manufacturing a data carrier provided with a microcircuit|
The present invention consists to a method of manufacturing a data carrier (1), comprising a data carrier body (3) and a module (5) fixed above a cavity in said data carrier body (3), said method comprising the following steps:—a first step (101) of providing a module (5),—a second step (102) of applying a preformed first layer (31) on the dielectric substrate (53) of said module (5), said first layer (31) having a hole (33) to receive the electronic chip (55), its wires (57) and the dielectric resin protection (59),—a third step (103) of applying a second layer (35) on the first layer (31), recovering the hole (33) of the first layer (35),—a fourth step (104) of laminating of the module (5), the first and second layers (31, 35),—a fifth step (105) of cutting or pre-cutting at the data carrier format.. .
|Integrated circuit (ic) chip and method of verifying data thereof|
Provided are an ic chip and a method of verifying data thereof. The present invention verifies integrity of data by comparing an integrity verifying value generated from data using an integrity verifying value generating algorithm before a write operation for storing data in a storing unit is performed and an integrity verifying value generated from data stored in the storing unit using the integrity verifying value generating algorithm after the write operation is completed.
|Memory system and constructing method of virtual block|
According to one embodiment, a virtual block is constructed according to configuration conditions that, when a plurality of physical blocks included in the virtual block are selected, the sum of the number of physical block pairs and the number of single blocks allocated from the same memory chip to one virtual block is less than or equal to a first value.. .
|Semiconductor chip and semiconductor device|
When a memory chip is mounted over a logic chip, a recognition range including a recognition mark formed at a back surface of the logic chip is imaged and a shape of the recognition range is recognized, alignment of a plurality of bumps of the logic chip and a plurality of projection electrodes of the above-described memory chip is performed based on a result of the recognition, and the above-described memory chip is mounted over the logic chip. At this time, the shape of the recognition range is different from any portion of an array shape of the bumps, as a result, the recognition mark in the shape of the recognition range can be reliably recognized, and alignment of the bumps of the logic chip and the projection electrodes of the above-described memory chip is performed with high accuracy..
|System and memory module|
A system includes: a controller, a first memory module connected to the controller through a first data bus, and a second memory module connected to the controller through a second data bus, wherein the first memory module includes: first and second memory chips; a first data terminal connected to the first data bus, and a first switch unit that electrical connects the first data terminal with either the first memory chip and the second memory chip, and the second module includes: third and fourth memory chips; a second data terminal connected to the second data bus, and a second switch unit that switches over electrical connection of the second data terminal with either the third memory chip or the fourth memory chip.. .
|Dual-use light fixture having ac and dc leds|
A dual-use light fixture having ac and dc leds includes a heat-dissipating housing, a printed circuit board located on a first end of the heat-dissipating housing, ac and dc led chips located on the printed circuit board, and a power supply pedestal coupled to a second end of the heat-dissipating housing. The power supply pedestal includes an ac plug, a dc driving unit, and a thread connector.
|Low-height multilayer ceramic capacitor|
A low-height multilayer ceramic capacitor offering excellent flexure strength meets the condition “t11c<t12b,” where t11c represents the thickness of each protective dielectric layer provided on respective top and bottom sides of a dielectric chip, and t12b represents the thickness of a wraparound part of each external electrode provided at least part of both top and bottom faces of the dielectric chip.. .
|Light-emitting diode module and method for operating a light-emitting diode module|
In at least one embodiment of the led module (10), said led module comprises a first led chip (1) that is based on the alingan material system and designed to emit a first radiation type in the blue spectral range. Furthermore, the led module (10) comprises at least one second led chip (2) that is based on the ingaalp material system and designed to emit a second radiation type in the red spectral range.
|Method of manufacturing semiconductor device, and semiconductor device|
Provided is a semiconductor device with improved reliability. A logic chip (first semiconductor chip) and a laminated body (second semiconductor chip) are stacked in that order over a wiring substrate.
|Multi-chip semiconductor power device|
A semiconductor device includes a first semiconductor power chip mounted over a first carrier and a second semiconductor power chip mounted over a second carrier. The semiconductor device further includes a contact clip mounted over the first semiconductor power chip and on the second semiconductor power chip.
|Solid-state imaging device|
A solid-state imaging device includes a pixel chip, a logic chip and one or more shielding layers. The one or more shielding layers are arranged between or within the pixel chip and/or the logic chip to shield or reduce the effect of electromagnetic interference, radiation generated noise, or electromagnetic waves generated in one portion of the solid-state imaging device from affecting another portion of the solid-state imaging device..
|Booklet processing unit|
According to one embodiment, a booklet processing unit is disclosed. It includes a conveyance means for conveying a booklet containing an ic chip along a conveyance way; a printing means for printing a first particular information in the booklet; a recording means for recording a second particular information on the ic chip; a distinguishing means for distinguishing the quality of the printing state of the booklet and a recording state of the ic chip; and a marking means which moves a marking component and marks the booklet when the booklet is identified as being in a poor state by the distinguishing means such that the ic chip is avoided by the marking..
|Concentrating photovoltaic chip assembly, method for manufacturing the same, and concentrating photovoltaic assembly with same|
A concentrating photovoltaic chip assembly includes an upper lead frame, a lower lead frame for supporting electronic components, a photovoltaic chip for converting solar energy into electric energy, and a protective diode for protecting the photovoltaic chip from short-circuiting. A light inlet window is defined in the upper lead frame.
|Common template for electronic article|
One or more techniques or systems for incorporating a common template into a system on chip (soc) design are provided herein. For example, a common template mask set is generated based on a first set of polygon positions from a first vendor and a second set of polygon positions from a second vendor.
|Bus protocol checker, system on chip including the same, bus protocol checking method|
A system on chip (soc) includes a system bus; a plurality of intellectual properties (ips) outputting bus signals via the system bus; and one or more checkers disposed to correspond to at least some of the plurality of ips, wherein the checker includes: a first environment setting register for setting information about a check target and list, on which a bus protocol check operation will be performed, wherein the setting may be variable according to an access from outside via the system bus; and a check logic receiving the bus signal and performing a bus protocol check operation on a signal included in the bus signal according to the information set in the first environment setting register.. .
|Local repair signature handling for repairable memories|
A method is disclosed for independent repair signature load into a repairable memory within a chip set of a design without halting operation of other repairable memories within the design. At initial power up, the repair signature is received from nonvolatile memory and parallelly stored within a memory repair register and within a local memory repair shadow register.
|Phy based wake up from low power mode operation|
Apparatus and method for supplying electrical power to a device. A system on chip (soc) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (aod) power island having a power control block with an energy detector coupled to a host input line.
|Storing system data during low power mode operation|
Apparatus and method for operating a device in a low power mode. In accordance with some embodiments, the apparatus comprises a memory and a system on chip (soc) integrated circuit.
|Method of implementing magnetic random access memory (mram) for mobile system-on chip boot|
A method of booting a system on chip (soc) includes using an on-chip mram located in the soc, to store a boot software that includes a start-up software, boot loaders, and kernel and user-personalized information in an on-chip magnetic random access memory (mram) located in and residing on the same semiconductor as the soc. The method further includes directly executing the boot software from the on-chip mram by the soc and directly accessing the user-personalized information from the mram by the soc..
|Storage system and method of control for storage system|
The storage system includes a plurality of storage devices and a storage controller. The storage controller stores a data request quantity indicating the data quantity of write data written to the target area in a specific period, and estimates, based on the quantity of request data and relationship information received from storage devices, the estimated data quantity written to the nonvolatile semiconductor memory chips based on the write data written to the target area in the specific period.
|Non-volatile semiconductor storage apparatus|
According to one embodiment, apparatus includes non-volatile memory chips, and a first controller which executes processing for reading first valid data stored in a first storage region of a first non-volatile memory chip in the non-volatile memory chips, processing for storing the first valid data in a buffer memory, processing for writing the first valid data stored in the buffer memory in a second storage region of the first non-volatile memory chip, and processing for erasing data stored in the first storage region. Each of the non-volatile memory chips comprises erase blocks.
|Memory system, memory controller and method|
According to one embodiment, a memory system includes a plurality of non-volatile memory chips and a memory controller. The memory controller controls a read operation of the memory chips, and manages correspondence relation information between a logical address included in a read command and a physical address of the memory chip.
|Remote electromigration monitoring of electronic chips|
A method of remotely monitoring electromigration in an electronic chip includes sensing, at a first location, at least one temperature value of the electronic chip, sending the at least one temperature value to a remote monitoring system, accumulating a plurality of temperature values of the electronic chip at the monitoring system during a reporting period, calculating an electromigration life consumed (emlc) value of the electronic chip for the reporting period based on the plurality of temperature values, determining whether the emlc of the electronic chip is above a predetermined threshold, and providing a signal when the emlc of the electronic chip is above the predetermined threshold.. .
|Method for forming reram chips operating at low operating temperatures|
Forming a resistive memory structure at a temperature well above the operating temperature can reduce the forming voltage and create a defect distribution with higher stability and lower programming voltages. The forming temperature can be up to 200 c above the operating temperature.
|Method for forming biochips and biochips with non-organic landings for improved thermal budget|
The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate.
|System for high throughput sperm sorting|
This disclosure relates to a system for sorting sperm cells in a microfluidic chip. In particular, various features are incorporated into the system for aligning and orienting sperm in flow channels, as well as, for determining sperm orientation and measuring relative dna content for analysis and/or sorting..
|Device for high throughput sperm sorting|
This disclosure relates to a device in the form of a microfluidic chip. In particular, various features are incorporated into the microfluidic chip for aligning and orienting sperm in flow channels, as well as for separating selected subpopulations of sperm..
|Methods for high throughput sperm sorting|
This disclosure relates to methods for sorting sperm cells in a microfluidic chip. In particular, various steps are incorporated to align and orienting sperm in flow channels, as well as, to determining sperm orientation and measure relative dna content for analysis and/or sorting..