|| List of recent Central Processing Unit-related patents
| Method and system for regulation and control of a multi-core central processing unit|
A method and system for regulation and control of a multi-core cpu includes receiving an operating command associated with regulation and control of the multi-core cpu, responding to the operating command, and performing regulation and control on the cpu cores of the multi-core cpu via a bottom layer core interface according to a preset cpu regulation and control mode. Thereby, a working state of every cpu core of a multi-core cpu is regulated and controlled, processing capability of the multi-core cpu is improved, and energy and electric power are saved..
Huizhou Tcl Mobile Communication Co., Ltd.
| Thread control and calling multi-thread virtual pipeline (mvp) processor, and processor thereof|
The present invention relates to a thread control method of a multi-thread virtual pipeline (mvp) processor, which comprises the following steps: allocating directly and sequentially threads in a central processing unit (cpu) thread operation queue to multi-path parallel hardware thread time slots of the mvp processor for operation; allowing an operating thread to generate hardware thread call instructions corresponding thereto to a hardware thread management unit; allowing the hardware thread management unit to enable the call instructions of ithread threads to form a program queue according to receiving time, and calling and preparing the hardware threads; and allowing the hardware threads to operate sequentially in idle multi-path parallel hardware thread time slots of the mvp processor according to the sequence of the hardware threads in the queue of the hardware thread management unit. The present invention also relates to a processor..
Shenzhen Zhongweidian Technology Limited
|Solid state drive card and an electronic system including the same|
Provided are a solid state drive (ssd) card and an electronic system including the same. The electronic system includes a main board to which an input device and an output device are connected.
Samsung Electronics Co., Ltd.
|Facility for blocking unwanted communication service|
An electronic device comprising a code comparer connected to the cpu (central processing unit) and operated with integrated chips with low power consumption in a server database of sms,mms etc., and also may be operated in a mobile phone. The code comparer may be operated with integrated chips within low power consumption obtained from the battery and/or external power supply in the server database of sms, mms etc., and also from battery of the mobile phone.
|Anti-aquaplaning device for a vehicle|
Device to avoid the aquaplaning problem on a vehicle (10), the device being applicable at least on the drive wheels (28) of the vehicle and including a tank (12) of fluid under pressure that is connected to a plurality of fluid ejectors (26) associated with the respective wheels and suitable to shoot jets of pressurized fluid onto the road surface, and sensors (18) suitable to detect the conditions of the road surface to actuate the fluid ejectors. The fluid ejectors (26) are injector nozzles controlled by a central processing unit (cpu), which receives the signals from the sensors (18), and are operated in a manner coordinated with the physical position of the respective wheel so as to be continually oriented in the direction of travel of the same wheel..
Easy Rain I.s.r.l.
|System and display of information using a vehicle-mount computer|
A system and method displays information using a vehicle-mount computer. The system includes (i) an input device and a display device for inputting and displaying information; (ii) a motion detector for detecting vehicle motion; (iii) a proximity sensor for detecting proximity to an item; and (vi) a vehicle-mount computer in communication with the input device, the display device, the motion detector, and the proximity sensor, the vehicle-mount computer including a central processing unit and memory.
Hand Held Products, Inc.
|Rstp aggregration scheme for ethernet networks|
A master ethernet bridge for use in an ethernet network that includes a master central processing unit and associated master ethernet switch, and one or more slave central processing units, each having an associated slave ethernet switch, each of the associated slave ethernet switches connected to a plurality of input/output ports, and wherein each of the plurality of ports is assigned a respective port number, each of the ports being connected to one of the one or more of the cascaded ethernet devices, and wherein each of the master cpu and slave cpus includes memory that contains a program that embodies a plurality of ethernet functions adapted to substantially prevent re-routing of ethernet commands by providing a mapping function that correlates the plurality of ports to respective ones of the one or more slave cpu and slave ethernet switch.. .
Crestron Electronics, Inc.
|Integrated circuit and operation method thereof|
An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit.
Nuvoton Technology Corporation
|Manipulating the size of liquid droplets in digital microfluidics|
A biological sample processing system (1) includes a liquid droplet manipulation instrument (20) with an electrode array (21) for inducing a movement of a liquid droplet (19) by electrowetting; a substrate (22); and a control unit (23). An electrode selector (34) of the control unit (23) is configured to individually select and provide each electrode (35) of the electrode array (21) with a voltage.
Tecan Trading Ag
|Double processing offloading to additional and central processing units|
A data-processing system (dts) includes a central hardware unit (cpu) and an additional hardware unit (hw), the central hardware unit (cpu) being adapted to execute a task by a processing thread (tm), and to trigger offloading of execution of a first part (p1a, p1b, p2) of the task to the additional hardware unit (hw); and wherein the additional hardware unit is adapted to call on functionalities of the central hardware unit (cpu), triggered by the first part, and the central hardware unit (cpu) executes a second part (p2) of the task forming a sub-part of the first part by a service processing thread (ts).. .
Methods and system for swapping memory in a virtual machine environment
In this disclosure, techniques are described for more efficiently sharing resources across multiple virtual machine instances. For example, techniques are disclosed for allowing additional virtual machine instances to be supported by a single computing system by more efficiently allocating memory to virtual machine instances by providing page swapping in a virtualized environment and/or predictive page swapping.
Amazon Technologies, Inc.
Vehicle operational cost display system and method
A vehicle operational cost display system includes a user interface adapted for entry of cost of fuel for operation of a vehicle; a central processing unit interfacing with the user interface, the central processing unit having a calculator function adapted to calculate total operational cost of the vehicle based on the cost of fuel for operation of the vehicle and distance traveled; and a display interfacing with the central processing unit, the display adapted to display the total operational cost of the vehicle. A vehicle operational cost display method is also disclosed..
Ford Global Technologies, Llc
Video/image data processing system and processing video/image data
A system-on-a-chip (soc) that is able to randomly access target data of a video/image includes a jpeg decoder, a graphic processing unit (gpu) and a central processing unit (cpu). The jpeg decoder receives an input stream having a sequentially accessible first compression format, decodes the input stream to generate first data, and encodes the first data to generate an output stream having a randomly accessible second compression format.
Sharing non-page aligned memory
A method for sharing memory between a central processing unit (cpu) and an input/output (i/o) device of a computing device is described. The method may include creating an allocation of memory for the i/o device to operate on.
Diagnosing graphics display problems
A mechanism is provided for diagnosing graphics display problems during running of an application. A frame of the application drawn by a graphics processing unit is selected.
International Business Machines Corporation
Electrical-mechanical interface with antenna elevated above skin surface
A wearable device band may contain a plurality of flexible sections and rigid sections. A radio frequency circuit and a central processing unit may be located on respective rigid sections.
Computer system with physically-addressable solid state disk (ssd) and a addressing the same
A storage system includes a central processing unit (cpu) that has a physically-addressed solid state disk (ssd), addressable using physical addresses associated with user data and provided by a host. The user data is to be stored in or retrieved from the physically-addressed ssd in blocks.
Avalanche Technology, Inc.
Control of wireless battery charging
One embodiment provides a method to store electrical energy in an electronic device, which has a central processing unit (cpu) to provide operating-system and application processing in the device. The method includes controlling, from the cpu of the electronic device, communication sent from the device and received at a wireless charger within communication range of the device.
Method for managing access to protected computer resources
A system for securing and tracking usage of transaction services or computer resources by a client computer from a first server computer, which includes clearinghouse means for storing identity data of the first server computer and the client computer(s); server software means and client software means adapted to forward its identity data and identity data of the client computer(s) to the clearinghouse means at the beginning of an operating session; and a hardware key connected to the client computer, the key being adapted to generate a digital identification as part of the identity data; wherein the hardware key is implemented using a hardware token access system, a magnetic card access system, a smart card access system, a biometric identification access system or a central processing unit with a unique embedded digital identification.. .
Prism Technologies Llc
Power consumption management system and method
A power consumption management system for a central processing unit may include a power consumption estimation block and an activity control block. The power consumption estimation block may be configured to estimate power consumption of the central processing unit based on information related to a status of the central processing unit.
Stmicroelectronics International N.v.
Control device, security management system, and security management method
A central processing unit of a control device includes: a control calculation unit that performs calculation on the basis of storage content of a nonvolatile storage unit and controls a machine; an update unit that accepts operation input in a first maintenance mode or a second maintenance mode, which has a narrower operable range than the first maintenance mode, and updates the storage content of the nonvolatile storage unit in accordance with the operation input; a security management unit that determines permission or prohibition of the operation input in the first maintenance mode with the use of a hardware key; and a security management unit that determines permission or prohibition of the operation input in the second maintenance mode without the use of the hardware key.. .
Kabushiki Kaisha Yaskawa Denki
Security processing unit with configurable access control
A security processing unit is configured to manage cryptographic keys. In some instances, the security processing unit may comprise a co-processing unit that includes memory, one or more processors, and other components to perform operations in a secure environment.
Efficient setup and evaluation of filled cubic bezier paths
A graphics processing system includes a central processing unit that processes a cubic bezier curve corresponding to a filled cubic bezier path. Additionally, the graphics processing system includes a cubic preprocessor coupled to the central processing unit that formats the cubic bezier curve to provide a formatted cubic bezier curve having quadrilateral control points corresponding to a mathematically simple cubic curve.
Multimedia playing device
A multimedia playing device includes a central processing unit, a plurality of sensors electrically coupled to the central processing unit, and an output unit electrically coupled to the central processing unit. The plurality of sensors are operated together with the central processing unit, such that after the sensors detect different hand movements of a user, the central processing unit reads and determines the hand movement and transmits related control signals to the output unit according to different hand movements to achieve the effects of using a hand posture to control related functional movements and enhancing the convenience of using the multimedia playing device..
Digilife Technologies Co., Ltd.
Display device, display method and display system
A display device includes a cpu (central processing unit), a display controller and an obtain module. The display controller displays a first icon and a second icon in predetermined layouts on a display.
Kabushiki Kaisha Toshiba
In-kernel cpu clock boosting on input event
One embodiment provides a method to wake an electronic device having a central processing unit (cpu) from an idle condition. The method includes creating a worker queue in an interrupt-request (irq) driver module of the operating-system kernel of the device, receiving in the kernel an indication of user input in a form of an irq, and in response to receiving the indication of user input, posting a request in the worker queue to boost clock speed in the cpu.
Hardware virtualization for media processing
Methods and systems for implementing virtual processors are disclosed. For example, in an embodiment a processing apparatus configured to act as a plurality of virtual processors includes a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications, a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, and a central processing unit (cpu) configured to operate in a first operating mode and a second operating mode, the cpu being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without appreciably interfering with the one or more real-time processes that are running in the second operating mode..
Marvell World Trade Ltd.
Power-efficient personalization of a computing environment of a data processing device with respect to a user thereof
A method includes providing, in a data processing device including a central processing unit (cpu) and a graphics processing unit (gpu), a capability to interface a microprocessor with the gpu, and communicatively interfacing a sensor with the microprocessor. The method also includes obtaining data related to an operating environment external to the data processing device through the sensor, and determining, through the microprocessor, personalization required of a computing environment of the data processing device with respect to a user thereof based on the data related to the operating environment external to the data processing device.
Pre-emptive cpu activation from touch input
A computing device may include a touchscreen and logic configured to monitor a processing load for a plurality of central processing units at particular intervals and adjust a number of active central processing units, of the plurality of central processing units, based on the monitored processing load. The logic may further be configured to detect a touchscreen event associated with the touchscreen and activate one or more additional central processing units, of the plurality of central processing units, in response to detecting the touchscreen event..
Electronic device module, electronic device thereof, protection element thereof and raising working frequency thereof
An electronic device module, an electronic device thereof, a protection element thereof and a method of raising working frequency thereof are provided. The electronic device module comprises the electronic device and the protection element.
Safety device for a stair lift
A device for conveying a person from a first to a second level, in particular a stair lift, comprising a rail (9) which extends between said first and said second level, a frame (3) which is provided with engaging means designed to engage the rail in such a manner that it can be moved along the rail, and drive means designed to cause the frame to move along the rail, and a carrier (4) on which the person can seat himself, in particular a chair, wherein the device is further provided with a safety device comprising a central processing unit and a wireless communication network designed to communicate status information on components of the device and/or objects in the vicinity of the device to the central processing unit, and wherein the processing unit is designed for deciding, on the basis of the communicated status information, whether or not the frame is to be moved along the rail by the drive means.. .
Otto Ooms B.v.
Solid state disk controller apparatus
A solid state disk controller apparatus comprises a first port; a second port having a plurality of channels; a central processing unit connected to a cpu bus; a buffer memory configured to store data to be transferred from the second port to the first port and from the first port to the second port; a buffer controller/arbiter block connected to the cpu bus and configured to control read and write operations of the buffer memory based on a control of the central processing unit; a first data transfer block connected between the first port and the buffer controller/arbiter block and configured to transfer data to be stored/read in/from the buffer memory bypassing the cpu bus; and a second data transfer block connected between the second port and the buffer controller/arbiter block and configured to transfer data to be stored/read in/from the buffer memory bypassing the cpu bus.. .
Samsung Electronics Co., Ltd.
Flash subsystem organized into pairs of upper and lower page locations
A memory system includes a flash subsystem for storing data identified by page numbers. The memory system further includes a central processing unit (cpu), and a flash controller coupled to the cpu, the cpu being operable to pair a lower with an upper page.
Avalanche Technology, Inc.
Automatic communication and optimization of multi-dimensional arrays for many-core coprocessor using static compiler analysis
There are provided source-to-source transformation methods for a multi-dimensional array and/or a multi-level pointer for a computer program. A method includes minimizing a number of holes for variable length elements for a given dimension of the array and/or pointer using at least two stride values included in stride buckets.
Nec Laboratories America, Inc.
Heat pipe assemblies
Heat pipe assemblies for information handling systems (ihss). In some embodiments, an ihs may comprise a motherboard including a central processing unit (cpu); a cooling system coupled to the motherboard, the cooling system including a heat pipe, the cpu coupled to a first side of the heat pipe; and a daughterboard coupled to the motherboard and including a graphics processing unit (gpu) coupled to a second side of the heat pipe.
Dell Products, L.p.
Image forming apparatus, controlling image forming apparatus, and storage medium
In an image forming apparatus in which a first board including a first central processing unit (cpu) and a second board including a second cpu communicate with each other to control image processing, a monitoring unit monitors whether processing executed by the second cpu is normal. If the monitoring unit determines that the processing executed by the second cpu is not normal, a notification unit notifies the first cpu.
Canon Kabushiki Kaisha
Using gpu for network packetization
Information to be sent over a network, such as the ethernet, is packetized by using a graphics processing unit (gpu). The gpu performs packetization of data with much higher throughput than a typical central processing unit (cpu).
Gesture recognition method and wearable apparatus
A wearable apparatus includes a user interface, a motion sensor, a microprocessor and a central processing unit (cpu). In an operation mode, the motion sensor senses a current hand movement trajectory (hmt).
Building intruder defensive shield
This invention relates to a building intruder defensive shield system to deter, delay and distract intruders from causing damage or harm upon entering and roaming buildings. The defensive shield system includes a cold water supply plumbed to an expansion tank capable of pressurizing the water with a zone valve and nozzle.
Cpu scheduler configured to support latency sensitive virtual machines
A host computer has one or more physical central processing units (cpus) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical cpu when the corresponding container is determined to be latency sensitive.
Pass-through network interface controller configured to support latency sensitive virtual machines
A host computer has a plurality of virtual machines executing therein under the control of a hypervisor, where the host also includes a physical network interface controller (nic). An interrupt controller detects an interrupt generated by the physical nic, where the interrupt corresponds to a virtual machine.
Virtual machine monitor configured to support latency sensitive virtual machines
A host computer has a virtualization software that supports execution of a plurality of virtual machines, where the virtualization software includes a virtual machine monitor for each of the virtual machines, and where each virtual machine monitor emulates a virtual central processing unit (cpu) for a corresponding virtual machine. A virtual machine monitor halts execution of a virtual cpu of a virtual machine by receiving a first halt instruction from a corresponding virtual machine and determining whether the virtual machine is latency sensitive.
System and treating server errors
An error handling system as applied to a server, the server comprising a central processing unit, the central processing unit configured to send a warning signal when the central processing unit generates an error. The error handling system includes a programmable logic device, a baseboard management controller coupled to a southbridge chip, and a basic input-output system coupled to the baseboard management controller.
Hon Hai Precision Industry Co., Ltd.
Error correcting server
An error correcting system applied to a server, the server comprising a central processing unit, the central processing unit configured to send a warning signal when the central processing unit generates error. The error correcting system includes a programmable logic device, a baseboard management controller coupled to the programmable logic device, and a basic input output system coupled to the baseboard management controller.
Hon Hai Precision Industry Co., Ltd.
Multimaster serial single-ended system fault recovery
A system to recover a multimaster serial single-ended bus and a faulted connected device includes a director device connected to the faulted connected device via the multimaster serial single-ended bus. The director device includes a central processing unit, a field programmable gate array, and a management module in communication with the faulted connected device, the management module configured to recover the faulted connected device and the multimaster serial single-ended bus.
International Business Machines Corporation
System and downlink power optimization in a partitioned wireless backhaul network with out-of-neighborhood utility evaluation
A system and method for downlink power optimization in a partitioned wireless backhaul network with out-of-neighborhood utility evaluation is disclosed. The method comprises performing initial downlink power optimization for each neighborhood independently, considering only in-neighborhood utilities, by obtaining the transmit powers of all hubs and a utility performance of all served remote backhaul modules (rbms) in the neighborhood.
Blinq Wireless Inc.
An electrical device includes a housing, a motherboard module and a holding assembly. The housing includes a top shell and a bottom shell which are assembled with each other.
Inventec (pudong) Technology Corporation
Data processing method used in distributed system
Provided is a data processing method which can increase data processing speed without adding a new node to a distributed system. The data processing method may include: calculating a conversion number of cores corresponding to a number of processing blocks included in a graphics processing unit (gpu) of a node of a distributed system; calculating a adding up number of cores by adding up a number of cores included in a central processing unit (cpu) of the node of the distributed system and the conversion number of cores; splitting job data allocated to the node of the distributed system into a number of job units data equal to the adding up number of cores; and allocating a number of job units data equal to the number of cores included in the cpu to the cpu of the node of the distributed system and a number of job units data equal to the conversion number of cores to the gpu of the node of the distributed system..
Samsung Sds Co., Ltd.
Enhanced data transfer in multi-cpu systems
A method implemented in a memory device, wherein the memory device comprises a first memory and a second memory, the method comprising receiving a direct memory access (dma) write request from a first central processing unit (cpu) in a first computing system, wherein the dma write request is for a plurality of bytes of data, in response to the dma write request receiving the plurality of bytes of data from a memory in the first computing system without processing by the first cpu, and storing the plurality of bytes of data in the first memory, and upon completion of the storing, sending an interrupt message to a second cpu in a second computing system, wherein the interrupt message is configured to interrupt processing of the second cpu and initiate transfer of the plurality of bytes of data to a memory in the second computing system.. .
Futurewei Technologies, Inc.
Arcade basketball game with illuminated rim
An basketball arcade game is disclosed that includes a rim, a backboard, a ball sensor for the detection of balls that pass through the rim, a scoreboard for displaying a score relating to the game, a ball control access panel to permit and restrict access to balls that are used with said game, and a central processor that receives input from the ball sensor and provides output to the scoreboard, and the rim further includes a light source and a motor to laterally drive the rim which are both controlled by the central processing unit, and the rim may display light signals reflecting conditions of the game including bonus conditions and the time of play remaining.. .
Benchmark Entertainment, Lc
Electronic television comprising mobile phone apparatus
A lcd television, led television, plasma television or other television system comprising a mobile phone having one or plurality of simsocket containing a plurality of pins, wherein input/output pin, clock pin, reset pin, vcc pin, ground pin are several respective pins of the said simsocket, and the said pins of one or plurality of simsocket are connected in parallel and the said plurality of simsockets for accepting plurality of simcards in order to operate the simcards selectively and/or simultaneously. The said plurality of simsocket are connected to the cpu (central processing unit) (14) in parallel and the said cpu (14) has a switching circuit and the said cpu (14) is connected to the one or plurality of simsocket through the switching circuit and the function of one or plurality of simsocket is operated by the cpu (14), switching circuit, and transreceivers (15).
System and distributed multi-processing security gateway
A system and method for a distributed multi-processing security gateway establishes a host side session, selects a proxy network address for a server, uses the proxy network address to establish a server side session, receives a data packet, assigns a central processing unit core from a plurality of central processing unit cores in a multi-core processor of the security gateway to process the data packet, processes the data packet according to security policies, and sends the processed data packet. The proxy network address is selected such that a same central processing unit core is assigned to process data packets from the server side session and the host side session.
A10 Networks, Inc.
Semiconductor integrated circuit device
A micro controller with fault detection function is provided, in which duplex processing by a program is realized without complicating the program. Peripheral circuits are provided with registers and execute processing based on a command.
Renesas Electronics Corporation
Central processing unit casing
An electromagnetic interference (emi) shield for reducing the electromagnetic interference and substantially uniformly distribute heat is disclosed. The emi shield comprises a first layer configured to shield emi and a second layer configured to dissipate heat.
Wah Hong Industrial Corp.
Server and heat dissipating assembly thereof
A server and a heat dissipating assembly thereof includes an airflow generating device, a central processing unit, several memory slots, a first cooling fin set, a second cooling fin set and a heat conductive member. The airflow generating device generates an airflow flowing along an airflow direction and is located at a front side of the central processing unit.
Inventec (pudong) Technology Corporation
A server includes a shell and at least one server assembly. The shell has a first accommodation space.
Inventec (pudong) Technology Corporation
Mobile terminal, symbol sheet, assistance tool, image processing program, and image processing method
There is provided an imaging technology allowing easy acquisition/storing of image data drawn in an arbitrary area by a user, without the use of a dedicated document sheet, where a restriction is hardly imposed on a document sheet in terms of design. There are included a camera that images an imaging object to which a symbol sheet including a predetermined symbol is attached, a central processing unit that detects the predetermined symbol from an original image of the imaging object imaged by the camera, that recognizes a predetermined area calculated based on the predetermined symbol as an image acquisition area, and that extracts, and acquires as image data, an image in the image acquisition area, and image data storage unit that stores the image data..
King Jim Co., Ltd.