Popular terms

[SEARCH]

Central Processing Unit topics
Central Processing Unit
Speech Recognition
User Interface
Storage Device
Alarm System
Constraints
Electronic Device
Embedded System
Application Program
Functional Specification
Control Flow
Application Programming Interface
Data Storage
Optical Fiber
Solid Structure

Follow us on Twitter
twitter icon@FreshPatents

Web & Computing
Cloud Computing
Ecommerce
Search patents
Smartphone patents
Social Media patents
Video patents
Website patents
Web Server
Android patents
Copyright patents
Database patents
Programming patents
Wearable Computing
Webcam patents

Web Companies
Apple patents
Google patents
Adobe patents
Ebay patents
Oracle patents
Yahoo patents

[SEARCH]

Central Processing Unit patents



      
           
This page is updated frequently with new Central Processing Unit-related patent applications. Subscribe to the Central Processing Unit RSS feed to automatically get the update: related Central RSS feeds. RSS updates for this page: Central Processing Unit RSS RSS


Method of handling parcels, and a logistics center for handling parcels

Solystic

Method of handling parcels, and a logistics center for handling parcels

Semiconductor integrated circuit device and system using the same

Renesas Electronics

Semiconductor integrated circuit device and system using the same

Semiconductor integrated circuit device and system using the same

Graphite System

Multiprocessor system with independent direct access to bulk solid state memory resources


Date/App# patent app List of recent Central Processing Unit-related patents
08/20/15
20150235339 
 Hybrid engine for central processing unit and graphics processor patent thumbnailHybrid engine for central processing unit and graphics processor
A method is described for generating procedural textures for a computer having a unified cpu/gpu memory architecture, to generate textures for contents that are managed by a graphics card (gpu), and including the steps of: receiving the data of a graph consisting of a plurality of filters and sequentially traversing said graph such as to allow, for each filter traversed, the steps of: identifying the processor preselected for executing this filter; receiving the instructions for the preselected version of the filter; receiving parameters of the current filter; receiving the buffer addresses of the current filter; applying the values provided for the digital-valued filter inputs; executing the filter instructions with the set parameters; storing the intermediate results obtained; and, when all of the filters of the graph have been executed, generating at least one display texture.. .
Allegorithmic


08/20/15
20150235165 
 Method of handling parcels, and a logistics center for handling parcels patent thumbnailMethod of handling parcels, and a logistics center for handling parcels
A method of handling parcels (2) and a logistics center (1) for handling parcels, use is made of superposable racks (5) and motor-driven shuttle carts (6) that are remotely controlled by a central processing unit (7) to travel in freely guided manner and that are suitable for docking with each rack (5), each parcel (2) is unloaded onto a rack (5) and the destination of the parcel is identified (103), a specific location is assigned (104) to said rack (5) using an outward shipping plan, and said corresponding shuttle cart (6) is caused to move (105) so as to store said parcels (2) side-by-side and in superposed manner, and then, using an inward delivery plan, each rack (5) is docked (110), and each parcel (2) is transferred (111) from said stowage zone (11) to a loading point (3) so that parcels (2) are presented in their order of delivery.. .
Solystic


08/20/15
20150234661 
 Semiconductor integrated circuit device and system using the same patent thumbnailSemiconductor integrated circuit device and system using the same
A processor system, includes a first central processing unit (cpu) that executes a redundant instruction set; and a second cpu that executes the redundant instruction set, wherein before the second cpu executes a redundant instruction among the redundant instruction set, the first cpu is able to execute n (n is a predetermined integer number) redundant instructions among the redundant instruction set, and wherein when an exception occurs during execution of the redundant instruction set in the first cpu, the first cpu executes an instruction for the exception as a non-redundant instruction.. .
Renesas Electronics Corporation


08/20/15
20150234612 
 Multiprocessor system with independent direct access to bulk solid state memory resources patent thumbnailMultiprocessor system with independent direct access to bulk solid state memory resources
A system has a collection of central processing units. Each central processing unit is connected to at least one other central processing unit and has a path into flash memory resources.
Graphite System, Inc.


08/20/15
20150234610 
 All-in-one data storage device including internationl hardware filter,  operating the same, and system including the same patent thumbnailAll-in-one data storage device including internationl hardware filter, operating the same, and system including the same
A data storage device includes a central processing unit (cpu) executing an application and a hardware filter. A method of operation the data storage device may include initializing the hardware filter based on initialization information corresponding to a changed application when the application is changed so that the hardware filter supports the changed application, filtering read data that is output from a second memory based on filtering condition data, outputting the filtered data using the hardware filter that has been initialized, and transmitting the filtered data to a host via a first memory..
Samsung Electronics Co., Ltd.


08/20/15
20150234602 
 Data storage device for filtering page in two steps, system including the same, and  operating the same patent thumbnailData storage device for filtering page in two steps, system including the same, and operating the same
A data storage device includes a filter, a central processing unit (cpu), a first memory configured to store a page, a second memory, and a page type analyzer configured to analyze a type of the page output from the first memory and to transmit an indication signal to the cpu according to an analysis result. According to control of the cpu that operates based on the indication signal, the filter passes the page to the second memory or filters each row in the page, and transmits first filtered data to the second memory..
Samsung Electronics Co., Ltd.


08/20/15
20150234438 
 Cooler for computing modules of a computer patent thumbnailCooler for computing modules of a computer
The present invention describes a cooling unit for a central processing unit (the cpu) that comprises two flat grooved plates fastened together that jointly form at least one channel that is sealed by hermetic insert blocks wherein the cooling liquid circulates. These plates have heat-dissipating properties for heat-generating electronic components of the cpu contacting with them, while the channel in which the cooling liquid circulates has an inlet and an outlet, to supply and discharge the cooling liquid, respectively.
Zao "rsc Technologies"


08/13/15
20150228246 
 Controller for in-vehicle ethernet and control method thereof patent thumbnailController for in-vehicle ethernet and control method thereof
In-vehicle communication and, more particularly, a controller operating an in-vehicle ethernet environment and a control method thereof are disclosed. A controller operating in an in-vehicle ethernet network includes a central processing unit (cpu) and a physical layer (phy) device connected to the cpu through a first interface, a second interface, and a first pin, wherein the phy device includes a decoder, the phy device being configured based on a predetermined configuration value for initialization irrespective of booting of an operating system of the cpu, and the decoder decodes compressed video data received from an external source through the ethernet network into uncompressed video data and transmits the uncompressed video data to the external source after initialization of the phy device is completed based on configuration of the first pin..
Hyundai Motor Company


08/13/15
20150228091 
 Texture unit for general purpose computing patent thumbnailTexture unit for general purpose computing
A texture unit may be used to perform general purpose mathematical computations such as dot products. This enables some general purpose computations and operations to be offloaded from a central processing unit to the texture unit.
Intel Corporation


08/13/15
20150227187 
 Data storage device, method thereof, and data processing system including the same patent thumbnailData storage device, method thereof, and data processing system including the same
A data storage device includes a central processing unit (cpu); a peripheral device; a power management unit (pmu) configured to control a power supply to the cpu and the peripheral device; and a receiver configured to transmit a second signal to the pmu through a second transmission path after transmitting a first signal to the cpu through a first transmission path, the receiver being configured such that the first and second signals transmitted by the receiver are signals that were output from a host.. .

08/06/15
20150222547 

Efficient management of network traffic in a multi-cpu server


A network interface controller (nic) includes a network interface, a peer interface and steering logic. The network interface is configured to receive incoming packets from a communication network.
Mellanox Technologies Ltd.


08/06/15
20150220435 

Storage system employing mram and array of solid state disks with integrated switch


A high-availability storage system includes a first storage system and a second storage system. The first storage system includes a first central processing unit (cpu), a first physically-addressed solid state disk (ssd) and a first non-volatile memory module that is coupled to the first cpu.
Avalanche Technology, Inc.


08/06/15
20150220130 

Data processing device and data processing system with wide voltage range operation mode


A data processing device, includes a central processing unit configured to operate in accordance with a program; a register capable of setting a first mode and a second mode; a non-volatile memory; a sequencer configured to control the non-volatile memory; and a first clock circuit for supplying a first clock to the central processing unit and the non-volatile memory, wherein the first mode is a mode in which the central processing unit is operated within a first range of an external supply voltage, wherein the second mode is a mode in which the central processing unit is operated within a second range of the external supply voltage, the second range includes the first range and a relatively low voltage lower than the lower limit voltage of the first range.. .
Renesas Electronics Corporation


07/30/15
20150213776 

Computing automatically making a display configuration persistent


A computing system and method for automatically making a display configuration persistent. One embodiment of the computing system includes: (1) a video adapter coupled to a data bus and operable to interface a display configuration associated with extended display identification data (edid), (2) a cache configured to store the edid, and (3) a central processing unit (cpu) coupled to the data bus and the cache, and operable to execute a driver associated with the video adapter and configured to detect the display configuration and cause the edid to be written to the cache..
Nvidia Corporation


07/30/15
20150213236 

Systems and methods for implementing self-destructing content links


A computer-implemented method performed in a computerized system incorporating a central processing unit, a network interface and a memory, the computer-implemented method involving: using the network interface to receive a content and an associated access restriction from a client computer system directly accessible by a user; causing the received content to be stored in a content storage system; using the central processing unit to generate a self-destructing content link for the stored content based on the received associated access restriction, wherein the generated self-destructing content link is configured to de-activate pursuant to the received associated access restriction; storing a metadata corresponding to the generated self-destructing content link for the stored content; and using the network interface to provide the generated self-destructing content link to the client computer system. The content storage system may be an online content storage system accessible via a network or a local content storage system..
Anchorfree Inc.


07/30/15
20150212944 

Method and pushing memory data


A method and an apparatus for pushing memory data from a memory to a push destination storage used to store data prefetched by a central processing unit (cpu) in a computing system are disclosed. In the method, a memory controller of the computing system periodically generates a push command according to a push period.
Huawei Technologies Co. Ltd.


07/30/15
20150212483 

Image forming apparatus, controlling image forming apparatus, and program


An image forming apparatus is provided in which, in receiving a job and processing an image, a central processing unit (cpu) that can be cooled by a cooling unit to which electric power is supplied from a power supply unit controls a printing unit. The cpu, after a power state of the image forming apparatus is shifted to a second power state lower in power consumption than a first power state, recognizes that a receiving unit has received a job for returning from the second power state to the first power state.
Canon Kabushiki Kaisha


07/23/15
20150208021 

Image recording system


An image recording system including a component capable of displaying and processing of images such as a central processing unit (cpu)/digital signal processor (dsp) that may be installed in a network video recorder (nvr) so that the image recording system may be used to implement a video summary/video synopsis technology in an embedded nvr/digital video recorder (dvr)/set-top box (settop) system having a host cpu and a plurality of dsp cores.. .
Samsung Techwin Co., Ltd.


07/23/15
20150206277 

Unified memory systems and methods


The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses operating system (os) allocation on the central processing unit (cpu) combined with graphics processing unit (gpu) driver mappings to provide a unified virtual address (va) across both gpu and cpu.
Nvidia Corporation


07/23/15
20150205719 

Memory control circuit


A memory control circuit includes an address conversion unit configured to perform an address conversion between a central processing unit (cpu) and a non-volatile memory such that the cpu recognizes that a program to be executed by the cpu is stored in a first address region of the non-volatile memory irrespective of whether the program is stored in the first address region or a second address region of the non-volatile memory.. .
Rohm Co., Ltd.


07/23/15
20150205676 

Server control method and server control device


A control method implemented using a server and a server control device. When a server starts abnormally due to an exception of a master central processing unit (cpu), a platform controller hub (pch) connected to the master cpu, or a flash that is connected to the pch connected to the master cpu, the master cpu is reconfigured.
Huawei Technologies Co., Ltd.


07/23/15
20150205613 

Efficient central processing unit (cpu) return address and instruction cache


A processor includes an instruction fetch unit and an instruction decode unit. The instruction fetch unit includes an instruction pre-fetch buffer and is configured to fetch instructions from memory into the instruction pre-fetch buffer.
Texas Instruments Deutschland Gmbh


07/23/15
20150204636 

Automatic correction trajectory of a projectile and correction method using the same


Disclosed is an automatic correction apparatus for a trajectory of a projectile from a firearm of which a sight and a gun barrel are installed in parallel, the apparatus including: a distance measurer which is installed in parallel with the sight and measures distance from a target to be hit; a central processing unit which calculates a correction value for parallelization between the gun barrel and the sight so that a trajectory curve and the target can intersect with each other on the basis of the distance measured by the distance measurer; and a parallelization adjuster which connects the sight and the gun barrel and adjusts axial parallelization between a sight line of the sight and the gun barrel on the basis of the parallelization correction value calculated by the central processing unit. With this, the trajectory of the projectile is automatically corrected in accordance with the distance from the target, and thus quick and correct aiming and firing are possible..

07/23/15
20150204564 

Graphical user interface system for a thermal comfort controller


A graphical user interface system for a thermal comfort controller. The user interface system has a central processing unit coupled to a memory and a touch sensitive display unit.
Honeywell International Inc.


07/16/15
20150199532 

Micro-virtualization architecture for threat-aware microvisor deployment in a node of a network environment


A micro-virtualization architecture deploys a threat-aware microvisor as a module of a virtualization system configured to facilitate real-time security analysis, including exploit detection and threat intelligence, of operating system processes executing in a memory of a node in a network environment. The micro-virtualization architecture organizes the memory as a user space and kernel space, wherein the microvisor executes in the kernel space of the architecture, while the operating system processes, an operating system kernel, a virtual machine monitor (vmm) and its spawned virtual machines (vms) execute in the user space.
Fireeye, Inc.


07/16/15
20150199513 

Threat-aware microvisor


A threat-aware microvisor is configured to facilitate real-time security analysis, including exploit detection and threat intelligence, of operating system processes executing on a node of a network environment. The microvisor may be embodied as a module disposed or layered beneath (underlying) an operating system kernel executing on the node to thereby control privileges (i.e., access permissions) to kernel resources, such as one or more central processing units (cpus), network interfaces, memory, and/or devices, of the node.
Fireeye, Inc.


07/16/15
20150199274 

Implicit i/o send on cache operations


A computer system for implicit input-output send on cache operations of a central processing unit is provided. The computer system comprises an aggregation queue of a central processing unit, storing input-output data of the central processing unit, wherein the aggregation queue transmits the input-output data to an input-output adaptor, and wherein the input-output data is transmitted in parallel with operations of the central processing unit.
International Business Machines Corporation


07/16/15
20150199273 

Implicit i/o send on cache operations


A method for implicit input-output send on cache operations of a central processing unit is provided. The method comprises an aggregation queue of a central processing unit, storing input-output data of the central processing unit, wherein the aggregation queue transmits the input-output data to an input-output adaptor, and wherein the input-output data is transmitted in parallel with operations of the central processing unit.
International Business Machines Corporation


07/16/15
20150199266 

3dic memory chips including computational logic-in-memory for performing accelerated data processing


This disclosure relates to a three-dimensional (3d) integrated circuit (3dic) memory chip including computational logic-in-memory (lim) for performing accelerated data processing. Related memory systems and methods are also disclosed.
Carnegie Mellon University


07/16/15
20150199147 

Storage thin provisioning and space reclamation


A storage system includes a plurality of storage modules. Each storage module may be interconnected by a module interconnect switch and may include a memory, a central processing unit, a cache, and a plurality of storage devices.
International Business Machines Corporation


07/16/15
20150198684 

System and flexible automated magnetic resonance imaging reconstruction


A system and method for initiating a specific reconstruction or processing method is provided. After an mri scan is completed, an operator of the mri scanner can choose the processing to occur on the scanner machine or on a different remote station on the network or even on a central processing unit (cpu) cluster or graphics processing unit (gpu) server on the same network.

07/09/15
20150193904 

Graphics acceleration for applications executing on mobile devices with multi-operating system environment


The invention provides, in some aspects, a computing device that includes a central processing unit, a graphics processing unit, and a display, all coupled (directly or indirectly for communications). The central processing unit executes a native operating system including one or more native runtime environments within which native software applications are executing, where each such native software application has instructions for execution under the native operating system.
Openmobile World Wide, Inc.


07/09/15
20150193644 

Decodable indicia reading terminal with combined illumination


A decodable indicia reading terminal can comprise a laser-based scanner, an imager-based scanner, a central processing unit (cpu), and an illumination assembly. The illumination assembly can include an indicator light bar and an illumination light bar.
Metrologic Instruments, Inc.


07/09/15
20150193464 

Micro-journaling for file system based on non-volatile memory


Provided is a micro-journaling for a file system based on a non-volatile memory. A system includes a central processing unit (cpu), a main memory realized in a non-volatile memory, and a storage device.

07/09/15
20150193341 

Method and system of synchronizing processors to the same computational point


A system for synchronizing central processing units (cpu) includes a schedule module that communicates a synchronization point, a first cpu that writes a first memory address to a first register in response to the first cpu reaching the synchronization point, and a second cpu that writes a second memory address to a second register in response to the second cpu reaching the synchronization point. The system further includes a first logical and module that writes a first value to a third register based on the first and second memory addresses and a second logical and module that writes a second value to a fourth register based on the first and second memory addresses.
Emerson Network Power - Embedded Computing, Inc.


07/09/15
20150193292 

Microcontroller device and controlling method performed therein


In one aspect, the present disclosure provides a microcontroller device that has, in one chip: a central processing unit; a plurality of peripheral circuits configured to execute respective prescribed processes in response to corresponding trigger signals; and a peripheral control unit that controls respective activations of the plurality of peripheral circuits, wherein at least one of the peripheral circuits is configured to: control operation of an external device; determine whether or not the operation of the external device has ended without an error; enter a standby mode to accept a next trigger signal when the operation of the external device ended without an error; and generate an interrupt signal to interrupt the central processing unit when the operation of the external device ended with an error.. .
Casio Computer Co., Ltd.


07/09/15
20150193285 

Hosted app integration services in multi-operating system mobile and other computing devices


The invention provides, in some aspects, a computing device that includes a central processing unit that is coupled to a hardware interface and that executes a native operating system including one or more native runtime environments within which native software applications are executing. A first native software application executing within the one or more native runtime environments defines one or more hosted runtime environments within which hosted software applications are executing.
Openmobile World Wide, Inc.


07/09/15
20150193241 

Multi-operating system mobile and other computing devices with proxy applications running under a browser


The invention provides, in some aspects, a computing device that includes a central processing unit that is coupled to a hardware interface and that executes a native operating system including one or more native runtime environments within which native software applications are executing. A first native software application executing within the one or more native runtime environments defines one or more hosted runtime environments within which hosted software applications are executing.
Openmobile World Wide, Inc.


07/09/15
20150193146 

Enhanced interface to firmware operating in a solid state drive


An embodiment of the invention includes a storage subsystem having a storage central processing unit (scpu) operable to receive and send a command to a host, the command requiring data computation, a compute engine coupled to the scpu, and a bank of memory devices coupled to the scpu and the compute engine and configured to store data required by the commands, wherein the scpu or the compute engine are operable to perform computation of the data and to further invoke an appropriate flash translation layer (ftl) application based on workload.. .
Fastor Systems, Inc.


07/02/15
20150187322 

Subbuffer objects


A method and an apparatus for a parallel computing program using subbuffers to perform a data processing task in parallel among heterogeneous compute units are described. The compute units can include a heterogeneous mix of central processing units (cpus) and graphic processing units (gpus).
Apple Inc.


07/02/15
20150186409 

Portable electronic device, sharing file between multiple operating systems, recording medium and computer program product


A method for sharing a file between multiple operating systems on a probable electronic device is provided. The method includes the following steps: in a first operating system, a central processing unit storing a modified file into a memory of a shared access area; the central processing unit establishing a link relationship between the first operating system and a second operating system, so that the second operating system learns an address of the modified file stored in the memory of the shared access area; switching from the first operating system to the second operating system; and in the second operating system, the central processing unit accessing the modified file in the memory of the shared access area according to the link relationship..
Insyde Software Corp.


07/02/15
20150186175 

Pre-configured hyper-converged computing device


A pre-configured hyper-converged computing device for supporting a virtualization infrastructure includes a first independent server node comprising a central processing unit (cpu), memory, and storage. The pre-configured hyper-converged computing device includes a pre-configured software module that comprises a graphical user-interface module for managing the pre-configured hyper-converged computing device, a hypervisor for managing virtual machines hosted by said pre-configured hyper-converged computing device and a storage block integrated with the hypervisor.
Vmware, Inc.


07/02/15
20150186162 

Management of a pre-configured hyper-converged computing device


A pre-configured hyper-converged computing device for supporting a virtualization infrastructure includes one or more independent server nodes that comprise a central processing unit (cpu), memory, and storage. The independent server nodes also include a pre-configured software module that when executed causes the device to display a list of a plurality of hosts and a centralized management tool of the virtualization infrastructure via a graphical user-interface, wherein the plurality of hosts are for hosting one or more virtual machines, and the centralized management tool is for centrally managing the virtualization infrastructure; and in response to selecting one of the plurality of hosts, displaying host configuration properties associated with the selected one of the plurality of hosts via the graphical user-interface..
Vmware,inc.


07/02/15
20150186158 

Adaptive hardware reconfiguration of configurable co-processor cores for hardware optimization of functionality blocks based on use case prediction, and related methods, circuits, and computer-readable media


Adaptive hardware reconfiguration of configurable co-processor cores for hardware optimization of functionality blocks based on use case prediction, and related methods, circuits, and computer-readable media are disclosed. In one embodiment, an indication of one or more applications for possible execution is received.
Qualcomm Incorporated


06/25/15
20150180574 

Apparatus and interfacing between central processing unit and main memory unit


Disclosed are an apparatus and method for interfacing between a central processing unit (cpu) and a main memory unit, whereby a shared cache memory unit and the main memory unit are connected to each other using one optical signal transmission line. The apparatus for interfacing between the cpu and the main memory unit includes: a master optical connection protocol engine, converting operation control signals received from a shared cache memory unit of the cpu into serial signals; a first electrical-to-optical (e/o) converter, converting the serial signals converted by the master optical connection protocol engine into optical signals; a second e/o converter, converting the optical signals converted by the first e/o converter into serial signals; a slave optical connection protocol engine, converting the serial signals converted by the second e/o converter into operation control signals; and a memory controller having access to the main memory unit..
Electronics And Telecommunications Research Institute


06/25/15
20150180254 

Mobile terminal with multi-port charging control function


A mobile terminal includes a battery; a first universal serial bus (usb) interface, a central processing unit (cpu), usb charging management module, and a charging management chip. The central processing unit (cpu) is configured to generate an on/off command, and configured to output an adjustment signal.
Huizhou Tcl Mobile Communications Co., Ltd.


06/25/15
20150178058 

Intelligent and automated code deployment


Exemplary method embodiments for deploying code in a computing sysplex environment are provided. In one embodiment, by way of example only, a system-wide trending mechanism is applied.
International Business Machines Corporation


06/18/15
20150172161 

Real-time processing capability based quality adaptation


The quality of a media stream transmitted to a client device is dynamically adapted based on real-time availability of resources on the client device. central processing unit resources, memory availability, buffer usage, graphics processing unit usage, etc., are continuously monitored to evaluate the ability of a device to handle media streams of particular quality levels.
Mobitv. Inc.


06/18/15
20150170532 

Device and evaluating manual dexterity via isolated thumb mobility


A device for measuring the manual dexterity of a subject comprising a central processing unit, a display, storage means, data-entry means and software programming designed to gather the manual dexterity data of a subject required to rely on isolated thumb mobility is disclosed together with methods of use thereof.. .
United States Department Of The Army


06/18/15
20150170320 

Operation of a display system


A display system comprises a processing device comprising a central processing unit connected to system memory and to a graphics processing unit, the processing device running an os module and an ihv graphics driver. A method of operating the display system comprises the steps of installing an additional graphics driver, intercepting communications between the os module and the ihv graphics driver at the additional graphics driver, identifying a request from the os module to the ihv graphics driver for a shared primary allocation for a display source, replacing the identified request with a plurality of requests for a shared primary allocation for each display source supported by the graphics processing unit, receiving a plurality of responses from the ihv graphics driver to the plurality of requests, and providing a reply to the os module derived from the received responses..
Displaylink (uk) Limited


06/18/15
20150170315 

Controlling frame display rate


A system on a chip may include a central processing unit and a graphics processing unit. Based on a user specified target frame rate, it is determined whether a previous processor frame duration for either both of said central and graphics processing unit is too long.

06/18/15
20150170043 

Decentralized expert system for network-based crowdfunding


The invention relates to an expert system (10) having at least one central processing unit (k*) and having first and second processing units (k″, r) that can be determined by software download to client computers (c) that are connected via a network (www), wherein the expert system (10) is set up, based on a modeled transfer function for input data (e), to generate associated output data (a) and output them to connected client computers (c), wherein the expert system (10) is set up to record direct and/or indirect interactions of a user (n) of a client computer (c) as input data (e), wherein the expert system (10) has at least one server computer (s) with the central processing unit (k*), wherein the server computer (s) is set up to connect via the network (www) to a client computer (c) after a software download of the distributable first and second processing units (k″, r) onto the client computer (c), the latter occurring by means of a data-communicating connection, wherein the distributable second processing units (r) are configured to connect as peers to client computers (c) that are connected to the server computer (s) via the network (www) with a data-communicating connection, and—based on first input data derived from the respective user of the client computer (c) and second input data transmitted by other client computers (c)—to transmit a change in the output data (a) derived by the first processing unit (k″) to the server computer (s), and to transmit second input data derived by the second processing unit (r) to all of the other connected client computers (c), wherein the server computer (s) is set up to receive the derived change in the output data (a) from all of the connected client computers (c) and to use them as input data for the central processing unit (k*) in order to derive current values of the output data (a) and to transmit them to all of the connected client computers (c) again.. .
Crowd Ip Gmbh


06/18/15
20150169426 

Task based voting for fault-tolerant fail safe computer systems


A system includes a first application that writes a first plurality of tasks to a first memory buffer; a second memory buffer that receives a copy of the first plurality of tasks; a second application that writes a second plurality of tasks to a third memory buffer; and a fourth memory buffer that receives a copy of the second plurality of tasks. The system further includes a first comparison module that generates a first voting signal based on a first comparison between a first task and a second task.
Emerson Network Power - Embedded Computing, Inc.


06/18/15
20150169424 

Operation of i/o in a safe system


A module health system includes a module health circuit comprising a hardware register that is set to a first value in response to the system starting, an application register that is set to the first value in response to the system starting and a watchdog timer register that is set to the first value in response to the system starting. The system further includes a power on self-test that determines whether the system has passed a plurality of tests and that selectively sets the hardware register to a second value based on the determination, an external software application that determines whether a safety critical system is healthy and selectively sets the application register based on the determination, a watchdog timer application that selectively sets the watchdog timer register, a central processing unit that determines whether to de-assert a module health signal..
Emerson Network Power - Embedded Computing, Inc.


06/18/15
20150169367 

System and supporting adaptive busy wait in a computing environment


A system and method can support queue processing in a computing environment such as a distributed data grid. A thread can be associated with a queue in the computing environment, wherein the thread runs on one or more microprocessors that support a central processing unit (cpu).
Oracle International Corporation


06/18/15
20150169348 

Apparatus and control hypervisor to obtain faulting instruction


An apparatus for a hypervisor to obtain a faulting instruction, wherein the hypervisor runs between a physical machine including a central processing unit (cpu) and a virtual machine includes a content addressable memory (cam); a special-purpose register (spr) which is accessible by the hypervisor; and a control logic circuit with an input terminal connected to the cpu and an output terminal connected to the cam, the input terminal receiving data from an instruction fetching (if) stage and a write-back (wb) stage of a cpu instruction pipeline respectively, the output terminal causing instructions from the if stage of the cpu instruction pipeline to be stored into the cam and triggering the cam to output a faulting instruction among the instructions stored therein to the spr.. .
International Business Machines Corporation


06/18/15
20150169014 

Notebook metal hinge as heat sink element


A computing device can include a base portion housing a central processing unit, a heat exhaust element disposed within the base portion and operable to move air past the central processing unit, a display portion configured to display information to a user, and a metal hinge portion operably coupling the base portion to the display portion and being operable to couple the base portion to the display portion between an open and a closed configuration. The hinge portion can include a hollow cavity extending parallel to a longitudinal axis of the metal hinge and a longitudinal slot in a wall of the metal hinge and parallel to the longitudinal axis, where the longitudinal slot is positioned relative to the heat exhaust element so as to receive air moved by the heat exhaust element through the slot and into the hollow cavity..
Google, Inc.


06/11/15
20150163546 

Media device power management techniques


Techniques and architecture are disclosed for managing power use during operation of an electronic device capable of processing and/or playback of audio and/or video (av) content. In some instances, the disclosed techniques/architecture can be used, for example: (1) to stop decoding and/or rendering of av content upon detecting that a user wishes to stop or is otherwise unable to consume (e.g., hear/listen to or otherwise utilize) such av content; and/or (2) to continue/re-enable decoding and/or rendering of av content upon detecting that a user wishes or is otherwise able to continue/resume consumption thereof.
Intel Corporation


06/11/15
20150163169 

Information handling system employing unified management bus


An information handling system includes a host including a central processing unit, a first management controller (mc) enabled to communicate with the host, and a network interface resource (nir) in communication with the host and operable to enable the information handling system to communicate via an external network. The nir includes a unified management module (umm) operable to receive and route a local management packet, sent from the host, to the first management controller via a first unified management bus (umb) and further operable to receive and route a remote management packet, sent from a remote resource via the external network, to the first management controller via the first umb..
Dell Products L.p.


06/11/15
20150161070 

Method and system for managing bandwidth demand for a variable bandwidth processing element in a portable computing device


A method and system for managing bandwidth demand for a variable bandwidth processing element in a portable computing device (“pcd”) includes monitoring bandwidth requests of a plurality of constant bandwidth processing elements and monitoring bandwidth requests of a variable bandwidth processing element. The variable bandwidth processing element may be either a graphics processing unit (gpu) or a central processing unit (cpu).
Qualcomm Incorporated


06/11/15
20150160946 

Chip and starting method thereof


A starting method including, after being powered on, obtaining, by a central processing unit (cpu), a boot image file, where the boot image file includes universal boot code and differentiating boot code, the universal boot code is obtained by compiling a universal part in boot code of different chips, the universal boot code includes a first boot code segment and a second boot code segment; reading the first boot code segment from the boot image file, running the first boot code segment, and reading indication information of the differentiating boot code; reading, from the boot image file, the differentiating boot code according to the indication information of the differentiating boot code, and running the differentiating boot code; and running the second boot code segment, to complete booting of the chip to which the cpu belongs.. .
Huawei Technologies Co., Ltd.


06/11/15
20150160746 

Phased information providing system and method


In a terminal including a display unit, a central processing unit, and an input unit, when a phasic operation command having a specific phase is input onto the display unit, the input unit outputs the phasic operation command and the central processing unit recognizes the phase of the phasic operation command and outputs information corresponding to the recognized phase to the display unit. Without giving a screen switching command plural times, information correlated with information currently displayed on the screen can be effectively displayed on the display screen..

06/04/15
20150156034 

Tunnel management device, communication control device, and tunnel management method


A tunnel management device includes: a central processing unit configured to manage a tunnel that establishes a virtual network to be overlaid on a ip network; and a memory coupled to the central processing unit, wherein the central processing unit: extracts a second tunnel in the virtual network that uses a second route in the ip network where a number of times a portion of a first route in the ip network is used by a first tunnel in the virtual network is used is minimized.. .
Fujitsu Limited


06/04/15
20150154244 

Integrity checking and selective deduplication based on network parameters


An approach for managing a data package is provided. Network throughput is determined to exceed a threshold.
International Business Machines Corporation


06/04/15
20150154109 

Memory system controller including a multi-resolution internal cache


A memory system comprising a non-volatile memory and a controller in communication with the non-volatile memory is disclosed. The controller may include a central processing unit (“cpu”) and an internal cache in communication with the cpu via a plurality of cache lines.
Sandisk Technologies Inc.


06/04/15
20150154035 

Multiple sensors processing system for natural user interface applications


A natural user interface system and a method for natural user interface, the system may include an integrated circuit dedicated for natural user interface processing, the integrated circuit may include: a plurality of defined data processing dedicated areas to perform computational functions relating to a corresponding plurality of natural user interface features, to obtain the plurality of user interface features based on scene features detected by a plurality of sensors within a defined period of time; a central processing unit configured to carry out software instructions to support the computational functions of the dedicated areas; and at least one defined area for synchronized data management, to receive signals corresponding to detected scene features from the plurality of sensors and to route the signals to suitable dedicated areas of the plurality of dedicated areas to provide real-time acquiring of user interface features.. .
Inuitive Ltd.


06/04/15
20150153821 

Separating power domains of central processing units


A circuit includes a central processing unit (cpu), which includes a first memory block having a first power domain; and a core block signally connected to the first memory block and having a second power domain disconnected from the first power domain.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


06/04/15
20150153058 

Humidifier with automatic humidification control


A humidifier with automatic humidification control using a humidity sensor to detect surrounding humidity and a central processing unit to control on/off of an electric fan and a nebulizer (for example, ultrasonic oscillator) of a humidification unit, enabling the electric fan and the nebulizer to automatically perform a humidification action when the humidity detected by the humidity sensor is below a predetermined low level or to stop the humidification operation when the humidity detected by the humidity sensor surpasses a predetermined high level. As the electric fan and the nebulizer do not keep working continuously, the invention can save energy consumption and reduce component wear and prolong the lifespan of the humidifier..
Roolen Co., Ltd.


05/28/15
20150150118 

Hardware virtualization module for exclusive controlled access to cpu


In one embodiment, a method comprises providing an apparatus having exclusive access to each of one or more central processing units (cpus) of a computing system and exclusive access to host resources of the computing system; and controlling, by the apparatus, execution of a virtual machine in the computing system based on the apparatus controlling access to any one of the cpus or any one of the host resources according to prescribed policies for the virtual machine, the prescribed policies maintained exclusively by the apparatus.. .
Cisco Technology, Inc.


05/28/15
20150149832 

Bus pressure testing system and method thereof


A bus pressure testing system and method thereof are disclosed, where a peripheral component interconnect express (pci-e) device is used to initialize a central processing unit (cpu), peripheral component interface express (pci-e) device interface and memory according to a testing model, generate a data transmission path corresponding to the testing model, produce a pressure data stream by using the pci-e device, and test a bus for its pressure by flowing the pressure data transmission stream on the data transmission path. As such, the pressure testing may be enhanced in practicability..
Inventec (pudong) Technology Corporation


05/28/15
20150149807 

Computer device


A computer device is disclosed. The computer device includes a central processing unit (cpu), a chipset, an input/output (i/o) chip, a general purpose i/o (gpio) interface, and a smart battery.
Quanta Computer Inc.


05/28/15
20150149750 

Bios update with service processor without serial peripheral interface (spi) access


Certain aspects direct to bios update with a service processor (sp) without access through a serial peripheral interface (spi). In certain embodiments, the system includes a sp, which includes a processor, a non-volatile memory, a volatile memory and a system interface.
American Megatrends, Inc.


05/28/15
20150145866 

Method and graphical processing unit (gpu) accelerated large-scale web community detection


A method, non-transitory computer readable medium, and apparatus for large-scale web community detection using a graphical processing unit (gpu) are disclosed. For example, the method receives an input graph formatted into one or more first adjacency lists from a central processing unit (cpu), performs a first level shingling on the one or more first adjacency lists, sends the first level shingling to the cpu to generate an aggregate graph based upon the first level shingling, receives the aggregate graph formatted into one or more second adjacency lists from the cpu, performs a second level shingling on the one or more second adjacency lists and sends the second level shingling to the cpu to generate a dense sub-graph that identifies one or more web communities..
Xerox Corporation


05/28/15
20150145675 

Programmable wireless alarm device and the alarm system having the same


The present disclosure provides a programmable wireless alarm device comprising a detecting and input unit, a central processing unit, an output unit, an indicating unit and a wireless transmission unit. The central processing unit receives a detecting signal and an input signal from the detecting and input unit, and generates an alarm signal according to at least one of the detecting signal, the input signal and a control signal.
Everday Techology Co., Ltd.


05/21/15
20150138445 

Projector implementing projector apparatus having network functionality


Disclosed are a projector apparatus and a method for implementing a projector apparatus having network functionality. The projector apparatus includes: a network communication module, connected to a projector central processing unit (cpu) module, configured to provide the projector apparatus with network access functionality, and transmit/receive and process network data services under the control of the projector cpu module; the projector cpu module configured to, according to operation instructions of a user, control the network communication module and control the projector apparatus to project on a screen network data downloaded by the user acquired from the network communication module; and a human-computer interaction display, connected to the projector cpu module, configured to provide a human-computer interface for the user to operate the network data services, display for the user content of currently-running network data services and transmit the operation instructions of the user to the projector cpu module.
Zte Corporation


05/21/15
20150137958 

Wireless remote control


A system and method a wireless remote control solution is implemented in an integrated circuit (ic) and that ic is specified to the controller manufacturer. The controller manufacturer provides an ic-compatible electromechanical interface in communication with a central processing unit (cpu) of the controller.
Lumenradio Ab


05/14/15
20150134982 

Method of changing an operating frequency for performing a dynamic voltage and frequency scaling, system on-chip, and mobile device having the same


A method of changing an operating frequency for performing a dynamic voltage and frequency scaling on a central processing unit included in a system on-chip is provided. A previous maximum peak workload of the central processing unit is detected in a history period of the dynamic voltage and frequency scaling when the operating frequency of the central processing unit is determined to be increased, and an increased operating frequency is applied to the central processing unit.

05/14/15
20150134945 

Information processing device, information processing method, and recording medium storing control program


An information processing device, includes: a storage to store a program to be booted; a central processing unit to start a plurality of booting programs and read the program stored in the storage using a virtual address; a main memory to store the program based on a read instruction of the program; and a controller, including an address translator that translates a virtual address into a physical address, to read the program from the storage according to the read instruction, and write the read program in a plurality of discontinuous areas of the main memory on the physical address, wherein the central processing unit executes a start module which sets a virtual address space in the central processing unit and the controller before the plurality of booting programs are booted, and reads the written program from the main memory using the virtual address which is designated by the reading instruction.. .

05/14/15
20150130821 

System and dynamically throttling cpu frequency for gaming workloads


An example method of scaling a central processing unit (cpu) frequency of at least one cpu includes tracking an average quantity of graphics library calls made per graphics library draw call per frame of rendering. The method further includes detecting, based on tracking the average quantity of graphics library calls made per graphics library draw call per frame of rendering, a gaming workload on a computing device including a cpu.

05/14/15
20150130778 

Handheld electronic device and power saving method thereof


A handheld electronic device comprises a display, a backlight module, a video card and a central processing unit (cpu). The display comprises first and second display regions.

05/07/15
20150128253 

Multi-security-cpu system


A computing system includes a first security central processing unit (scpu) of a system-on-a-chip (soc), the first scpu configured to execute functions of a first security level. The computing system also includes a second scpu of the soc coupled with the first scpu and coupled with a host processor, the second scpu configured to execute functions of a second security level less secure than the first security level, and the second scpu executing functions not executed by the first scpu..
Broadcom Corporation


05/07/15
20150127968 

Separating power domains of central processing units


A circuit includes a central processing unit (cpu), which includes a first memory block having a first power domain; and a core block signally connected to the first memory block and having a second power domain disconnected from the first power domain.. .
Taiwan Semiconductor Manufacturing Company, Ltd.


05/07/15
20150127867 

Semiconductor device


A microcomputer includes a central processing unit (cpu) and a data transfer controller (dtc). The data transfer controller (dtc) reads out data transfer information including transfer mode information from a storage device (ram) or the like.
Renesas Electronics Corporation


04/30/15
20150121391 

Method and device for scheduling multiprocessor of system on chip (soc)


Provided are a method and apparatus for scheduling multiple processors of a system on chip (soc). The method includes: after receiving a task which is required to be executed, a main central processing unit (cpu) of a system on chip (soc) obtaining a dynamic execution parameter of the task (s502); according to one or more currently available subsidiary cpus in the soc, the main cpu determining a task allocation solution which meets the dynamic execution parameter (s504); and in accordance with the task allocation solution, the main cpu scheduling one or more subsidiary cpus to execute the task (s506).

04/30/15
20150121118 

Method and devices for controlling operations of a central processing unit


Control circuitry controls the operations of a central processing unit, cpu, which is associated with a nominal clock frequency. The cpu is further coupled to an i/o range and configured to deliver input to an application.
Omx Technology Ab


04/30/15
20150121107 

Cooperative reduced power mode suspension for high input/output ('i/o') workloads


Method of cooperative reduced power mode suspension for high input/output (‘i/o’) workloads, including: determining, by a transfer monitoring module, a size of a file to be transferred to a recipient, wherein the recipient includes a central processing unit (cpu) operating in a reduced power mode; determining, by the transfer monitoring module, a desired transfer rate for transferring the file to the recipient; calculating, by the transfer monitoring module, an expected transfer completion time in dependence upon the size of the file and the desired transfer rate; and sending, by the transfer monitoring module, a message to the recipient requesting that the cpu suspend the reduced power mode in dependence upon the expected transfer completion time.. .
International Business Machines Corporation


04/30/15
20150121094 

Cooperative reduced power mode suspension for high input/output ('i/o') workloads


Method of cooperative reduced power mode suspension for high input/output (‘i/o’) workloads, including: determining, by a transfer monitoring module, a size of a file to be transferred to a recipient, wherein the recipient includes a central processing unit (‘cpu’) operating in a reduced power mode; determining, by the transfer monitoring module, a desired transfer rate for transferring the file to the recipient; calculating, by the transfer monitoring module, an expected transfer completion time in dependence upon the size of the file and the desired transfer rate; and sending, by the transfer monitoring module, a message to the recipient requesting that the cpu suspend the reduced power mode in dependence upon the expected transfer completion time.. .
International Business Machines Corporation




Popular terms: [SEARCH]

Central Processing Unit topics: Central Processing Unit, Speech Recognition, User Interface, Storage Device, Alarm System, Constraints, Electronic Device, Embedded System, Application Program, Functional Specification, Control Flow, Application Programming Interface, Data Storage, Optical Fiber, Solid Structure

Follow us on Twitter
twitter icon@FreshPatents

###

This listing is a sample listing of patent applications related to Central Processing Unit for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Central Processing Unit with additional patents listed. Browse our RSS directory or Search for other possible listings.


0.5127

6086

0 - 1 - 103