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Central Processing Unit patents



      
           
This page is updated frequently with new Central Processing Unit-related patent applications. Subscribe to the Central Processing Unit RSS feed to automatically get the update: related Central RSS feeds. RSS updates for this page: Central Processing Unit RSS RSS


Programmable controller component with assembly alignment features

Rockwell Automation Technologies

Programmable controller component with assembly alignment features

Programmable controller component with assembly alignment features

Hon Hai Precision Industry

Power supply circuit for central processing unit

Date/App# patent app List of recent Central Processing Unit-related patents
01/29/15
20150033041
 Power supply circuit for central processing unit patent thumbnailnew patent Power supply circuit for central processing unit
A power supply circuit applied to a central processing unit (cpu) of a computer includes a pulse width modulation (pwm) controller, a control circuit, a first switch circuit, a second switch circuit, a first compensation circuit, a second compensation circuit, a first power circuit, and a second power circuit. When the computer is turned on, the pwm controller regulates duty cycles of pulse signals and outputs the regulated pulse signals to the first and second power circuits according to a first compensation signal, to provide a stable voltage to the cpu.
Hon Hai Precision Industry Co., Ltd.
01/29/15
20150033040
 Power supply circuit for central processing unit patent thumbnailnew patent Power supply circuit for central processing unit
A power supply circuit for supplying power to a central processing unit (cpu) of a computer includes a pulse width modulation (pwm) controller, a control circuit, a switch circuit, a first current protection circuit, a second current protection circuit, a first power circuit, and a second power circuit. When the computer is turned on, a first current protection threshold is set by the pwm controller through the first current protection circuit.
Hon Hai Precision Industry Co., Ltd.
01/29/15
20150032932
 Storage expansion apparatus and server patent thumbnailnew patent Storage expansion apparatus and server
A storage expansion apparatus and a server, where the storage expansion apparatus includes a quick path interconnect (qpi) interface module, which communicates with a central processing unit (cpu) through a qpi bus; a peripheral component interconnect express (pcie) interface module, which communicates with the cpu through a pcie bus; an interface selecting module, connected to the qpi interface module and the pcie interface module separately; a home agent (ha) module, connected to the interface selecting module; and a memory controller engine (mceng) module, connected to the ha module and the interface selecting module separately. The storage expansion apparatus may serve as a cpu memory capacity expansion device, and may also serve as storage expansion hardware of storage input and output (to)..
Huawei Technologies Co., Ltd.
01/29/15
20150029662
 Programmable controller component with assembly alignment features patent thumbnailnew patent Programmable controller component with assembly alignment features
A programmable logic controller (plc) assembly includes a bottom housing with a base, a first plurality of elongate alignment features extending from the bottom housing transverse to the base, and a first connection feature. The plc assembly includes a central processing unit with a circuit board and at least two receptacles therethrough configured to engage and slide along at least two of the first plurality of alignment features.
Rockwell Automation Technologies, Inc.
01/22/15
20150026520
 Debugging circuit patent thumbnailDebugging circuit
A debugging circuit comprises a debugging interface, a switch unit coupled to the debugging interface, a controller coupled to the switch unit, a platform controller hub (pch), and a central processing unit (cpu). The pch and the cpu are coupled to the switch unit.
Hon Hai Precision Industry Co., Ltd.
01/22/15
20150026398
 Mobile device and a  controlling the mobile device patent thumbnailMobile device and a controlling the mobile device
A mobile device including: a storage device; a system-on-chip (soc) including a central processing unit (cpu) and a memory interface configured to access the storage device in response to a request of the cpu; and a working memory including an input/output (i/o) scheduler and a device driver, the i/o scheduler configured to detect real time processing requests and store the real time processing requests in a sync queue, and detect non-real time processing requests and store the non-real time processing requests in an async queue, the device driver configured to adjust the performance of the mobile device based on the number of requests in the sync queue.. .
01/22/15
20150021598
 Solid-state imaging device and semiconductor display device patent thumbnailSolid-state imaging device and semiconductor display device
A solid-state imaging device increases the sn ratio of a signal even when external light intensity is low. The solid-state imaging device includes a sensor circuit that includes a light-receiving element, a first transistor that controls connection between a first wiring and a node in which the amount of accumulated charge is determined by the amount of exposure to the light-receiving element, a second transistor whose on or off state is selected in accordance with the potential of the node, and a third transistor that controls connection between a second wiring and a third wiring together with the second transistor; a central processing unit that selects a first driving method or a second driving method in accordance with external light intensity; and a controller that controls a potential supplied to the gate of the first transistor in accordance with the first driving method or the second driving method..
Semiconductor Energy Laboratory Co., Ltd.
01/22/15
20150021478
 Non-destructive sugar content measuring apparatus patent thumbnailNon-destructive sugar content measuring apparatus
A non-destructive sugar content measuring apparatus is provided and includes a measuring sensor portion for including a spectral sensor which receives a near infrared ray from the light which is reflected by the flesh fb of the fruit f of which the sugar content is measured, an led light source which has leds circularly arranged, an optical sensor which receives light reflected by a flesh of a fruit f, and a temperature sensor; a casing including a measuring sensor portion and has a panel portion which has a digital display for displaying a brix value as a digital value and operational switches, the panel portion and the operational switches being mounted on a front face thereof; a main circuit board pb for including a central processing unit (cpu) which is embedded in the casing and processes electric signals from the light sensor and performs a calculation and determination. .
Daesung Tech Co., Ltd.
01/22/15
20150021393
 Currency keeper patent thumbnailCurrency keeper
An electronic safe which incorporates consumer programmable buttons, along with an on-board central processing unit.. .
The Gilbertson Group, Inc.
01/15/15
20150019883
 Power supply circuit for central processing unit patent thumbnailPower supply circuit for central processing unit
A power supply circuit for a central processing unit (cpu) includes a comparing circuit, first to third switch circuits, first and second compensation circuits, a pulse width modulation (pwm) controller, a first power circuit connected to a first output pin of the pwm controller, and a second power circuit connected to a second output pin of the pwm controller. When a motherboard operates normally, the comparing circuit outputs a first control signal to control the first and third switch circuits to be turned on.
Hong Fu Jin Precision Industry (shenzhen) Co., Ltd.
01/15/15
20150019847

Programmable cpu register hardware context swap mechanism


A central processing unit (cpu) having an interrupt unit for interrupting execution of instructions, a plurality context defining register sets, wherein each set of registers having the same number of cpu registers, a switching unit for coupling a selected register set within the cpu, wherein the switching unit switches to a predetermined register set of the plurality of context defining register sets upon occurrence of an exception, and a control register configured to control selection of a register set of the plurality of context defining register initiated by an instruction and further operable to indicate a currently used context.. .
Microchip Technology Incorporated
01/15/15
20150019825

Sharing virtual memory-based multi-version data between the heterogeneous processors of a computer platform


A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors comprising a central processing unit (cpu) and a graphics processing unit (gpu) and a shared virtual memory supported by a physical private memory space of at least one heterogeneous processor or a physical shared memory shared by the heterogeneous processor.
01/15/15
20150019798

Method and providing dual memory access to non-volatile memory


A method and system for providing a dual memory access to a non-volatile memory device using expended memory addresses are disclosed. The digital processing system such as a computer includes a non-volatile memory device, a peripheral bus, and a digital processing unit.
Cnexlabs, Inc.
01/15/15
20150019779

Microcomputer


To detect an abnormality in an interrupt control system without completely depending on dualization of a circuit, without the need to create a test pattern for a built-in self-test by spending time, and without considerably increasing an amount of power consumption. A test interrupt request is generated periodically using a timer or the like in an interrupt signal system from an interrupt controller to a central processing unit, the state of an interrupt request flag within the interrupt controller is checked in an interrupt processing routine, and in the case where it is detected that the same interrupt request flag is kept in a set state twice or more in succession, it is supposed that there is a high possibility that a failure has occurred in the interrupt signal system and it is considered that there is an abnormality..
Renesas Electronics Corporation
01/08/15
20150012736

Server and booting method


A server including a basic input output system (bios), a control unit and a plurality of central processing units (cpus), and a booting method are provided. The bios outputs a booting signal.
Inventec (pudong) Technology Corporation
01/08/15
20150011309

Qr code scoring system


A videogame, method, or system incorporates the use of a qr code which is produced by a central processing unit of a game, and is scanned by the player's or user's mobile communication device such as a smartphone. The smartphone's means for network connection to the internet is then used to communicate the game's data to a server associated with the game.
Raw Thrills, Inc.
01/08/15
20150010441

Electronic pregnancy test device


A handheld, readily portable, electronic pregnancy test device including a central processing unit in operational communication with a human chorionic gonadotropin hormone sensor able to detect a level of human chorionic gonadotropin in a blood sample disposed upon a test strip, said test strip loaded into the device through a test strip portal, wherein a pregnancy is verifiable and human chorionic gonadotropin doubling times are immediately calcuble whereby the health of the pregnancy is determinable absent direct medical assistance.. .
01/08/15
20150010148

Key management using security enclave processor


An soc implements a security enclave processor (sep). The sep may include a processor and one or more security peripherals.
Apple Inc.
01/08/15
20150009534

Operation apparatus, image forming apparatus, controlling operation apparatus, and storage medium


A multifunction peripheral (mfp) provided with an operation apparatus according to the present invention includes a liquid crystal display for displaying a preview image of a predetermined page of a file having a plurality of pages, a touch screen for detecting an operation pattern based on a user's touch operation performed on a display surface of the liquid crystal display, and a central processing unit (cpu) for switching the preview image to a preview image of another page of the file or a preview image of a predetermined page of another file according to the operation pattern detected by the touch screen while the preview image is being displayed.. .
Canon Kabushiki Kaisha
01/01/15
20150006953

System and a hardware shadow for a network element


A method and apparatus of a device that uses a hardware shadow for a central processing unit failover is described. In an exemplary embodiment, a device receives a signal that the active central processing unit has failed, where the active central processing unit controls the processing functions of the network element and the network element includes a hardware forwarding engine and a hardware shadow.
01/01/15
20150006871

Controlling access to storage in a computing device


In an embodiment, a computing device may include a control unit. The control unit may acquire a request from a central processing unit (cpu), contained in the computing device, that may be executing a basic input/output system (bios) associated with the computing device.
01/01/15
20150006782

Switching a computer system from a high performance mode to a low power mode


A computer system includes a first processor, a second processor, and a common memory connected to the second processor. The computer system is switched from a high performance mode, in which at least a portion of the first processor and at least a portion of components on the second processor are active, to a low power mode, in which at least a portion of the first processor is active and the components on the second processor are inactive.
Advanced Micro Devices, Inc.
01/01/15
20150006773

Control device and image forming apparatus


A control device includes an apparatus controller that is connected to at least one apparatus and includes a first memory which stores data for controlling the driving of the apparatus and data indicating a state of the apparatus and a reading and transmitting unit which reads each data item stored in the first memory and transmits the read data, a main controller that includes a central processing unit, a second memory, and a writing unit which writes the data transmitted from the apparatus controller to the second memory, and a full-duplex serial bus that connects the main controller and the apparatus controller. The reading and transmitting unit and the writing unit operate such that each data item stored in the first memory is read, transmitted, and stored in the second memory in a cycle equal to or less than a count cycle of a system timer..
Fuji Xerox Co., Ltd.
01/01/15
20150003238

System and management and control of communication channels


A system and method (here and after as the “inventive concept”) allows controlling and managing channels of communications between users. The invention includes a central processing unit which includes a software with a channel control algorithm that allocates available capacity of time between the users, i.e.
01/01/15
20150002682

High definition camera


Systems and methods are disclosed for sharing images by taking one or more images using a portable camera with a high definition (hd) imager; processing the image using a central processing unit (cpu) or a graphic processing unit (gpu) in the camera; and sharing the image or video over a social network or skype video conferencing network.. .
01/01/15
20150002406

Low-latency touch feedback


Embodiments of the present invention generally provide a touch screen controller coupled to a touch sensor, a display, and a central processing unit. The touch screen controller is configured to detect first touch input received by the touch sensor and change a visual characteristic of the display upon detecting the first touch input.
Synaptics Incorporated
12/25/14
20140379967

Clock signal generator for a digital circuit


A computer has a mother board upon which is mounted, a millimetre wave oscillator and a central processing unit (cpu). The millimetre wave oscillator is operable to generate a clock signal and transmit this to the cpu via a link.
Fenton Systems Ltd
12/25/14
20140379405

Modifying service levels in online meeting system


Systems, methods and computer program products for modifying of service levels based on contextual data of meeting entries in electronic calendars. An example system includes an electronic calendar module executed by a central processing unit.
International Business Machines Corporation
12/25/14
20140379403

Modifying service levels in online meeting system


Systems, methods and computer program products for modifying of service levels based on contextual data of meeting entries in electronic calendars. An example system includes an electronic calendar module executed by a central processing unit.
International Business Machines Corporation
12/25/14
20140378788

Computer assessing dynamic bone quality


A computer system for assessing dynamic bone quality is provided, including a memory that stores executable instructions, a central processing unit (cpu) capable of accessing the memory and executing the instructions to provide an output, and a receiver for receiving data input and transmitting it to the cpu, wherein the receiver is operably connected to: (1) a plurality of accelerometers, each accelerometer adapted to contact an exterior surface of a human subject at a load-bearing anatomical site and to receive input from each point of contact including acceleration response data; and (2) a force plate adapted to receive input including vertical ground reaction force data provided by a heel strike on the force plate, wherein the cpu executes the instructions to process the input data transmitted from the receiver to provide the output as a bone damping value. A method for assessing dynamic bone quality is also provided..
University Of Cincinnati
12/25/14
20140376736

Control circuit for controlling audio signal output of earphone


A control circuit for audio signal outputting of an earphone includes a central processing unit (cpu), an audio codec, an amplifier, and a detecting circuit. The audio codec receives audio signals from the cpu, and decodes the audio signals.
Chiun Mai Communication Systems, Inc.
12/25/14
20140376649

Terminal device and sending periodic signal


A terminal device includes a central processing unit, a data memory, a first selector, and a digital-to-analog conversion module. The data memory includes a first data storage apparatus and a second data storage apparatus.
Huawei Technologies Co., Ltd.
12/25/14
20140375453

System for detecting an intrusion attempt inside a perimeter defined by a fence


The present invention relates to a system for detecting an intrusion attempt inside a perimeter defined by a fence including panels attached onto posts, comprising a means for detecting shocks and/or vibrations (4), which is connected to a remote station (7). Said system is characterized in that it comprises at least one housing (1) including at least one central processing unit or cpu (2), which is connected to at least one memory unit (3), to at least one shock and/or vibration detector (4), and to at least one field bus (5, 6) and/or at least one video bus (27, 28), each housing (1) being self-contained and connected to another housing (1) and/or to at least one remote station (102) for transmitting at least one computer file generated by the central processing unit (2) when a shock and/or vibrations are detected by one of the housings (1).
Inoxys S.a.
12/18/14
20140372802

Failure detection in high-performance clusters and computers using chaotic map computations


A programmable media includes a processing unit capable of independent operation in a machine that is capable of executing 1018 floating point operations per second. The processing unit is in communication with a memory element and an interconnect that couples computing nodes.
Ut-battelle, Llc
12/18/14
20140368505

Graphics processing subsystem for recovering projection parameters for rendering effects and use thereof


A graphics processing subsystem for recovering projection parameters for rendering effects and a method of use thereof. One embodiment of the graphics processing subsystem includes: (1) a memory configured to store a buffer having a plurality of constants determinable upon execution of an application for which a scene is rendered, and (2) a central processing unit (cpu) operable to determine projection parameters from the buffer according to shader-reflection metadata attached to a programmable shader submitted for execution, and employ the projection parameters to cause an effect to be rendered on the scene by a graphics processing unit (gpu)..
Nvidia Corporation
12/18/14
20140366481

Automated construction machinery and method


An automated block or brick construction apparatus is provided by adapting a base transport assembly with a specialized working platform for brick, block and mortar. The working platform houses at least one robotic arm to accurately position mortar and block or brick in place on a wall construction.
12/11/14
20140366162

Starvationless kernel-aware distributed scheduling of software licenses


Methods, systems, and apparatuses for implementing shared-license software management are provided. Shared-license software management may be performed by generating a request for a license for running a process of a shared-license software application.
12/11/14
20140366029

User datagram protocol (udp) packet migration in a virtual machine (vm) migration


Embodiments of the invention relate to receiving, by a first processor comprising a processing device, an indication that a migration of a virtual machine from the first processor to a second processor is to occur. The first processor transmits user datagram protocol (udp) packets intended for the virtual machine to the second processor based on the indication.
12/11/14
20140366028

User datagram protocol (udp) packet migration in a virtual machine (vm) migration


Embodiments of the invention relate to receiving, by a first processor comprising a processing device, an indication that a migration of a virtual machine from the first processor to a second processor is to occur. The first processor transmits user datagram protocol (udp) packets intended for the virtual machine to the second processor based on the indication.
12/11/14
20140365832

Techniques and configurations for communication between devices


Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices.
12/11/14
20140364223

System and improving the graphics performance of hosted applications


An application/game server comprising a central processing unit to process application/video game program code and a graphics processing unit (gpu) to process graphics commands and generate a series of video frames for the application/video game; one or more back buffers to store video frames as the video frames are being created in response to the execution of the graphics commands; a front buffer-outputting the video frame for display one scan line at a time at a designated scan out frequency, a subset of scan lines stored in the front buffer being associated with a vertical blanking interval (vbi); and a frame processing module to begin copying a newly completed frame from the back buffer to the front buffer before the video data for a prior video frame stored in the front buffer has not been fully scanned out.. .
12/11/14
20140364079

Method and advanced topology (at) policy management for direct communication between wireless transmit/receive units (wtrus)


A method and apparatus for advanced topology (at) policy management for direct communication between wireless transmit/receive units (wtrus) is described. A wtru configured to communicate directly with at least one other wtru in an at mode of operation includes a memory, a central processing unit and an at policy unit that is separate from the cpu.
12/11/14
20140362745

Central processing unit and methods for supporting coordinated multipoint transmission in an lte network


Embodiments of a central processing unit and methods for supporting coordinated multi-point (comp) transmissions in a 3gpp lte network with non-ideal backhaul links are generally described herein. In some embodiments, the cpu may be arranged for scheduling and assigning resources for subordinate enhanced node bs (enbs) over the backhaul links for comp transmissions.
12/11/14
20140362576

Computer architecture


An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (gpu) board, a central processing unit (cpu) board, an input/output (i/o) interface board, an interconnect board, and a power supply unit (psu)..
12/11/14
20140362214

Apparatus and processing image signal


An apparatus and a method are arranged to process an image signal including: a central processing unit (cpu) which outputs a digital image corresponding to an input image from an image collection apparatus to an image display apparatus; a controller, or micom, which monitors an operation state of the cpu, and outputs a control signal depending on occurrence of an error in the cpu; and an image switch which switches an image output mode to one of a digital image mode and an analog image mode according to the control signal which is output through the micom in an input terminal of the cpu.. .
12/11/14
20140362093

Graphics effect data structure and use thereof


A graphics effect data structure and method of use thereof. One embodiment of the graphics effect data structure is embodied in an effect processing system, including: (1) a memory configured to store an effect data structure that describes a graphics effect implemented by a plurality of passes and shader code modules contained in the effect data structure, (2) a graphics processing unit (gpu) operable to render the graphics effect according to a shader program based on the shader code modules, assembled according to the plurality of passes, and (3) a central processing unit (cpu) configured to execute an application that employs the graphics effect and to gain access to the effect data structure during run time, at which time the shader program is passed to the gpu for processing..
12/11/14
20140361893

Computer input/output interface


An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (gpu) board, a central processing unit (cpu) board, an input/output (i/o) interface board, an interconnect board, and a power supply unit (psu)..
12/11/14
20140361671

Computer internal architecture


An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (gpu) board, a central processing unit (cpu) board, an input/output (i/o) interface board, an interconnect board, and a power supply unit (psu)..
12/04/14
20140359312

Power on with near field communication


A system for powering up a computer having a central processing unit (cpu), which cpu includes an operating system (os), when the cpu is in an sx state in which the (os) is not powered up. There is a near field communication (nfc) detector for detecting an nfc signal, and an embedded controller physically separate from said cpu, the embedded controller responsive to the nfc signal and adapted to power up the cpu out of said sx state..
12/04/14
20140359191

Adc sequencing


A device comprises a central processing unit (cpu) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (adc controller) configured for managing an analog-to-digital converter (adc) using the memory descriptors.
12/04/14
20140359180

Method for providing a generic interface and microcontroller having a generic interface


A microcontroller for a control unit, in particular for a vehicle control unit, includes a central processing unit (cpu), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable in such a way that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill functions corresponding to one of multiple serial interfaces, in particular of spi, uart, lin, can, psi5, flexray, sent, ic2, msc or ethernet.
12/04/14
20140359179

Method for providing a generic interface and microcontroller having a generic interface


A microcontroller for a control unit, in particular for a vehicle control unit, includes a central processing unit (cpu), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable in such a way that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill functions corresponding to one of multiple serial interfaces, in particular of spi, uart, lin, can, psi5, flexray, sent, ic2, msc or ethernet..
12/04/14
20140359178

Method for providing a generic interface and microcontroller having a generic interface


A microcontroller for a control unit or a vehicle control unit, includes a central processing unit (cpu), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable so that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill the functions corresponding to one of multiple serial interfaces, in particular of spi, uart, lin, can, psi5, flexray, sent or ethernet.
12/04/14
20140357195

Encoded information reading terminal with wireless path selecton capability


A portable encoded information reading (eir) terminal for incorporation in a data collection system can comprise a terminal module communicatively coupled to a wireless interface module via a wired interface. The terminal module can include a central processing unit (cpu), a memory, and an encoded information reading (eir) device.
11/27/14
20140351810

Management of supervisor mode execution protection (smep) by a hypervisor


Approaches for enabling supervisor mode execution protection (smep) for a guest operating system which does not support smep. A guest operating system (os), which does not support smep, is executed within a virtual machine.
11/27/14
20140351466

Host/client system having a scalable serial bus interface


According to one exemplary embodiment, a system is provided. The system includes a system bridge, a host module including a central processing unit (cpu) coupled to the system bridge, a scalable serial bus coupled to the system bridge, a client controller coupled to the system bridge via the scalable serial bus, and first and second clients coupled to the client controller.
11/27/14
20140351316

System and securing web services


A method and system for securing web services on one or more server computers by one or more client computers, the computers connected to one or more networks through one or more network interfaces, each computer having one or more memories and one or more central processing units (cpus), the system comprising one or more logical expressions that define constraints on one or more service releases; a gateway process receiving service request messages from one or more of the clients for i) identifying the service request message, ii) processing the service request message in accordance with one or more of the logical expressions associated with the requested service and iii) providing access to the requested service if the constraints are satisfied. The system includes an agent process associated with one or more the clients, for receiving service request messages from an associated client, the message destined for a requested service and applying to the received request message one or more of a subset of the logical expressions associated with the requested service for forwarding to the gateway process..
11/27/14
20140350783

System and display of information using a vehicle-mount computer


A system and method display information using a vehicle-mount computer. The system includes: (i) a computer touch screen for inputting and displaying information; (ii) a motion detector for detecting vehicle motion; and (iii) a vehicle-mount computer in communication with the computer touch screen and the motion detector.
11/27/14
20140350782

System and display of information using a vehicle-mount computer


A system and method displays information using a vehicle-mount computer. The system includes (i) a computer touch screen for inputting and displaying information; (ii) a motion detector for detecting vehicle motion; (iii) a proximity sensor for detecting proximity to an item; and (vi) a vehicle-mount computer in communication with the computer touch screen, the motion detector, and proximity sensor, the vehicle-mount computer including a central processing unit and memory.
11/27/14
20140350739

Sensors for power distribution network and electrical grid monitoring system associated therewith


A network of sensors is associated with a power distribution network. Sensors are positioned at each connecting line in the vicinity of each node of the power distribution network.
11/27/14
20140348182

Time synchronization between nodes of a switched interconnect fabric


A data processing node includes a local clock, a slave port and a time synchronization module. The slave port enables the data processing node to be connected through a node interconnect structure to a parent node having time-based functionality thereof that is operating in accordance with a fabric time of the node interconnect structure.
11/27/14
20140347372

Load balancing between general purpose processors and graphics processors


Disclosed are various embodiments for facilitating load balancing between central processing units (cpus) and graphics processing units (gpus). A request is obtained to execute a first application in one or more computing devices.
11/27/14
20140347371

Graphics processing using dynamic resources


A system has a central processing unit (cpu) and a graphics processing unit (gpu) that includes one or more registers. The gpu can change a resource descriptor in one of the gpu's registers.
11/20/14
20140344590

Electronic device and power management method


An electronic device includes a central processing unit (cpu), a plurality of power driving circuits, and a control unit. The control unit includes a microcontroller and a storage electronically connected to the microcontroller, the microcontroller is electronically connected to the cpu and the power driving circuits.
11/20/14
20140340260

Digital beamforming antenna and datalink array


A method and system for beamforming a multi-element array using time delays is provided. The array includes transmit array elements and receive array elements.
11/13/14
20140337969

Portable computer and operating method thereof


A portable computer and an operating method thereof are provided. The portable computer comprises an input device, a power button, a non-volatile memory, a central processing unit (cpu), an embedded controller (ec), and a chipset.
11/13/14
20140337858

Apparatus and adaptive context switching scheduling scheme for fast block input and output


Provided is a method and apparatus for an adaptive context switching for a fast block input/output. The adaptive context switching method may include: requesting, by a process, an input/output device to perform an input/output of data; comparing a central processing unit (cpu) effectiveness based on whether the context switching is performed; and performing the input/output through the context switching to a driver context of the input/output device, or directly performing, by the process, the input/output based on a comparison result of the cpu effectiveness..
11/13/14
20140337313

Executing database queries using multiple processors


A system and a method are disclosed for efficiently executing database queries using a computing device that includes a central processing unit (cpu) and a processing unit based on single instruction multiple thread (simt) architecture, for example, a gpu. A query engine determines a target processing unit to execute a database query based on factors including the type and amount of data processed by the query, the complexity of the query, and the current load on the processing units.
11/13/14
20140337286

Systems and methods for construction field management and operations with building information modeling


The invention generally relates to systems and methods for construction field management and operations with building information modeling. In certain embodiments, the invention provides systems for construction field management and operations, that include a central processing unit (cpu), and storage coupled to the cpu for storing instructions that when executed by the cpu cause the cpu to: encode and map data structures and data sets received from building information modeling software; select particular data structures and data sets relevant to at least one person associated with a construction project; transmit the selected data structures and data sets to a user terminal operated by the person; receive inputs made by the person to the selected data structures and data sets; and synchronize and update the data structures and data sets received from building information modeling software based on the inputs received from the person..


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Central Processing Unit topics: Central Processing Unit, Speech Recognition, User Interface, Storage Device, Alarm System, Constraints, Electronic Device, Embedded System, Application Program, Functional Specification, Control Flow, Application Programming Interface, Data Storage, Optical Fiber, Solid Structure

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