This page is updated frequently with new Cells-related patent applications.
|| List of recent Cells-related patents
|Techniques for transmitting a control channel and a data channel over multiple component carriers|
Certain aspects of the present disclosure relate to transmitting control and data channels over multiple carriers in wireless communications. Configuration information can be obtained for a plurality of component carriers configured by one or more cells.
|Managing sounding reference signals in a wireless device|
A wireless device receives a control message comprising configuration parameters of a plurality of cells grouped into a plurality of cell groups. The wireless device transmits a first sounding reference signal (srs) in a first cell group overlapping in time with transmission of a first random access preamble in a second cell group.
Ofinno Technologies, Llc
|Scheduling requests in small cell networks|
A small cell network in which a terminal is simultaneously served by a macro cell and one or more small cells. These may operate at different frequencies, and may have different bandwidths, traffic loading and support different qos (quality of service).
|Wireless multicarrier random access process|
A base station transmits a control command for transmission of a random access preamble on a secondary cell if the base station determines radio resources of the secondary cell are required for transmission of a portion of data and that the secondary cell requires a different uplink timing from currently activated and synchronized cells of the wireless device. The base station transmits at least one control packet for comprising transport format information and resource allocation information for transmission of a plurality of packets of the data to be transmitted on the secondary cell..
Ofinno Technologies, Llc
|Reference signal configuration for coordinated multipoint|
Coordinated multipoint (comp) involves multiple transmission points or cells coordinating their individual transmissions so that a target user equipment (ue) experiences enhanced signal reception and/or reduced interference. In order to optimally implement downlink comp, a serving cell needs to obtain channel state information (csi) for the downlink channels from the multiple transmission points to the ue.
|Information acquiring method, parameter optimizing method and apparatuses thereof and system|
Embodiments of the present disclosure provide an information acquiring method, parameter optimizing method and apparatuses thereof and a system. The method includes: receiving, by a first base station, information transmitted by user equipment, or a second base station, or a third base station; wherein, the information comprises relevant information used by a network side to determine cell types of the first base station and the second base station when handover initiation or link failure occurs, or comprises an absolute time when handover initiation or link failure occurs in the user equipment.
|Flat panel photovoltaic system|
A flat panel photovoltaic (pv) system is provided formed from a first sheet with rows of concentrated iii-v photovoltaic (cpv) solar cells. An overlying second sheet is made up of rows of waveguides, where each waveguide is coupled to a corresponding cpv solar cell.
Sharp Laboratories Of America (sla), Inc.
|Solar panel system with monocoque supporting structure|
A solar panel system comprises a monocoque forming an enlarged self-supporting solar-facing generally-convex support surface when in an installed position supports solar cells attached (or formed directly on it) at optimal angles for capturing solar energy. The monocoque provides a stressed-skin or stiff-sheet support reducing weight while maintaining strength and minimizing cost.
|Method for cell balancing for a plurality of battery cells, and battery system for performing such a method|
A method for cell balancing for a plurality of battery cells. Such a method involves the cell balancing being performed on the basis of a need that can be ascertained comparatively accurately.
Robert Bosch Gmbh
|Method for the switching of a number of battery cells in a battery and battery system with a battery comprising a number of battery cell units, each comprised of a battery cell and a battery cell monitoring module associated with said battery cell|
A method for the switching of a number of battery cells in a battery which is configured as an electrochemical storage device, wherein each of the battery cells is electrically connected to the battery in accordance with a corresponding first probability p1i, and is electrically disconnected from the battery in accordance with a corresponding second probability p2i, and wherein the battery cells are mutually connectable in series. According to the method, a performance factor gi is calculated for each battery cell as a sum of a function, which, specifically, is linearly dependent upon a state of charge lzi of the corresponding battery cell, and a second function which, specifically, is linearly dependent upon a product of a current value of a current which flows in the corresponding battery cell when the corresponding battery cell is electrically connected to the battery and the internal resistance of the corresponding battery cell..
Robert Bosch Gmbh
Methods relating to monitoring fuel cells
The invention relates to a method of determining water accumulation in and or removal from a fuel cell, the method comprising circulating fuel gas in the anode side of the fuel cell for producing electric energy in a fuel cell process, providing at least two purge pulses from the fuel circulation, analyzing the composition and/or volume of purged gas of said at least two gas purge pulses for determining the amount of water accumulation in and/or removal from the fuel cell.. .
Teknolgian Tutkimuskeskus Vtt Oy
Battery with integrated fuse
Battery, comprising a housing (2), and one or more battery cells (3), a primary positive battery terminal (4) and a primary negative battery terminal (6) disposed in the housing (2). The electrical circuit between the primary positive battery terminal (4) and primary negative terminal (6) comprises a series and/or parallel configuration of the one or more battery cells (3) as well as a series connection of a fuse element (11), wherein the fuse element (11) is located inside the housing (2) and has a current rating of at least 250 a..
Super B B.v.
Monolithically integrated thin-film electronic conversion unit for lateral multijunction thin-film solar cells
An integrated thin-film lateral multi junction solar device and fabrication method are provided. The device includes, for instance, a substrate, and a plurality of stacks extending vertically from the substrate.
International Business Machines Corporation
Solar cell module and manufacturing the same
A solar cell module, a method for manufacturing the solar cell module, a solar power system, and an interconnection ribbon are provided. The solar cell module includes a plurality of solar cells which are connected in series or in parallel through interconnection ribbons, wherein the interconnection ribbons have a zigzag shape to reduce tension generated according to bending of the solar cell module..
Korea Institute Of Energy Research
Collector grid and interconnect structures for photovoltaic arrays and modules
An interconnected arrangement of photovoltaic cells is achieved using laminating current collector electrodes. The electrodes comprise a pattern of conductive material extending over a first surface of sheetlike substrate material.
Using solar cells as bypass diode heat sinks
A solar panel includes a plurality of solar cells, a bypass diode unit, and a heat spreader. The bypass diode unit includes a bypass diode coupled in an electrical shunting configuration across at least a first solar cell of the plurality of solar cells to bypass current around at least the first solar cell in an event of failure of the first solar cell.
System and deploying radiation energy conversion cells
A radiation energy conversion system comprises: an environmental barrier cover having a barrier cover inner surface; an environmental barrier enclosure supporting the environmental barrier cover, the environmental barrier enclosure having a barrier enclosure internal surface extending to the barrier cover inner surface; a radiation-tranparent optic disposed in at least one of the environmental barrier cover and the environmental barrier enclosure; and at least one radiation energy conversion cell secured to at least one of the barrier enclosure internal surface and the barrier cover inner surface.. .
Non-volatile memory devices with thin-film and mono-crystalline silicon transistors
A non-volatile memory device combines thin-film transistor-based memory cells with bulk mono-crystalline silicon transistors, which can more efficiently drive bit lines for fast sensing of the stored data in the thin-film memory cells.. .
Resistance-change semiconductor memory
According to one embodiment, a memory includes first to fourth memory cells aligned in a first direction. Each of the first to fourth memory cells comprises a cell transistor having a gate connected to a word line extending in a second direction crossing the first direction and a resistive memory element having one end connected to a first source/drain region of the cell transistor.
Kabushiki Kaisha Toshiba
Metal line connection for improved rram reliability, semiconductor arrangement comprising the same, and manufacture thereof
Some embodiments relate to an integrated circuit device including an array of memory cells disposed over a semiconductor substrate. An array of first metal lines are disposed at a first height over the substrate and are connected to the memory cells of the array.
Taiwan Semiconductor Manufacturing Co., Ltd.
Semiconductor memory device
A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells.
Kabushiki Kaisha Toshiba
Semiconductor memory device and manufacturing same
According to one embodiment, a semiconductor memory device includes a substrate; a memory cell array including a plurality of memory cells and stacked on the substrate; a first transistor; an interlayer insulating layer covering the first transistor; and a first contact portion. The first transistor includes a first gate insulating film which is disposed on the substrate, a first gate electrode which is disposed on the first gate insulating film, and a first semiconductor layer which includes an upper surface at a higher position than an interface between the substrate and the first gate insulating film and a bottom surface at a deeper position than the interface between the substrate and the first gate insulating film.
Kabushiki Kaisha Toshiba
Memory hole structure in three dimensional memory
In a three dimensional nonvolatile memory, memory holes extend vertically through two or more physical levels in which memory cells are formed. Memory hole structures are formed in memory holes to include vertical channels.
Sandisk Technologies Inc.
Memory having a continuous channel
The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical stack having memory cells connected in series between a source select gate and a drain select gate, wherein forming the vertical stack includes forming a continuous channel for the source select gate, the memory cells, and the drain select gate, and removing a portion of the continuous channel for the drain select gate such that the continuous channel is thinner for the drain select gate than for the memory cells and the source select gate..
Micron Technology, Inc.
Method for manufacturing a semiconductor switching device with different local cell geometry
A method for manufacturing a semiconductor device includes providing a semiconductor substrate having an outer rim, an active area, and an edge termination region arranged between the active area and the outer rim, and forming a plurality of switchable cells in the active area. Each of the switchable cells includes a body region, a gate electrode structure, and a source region.
Infineon Technologies Austria Ag
Test system simultaneously testing semiconductor devices
Individual memory chips are simultaneously tested by a tester using selectively enabled stress modules that apply a corresponding stress test to memory cells, wherein each stress test is associated with a corresponding failure attribute for the memory cells. Built-in self-test (bist)/built-in self-stress (biss) circuitry is provided in each stress module and may configured to selectively apply one or more stress test(s) during the simultaneous testing of a plurality of memory chips..
Non-volatile semiconductor memory having multiple external power supplies
A memory device includes core memory such as flash memory for storing data. The memory device includes a first power input to receive a first voltage used to power the flash memory.
Conversant Intellectual Property Management Inc.
Nonvolatile memory device and program method thereof
According to example embodiments of inventive concepts, a nonvolatile memory device includes at least two strings that are vertically stacked on a substrate and share one bit line. A program method of the nonvolatile memory device includes setting a pre-charge condition on the basis of a disturb environment between the at least two cell strings, pre-charging or not pre-charging an unselected cell string among the at least two cell strings in response to the pre-charge condition and programming memory cells in a selected cell string among the at least two cell strings..
Non-volatile split gate memory device and a operating same
A non-volatile memory device that a semiconductor substrate of a first conductivity type. An array of non-volatile memory cells is in the semiconductor substrate arranged in a plurality of rows and columns.
Silicon Storage Technology, Inc.
Bit line pre-charge with current reduction
Disclosed herein are techniques for pre-charging channels when programming memory cells. A pre-charge voltage is applied to both selected bit lines and inhibited bit lines during a channel pre-charge phase.
Sandisk Technologies Inc.
A semiconductor device includes memory strings each including a drain select transistor, memory cells and a source select transistor, which are connected between a bit line and a common source line and suitable for operating based on voltages applied to a drain select line, word lines and a source select line, respectively, and an operation circuit suitable for performing a pre-program operation, an erase operation and a post-program operation on the memory strings. The operation circuit sequentially performs erase operations on the drain select transistors included in the memory strings..
Sk Hynix Inc.
Fast secure erase in a flash system
A flash memory controller is configured to provide a first erase mode for erasing one or more groups of flash memory cells in a flash memory device using a plurality of erase pulses and a second erase mode for erasing the one or more groups of flash memory cells using a single erase pulse. The controller may receive a fast erase signal to erase the one or more groups of flash memory cells and, in response to the signal, switch operating parameters of the flash memory device from first parameters corresponding to the first erase mode to second parameters corresponding to the second erase mode, and instruct the flash memory device to perform an erase operation on the one or more groups of flash memory cells according to the second parameters.
Hgst Netherlands B.v.
Semiconductor memory device including a dummy memory cell and programming the same
A semiconductor memory and a method of programming the same are provided. A semiconductor memory device may include a memory cell array including a plurality of normal memory cells, a select transistor, and a dummy memory cell.
Sk Hynix Inc.
Non-volatile memory and method with adjusted timing for individual programming pulses
A non-volatile memory and method have programming circuitry that outputs a series of programming pulses of increasing voltage level to program in parallel a group of memory cells associated with a selected word line. Individual timing of the programming pulses such as rise and fall times of the pulse is optimally and dynamically adjusted according to the relative numbers of program-enabled and program-inhibited memory cells in the group associated with that pulse..
Sandisk Technologies, Inc.
Programming of drain side word line to reduce program disturb and charge loss
Techniques are provided for programming the memory cells of a drain-side edge word line of a set of word lines before programming memory cells of any other word line of the set. Pass voltages applied to the other word lines act as stress pulses which redistribute holes in the charge-trapping material of the memory cells of the other word lines to reduce short-term charge loss and downshifting of the threshold voltage.
Sandisk Technologies Inc.
Eprom cell array, operating the same, and memory device including the same
A memory cell array includes local blocks disposed in parallel with rows and arrayed along a direction parallel with columns, first selection lines being parallel with the rows and including a couple of first selection lines connected to each of the local blocks, second selection lines disposed in parallel with the columns, and local block selectors disposed between the plurality of local blocks. Each of the local block selectors is disposed between a qth wherein, “q” is an odd number local block and a (q+1)th local block among the local blocks to electrically connect unit cells disposed in any one of the qt local block and the (q+1)th local block to the second selection lines.
Sk Hynix Inc.
Content addressable memory array
A memory apparatus includes a content addressable memory, cam, cell block including cam cells and a random access memory (ram), cell block including ram cells. A geometric footprint of each of the cam cells has a side bigger than a side of a geometric footprint of each of the ram cells, where the sides of the cam cells and the ram cells are parallel to each other.
International Business Machines Corporation
Resistive memory device, resistive memory system, and operating method thereof
A method for operating a memory device includes sensing a change in temperature of the memory device, adjusting a level of a reference current for a read operation, and reading data from memory cells of the memory device based on the adjusted level of the reference current. The level of the reference current is adjusted from a reference value to a first value when the temperature of the memory device increases and is adjusted from the reference value to a second value when the temperature of the memory device decreases.
Samsung Electronics Co., Ltd.
Threshold voltage distribution determination
Apparatuses and methods for threshold voltage (vt) distribution determination are described. A number of apparatuses can include sense circuitry configured to determine a first current on a source line of an array of memory cells, the first current corresponding to a first quantity of memory cells of a group of memory cells that conducts in response to a first sensing voltage applied to an access line and determine a second current on the source line, the second current corresponding to a second quantity of memory cells of the group that conducts in response to a second sensing voltage applied to the access line.
Micron Technology, Inc.
Techniques for data retention in memory cells during power interruption
Volatile memory is described, comprising: (i) a first inverter comprising a first p-type field effect transistor (fet) connected to a first n-type fet; (ii) a second inverter comprising a second p-type fet connected to a second n-type fet; (iii) a third p-type fet; (iv) a fourth p-type fet; and (v) a floating line connecting (i) a source of the third p-type fet, and (ii) a source of the fourth p-type fet, wherein: (a) the first data line is connected to: a gate of the second p-type fet, a gate of the second n-type fet, a drain of the third p-type fet, and a gate of the fourth p-type fet, and (b) the second data line is connected to: a gate of the first p-type fet, a gate of the first n-type fet, a drain of the fourth p-type fet, and a gate of the third p-type fet.. .
Devices, systems and methods of setting machines
A self-refresh device, adopted in a memory array including a plurality of memory cells, includes a first word-line selecting module, which is enabled according to a first main-word-line signal, and a self-refresh controller. The first word-line selecting module includes a first selecting device, which selects a first word line according to a first word-line driving signal, and a second selecting device, which selects a second word line according to a second word-line driving signal.
Winbond Electronics Corp.
Disclosed herein is a device that includes a memory cell array including plurality of word lines, a plurality of bit lines each intersecting the word lines and a plurality of memory cells each disposed at an associated one of intersections of the word and bit lines, and the device further includes a driver configured to drive a selected one of the word lines from an inactive level to an active and to drive the selected one of the word lines from the active level to an intermediate level at a first rate and from the intermediated level to the inactive level at a second rate. The intermediate level is between the active and inactive levels, and the first rate is greater than the second rate..
Ps4 Luxco S.a.r.l.
Memory device with shared read/write circuitry
In some examples, a memory device may be configured to read or write multiple bit cells as part of the same operation. In some cases, the tunnel junctions forming the bit cells may be arranged to utilize shared read/write circuitry.
Everspin Technologies, Inc.
Memory device with differential bit cells
In some examples, a memory device may be configured to utilize differential bit cells formed from two or more tunnel junctions. In some cases, the tunnel junctions forming the differential bit cell may be arranged to utilize shared read circuitry to reduce device mismatch.
Everspin Technologies, Inc.
Lighting management in virtual worlds
A method includes providing a three-dimensional virtual environment by executing instructions and displaying the environment in two dimensions on a display screen of a computerized appliance, defining a matrix of cells within space of the virtual environment having objects with surfaces positioned by coordinates virtual environment, determining relative occupancy values for cells intersection of objects with cells, determining in the direction of light sources, relative illumination values for the cells with consideration of intensity and direction and occupancy values, including occlusion effects from cell to cell, and displaying illumination effects on surfaces of objects by managing pixel colors and intensity according to illumination values of adjacent cells.. .
Readable matrix code
A method of generating a readable matrix code image encoding a message based on an input image and a readable matrix coding specification, comprising: calculating function areas readable to comply with a function patterns specification; determining an extent of free cells and derived cells according to a code word specification; calculating decode input values for free cells such that the appearance of the free cells compared to respective areas of the input image complies with a visual perceptual similarity criterion and with the code word specification; and calculating decode input values for derived cells based on the free cells decode input values and in compliance with the code word specification.. .
Hierarchical fill in a design layout
This application discloses a computing system implementing one or more tools or mechanism configured to capture a hierarchy of a circuit design layout generated by a downstream tool. The hierarchy can include multiple cells that identify corresponding portions of the circuit design layout.
Mentor Graphics Corporation
Integrated circuit and designing layout of integrated circuit
A method of designing a layout of an integrated circuit (ic) includes placing a first cell in the layout, placing a second cell in the layout adjacent to the first cell at a first boundary between the first and second cells, and generating a plurality of commands executable by a processor to form a semiconductor device based on the layout. The first cell includes a first pattern and a second pattern.
Surface modified unit cell lattice structures for optimized secure freeform fabrication
Aspects of the present disclosure relate generally to preparing models of three-dimensional structures. In particular, a model of a three-dimensional structure constructed of porous geometries is prepared.
The University Of Liverpool
Efficient memory architecture for low density parity check decoding
A low density parity check (ldpc) decoder integrated on a single semiconductor substrate may comprise one or more arrays of first-type memory cells and one or more arrays of second-type memory cells. The ldpc decoder may be configured to store intrinsic messages in the array of first-type cells and to store extrinsic messages in the array of second-type cells.
System and pre-encoding of data for direct write to multi-level cell memory
A method and system for reducing data transfers between memory controller and multi-level cell (mlc) non-volatile memory during programming passes of a word line (wl) in the non-volatile memory. The system includes a controller and non-volatile memory having multiple wls, each wl having a plurality of mlc memory cells.
Sandisk Technologies Inc.
Error processing method, memory storage device and memory controlling circuit unit
An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The rewritable non-volatile memory module includes a plurality of memory cells.
Phison Electronics Corp.
Method for wear leveling in a nonvolatile memory
A method for writing and reading data in memory cells, comprising, when writing a data in a block of a first memory zone, a step consisting of writing in a second memory zone a temporary information structure metadata comprising a start flag, an identifier of the temporary information structure, an information about the location of the block in the first memory zone, and a final flag, and, after a power on of the first memory zone, searching for an anomaly in temporary information structures present in the second memory zone.. .
Stmicroelectronics (rousset) Sas
Computing reduction and prefix sum operations in memory
The present disclosure includes apparatuses and methods for computing reduction and prefix sum operations in memory. A number of embodiments include processing circuitry configured to compute a reduction operation on data stored in a group of memory cells by splitting the data into a plurality of elements, copying each of the plurality of elements into elements that are wider than before being copied, and performing a logical operation associated with the reduction operation on each of the copied elements..
Micron Technology, Inc.
Nonvolatile memory and method with state encoding and page-by-page programming yielding invariant read points
A flash memory allows a range of charges to be programmed into its cells to represent 8 distinct memory states, which are encoded by 3 bits (upper, middle, lower) of data. A page of memory cells which is programmed or read in parallel yields corresponding upper, middle and lower data pages.
Sandisk Technologies, Inc.
Parallel touch point detection using processor graphics
Technologies for touch point detection include a computing device configured to receive input frames from a touch screen, identify touch point centroids and cluster boundaries, and track touch points. The computing device may group cells of the input frame into blocks.
Hover position calculation in a touchscreen device
A method calculates the position of a conductive object hovering above a plurality of mutual capacitance sensors, where each mutual capacitance sensor is represented as a unit cell in an array of unit cells. The method measures the capacitance of each sensor.
Parade Technologies, Ltd.
Peak detection schemes for touch position detection
Apparatuses and methods of peak detection are described. One method measures touch data on a sense array, the touch data represented as multiple cells.
Parade Technologies, Ltd.
Transparent resistive random access memory cells
Provided are resistive switching cells and methods of using such cells for controlling operation of liquid crystal display (lcd) cells in lcd devices. A resistive switching cell has two electrodes formed from transparent conductive oxides, such as indium oxide, indium tin oxide, or zinc oxide.
Voltage measurement for multiple cell battery pack
A method and apparatus to detect cell voltage of each of a plurality of battery cells in a rechargeable battery pack is disclosed. The method comprises generating a square wave form with a positive phase and a negative phase, sending the square wave form to a first circuit that is connected to a battery cell and to a second circuit with matching components of the first circuit, and finally driving a matching voltage of the second circuit to become equivalent to the battery cell voltage for measurement..
Therapeutic antibodies against ror-1 protein and methods for use of same
Therapeutic antibodies having binding specificity for ror-1 expressed on cancer cells (particularly leukemic and lymphomic cells) and pharmaceutical compositions containing one or more such antibodies for use in treating cancer. Methods for diagnosing such cancers through in vitro detection of binding to ror-1 protein expressed on putative cancer cells are also provided..
The Regents Of The University Of California
Intercellular labeling of ligand-receptor interactions
An sortase-mediated intercellular labeling method allowing for tracking ligand-receptor interaction both in vitro and in vivo; and uses thereof for tracking molecule interactions both in vitro and in vivo, identifying modulators of ligand-receptor interaction, identifying potential binding partners of a protein of interest, identifying b cells expressing high affinity b cell receptors to antigens, and identifying the antigen to which a t cell of interest binds.. .
Whitehead Institute For Biomedical Research
Methods for diagnosis, prognosis and methods of treatment
This invention is directed to methods and compositions for diagnosis, prognosis and for determining methods of treatment. The physiological status of cells present in a sample (e.g.
Materials and methods for assaying living cells
The present invention provides a device for assaying living cells comprising a substrate, wherein the substrate comprises one or more tethering molecules which adhere to the substrate and are capable of interacting with cell membranes of the cells, wherein the cells maintain a free-floating, non-adherent character when bound to the one or more tethering molecules.. .
Gas sensor system
A gas sensor system (1) includes a gas sensor (2) having a cell (14) electrically communicating with a first terminal t1 and a second terminal t2, and a cell (24) electrically communicating with t2 and a third terminal t3; and a sensor control section (40) including detection circuits (41, 43) for detecting the terminal potentials v1, v3. The sensor control section includes circuit (44) for bringing t2 to an examination potential vex; constant current circuits (47, 48) for supplying examination currents ipoc, icp; terminal potential detection means s5 for detecting v1, v3 before the gas sensor detects the gas concentration in an activated state, and in a state in which t2 is brought to examination potential vex and ipoc, icp are supplied to the cells (14, 24); and wire breakage determination means s6, s10 for determining a wire breakage anomaly and its location based on the v1, v3..
Ngk Spark Plug Co., Ltd.
Methods of collecting cells from multi-well plates for use in flow cytometry
A method of collecting cells from individual wells of a multi-well plate for use in flow cytometry, the method including adding a suspension of cells to wells of the multi-well plate; and aspirating cells from different wells according to a collection pattern into a flow cytometer, wherein the collection pattern is a sequential ordering of wells beginning at a middle region of the multi-well plate and continuing towards an outer region of the multi-well plate. The method preferably including rotating or agitating the multi-well plate between steps of aspirating cells from different wells.
Acea Biosciences, Inc.
Cooled bread and pastry container
A bread and pastry container is provided with a thermoelectric panel to set up convective currents which at their colder portions promote the condensation of humidity with the drier current portion then drawn through the container by the draft created around the hot side of the thermoelectric panel. A set of photovoltaic cells may be mounted on the container to provide the power for the thermoelectric panel..
Fuel cell stack and manufacturing the same, fuel cell module, high-temperature water vapor electrolysis cell stack, and manufacturing the same
A fuel cell stack 101 includes a plurality of fuel cells 105 in which a fuel electrode 109, a solid oxide electrolyte 111, and an air electrode 113 are sequentially laminated, an interconnector 107 that electrically connects the fuel cells 105 which are adjacent to each other, and an interconnector connecting layer 108 that is interposed directly between the air electrode 113 and the interconnector 107. The interconnector connecting layer 108 is formed from a material, which is expressed by a composition formula of (la1-x-ysrxcay)zmno3-appmsio2-dppmmgo (provided that, 0<x≦0.4, 0<y≦0.4, 0.1≦x+y≦0.5, 0.95≦z<1, a: 10 to 300, d: 10 to 400), through firing..
Mitsubishi Hitachi Power Systems, Ltd.
Engineered leather and methods of manufacture thereof
Engineered animal skin, hide, and leather comprising a plurality of layers of collagen formed by cultured animal collagen-producing (e.g., skin) cells. Layers may be formed by elongate multicellular bodies comprising a plurality of cultured animal cells that are adhered and/or cohered to one another; wherein the elongate multicellular bodies are arranged to form a substantially planar layer for use in formation of engineered animal skin, hide, and leather.
Aptamer specific to colorectal cancer cell and application thereof
The present invention provides an aptamer specific to colorectal cancer cells and comprises a nucleotide sequence selected from the group consisting of seq id: no. 1 to seq id: no.
National Tsing Hua University
Composition for detecting undifferentiated human pluripotent stem cell, monoclonal antibody 6-1 and use thereof
The present invention relates to a composition for detecting the undifferentiated human pluripotent stem cells comprising an agent useful for measuring the level of desmoglein 2 (dsg 2) mrna or the protein thereof, a kit for detecting the undifferentiated human pluripotent stem cells comprising the said composition, a method for detecting the undifferentiated human pluripotent stem cells containing the step of measuring the level of desmoglein 2 mrna or the protein thereof, a method for evaluating the differentiation of human pluripotent stem cells and thereafter for separating the undifferentiated human pluripotent stem cells, a method for reducing the undifferentiated status of human pluripotent stem cells by inhibiting the expression or activation of desmoglein 2, and a monoclonal antibody binding specifically to human desmoglein 2.. .
Korea Research Institute Of Bioscience And Biotechnology
Methods of using inductively coupled plasma mass spectroscopy systems for analyzing a cellular sample
The invention relates to the use of inductively coupled plasma mass spectroscopy for cellular sample analysis. In some embodiments a method of performing mass spectroscopy analysis using an inductively coupled plasma mass spectroscopy system is provided.
Fluidigm Canada Inc.
Methods of genome sequencing and epigenetic analysis
Novel methods of chip-seq are disclosed herein. These methods of chip-seq employ carrier dna to prevent loss of dna samples.
Carnegie Institution Of Washington
Viral vectors for the treatment of retinal dystrophy
The present invention relates to viral vectors that are capable of delivering a heterologous gene to the retina and in particular delivering rlbp1 to rpe and müller cells of the retina. The invention also relates nucleic acids useful for producing viral vectors, compositions comprising the viral vectors and uses of the compositions and viral vectors.
Production of vectors for non-dividing host cells
A high-volume gene therapy vector manufacturing process, entailing using a recombinant baculovirus to transform a producer cell, which producer cell in turn produces a recombinant gene therapy vector which is able to transform host cells even when they are not dividing.. .
Finvector Vision Therapies Ltd.
Enhanced expression and stability regions
Expression-enhancing nucleotide sequences for expression in eukaryotic systems are provided that allow for enhanced and stable expression of recombinant proteins in eukaryotic cells. Enhanced expression and stability regions (eesyrs) are provided for expression of a gene of interest in a eukaryotic cell.
Regeneron Pharmaceuticals, Inc.
Process of providing plants with abiotic stress resistance
Crop growth management system comprising a process of providing a plant with improved abiotic stress tolerance, comprising providing aerial parts of said plant with a suspension containing cells of an agrobacterium strain comprising a nucleic acid molecule comprising a nucleic acid construct containing a nucleotide sequence of interest, said nucleotide sequence of interest providing said plant with increased abiotic stress tolerance upon expression in said plant.. .
Nomad Bioscience Gmbh
Yeast promoters from pichia pastoris
In accordance with the invention, isolated nucleic acids, expression methods, host cells, expression vectors, and dna constructs for producing proteins, and proteins produced using the expression methods are described. More particularly, nucleic acids isolated from pichia pastoris wherein the nucleic acids have promoter activity are described.
Keck Graduate Institute Of Applied Life Sciences
Method of growing cells on a droplet actuator
A method of growing cells on a droplet actuator is provided. The method may include providing a droplet actuator including a cell culture droplet including a cell culture medium and one or more cells; and maintaining the droplet at a temperature suitable for causing the cells to grow in the cell culture medium on the droplet actuator.
Advanced Liquid Logic, Inc.
Antimicrobial enzyme fusions reduce resistance and kill intracellular staphylococcus aureus
Multi-drug resistant bacteria are a persistent problem in modern health care, food safety and animal health. There is a need for new antimicrobials to replace over-used conventional antibiotics.
The United States Of America, As Represented By The Secretary Of Agriculture
Engineered renal tissues, arrays thereof, and methods of making the same
Disclosed are renal tissues and arrays thereof that include a layer of renal interstitial tissue, the renal interstitial tissue comprising renal fibroblasts and endothelial cells; and a layer of renal epithelial tissue, the renal epithelial tissue comprising renal tubular epithelial cells, the renal epithelial tissue in contact with the layer of renal interstitial tissue to form a three-dimensional, engineered, biological renal tissue. Also disclosed are methods of fabricating and using the same..
Induction medium and methods for stem cell culture and therapy
Novel msc stem-cell culture and therapy methods and culture medium compositions for the purpose of inducing, activating, or priming discrete uniform cell phenotypes to selectively promote or suppress inflammation and immunity, yielding polarized, primed, activated, or induced cells used in cell-based therapy.. .
Wibiworks Therapeutics, Inc.
Expansion of renewable stem cell populations
Ex vivo and in vivo methods of expansion of renewable stem cells, expanded populations of renewable stem cells and their uses.. .
Enriched and expanded human cord blood stem cells for treatment of hematological disorders
This invention relates to an enriched population of isolated and expanded human cord blood stem cells and a method of producing an enriched population of isolated and expanded human cord blood stem cells. The expanded human cord blood stem cells are cd34+, cd90+, cd1 84+, cd1 17+, cd49f+, aldh+, cd45ra− and express pluripotency genes sox2, oct4, nanog, and zic3.
Icahn School Of Medicine At Mount Sinai
Method for preparing nk cells
A method for expanding nk cells includes the steps of expanding hematopoietic precursor cells under a single culturing condition using a medium supplemented with il-15, scf, il-7 and flt3l, and differentially inducing the cells obtained in the expanding step into nk cells under a culturing condition using a medium supplemented with il-2. A pharmaceutical composition contains the nk cells prepared by the method for expanding nk cells of the present invention.
Blood-cell producing bio-microreactor
The present disclosure provides devices composed of a three-dimensional biocompatible matrix having hematopoietic stem or other progenitor cells embedded in the matrix, and a perfusable microvessel forming a lumen disposed within the matrix. The devices are useful for production of blood and cells and particles and for in vitro assays.
University Of Washington
Methods of obtaining cell populations enriched with desired cells
Provided is a method including providing a population of cells including a target type of differentiated cells having a pre-identified cytoskeletal profile and at least one cell selected from undifferentiated cells, differentiating cells and differentiated cells being different from the target type of differentiated cells; and incubating the population of cells with a cytotoxic agent, in an amount and for a time period effective to form a modified population of cells including predominantly or consisting essentially of the target type of differentiated cells. The pre-identified cytoskeletal profile can include the presence of class iii β-tubulin on neuronal cells and the population of cells includes neural cells and neuronal cells..
Hadasit Medical Research Services & Development Limited
Microfluidic device for cell spheroid culture and analysis
The invention relates to a microfluidic device for culturing spheroids of human or animal body cells. The device can generate ample numbers (e.g., 5000) of uniform-sized spheroids, and the spheroids can be harvested for conventional biochemistry analysis (e.g.
Engineering of a novel breast tumor microenvironment on a microfluidic chip
A microfluidic device for more accurately modeling the in vitro environment in which cancer occurs is disclosed. The device comprises a surface defining one or more microfluidic channels that may further comprise one or more endothelial cells, a first three dimensional scaffold comprising one or more cancer cells that is spatially separated from the one or more microfluidic channels, and a second three dimensional scaffold comprising one or more stromal cells, at least a portion of which is interposed between the one or more microfluidic channels and the first three dimensional scaffold.