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This page is updated frequently with new Assertion-related patent applications.




 Apparatus and  dynamically aligned source synchronous receiver patent thumbnailApparatus and dynamically aligned source synchronous receiver
An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a bit lag control element, and a synchronous lag receiver.
Via Technologies, Inc.


 Verification of system assertions in simulation patent thumbnailVerification of system assertions in simulation
A method for design verification includes receiving a definition of a design of an integrated circuit device and at least one assertion of a property that is to be verified over the design. The definition is compiled into a graph of processing elements, including first processing elements that simulate operation of the device and at least one second processing element representing the at least one assertion.
Rocketick Technologies Ltd.


 Apparatus and  dynamically aligned source synchronous receiver patent thumbnailApparatus and dynamically aligned source synchronous receiver
A method is provided that compensates for misalignment on a synchronous data bus. The method includes: replicating propagation path lengths, loads, and buffering of a radial distribution network for a strobe; receiving a first signal, and generating a second signal by employing the replicated propagation path lengths, loads, and buffering; when an update signal is asserted, when an update signal is asserted, measuring a propagation time beginning with assertion of the first signal and ending with assertion of the second signal by selecting one of a plurality of successively delayed versions of the first signal that coincides with the assertion of the second signal, wherein said selecting comprises incrementing and decrementing bus states of select inputs on a mux, wherein the plurality of successively delayed versions of the first signal comprises inputs to the mux; gray encoding a value on a lag bus that indicates the propagation time; and receiving one of a plurality of radially distributed strobes and a data bit, and delaying registering of the data bit by the propagation time.
Via Technologies, Inc.


 Apparatuses and methods for arbitrating a shared terminal for calibration of an impedance termination patent thumbnailApparatuses and methods for arbitrating a shared terminal for calibration of an impedance termination
An arbitration system and method is disclosed. The apparatus includes first and second memory devices, and a resistor coupled in common to the first and second memory devices, the first memory device including a first calibration circuit configured to perform, when activated, a first calibration operation based on the resistor and a first arbiter configured to activate the first calibration circuit responsive, at least in part, to an assertion of a first command or keep the first calibration circuit inactive irrespective of the assertion of the first command..
Micron Technology, Inc.


 Technologies for end-to-end biometric-based authentication and platform locality assertion patent thumbnailTechnologies for end-to-end biometric-based authentication and platform locality assertion
Technologies for end-to-end biometric-based authentication and locality assertion include a computing device with one or more biometric devices. The computing device may securely exchange a key between a driver and a secure enclave.
Intel Corporation


 Source synchronous data strobe misalignment compensation mechanism patent thumbnailSource synchronous data strobe misalignment compensation mechanism
An apparatus is provided that compensates for misalignment on a synchronous data bus, the apparatus includes a replica radial distribution element, a bit lag control element, and a synchronous lag receiver. The replica radial distribution element is configured to receive a lag pulse signal, and is configured to generate a replicated strobe signal, where the replica radial distribution network includes replicated propagation path lengths, loads, and buffering of a radial distribution network for a strobe.
Via Technologies, Inc.


 Apparatus and  locally optimizing source synchronous data strobes patent thumbnailApparatus and locally optimizing source synchronous data strobes
An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a bit lag control element, and a synchronous lag receiver.
Via Technologies, Inc.


 Apparatus and  automatically aligning data signals and strobe signals on a source syncrhonous bus patent thumbnailApparatus and automatically aligning data signals and strobe signals on a source syncrhonous bus
An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a joint test action group (jtag) interface, and a bit lag control element.
Via Technologies, Inc.


 Apparatus and  automatically aligning data signals and strobe signals on a source syncrhonous bus patent thumbnailApparatus and automatically aligning data signals and strobe signals on a source syncrhonous bus
An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a joint test action group (jtag) interface, and a bit lag control element.
Via Technologies, Inc.


 Event-based  securing bios in a trusted computing system during execution patent thumbnailEvent-based securing bios in a trusted computing system during execution
An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.


Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Event-based securing bios in a trusted computing system during execution

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), an event detector, and a tamper detector.
Via Technologies, Inc.

Constructing custom knowledgebases and sequence datasets with publications

Illustrative embodiments of custom knowledgebases and sequence datasets, as well as related methods, are disclosed. In one illustrative embodiment, one or more computer-readable media may comprise a custom knowledgebase and an associated sequence dataset.
Battelle Memorial Institute

Multi-phase current mode control loop incorporating a distributed transconductance stage

A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to a common output node.
Apple Inc.

Debugging scan latch circuits using flip devices

A latch circuit having a master latch and a slave latch includes a device used to short either the master latch or the slave latch. The device includes a transistor and a global control used to assert a signal, and is positioned to short an inverter of the master latch or the slave latch.
International Business Machines Corporation

Solving np-complete problems without hyper polynomial cost

Within satisfaction problems or any decision or other problem which is reducible to a satisfaction problem, the invention tracks the paths along which implications propagate and identifies conditional contradictions and subsequently moves the contradictions back down the implicational paths toward assumptions or other unreasoned assertions in order to expel the contradictions. The action is completed in less time than is incurred by existing methods and thus provides a performance improvement to the devices, software, or processes which address such problems.

Multichip package link

Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the physical link identifying that valid data is to follow assertion of the valid signal on the one or more data lanes, and receive a stream signal on another of the lanes of the physical link identifying a type of the data on the one or more data lanes.. .
Intel Corporation

Static analysis based efficient elimination of false positive

A method and a system is disclosed herein for model checker based efficient elimination of false positives from static analysis warnings generated during static analysis of an application code. The system computes complete-range non-deterministic value variables (cnv variables) that are based on data flow analysis or static approximation of execution paths by control flow paths.
Tata Consultancy Services Limited

Characteristics of security associations

Authentication of a user or a wireless transmit/receive unit may be based on an obtained measure of authentication strength, which may referred to as an assurance level. For example, a user, via a wtru, may request access to a service controlled by an access control entity (ace).
Interdigitial Patent Holdings, Inc.

Input buffer with selectable hysteresis and speed

A buffer provides a signal at an output node as a function of an input signal. First and second buffer stages have respective current conduction paths for asserting the output signal.
Freescale Semiconductor, Inc.

Usb power delivery dead-battery control

A method of power delivery. Port controllers each include a state machine, an io pin, a receptacle supply pin receiving power from a receptacle, and a gate driver pin coupled to a control node of a power path switch each having an output coupled to a load.
Texas Instruments Incorporated

Image sensor with noise reduction

Systems and methods are disclosed for reducing reset noise in an image sensor. Voltage on the column read out is sensed during reset.
Invisage Technologies, Inc.

Fuse-enabled secure bios mechanism with override feature

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), a tamper detector, a random number generator, a jtag control chain, a fuse, a machine specific register, and an access controller.
Via Technologies, Inc.

Fuse-enabled secure bios mechanism in a trusted computing system

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), a tamper detector, a random number generator, a jtag control chain, a fuse, and an access controller.
Via Technologies, Inc.

Jtag-based secure bios mechanism in a trusted computing system

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), a tamper detector, a random number generator, and a jtag control chain.
Via Technologies, Inc.

Programmable secure bios mechanism in a trusted computing system

An apparatus is provided for protecting a basic input/output system (bios) in a computing system. The apparatus includes a bios read only memory (rom), a tamper detector, a random number generator, and a jtag control chain.
Via Technologies, Inc.

Insulating synchronous rectifying dc/dc converter, synchronous rectifying controller, power supply using the same, power adapter and electronic device, and control synchronous rectifying controller

A synchronous rectifying controller on secondary side of insulating synchronous rectifying converter to control synchronous rectifying transistor, comprising: first comparator to compare drain voltage of the transistor with first negative threshold voltage, and assert set signal based on the comparison of them; second comparator to compare drain voltage with second negative threshold voltage, and assert reset signal based on the comparison of them; third comparator to compare drain voltage with third positive threshold voltage, and assert release signal based on the comparison of them; control circuit set in response to the assertion of the set signal and to adjust control pulse to have on level, and reset in response to the assertion of the reset signal and to adjust the control pulse to have off level; and driver to drive the transistor, wherein set operation of the control circuit is inhibited until the release signal is asserted.. .
Rohm Co., Ltd.

Trusted execution of an executable object on a local device

In one example embodiment, an electronic device is provided and configured to: acquire authentication data for an authorized user; store the authentication data in an enclave; acquire identification data for a potential user; and compare, in the enclave, the identification data to the authentication data for recognizing if the potential user is the authorized user. In another embodiment, a server is provided and includes at least one processor; at least one memory; at least one driver, where the server is configured to: receive assertion data from an electronic device, where the assertion includes an authentication signing key and results from a comparison of acquired data and reference data; and determine if the assertion data is valid by: comparing the results to a threshold; and comparing the authentication signing key to an authentication signing key assigned to the electronic device..
Mcafee, Inc.

Continuous integration of business intelligence software

Methods for automatically testing a business intelligence artifact in a business intelligence system include authoring a business intelligence artifact; creating an assertion with conditions to verify the proper functioning of the business intelligence artifact; testing, with an automated agent interfaced with the business intelligence system, the business intelligence artifact to verify its proper functioning by determining whether the conditions of the assertion are satisfied; and reporting if the conditions of the assertion are not satisfied.. .
Motio, Inc.

System and proxying federated authentication protocols

A system and method that include receiving a service provider identity request through a federated authentication protocol; transmitting a proxy identity request to a configured identity provider; receiving an identity assertion; facilitating execution of a second layer of authentication; determining a proxy identity assertion based on the identity assertion and the second layer of authentication; and transmitting the proxy identity assertion to the service provider.. .
Duo Security, Inc.

Communication apparatus, control apparatus, and communication system

A communication apparatus for transmitting and receiving data is configured to: store assertion information in which a failure detection condition is registered, the failure detection condition including information for identifying data that is not to be received during normal operation; refer to the assertion information when data has been received from another communication apparatus; judge whether or not the received data satisfies the failure detection condition registered in the assertion information; and detect a failure when it is judged that the received data satisfies the failure detection condition registered in the assertion information.. .
Hitachi Metals, Ltd.

System and managing and composing verification engines

A system and method for managing and composing verification engines and simultaneously applying such compositions to verify properties with design constraints allocates computing resources to verification engines based upon properties to be checked and optionally a user-specified budget. The verification engines are run in order to verify a received register transfer level (rtl) design description of a circuit according to user-specified assertions and constraints received by the system.
Synopsys, Inc

Personal knowledge graph population from declarative user utterances

An “utterance-based knowledge tool” monitors user utterances (e.g., user speech or text inputs) to identify relevant statements of facts in declarative utterances of a user. A semantic parser is applied to each statement of facts to parse assertions comprising instances of two or more entities and relations between those entities.
Microsoft Technology Licensing, Llc

Method and enabling access to applications integrated with a visited network

An application server receives a request for service from a wireless transmit/receive unit (wtru) associated with a home network that includes a home subscriber server (hss) and a bootstrapping server function (bsf) coupled via a zh reference point. The application server authenticates the wtru at least in part by (i) redirecting the wtru to an identity provider co-located with a network application function (idp/naf) and coupled to the bsf via a zn reference point and (ii) receiving an assertion from the wtru that the idp/naf has authenticated the wtru based on user security settings retrieved from the bsf by the idp/naf over the zn reference point.
Interdigital Patent Holdings, Inc

Lifting of bounded liveness counterexamples to concrete liveness counterexamples

A trace of a bounded liveness failure of a system component is received, by one or more processors, along with fairness constraints and liveness assertion conditions. One or more processors generate randomized values for unassigned input values and register values, of the trace, and simulate traversal of each of a sequence of states of the trace.
International Business Machines Corporation

Lifting of bounded liveness counterexamples to concrete liveness counterexamples

A trace of a bounded liveness failure of a system component is received, by one or more processors, along with fairness constraints and liveness assertion conditions. One or more processors generate randomized values for unassigned input values and register values, of the trace, and simulate traversal of each of a sequence of states of the trace.
International Business Machines Corporation

Circuits and methods providing clock frequency adjustment in response to supply voltage changes

Methods, systems, and circuits for providing compensation for voltage variation are disclosed. A system includes: a voltage comparator configured to assert a control signal in response to detecting that one or more of power supply voltages droops below a threshold amount; a phase locked loop (pll) configured to divide an output frequency for the pll in response to the assertion of the control signal; a plurality of voltage sensors corresponding to the plurality of power supply voltages, the voltage sensors configured to output respective digital signals indicative of a voltage level of its corresponding power supply voltage; and a control circuit configured to control an oscillator frequency in the pll during the open-loop mode responsive to the respective digital signals..
Qualcomm Incorporated

Methods and generating and using security assertions associated with containers in a computing environment

Methods and apparatus are disclosed to generate a security assertion document associated with a container image, and to use the security assertion document to determine whether a container image is suitable for use to assemble a corresponding container for execution in a host environment. In an example method, the generated security assertion document includes a security assertion resulting from an assessed policy rule.
Vmware, Inc.

Ultra-low power long range transceiver

A low power long range transceiver is presented. The transceiver includes: an antenna configured to receive an rf signal; an analog front-end circuit configured to receive the rf signal from the antenna and pre-condition the rf signal by at least one of amplify the rf signal, shift frequency of the rf signal and filter the rf signal; and a demodulator configured to receive the preconditioned signal from the front-end circuit and an assertion trigger signal signifying an end of a predefined time period, where the demodulator, in response to the assertion trigger signal, outputs a data value for a given data bit in the rf signal.
The Regents Of The University Of Michigan

Identity authentication platform

A system and method for identity authentication, including: registering an identity card issued by an authoritative entity to an individual with an identity authentication platform including generating a reference face recognition template for the individual in response to the identity card presented by the individual during registration; obtaining a real-time photograph of the individual in response to an assertion of an identity made by the individual; and authenticating the assertion made by the individual by generating a target face recognition template in response to the real-time photograph and matching the target face recognition template to the reference face recognition template.. .
Hotcoal Inc.

Using ontologies to comprehend regular expressions

Ontologies are used to comprehend regular expressions, by selecting, based on a context relating to a domain of a regular expression, an ontology and an assertion base, parsing the regular expression to identify at least one fragment of the regular expression, identifying one or more assertions in the assertion base corresponding to one of the identified fragments, identifying, for each identified assertion, an associated node in the ontology, and returning, based on the associated nodes, a concept in the ontology as representing the associated fragment of the regular expression.. .
International Business Machines Corporation

Single sign-on for managed mobile devices

Disclosed are various examples for single-sign on by way of managed mobile devices. For example, an identity provider service can receive a request for an identity assertion from an application executed in a client device.
Airwatch Llc

Single sign-on for unmanaged mobile devices

Disclosed are various examples for providing a single sign-on experience for mobile applications that may or may not be managed. A first application executed in a client device sends an access request to a service provider.
Airwatch Llc

Extension of model-based design to identify and analyze impact of reliability information on systems and components

Methods and devices for providing and using a technical computing environment (tce) for receiving a tce model that, when executed, simulates behavior of a dynamic physical system, and that represents one or more physical components and their respective reliability information in a block diagram model. Applications of the model include automated system-level datasheet and bill of materials generation, component reliability information discovery, fault and stress assertions, and identification of emergent faults..
The Mathworks, Inc.

Configurable mapping of timer channels to protection groups

An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (mcu) that comprises a central processing unit (cpu) coupled to a plurality of timer channels and a plurality of programmable group output disable (ptgod) circuits.
Renesas Electronics America Inc.

Media stream trust display

Media stream trust display techniques are described in which trust information regarding content elements is accessible on an individual element basis. In particular, composite content having various content elements is rendered via a user interface of a browser or other application that supports web-based communications.
Microsoft Technology Licensing, Llc



Assertion topics:
  • Social Networking
  • Social Network
  • Networking
  • Machine Learning
  • Repository
  • Clock Divider
  • High Speed
  • Graphics Processing Unit
  • Interactive
  • Breakpoint
  • Concurrent
  • Concurrency
  • Expressions
  • Deasserted
  • Storage Device


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    This listing is a sample listing of patent applications related to Assertion for is only meant as a recent sample of applications filed, not a comprehensive history. There may be associated servicemarks and trademarks related to these patents. Please check with patent attorney if you need further assistance or plan to use for business purposes. This patent data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Assertion with additional patents listed. Browse our RSS directory or Search for other possible listings.


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