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Assertion

Assertion-related patent applications - as published by the U.S. Patent and Trademark Office (USPTO).


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NEW Holographic technology implemented security solution
Tyco Fire & Security Gmbh
January 18, 2018 - N°20180018867

Disclosed are techniques that use mixed reality, e. G., augmented reality and virtual reality technologies to improve analysis of security situations. These techniques merge the physical world embodied in security systems with the virtual world of policies and analytics. Upon receiving an assertion of an alarm condition from a security system that processes sensor signals a server sends messages to ...
Physically aware test patterns in semiconductor fabrication
International Business Machines Corporation
January 11, 2018 - N°20180011962

A method for fabricating a circuit comprises identifying a target on the circuit with a transitional sensitivity, determining a test pattern that stresses the target, generating a verification model at the hierarchy of the target, creating a pattern and translating the pattern into a verification assertion, running the verification with the translated pattern, determining whether the verification assertion is a ...
Method of and system for flame sensing and diagnostic
Lennox Industries Inc.
January 11, 2018 - N°20180010823

A method of determining presence of a flame in a furnace of a heating, ventilation, and air conditioning (hvac) system. The method comprises determining, using a controller, whether a processor signal (g) is active, responsive to a determination that the processor signal (g) is active, determining, using the controller prior to assertion of a flame-test input control signal, an output ...
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Attribute-based access control
International Business Machines Corporation
December 28, 2017 - N°20170374060

A received security token includes first access control attributes and a signature of a first identity provider of a first security domain. Additional access control attributes provided by a second identity provider of a second security domain are added into the received security token. The received security token with the added additional access control attributes is re-signed, with a private ...
Continuous multi-factor authentication
Intel Corporation
December 28, 2017 - N°20170374055

Technologies for continuously authenticating a user via multiple authentication factors include a computing device for generating a continuous authentication assertion indicating that continuous authentication of a user is being monitored, sending the continuous authentication assertion to a key distribution center server, and requesting and receiving an initial ticket from the key distribution center server. Such technologies may also include requesting ...
Reduced power set-reset latch based flip-flop
Apple Inc.
December 21, 2017 - N°20170366170

An apparatus includes a master latch circuit including a first circuit and a second circuit, and a slave latch circuit including a third circuit and a fourth circuit. The first circuit and the second circuit may be coupled to a first shared circuit node, and the third circuit and the fourth circuit may be coupled to a second shared circuit ...
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Automated assertion reuse for improved record linkage in distributed & autonomous healthcare environments with heterogeneous ...
Koninklijke Philips N. V.
December 21, 2017 - N°20170364639

An assertion acceptance value matrix (300) indicates the reliability of assertions, particularly assertions or decisions whether records match or do not match, made by other medical institutions in a federation of medical institutions with different patient record systems and some common patients. Records from different institutions with a high likelihood of matching or not matching are automatically matched or not matched. ...
Livelock detection in a hardware design using formal evaluation logic
Imagination Technologies Limited
December 21, 2017 - N°20170364609

A hardware monitor arranged to detect livelock in a hardware design for an integrated circuit. The hardware monitor includes monitor and detection logic configured to detect when a particular state has occurred in an instantiation of the hardware design; and assertion evaluation logic configured to periodically evaluate one or more assertions that assert a formal property related to reoccurrence of ...
Efficient sorting for a stream processing engine
Microsoft Technology Licensing, Llc
December 14, 2017 - N°20170359398

The techniques and systems described herein are directed to incremental sorting in a stream processing engine. For example, because of network delays, streaming data can be received at a stream processing engine that is out-of-order with respect to the timestamp of the event generation. Streaming data can be incrementally sorted by partitioning events into ordered runs, which provide intermediate arrays ...
Deadlock detection in hardware design using assertion based verification
Imagination Technologies Limited
December 14, 2017 - N°20170357742

Methods and systems for detecting deadlock in a hardware design. The method comprises identifying one or more control signals in the hardware design; generating a state machine for each of the one or more control signals to track the state of the control signal; generating one or more assertions for each control signal to detect that the control signal is ...
System for synchronous rectifier voltage regulator shoot-through detection
Dell Products, Lp
December 14, 2017 - N°20170357309

A method, circuit, and information handling system detect an assertion of a low side gate driver signal of a low side gate driver coupled to a low side gate of a low side selectively conductive device, to obtain a reference voltage value, to detect a local high side positive supply voltage at a high side positive supply voltage terminal of ...
Providing access to a hardware resource based on a canary value
Cryptography Research, Inc.
December 07, 2017 - N°20170353318

A container corresponding to executable code may be received. In response receiving the container, an assertion value may be stored in an assertion register. A final canary value may be generated based on a cycles combining a prior canary value and a mix value. A determination may be made as to whether the final canary value matches with the assertion ...
Technologies for token-based authentication and authorization of distributed computing resources
Vantiv, Llc
November 30, 2017 - N°20170346807

Technologies for token-based access authorization to an application program interface (api) include an access management server to receive a service request message from an application executed by a remote computing device. The service request message includes a digitally signed license token previously generated by the access management server and distributed to the remote computing device. The service request message also ...
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Unified vpn and identity based authentication to cloud-based services
Mobileiron, Inc.
November 16, 2017 - N°20170331815

Techniques are disclosed to provide vpn and identity based authentication to cloud-based services. In various embodiments, a request to authenticate a user to a service is received. A user identity associated with one or both of the user and the request is determined based at least in part on data comprising the request. An identity assertion is generated based at ...
Technologies for authentication and single-sign-on using device security assertions
Intel Corporation
November 09, 2017 - N°20170324731

Technologies for remote device authentication include a client computing device, an identity provider, and an application server in communication over a network. The identity provider sends an authentication challenge to the client. A capability proxy of the client intercepts an authentication challenge response and retrieves one or more security assertions from a secure environment of the client computing device. The ...
Hybrid control technique for power converters
Semiconductor Components Industries, Llc
November 09, 2017 - N°20170324345

A power conversion circuit includes a high-side mosfet and a low-side mosfet. A conduction terminal of the high-side mosfet is coupled to a conduction terminal of the low-side mosfet at a half-bridge (hb) circuit node. The high-side mosfet is switched off. Voltage potential transitions of the hb circuit node are counted while the high-side mosfet and low-side mosfet are off. ...
Bilateral assertion model and ledger implementation thereof
Chicago Mercantile Exchange Inc.
October 12, 2017 - N°20170295023

A computer implemented method for implementing a real time reconciling shared data structure is disclosed. The shared data structure may be stored in a memory, and a portion of the shared data structure may be coupled with a processor. The computer implemented method may be used for interacting with the shared data structure. The method may comprise the exchange of ...
Interactive competitive advertising commentary
T-mobile Usa, Inc.
October 12, 2017 - N°20170293938

A sponsoring brand may provide an application for mobile devices that allows users to take pictures of competitor advertisements and that provides responses to any assertions found in the competitor advertisements. The application may instruct a user to capture an image of an advertisement. Various types of detection and/or recognition components may be used to analyze the image to ...
Methods and systems for secure and reliable identity-based computing
Advanced Elemental Technologies, Inc.
October 12, 2017 - N°20170293763

The embodiments herein provide a secure computing resource set identification, evaluation, and management arrangement, employing in various embodiments some or all of the following highly reliable identity related means to establish, register, publish and securely employ user computing arrangement resources in satisfaction of user set target contextual purposes. Systems and methods may include, as applicable, software and hardware implementations for ...
Bilateral assertion model and ledger implementation thereof
Chicago Mercantile Exchange Inc.
October 12, 2017 - N°20170293669

A computer implemented method for implementing a real time reconciling shared data structure is disclosed. The shared data structure may be stored in a memory, and a portion of the shared data structure may be coupled with a processor. The computer implemented method may be used for interacting with the shared data structure. The method may comprise the exchange of ...
Deterministic read back and error detection for programmable logic devices
Lattice Semiconductor Corporation
October 12, 2017 - N°20170293518

Various techniques are provided to efficiently implement deterministic read back and error detection for programmable logic devices (plds). In one example, a pld includes an array of memory cells arranged in rows and columns, where at least one row includes an enable bit. The pld further includes an address logic circuit configured to selectively assert the columns of the array ...
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