|| List of recent Amplifier Circuit-related patents
| Semiconductor memory device having otp cell array|
Provided is a semiconductor memory device. The semiconductor includes a one time programmable (otp) cell array, a converging circuit and a sense amplifier circuit.
| Amplifier circuits|
Radio frequency (rf) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed rf amplifier circuits may employ a baseband decoupling network connected in parallel with a low-pass rf matching network of the amplifier circuit..
| Operational amplifier circuit and method implementing the same|
The disclosure provides an operational amplifier circuit, in which a power supply of an amplifying circuit is coupled to a first voltage clamping circuit, and the first voltage clamping circuit clamps a supply voltage of the amplifying circuit when the supply voltage exceeds a normal-operation allowable voltage of the amplifying circuit. The disclosure also provides a method for implementing the operational amplifier circuit.
| Amplifier circuit|
An amplifier circuit includes a differential amplifier circuit configured to amplify a voltage between a signal input to a first input terminal and a signal input to a second input terminal, a plurality of output circuits each configured to output a signal corresponding to a signal output from the differential amplifier circuit, and a control circuit configured to set a selected one of the plurality of output circuits in an operating state to drive an output terminal of the selected output circuit, and set a remaining output circuit in a non-operating state and set an output terminal of the remaining output circuit in a high impedance state.. .
| Detection device provided with a transimpedance circuit|
The invention concerns a detection device including a photodiode (ph) designed to capture a luminous signal to transform it into a current (lph) and including first and second terminals, a transimpedance amplifier circuit connected between the first terminal and the second terminal of the photodiode (ph) and designed to amplify the current (lph) coming from the photodiode (ph). The transimpedance amplifier circuit includes a plurality of operational amplifiers (aop1, aop2, aop3) connected in parallel and a gain resistor (rgain) common to all the connected amplifiers..
| Binary image sensors and unit pixels thereof|
A binary image sensor includes a plurality of unit pixels on a substrate having a surface on which light is incident. At least one quantum dot is disposed on the surface of a substrate.
|Fluid ejection device and fluid ejection printer with a power amplifier stopping section|
A fluid ejection device includes: a modulator adapted to pulse-modulate a drive waveform signal forming a basis of a drive signal of an actuator to obtain a modulated signal; a digital power amplifier circuit adapted to power-amplify the modulated signal to obtain a power-amplified modulated signal; a low pass filter adapted to smooth the power-amplified modulated signal to obtain the drive signal; and a power amplification stopping section operating when holding a voltage of the actuator constant.. .
|Electron spin resonance for medical imaging|
A method includes generating, from an integrated oscillator circuit, an oscillating output signal and generating, by an integrated power amplifier (pa) circuit, an amplified oscillating output signal based on the oscillating output signal. The method further includes receiving, by integrated receiver amplifier circuit, an electron spin resonance (esr) signal from biological samples that include a magnetic species and generating, by the integrated receiver amplifier circuit, an amplified esr signal based on the received esr signal.
|Implantable wireless neural device|
Systems and methods for providing an electrical interface to a body are provided. In one embodiment, an implantable module is disclosed, comprising: an implantable electrode array, implantable within a body and capable of providing a plurality of communication channels for communicating electrical signals detected in a body; an amplifier circuit for processing electrical signals received from the electrode array; a wireless transceiver for sending and receiving telemetry data between the amplifier circuit and a wireless receiver located outside of the body; and a sealed enclosure that houses the amplifier circuit and the wireless transmitter and is biocompatible with surrounding tissue, the enclosure having a window that is transparent to a wireless medium used by the wireless transceiver.
|Multi-mode power amplifier|
A multi-mode power amplifier includes a high-power mode amplifier circuit, a mid-power mode amplifier circuit, and a low power amplifier circuit, where the low-power mode amplifier circuit comprises a plurality of independently selectable power cell/amplifier branches. The multi-mode power amplifiers selectively enable or disable amplifier branches to provide multiple levels of amplification.
|Cross-point variable resistance nonvolatile memory device|
A cross-point memory device including memory cells each includes: a variable resistance element that reversibly changes at least between a low resistance state and a high resistance state; and a current steering element that has nonlinear current-voltage characteristics, and the cross-point memory device comprises a read circuit which includes: a reference voltage generation circuit which comprises at least the current steering element; a differential amplifier circuit which performs current amplification on an output voltage in the reference voltage generation circuit; a feedback controlled bit line voltage clamp circuit which sets the low voltage side reference voltage to increase with an output of the differential amplifier circuit; and a sense amplifier circuit which determines a resistance state of a selected memory cell according to an amount of current flowing through the selected memory cell.. .
|Data processing device and data processing system|
In ad conversion of a voltage, data continuity is ensured between the results of conversion after amplification and of direct conversion without amplification. In ad conversion operation, an analog signal output from a da converter circuit is directly converted by an ad converter circuit, and the analog signal is converted after amplification with an expected gain of 2′.
|Integrated comparator with hysteresis, in particular produced in an fd soi technology|
A comparator circuit includes an input differential amplifier circuit generating an output signal and an inverting output circuit generating a complemented output signal. The differential amplifier circuit is formed of a differential pair of input transistors and a pair of diode connected load transistors.
|Intergrated electron spin resonance spectrometer|
An integrated electron spin resonance (esr) circuit chip includes a chip substrate, a transmitter circuit, and a receiver circuit. The transmitter circuit and receiver circuit are disposed on the chip substrate.
|Receiving circuit and signal receiving method|
Provided is a receiving circuit that operates in a power supply system different from a transmitting circuit outputting a transmission signal and receives the transmission signal through an ac coupling device where a primary coil through which the transmission signal flows and a secondary coil having a center tap to which a specified voltage is supplied from an external terminal are magnetically coupled, which includes a pulse width amplifier circuit that holds pulse signals appearing at both ends of the secondary coil for a specified period of time and outputs them as hold signals, respectively, and a differential amplifier that compares a voltage of the hold signal and a voltage of the hold signal and outputs a comparison result.. .
|Method for setting transistor operating point and circuit therefor, method for changing signal component value and active-matrix liquid crystal display device|
A data signal voltage on a signal line 102 is held in a voltage holding capacitor 106 through an n-type mos transistor 103 switched on by a gate scan voltage, and supplied to an analog amplifier circuit 104-1. The analog amplifier circuit 104-1 is formed of an mos transistor having a double gate structure, and the operating point thereof is set at an operating range in which dependence of ids on vds is substantially nullified.
|Back side illuminated global shutter image sensors with back side charge storage|
A back side illuminated image sensor may be provided with an array of image sensor pixels. Each pixel may include a substrate having a front surface and a back surface.
|Operational amplifier module and method for enhancing driving capability of operational amplifier circuit|
An operational amplifier module including an operational amplifier circuit and a comparator circuit is provided. The operational amplifier circuit includes an input stage circuit and an output stage circuit.
|Doherty amplifier with efficiency optimization|
An amplifier comprises a main-amplifier circuit, an auxiliary-amplifier circuit and a signal-generating device. Output terminals of the main-amplifier circuit and of the auxiliary-amplifier circuit are connected according to the doherty principle.
|Method for setting transistor operating point and circuit therefor, method for changing signal component value and active-matrix liquid crystal display device|
A data signal voltage on a signal line is held in a voltage holding capacitor through an n-type mos transistor switched on by a gate scan voltage, and supplied to an analog amplifier circuit. The analog amplifier circuit is formed of an mos transistor having a double gate structure, and the operating point thereof is set at an operating range in which dependence of ids on vds is substantially nullified.
|Power supply switching circuit|
Provided is a power supply switching circuit capable of suppressing a load fluctuation such as undershoot that occurs at an output terminal at the time of power supply switching. The power supply switching circuit includes: a battery connected to the output terminal; a replica current generation circuit for generating a replica current that is proportional to a current flowing from the battery to the output terminal; a voltage regulator connected to the output terminal, the voltage regulator including a reference voltage circuit, an error amplifier circuit, an output transistor, and a voltage divider circuit; and a current mirror circuit for causing the replica current to flow through the output transistor of the voltage regulator..
|Data readout circuit of phase change memory|
A data readout circuit of phase change memory, relating to one or more phase change memory cells, wherein each phase change memory cell is connected to the control circuit by bit line and word line; said data readout circuit comprises: a clamp voltage generating circuit, used to generate a clamp voltage; a precharge circuit, used to fast charge bit line under the control of a clamp voltage; a clamped current generating circuit, used to generate a clamped current to keep bit line at clamped state under the control of a clamp voltage; a clamped current operation circuit, used to perform subtraction and multiplication on clamped current to increase the difference of clamped current between high resistance state and low resistance state; a sense amplifier circuit, used to compare the operated clamped current and the reference current and output the readout result. Compared with the prior art, the data readout circuit of phase change memory provided by the present invention can effectively enhance the data readout speed, decrease the misreading window between high resistance state and low resistance state, reduce the crosstalk of data readout, and improve the reliability of data readout..
|Power amplifier with stabilising network|
A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.. .
|Operational amplifier module and method for increasing slew rate of operational amplifier circuit|
An operational amplifier module including an operational amplifier circuit, a rate-increasing circuit and an overdriving circuit is provided. The operational amplifier switches an input voltage to an output voltage and outputs the switched output voltage.
An amplifier circuit comprising a driver (204, 304) configured to provide a switched mode input signal, a switching mode power amplifier (206, 306) configured to receive the switched mode input signal and provide an output signal for an external load (210, 310); and a sensor (208, 308) configured to sense the impedance of the external load (210, 310) the driver is configured to set the duty cycle of the switched mode input signal in accordance with the sensed impedance of the external load (210, 310).. .
|Method for determining optimum power amplifier configurations using list mode testing|
A calibration system for calibrating wireless circuitry in an electronic device is provided. The test system may include test equipment, a computer, and a device under test (dut).
|Memory device and method of performing a read operation within such a memory device|
A memory device is provided comprising an array of memory cells. During a read operation, voltage on a read bit line will transition towards a second voltage level if a data value stored in that activated memory cell has a first value, and sense amplifier circuitry will then detect this situation.
|Otp scheme with multiple magnetic tunnel junction devices in a cell|
A one time programming (otp) apparatus unit cell includes multiple magnetic tunnel junctions (mtjs) and a shared access transistor coupled between the multiple mtjs and a fixed potential. Each of the multiple mtjs in a unit cell can be coupled to separate programming circuitry and/or separate sense amplifier circuitry so that they can be individually programmed and/or individually sensed.
|Matching network for transmission circuitry|
The present disclosure relates to transmission circuitry of a wireless communication device. The transmission circuitry includes power amplifier circuitry, an output matching network, and impedance control circuitry.
|Passive bypass for network extending|
In one or more embodiments, a cellular signal is received and directed to a path bypassing active amplifier circuitry. This may be in response to the active amplifier circuitry being non-operational (e.g., in a fault state) or detecting that an rf environment does not necessitate amplification.
|Amplifier circuit and wireless communication equipment|
A quadrature modulation error is compensated without providing an additional feedback loop for detecting quadrature modulation error. An amplifier circuit includes: a quadrature modulator; an amplifier that amplifies a quadrature-modulated signal; a distortion compensation section that compensates distortion to be caused in the amplifier based on first compensation coefficients; a quadrature modulation error compensation section that compensates for a quadrature modulation error; an updating section that updates second compensation coefficients for compensating the quadrature modulation error; an error estimation section that estimates an error of the quadrature modulation error; and a prediction section that calculates a prediction value of an output of the amplifier after updating of the second compensation coefficients.
|Reception device and reception method|
A reception device and corresponding method for maintaining a high dynamic range of an ad converter circuit and preventing excessive input to the ad converter circuit is disclosed. For example, a reception device includes a variable gain amplifier circuit that amplifies an input analog signal with a gain controlled by a predetermined control signal, an analog-to-digital converter circuit an overload detector circuit with the same frequency characteristic as the analog-to-digital converter circuit.
|External programmable dfe strength|
A decision feedback equalizer is disclosed. The decision feedback equalizer comprises an amplifier circuit and a latch.
|Power amplifier with variable output impedance|
A power amplifier circuit, comprising: an amplifier for receiving an input signal to be amplified; a power input for coupling the amplifier to a power supply; and a transformer for providing the amplified signal from the amplifier to a load, comprising a primary inductor and a secondary inductor. The power amplifier circuit is characterized by: a first capacitor coupled in parallel with the primary inductor; and a second capacitor coupled in parallel with the secondary inductor; wherein at least one of the first and second capacitors has a variable capacitance..
|Quasi-broadband doherty amplifier with associated capacitor circuit|
An amplifier provides a first amplifier circuit (16), a second amplifier circuit (17), a first hybrid-coupler circuit (18) and a termination (3). The hybrid-coupler circuit (18) provides an output terminal (13) and an insulation terminal (12).
|Electric charge detection circuit|
Ends on one side of physical quantity detection sensors formed of any of an electric charge generation-type sensor and a capacitance change-type sensor can be connected to negative electrode input terminals of a differential amplifier circuit, and ends on the other side are connected to positive electrode input terminals of the differential amplifier circuit. A feedback resistor and a feedback capacitor are connected in parallel between the negative electrode input terminal and an output terminal of the differential amplifier circuit, and a cancel resistor and a cancel capacitor are connected in parallel between a reference voltage and the positive electrode input terminal of the differential amplifier circuit.
|Radiation image pickup device|
A radiation image pickup device includes: an image pickup section having a plurality of pixels and generating an electric signal according to incident radiation, the plurality of pixels each including a photoelectric conversion element and one or a plurality of transistors of a predetermined amplifier circuit; and a correction section subjecting signal data of the electric signal obtained in the image pickup section to predetermined correction process. The correction section makes a comparison between measurement data obtained by measuring an input-output characteristic of the amplifier circuit in each of the plurality of pixels and initial data on the input-output characteristic, and performs the correction process by the pixel individually, by using a result of the comparison..
A source amp output circuit (10) is provided with a switching circuit (17) for carrying out the following operation. That is, in a case where a polarity is reversed, the switching circuit (17) disconnects a data signal line (s(m)) from output terminals of a positive amplifier circuit (15) and a negative polarity amplifier circuit (16) each included in the source amp output circuit (10), and then connects the data signal line s(m) to a power supply which is in a power supply voltage range (vdd1 to vdd3) of the positive polarity amplifier circuit (15) or to a power supply which is in a power supply voltage range (vdd2 to vdd4) of the negative polarity amplifier circuit (16)..
|Techniques for sensing a semiconductor memory device|
Techniques for sensing a semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a semiconductor memory device comprising a plurality of memory cells arranged in an array of rows and columns and data sense amplifier circuitry coupled to at least one of the plurality of memory cells.
|Power management architecture for modulated and constant supply operation|
A power management system, which includes a parallel amplifier circuit and a switch mode power supply converter, is disclosed. The switch mode power supply converter cooperatively operates with the parallel amplifier circuit to form the power management system.
|Power amplifier circuit|
A power amplifier circuit, comprising: a final stage, comprising first and second amplifying elements for amplifying an input signal; and a driver stage, for providing the input signal to the final stage. The circuit is characterized by a first capacitor coupled between an input of the first amplifying element and an output of the second amplifying element; and a second capacitor coupled between an input of the second amplifying element and an output of the first amplifying element..
|Power amplifier circuit|
A power amplifier circuit, comprising: an input for receiving an input signal to be amplified; a power supply; an amplifier, coupled to the input and the power supply; and a cascode device coupled between the power supply and the amplifier. The circuit is characterized by: a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (ctat)..
|Readout integrated circuit for dynamic imaging|
A sampling circuit for dynamic imaging is provided. Specifically, embodiments of the present invention relate to a readout integrated circuit (roic) for dynamic imaging and a related image sensor.
|Sense amplifier circuit for nonvolatile memory|
A sense amplifier circuit for a nonvolatile memory that includes a first amplifier to perform a switching operation to output a first signal on a sense amplifier based logic (sabl) node depending on the state of a sensing enable signal, a second amplifier to perform a switching operation to output a second signal on the sabl node depending on the state of the sensing enable signal, a current mirror that sinks current on the sabl node depending on the sensing enable signal and a bit line signal, and an inverter arranged to output the signal on the sabl node as a data signal.. .
|Nonvolatile memory device and method for voltage trimming thereof|
A non-volatile semiconductor storage device includes memory blocks that each includes multiple memory strings. A bit line connects to an end of each string in the memory blocks and to a sense amplifier circuit which includes a first transistor.
|Operational amplifier with improved frequency compensation|
An operational amplifier includes an operational amplifier circuit having at least one output node and an output stage coupled to the output node, the output stage containing an output and first mos transistor employed in a common source amplifier mode, a frequency compensation capacitor coupled between the output of the output stage and the gate of the first transistor circuit by means of a second mos transistor employed in a common gate amplifier mode. The other node of the capacitor and the output of the output stage are coupled to the amplifier output node with a resistor..
|Digitally controlled high speed high voltage gate driver circuit|
The present invention relates to semiconductor technology. In particular, the present invention relates to high-speed, high voltage switching for a high voltage generator for an x-ray system.
|Soft-start control techniques for a switched-mode power supply|
A power supply system including switched-mode power supply circuitry configured to generate a dc output voltage from a dc input voltage and soft-start feedback circuitry configured to control the switched-mode power supply circuitry to generate a predefined output voltage during a soft-start period of operation. The soft-start feedback circuitry includes a controllable current source configured to generate a reference current and a reference voltage, wherein the reference current is based on a difference between the reference voltage and a feedback voltage proportional to the output voltage, and amplifier circuitry configured to compare the feedback voltage with the reference voltage and generate a control signal to control the operation of the switched-mode power supply during a soft-start period of operation..
|Preamplifier circuit for a microelectromechanical capacitive acoustic transducer|
Described herein is a preamplifier circuit for a capacitive acoustic transducer provided with a mems detection structure that generates a capacitive variation as a function of an acoustic signal to be detected, starting from a capacitance at rest; the preamplifier circuit is provided with an amplification stage that generates a differential output signal correlated to the capacitive variation. In particular, the amplification stage is an input stage of the preamplifier circuit and has a fully differential amplifier having a first differential input (inp) directly connected to the mems detection structure and a second differential input (inn) connected to a reference capacitive element, which has a value of capacitance equal to the capacitance at rest of the mems detection structure and fixed with respect to the acoustic signal to be detected; the fully differential amplifier amplifies the capacitive variation and generates the differential output signal..
|Power amplifier apparatus and power amplifier circuit|
The present invention relates to a power amplifier apparatus and a power amplifier circuit thereof, the power amplifier circuit uses doherty circuit structure, and it uses a high voltage heterojunction bipolar transistor (hvhbt) power amplifier to achieve a carrier amplifier with the doherty circuit structure, and uses a high electron mobility transistor (hemt) power amplifier to achieve a peak amplifier with the doherty circuit structure. The power amplifier apparatus and a power amplifier circuit thereof in the present invention improves the efficiency of the power amplifier..
|Power amplifier device and power amplifier circuit thereof|
The present invention relates to a power amplifier apparatus and power amplifier circuit thereof, and the power amplifier circuit uses the doherty circuit structure, and the power amplifier circuit uses high voltage heterojunction bipolor transistor (hvhbt) power amplifiers to achieve a carrier amplifier and a peak amplifier of the doherty circuit structure. The power amplifier apparatus and power amplifier circuit thereof in the present invention improves the efficiency of the power amplification..
|Power amplifier apparatus and power amplifier circuit|
The present invention relates to a power amplifier apparatus and a power amplifier circuit. The power amplifier circuit uses a doherty circuit structure, uses a high electron mobility transistor (hemt) power amplifier to implement a carrier amplifier with the doherty circuit structure, and uses a laterally diffused metal oxide semiconductor field effect transistor (ldmos) to implement a peak amplifier.
|Multimode differential amplifier biasing system|
Differential power amplifier circuitry includes a differential transistor pair, an input transformer, and biasing circuitry. The base contact of each transistor in the differential transistor pair may be coupled to the input transformer through a coupling capacitor.
|Sense amplifier circuit and memory device including the same|
A sense amplifier circuit includes a first pull-up transistor configured to pull-up drive a data bar line in response to a voltage of a data line, a first pull-down transistor configured to pull-down drive the data bar line in response to the voltage of the data line, and to receive the voltage of the data line through a back gate of the first pull-down transistor, a second pull-up transistor configured to pull-up drive the data line in response to a voltage of the data bar line, and a second pull-down transistor configured to pull-down drive the data line in response to the voltage of the data bar line, and to receive the voltage of the data bar line through a back gate of the second pull-down transistor.. .
Provided is a voltage regulator including an overcurrent protection circuit using a simple circuit. The voltage regulator includes the overcurrent protection circuit including: a first sense transistor having a gate connected to an output terminal of an error amplifier circuit and a drain connected to a sense resistor; a second sense transistor having a gate connected to the output terminal of the error amplifier circuit; and a control transistor having a gate connected to an output terminal of a control circuit, a source connected to a drain of the second sense transistor, and a drain connected to the sense resistor, in which the control transistor is turned on in response to a detection signal output by the control circuit until a reference voltage exceeds a predetermined voltage..
|Display device, and method for driving display device|
In order to provide a display device and a method for driving a display device, each of which is capable of repairing a disconnection in a data signal line and further reduces electric power consumption, a display device (1) includes a repair amplifier control section (14) for causing a repair amplifier circuit (12) to operate at a low-performance level during any period within a period from when scanning of pixels in the display area in the display device (1) is finished to when next scanning is started.. .
|Amplifier circuits and methods|
A chopper amplifier circuit for sensing hall voltage with reduced offsets includes a hall sampling circuit with a first switching circuit for selectively coupling each of four nodes of a hall plate to either a power source or a ground terminal. The circuit also includes a differential amplifier and a second switching circuit configured for selectively coupling each of the four nodes to inputs of the differential amplifier.
An auxiliary wire, which can be connected to each of a plurality of data signal lines (sn), is constituted by (i) a first auxiliary wire (17) provided so as to intersect the plurality of data signal lines (sn) on a side where end parts of the respective plurality of data signal lines (sn) are connected to a data signal line driving circuit (4) and (ii) a second auxiliary wire (18) provided so as to intersect the plurality of data signal lines (sn) on a side of the other end parts of the respective plurality of data signal lines (sn). Between the first auxiliary wire (17) and the second auxiliary wire (17), there are provided (i) a positive-polarity amplifier circuit (6) for receiving a positive data signal from the data signal line driving circuit (4) and (ii) a negative-polarity amplifier circuit (7) for receiving a negative data signal from the data signal line driving circuit (4).
|De-multiplexing a radio frequency input signal using output transformer circuitry|
The present disclosure relates to de-multiplexing at least one rf input signal feeding rf power amplifier circuitry to create multiple de-multiplexed rf output signals, which may be used to provide rf transmit signals in an rf communications system. Output transformer circuitry is coupled to outputs from the rf power amplifier circuitry to provide the de-multiplexed rf output signals, which may support multiple modes, multiple frequency bands, or both.
|Semiconductor memory device|
A semiconductor memory device includes a sense amplifier circuit region including first wells disposed in a first direction, a driving circuit region including second wells disposed in a second direction, and a conjunction region disposed at an intersection region of the sense amplifier circuit region and the driving circuit region, a part of each of the first wells extending from the sense amplifier circuit region into the conjunction region, and the second wells being outside of the conjunction region.. .
|Memory device and a method of operating such a memory device in a speculative read mode|
A memory includes an array of memory cells with each memory cell coupled to an associated pair of bit lines. Read control circuitry is configured to activate a number of addressed memory cells in order to couple each addressed memory cell to its associated pair of bit lines.
|Photoelectric smoke detector and process for testing the photoelectric smoke detector|
A photoelectric smoke detector 1 for detecting smoke particles 4 is disclosed, the smoke detector 1 comprising: a light emitting element 5, a light receiving element 6 for receiving light 8 emitted by the light emitting element 5 and scattered by the smoke particles 4 and for outputting a detection signal 12 obtained by photoelectrical converting the received light 10, 11, an amplifier circuit 13 for amplifying the detection signal 12 and providing an amplified output signal 14, wherein the amplified output signal 14 may be divided into an offset-signal 20 and an amplified detection signal 21, whereby the photoelectric smoke detector 1 is adapted to operate in a pulsed mode, so that the detection signal 12 comprises high-frequency components, whereby the amplified detection signal 21 is determined by high-frequency components of the detection signal 12 and that the offset-signal 20 is determined by low-frequency components of the detection signal 12 and/or by low-frequency components of at least an intermediate signal based on the detection signal 12, and whereby the amplifier circuit 13 is adapted to transfer the high-frequency components with a higher gain and to transfer the low-frequency components with a lower gain in order to improve the signal ratio between the amplified detection signal 21 and the off-set-signal 20.. .
|Amplifiers with enhanced power supply rejection ratio at the output stage|
An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage.
|Amplifier circuit, method and mobile communication device|
An amplifier circuit includes a gain controller, a first amplifier, and a second amplifier which is coupled in series to the first amplifier, the second amplifier comprising a plurality of amplifying units. The gain controller is configured to receive a desired gain value and provide, based on the received desired gain value, a gain adjust signal to the first amplifier, and activate, based on the received desired gain value, a certain combination of amplifying units of the plurality of amplifying units of the second amplifier, such that a combined gain of the first amplifier and the active amplifying units of the second amplifier corresponds to the received desired gain value.
|Semiconductor integrated circuit apparatus and radio-frequency power amplifier module|
In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods.
|System and method for reducing desensitization of a base station transceiver for mobile wireless repeater systems|
A repeater system including bi-directional amplifier circuitry that is configured for repeating signals between at least one device and a first signal source. Receiver circuitry is coupled with the amplifier circuitry provides at least one signal associated with at least one of a device or the first signal source or a second signal source.
|Pon video overlay amplifier circuit|
An amplifier circuit in a pon and a method for using the same. The amplifier circuit may be used, for example in an onu of the pon.
|Amplifier circuit for a two-wire interface|
The invention relates to an amplifier circuit (10a, 10b) for a two-wire interface, comprising a first current path (1), comprising a voltage-controlled current source (t1) having a gate (gt1), which is connected to an input connection (e1) of the amplifier circuit. A second current path (2) of the amplifier circuit comprises a voltage-controlled current source (t2), which is connected in series with the second resistor (r2).
|Microphone amplifier circuit|
The invention provides a microphone amplifier circuit which enhances the snr (signal noise ratio) and expands the dynamic range by reducing the noise level. A microphone amplifier circuit includes a preamplifier which amplifies an audio signal from a capacitor microphone, a level detection circuit which outputs a level detection signal when the level of the audio signal is in the vicinity of the noise level of the microphone amplifier circuit, and an attenuator which attenuates the level of the audio signal outputted from the preamplifier in response to the level detection signal.